[meta-xilinx] [kernel:spi] controller without 8 bit support

Adrian Fiergolski Adrian.Fiergolski at cern.ch
Mon Mar 13 13:38:26 PDT 2017


How to use xilinx-spi with a Xilinx SPI IP supporting 16 bit transmission ?

In current implementation I observe transmissions errors (SPI mirror
implemented in FPGA fabric) as only part of the 16 bit word is being sent.


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