[meta-freescale] Setting VDD_SOC in i.MX6Q

Teemu K maillinglists18 at gmail.com
Mon Aug 27 01:00:16 PDT 2018


This is somewhat simple thing that turned out not to be so simple.

We have custom i.MX6Q based HW running Yocto 2.4 and Linux 4.1-2.0...
and VDDARM_IN is set to 1.425V. Also VDDSOC_IN is set to 1.425V. They
both come from external PMIC as usually do.

Now the VDD_SOC_CAP should be set to 1.375V without changing the
VDDARM_IN. I think this should be possible by setting the LDO_DIG(SOC)
to 1.375V.

That's the part that I couldn't figure out.  I have following in device tree:
                        fsl,soc-operating-points = <
                                /* ARM kHz  SOC-PU uV */
                                1200000 1375000
                                996000  1375000
                                852000  1375000
                                792000  1375000
                                396000  1375000

But that controls the PMIC and LDO. I just want to change the LDO
output (VDD_SOC_CAP). I only seem to be able to same both values not
just one.

Should that be possible and how to do it?


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