[meta-freescale] [meta-fsl-arm-extra][PATCH] linux-imx (3.0.35): remove staging driver for brcm80211

John Weber rjohnweber at gmail.com
Sat Mar 16 06:45:36 PDT 2013


Removes brcm80211 driver in drivers/staging.  This is meant to be
applied with a patch to add a backported driver from kernel v3.5
which is loaded into drivers/net/wireless.

Signed-off-by: John Weber <rjohnweber at gmail.com>
---
 ...mx-3.0.35-remove-brcm80211-staging-driver.patch |123141 ++++++++++++++++++++
 1 files changed, 123142 insertions(+)
 create mode 100644 recipes-kernel/linux/linux-imx-3.0.35/wandboard-dual/0003-linux-imx-3.0.35-remove-brcm80211-staging-driver.patch

diff --git a/recipes-kernel/linux/linux-imx-3.0.35/wandboard-dual/0003-linux-imx-3.0.35-remove-brcm80211-staging-driver.patch b/recipes-kernel/linux/linux-imx-3.0.35/wandboard-dual/0003-linux-imx-3.0.35-remove-brcm80211-staging-driver.patch
new file mode 100644
index 0000000..96d3ce1
--- /dev/null
+++ b/recipes-kernel/linux/linux-imx-3.0.35/wandboard-dual/0003-linux-imx-3.0.35-remove-brcm80211-staging-driver.patch
@@ -0,0 +1,123141 @@
+From 748eb185cad62c456dcd316c941f9835520a946d Mon Sep 17 00:00:00 2001
+From: John Weber <rjohnweber at gmail.com>
+Date: Sat, 9 Mar 2013 09:23:58 -0600
+Subject: [meta-fsl-arm-extra][PATCH 1/2] linux-imx (3.0.35): remove brcm80211
+ staging driver
+
+Upstream-Status: Pending
+
+Signed-off-by: John Weber <rjohnweber at gmail.com>
+---
+ drivers/staging/Kconfig                            |    2 -
+ drivers/staging/Makefile                           |    2 -
+ drivers/staging/brcm80211/Kconfig                  |   40 -
+ drivers/staging/brcm80211/Makefile                 |   24 -
+ drivers/staging/brcm80211/README                   |   64 -
+ drivers/staging/brcm80211/TODO                     |   15 -
+ drivers/staging/brcm80211/brcmfmac/Makefile        |   56 -
+ drivers/staging/brcm80211/brcmfmac/README          |    2 -
+ drivers/staging/brcm80211/brcmfmac/aiutils.c       |    1 -
+ drivers/staging/brcm80211/brcmfmac/bcmcdc.h        |   98 -
+ drivers/staging/brcm80211/brcmfmac/bcmchip.h       |   35 -
+ drivers/staging/brcm80211/brcmfmac/bcmsdbus.h      |  113 -
+ drivers/staging/brcm80211/brcmfmac/bcmsdh.c        |  631 -
+ drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c  |  386 -
+ drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c  | 1239 -
+ drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h  |  134 -
+ .../brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c        |  235 -
+ drivers/staging/brcm80211/brcmfmac/dhd.h           |  414 -
+ drivers/staging/brcm80211/brcmfmac/dhd_bus.h       |   82 -
+ drivers/staging/brcm80211/brcmfmac/dhd_cdc.c       |  474 -
+ drivers/staging/brcm80211/brcmfmac/dhd_common.c    | 1848 --
+ .../staging/brcm80211/brcmfmac/dhd_custom_gpio.c   |  158 -
+ drivers/staging/brcm80211/brcmfmac/dhd_dbg.h       |  103 -
+ drivers/staging/brcm80211/brcmfmac/dhd_linux.c     | 2862 --
+ .../staging/brcm80211/brcmfmac/dhd_linux_sched.c   |   25 -
+ drivers/staging/brcm80211/brcmfmac/dhd_proto.h     |   90 -
+ drivers/staging/brcm80211/brcmfmac/dhd_sdio.c      | 6390 -----
+ drivers/staging/brcm80211/brcmfmac/dhdioctl.h      |  100 -
+ drivers/staging/brcm80211/brcmfmac/dngl_stats.h    |   32 -
+ .../staging/brcm80211/brcmfmac/hndrte_armtrap.h    |   75 -
+ drivers/staging/brcm80211/brcmfmac/hndrte_cons.h   |   62 -
+ drivers/staging/brcm80211/brcmfmac/msgtrace.h      |   61 -
+ drivers/staging/brcm80211/brcmfmac/sdioh.h         |   63 -
+ drivers/staging/brcm80211/brcmfmac/sdiovar.h       |   38 -
+ drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c   | 4428 ---
+ drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h   |  414 -
+ drivers/staging/brcm80211/brcmfmac/wl_iw.c         | 3693 ---
+ drivers/staging/brcm80211/brcmfmac/wl_iw.h         |  142 -
+ drivers/staging/brcm80211/brcmsmac/Makefile        |   59 -
+ drivers/staging/brcm80211/brcmsmac/aiutils.c       | 2054 --
+ drivers/staging/brcm80211/brcmsmac/aiutils.h       |  546 -
+ drivers/staging/brcm80211/brcmsmac/bcmotp.c        |  936 -
+ drivers/staging/brcm80211/brcmsmac/bcmsrom.c       |  714 -
+ drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h   |  513 -
+ drivers/staging/brcm80211/brcmsmac/d11.h           | 1773 --
+ drivers/staging/brcm80211/brcmsmac/hnddma.c        | 1756 --
+ drivers/staging/brcm80211/brcmsmac/nicpci.c        |  836 -
+ drivers/staging/brcm80211/brcmsmac/nvram.c         |  215 -
+ .../staging/brcm80211/brcmsmac/phy/phy_version.h   |   36 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c   | 3307 ---
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h   |  256 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_int.h   | 1226 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c   | 5302 ----
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h   |  119 -
+ drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c |29169 --------------------
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c |  296 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h |   40 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h | 1533 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h  |  167 -
+ .../brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c        | 3639 ---
+ .../brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h        |   49 -
+ .../staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c  |10632 -------
+ .../staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h  |   39 -
+ drivers/staging/brcm80211/brcmsmac/wl_dbg.h        |   92 -
+ drivers/staging/brcm80211/brcmsmac/wl_export.h     |   47 -
+ drivers/staging/brcm80211/brcmsmac/wl_mac80211.c   | 1942 --
+ drivers/staging/brcm80211/brcmsmac/wl_mac80211.h   |   85 -
+ drivers/staging/brcm80211/brcmsmac/wl_ucode.h      |   49 -
+ .../staging/brcm80211/brcmsmac/wl_ucode_loader.c   |  111 -
+ drivers/staging/brcm80211/brcmsmac/wlc_alloc.c     |  300 -
+ drivers/staging/brcm80211/brcmsmac/wlc_alloc.h     |   18 -
+ drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c     | 1253 -
+ drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h     |   29 -
+ drivers/staging/brcm80211/brcmsmac/wlc_antsel.c    |  320 -
+ drivers/staging/brcm80211/brcmsmac/wlc_antsel.h    |   29 -
+ drivers/staging/brcm80211/brcmsmac/wlc_bmac.c      | 3602 ---
+ drivers/staging/brcm80211/brcmsmac/wlc_bmac.h      |  179 -
+ drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h    |  135 -
+ drivers/staging/brcm80211/brcmsmac/wlc_cfg.h       |  280 -
+ drivers/staging/brcm80211/brcmsmac/wlc_channel.c   | 1557 --
+ drivers/staging/brcm80211/brcmsmac/wlc_channel.h   |  120 -
+ drivers/staging/brcm80211/brcmsmac/wlc_key.h       |  140 -
+ drivers/staging/brcm80211/brcmsmac/wlc_main.c      | 7537 -----
+ drivers/staging/brcm80211/brcmsmac/wlc_main.h      |  939 -
+ drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c  |  243 -
+ drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h  |  112 -
+ drivers/staging/brcm80211/brcmsmac/wlc_pmu.c       | 1929 --
+ drivers/staging/brcm80211/brcmsmac/wlc_pmu.h       |   58 -
+ drivers/staging/brcm80211/brcmsmac/wlc_pub.h       |  584 -
+ drivers/staging/brcm80211/brcmsmac/wlc_rate.c      |  499 -
+ drivers/staging/brcm80211/brcmsmac/wlc_rate.h      |  169 -
+ drivers/staging/brcm80211/brcmsmac/wlc_scb.h       |   80 -
+ drivers/staging/brcm80211/brcmsmac/wlc_stf.c       |  523 -
+ drivers/staging/brcm80211/brcmsmac/wlc_stf.h       |   38 -
+ drivers/staging/brcm80211/brcmsmac/wlc_types.h     |   37 -
+ drivers/staging/brcm80211/include/aidmp.h          |  374 -
+ drivers/staging/brcm80211/include/bcmdefs.h        |  150 -
+ drivers/staging/brcm80211/include/bcmdevs.h        |  124 -
+ drivers/staging/brcm80211/include/bcmnvram.h       |  153 -
+ drivers/staging/brcm80211/include/bcmotp.h         |   44 -
+ drivers/staging/brcm80211/include/bcmsdh.h         |  205 -
+ drivers/staging/brcm80211/include/bcmsdpcm.h       |  208 -
+ drivers/staging/brcm80211/include/bcmsrom.h        |   34 -
+ drivers/staging/brcm80211/include/bcmsrom_fmt.h    |  367 -
+ drivers/staging/brcm80211/include/bcmutils.h       |  500 -
+ drivers/staging/brcm80211/include/bcmwifi.h        |  167 -
+ drivers/staging/brcm80211/include/hnddma.h         |  226 -
+ drivers/staging/brcm80211/include/hndsoc.h         |  199 -
+ drivers/staging/brcm80211/include/nicpci.h         |   79 -
+ drivers/staging/brcm80211/include/pci_core.h       |  122 -
+ drivers/staging/brcm80211/include/pcicfg.h         |   50 -
+ drivers/staging/brcm80211/include/pcie_core.h      |  299 -
+ drivers/staging/brcm80211/include/proto/802.11.h   |  200 -
+ drivers/staging/brcm80211/include/proto/bcmeth.h   |   44 -
+ drivers/staging/brcm80211/include/proto/bcmevent.h |  207 -
+ drivers/staging/brcm80211/include/sbchipc.h        | 1588 --
+ drivers/staging/brcm80211/include/sbconfig.h       |  272 -
+ drivers/staging/brcm80211/include/sbhnddma.h       |  315 -
+ drivers/staging/brcm80211/include/sbsdio.h         |  152 -
+ drivers/staging/brcm80211/include/sbsdpcmdev.h     |  281 -
+ drivers/staging/brcm80211/include/sdio.h           |  552 -
+ drivers/staging/brcm80211/include/wlioctl.h        | 1365 -
+ drivers/staging/brcm80211/util/Makefile            |   29 -
+ drivers/staging/brcm80211/util/bcmutils.c          |  796 -
+ drivers/staging/brcm80211/util/bcmwifi.c           |  137 -
+ 125 files changed, 122118 deletions(-)
+ delete mode 100644 drivers/staging/brcm80211/Kconfig
+ delete mode 100644 drivers/staging/brcm80211/Makefile
+ delete mode 100644 drivers/staging/brcm80211/README
+ delete mode 100644 drivers/staging/brcm80211/TODO
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/Makefile
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/README
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/aiutils.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmcdc.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmchip.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdh.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_bus.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_common.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_linux.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_proto.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dhdioctl.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/dngl_stats.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/hndrte_cons.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/msgtrace.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/sdioh.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/sdiovar.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/wl_iw.c
+ delete mode 100644 drivers/staging/brcm80211/brcmfmac/wl_iw.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/Makefile
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/aiutils.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/aiutils.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/bcmotp.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/bcmsrom.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/d11.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/hnddma.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/nicpci.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/nvram.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/phy_version.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_dbg.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_export.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_mac80211.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_mac80211.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_ucode.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_alloc.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_alloc.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_antsel.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_antsel.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_bmac.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_bmac.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_cfg.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_channel.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_channel.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_key.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_main.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_main.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_pmu.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_pmu.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_pub.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_rate.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_rate.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_scb.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_stf.c
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_stf.h
+ delete mode 100644 drivers/staging/brcm80211/brcmsmac/wlc_types.h
+ delete mode 100644 drivers/staging/brcm80211/include/aidmp.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmdefs.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmdevs.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmnvram.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmotp.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmsdh.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmsdpcm.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmsrom.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmsrom_fmt.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmutils.h
+ delete mode 100644 drivers/staging/brcm80211/include/bcmwifi.h
+ delete mode 100644 drivers/staging/brcm80211/include/hnddma.h
+ delete mode 100644 drivers/staging/brcm80211/include/hndsoc.h
+ delete mode 100644 drivers/staging/brcm80211/include/nicpci.h
+ delete mode 100644 drivers/staging/brcm80211/include/pci_core.h
+ delete mode 100644 drivers/staging/brcm80211/include/pcicfg.h
+ delete mode 100644 drivers/staging/brcm80211/include/pcie_core.h
+ delete mode 100644 drivers/staging/brcm80211/include/proto/802.11.h
+ delete mode 100644 drivers/staging/brcm80211/include/proto/bcmeth.h
+ delete mode 100644 drivers/staging/brcm80211/include/proto/bcmevent.h
+ delete mode 100644 drivers/staging/brcm80211/include/sbchipc.h
+ delete mode 100644 drivers/staging/brcm80211/include/sbconfig.h
+ delete mode 100644 drivers/staging/brcm80211/include/sbhnddma.h
+ delete mode 100644 drivers/staging/brcm80211/include/sbsdio.h
+ delete mode 100644 drivers/staging/brcm80211/include/sbsdpcmdev.h
+ delete mode 100644 drivers/staging/brcm80211/include/sdio.h
+ delete mode 100644 drivers/staging/brcm80211/include/wlioctl.h
+ delete mode 100644 drivers/staging/brcm80211/util/Makefile
+ delete mode 100644 drivers/staging/brcm80211/util/bcmutils.c
+ delete mode 100644 drivers/staging/brcm80211/util/bcmwifi.c
+
+diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
+index 196284d..f73909f 100644
+--- a/drivers/staging/Kconfig
++++ b/drivers/staging/Kconfig
+@@ -48,8 +48,6 @@ source "drivers/staging/wlan-ng/Kconfig"
+ 
+ source "drivers/staging/echo/Kconfig"
+ 
+-source "drivers/staging/brcm80211/Kconfig"
+-
+ source "drivers/staging/comedi/Kconfig"
+ 
+ source "drivers/staging/olpc_dcon/Kconfig"
+diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
+index fa41b9c..482897c 100644
+--- a/drivers/staging/Makefile
++++ b/drivers/staging/Makefile
+@@ -16,8 +16,6 @@ obj-$(CONFIG_USBIP_CORE)	+= usbip/
+ obj-$(CONFIG_W35UND)		+= winbond/
+ obj-$(CONFIG_PRISM2_USB)	+= wlan-ng/
+ obj-$(CONFIG_ECHO)		+= echo/
+-obj-$(CONFIG_BRCMSMAC)		+= brcm80211/
+-obj-$(CONFIG_BRCMFMAC)		+= brcm80211/
+ obj-$(CONFIG_COMEDI)		+= comedi/
+ obj-$(CONFIG_FB_OLPC_DCON)	+= olpc_dcon/
+ obj-$(CONFIG_ASUS_OLED)		+= asus_oled/
+diff --git a/drivers/staging/brcm80211/Kconfig b/drivers/staging/brcm80211/Kconfig
+deleted file mode 100644
+index 379cf16..0000000
+--- a/drivers/staging/brcm80211/Kconfig
++++ /dev/null
+@@ -1,40 +0,0 @@
+-config BRCMUTIL
+-	tristate
+-	default n
+-
+-config BRCMSMAC
+-	tristate "Broadcom IEEE802.11n PCIe SoftMAC WLAN driver"
+-	default n
+-	depends on PCI
+-	depends on WLAN && MAC80211
+-	depends on X86 || MIPS
+-	select BRCMUTIL
+-	select FW_LOADER
+-	select CRC_CCITT
+-	---help---
+-	  This module adds support for PCIe wireless adapters based on Broadcom
+-	  IEEE802.11n SoftMAC chipsets.  If you choose to build a module, it'll
+-	  be called brcmsmac.ko.
+-
+-config BRCMFMAC
+-	tristate "Broadcom IEEE802.11n embedded FullMAC WLAN driver"
+-	default n
+-	depends on MMC
+-	depends on WLAN && CFG80211
+-	depends on X86 || MIPS
+-	select BRCMUTIL
+-	select FW_LOADER
+-	select WIRELESS_EXT
+-	select WEXT_PRIV
+-	---help---
+-	  This module adds support for embedded wireless adapters based on
+-	  Broadcom IEEE802.11n FullMAC chipsets.  This driver uses the kernel's
+-	  wireless extensions subsystem.  If you choose to build a module,
+-	  it'll be called brcmfmac.ko.
+-
+-config BRCMDBG
+-	bool "Broadcom driver debug functions"
+-	default n
+-	depends on BRCMSMAC || BRCMFMAC
+-	---help---
+-	  Selecting this enables additional code for debug purposes.
+diff --git a/drivers/staging/brcm80211/Makefile b/drivers/staging/brcm80211/Makefile
+deleted file mode 100644
+index e7b3f27..0000000
+--- a/drivers/staging/brcm80211/Makefile
++++ /dev/null
+@@ -1,24 +0,0 @@
+-#
+-# Makefile fragment for Broadcom 802.11n Networking Device Driver
+-#
+-# Copyright (c) 2010 Broadcom Corporation
+-#
+-# Permission to use, copy, modify, and/or distribute this software for any
+-# purpose with or without fee is hereby granted, provided that the above
+-# copyright notice and this permission notice appear in all copies.
+-#
+-# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+-# SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+-# OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+-# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-
+-# common flags
+-subdir-ccflags-y					:= -DBCMDMA32
+-subdir-ccflags-$(CONFIG_BRCMDBG)	+= -DBCMDBG -DBCMDBG_ASSERT
+-
+-obj-$(CONFIG_BRCMUTIL)	+= util/
+-obj-$(CONFIG_BRCMFMAC)	+= brcmfmac/
+-obj-$(CONFIG_BRCMSMAC)	+= brcmsmac/
+diff --git a/drivers/staging/brcm80211/README b/drivers/staging/brcm80211/README
+deleted file mode 100644
+index 8ad5586..0000000
+--- a/drivers/staging/brcm80211/README
++++ /dev/null
+@@ -1,64 +0,0 @@
+-Broadcom brcmsmac (mac80211-based softmac PCIe) and brcmfmac (SDIO) drivers.
+-
+-Completely open source host drivers, no binary object files.
+-
+-Support for the following chips:
+-===============================
+-
+-    brcmsmac (PCIe)
+-    Name        Device ID
+-    BCM4313     0x4727
+-    BCM43224    0x4353
+-    BCM43225    0x4357
+-
+-    brcmfmac (SDIO)
+-    Name
+-    BCM4329
+-
+-Both brcmsmac and brcmfmac drivers require firmware files that need to be
+-separately downloaded.
+-
+-Firmware
+-======================
+-Firmware is available from the Linux firmware repository at:
+-
+-    git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git
+-    http://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git
+-    https://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git
+-
+-
+-===============================================================
+-Broadcom brcmsmac driver
+-===============================================================
+-- Support for both 32 and 64 bit Linux kernels
+-
+-
+-Firmware installation
+-======================
+-Copy brcm/bcm43xx-0.fw and brcm/bcm43xx_hdr-0.fw to
+-/lib/firmware/brcm (or wherever firmware is normally installed
+-on your system).
+-
+-
+-===============================================================
+-Broadcom brcmfmac driver
+-===============================================================
+-- Support for 32 bit Linux kernel, 64 bit untested
+-
+-
+-Firmware installation
+-======================
+-Copy brcm/bcm4329-fullmac-4.bin and brcm/bcm4329-fullmac-4.txt
+-to /lib/firmware/brcm (or wherever firmware is normally installed on your
+-system).
+-
+-
+-Contact Info:
+-=============
+-Brett Rudley		brudley at broadcom.com
+-Henry Ptasinski		henryp at broadcom.com
+-Dowan Kim		dowan at broadcom.com
+-Roland Vossen		rvossen at broadcom.com
+-Arend van Spriel	arend at broadcom.com
+-
+-For more info, refer to: http://linuxwireless.org/en/users/Drivers/brcm80211
+diff --git a/drivers/staging/brcm80211/TODO b/drivers/staging/brcm80211/TODO
+deleted file mode 100644
+index e9c1393..0000000
+--- a/drivers/staging/brcm80211/TODO
++++ /dev/null
+@@ -1,15 +0,0 @@
+-To Do List for Broadcom Mac80211 driver before getting in mainline
+-
+-Bugs
+-====
+-- Oops on AMPDU traffic, to be solved by new ucode (currently under test)
+-
+-brcmfmac and brcmsmac
+-=====================
+-- ASSERTS not allowed in mainline, replace by warning + error handling
+-- Replace printk and WL_ERROR() with proper routines
+-
+-brcmfmac
+-=====================
+-- Replace driver's proprietary ssb interface with generic kernel ssb module
+-- Build and test on 64 bit linux kernel
+diff --git a/drivers/staging/brcm80211/brcmfmac/Makefile b/drivers/staging/brcm80211/brcmfmac/Makefile
+deleted file mode 100644
+index c5ec562..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/Makefile
++++ /dev/null
+@@ -1,56 +0,0 @@
+-#
+-# Makefile fragment for Broadcom 802.11n Networking Device Driver
+-#
+-# Copyright (c) 2010 Broadcom Corporation
+-#
+-# Permission to use, copy, modify, and/or distribute this software for any
+-# purpose with or without fee is hereby granted, provided that the above
+-# copyright notice and this permission notice appear in all copies.
+-#
+-# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+-# SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+-# OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+-# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-
+-ccflags-y :=			\
+-	-DARP_OFFLOAD_SUPPORT	\
+-	-DBCMLXSDMMC		\
+-	-DBCMPLATFORM_BUS	\
+-	-DBCMSDIO		\
+-	-DBDC			\
+-	-DBRCM_FULLMAC		\
+-	-DDHD_FIRSTREAD=64	\
+-	-DDHD_SCHED		\
+-	-DDHD_SDALIGN=64	\
+-	-DEMBEDDED_PLATFORM	\
+-	-DMAX_HDR_READ=64	\
+-	-DMMC_SDIO_ABORT	\
+-	-DPKT_FILTER_SUPPORT	\
+-	-DSHOW_EVENTS		\
+-	-DTOE
+-
+-ccflags-$(CONFIG_BRCMDBG)	+= -DDHD_DEBUG
+-
+-ccflags-y += \
+-	-Idrivers/staging/brcm80211/brcmfmac	\
+-	-Idrivers/staging/brcm80211/include
+-
+-DHDOFILES = \
+-	wl_cfg80211.o \
+-	wl_iw.o \
+-	dhd_cdc.o \
+-	dhd_common.o \
+-	dhd_custom_gpio.o \
+-	dhd_sdio.o	\
+-	dhd_linux.o \
+-	dhd_linux_sched.o \
+-	bcmsdh.o \
+-	bcmsdh_linux.o	\
+-	bcmsdh_sdmmc.o \
+-	bcmsdh_sdmmc_linux.o
+-
+-obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
+-brcmfmac-objs += $(DHDOFILES)
+diff --git a/drivers/staging/brcm80211/brcmfmac/README b/drivers/staging/brcm80211/brcmfmac/README
+deleted file mode 100644
+index 139597f..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/README
++++ /dev/null
+@@ -1,2 +0,0 @@
+-
+-
+diff --git a/drivers/staging/brcm80211/brcmfmac/aiutils.c b/drivers/staging/brcm80211/brcmfmac/aiutils.c
+deleted file mode 100644
+index e648086..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/aiutils.c
++++ /dev/null
+@@ -1 +0,0 @@
+-#include "../util/aiutils.c"
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h b/drivers/staging/brcm80211/brcmfmac/bcmcdc.h
+deleted file mode 100644
+index ed4c4a5..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h
++++ /dev/null
+@@ -1,98 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/if_ether.h>
+-
+-typedef struct cdc_ioctl {
+-	u32 cmd;		/* ioctl command value */
+-	u32 len;		/* lower 16: output buflen; upper 16:
+-				 input buflen (excludes header) */
+-	u32 flags;		/* flag defns given below */
+-	u32 status;		/* status code returned from the device */
+-} cdc_ioctl_t;
+-
+-/* Max valid buffer size that can be sent to the dongle */
+-#define CDC_MAX_MSG_SIZE	(ETH_FRAME_LEN+ETH_FCS_LEN)
+-
+-/* len field is divided into input and output buffer lengths */
+-#define CDCL_IOC_OUTLEN_MASK   0x0000FFFF	/* maximum or expected
+-						 response length, */
+-					   /* excluding IOCTL header */
+-#define CDCL_IOC_OUTLEN_SHIFT  0
+-#define CDCL_IOC_INLEN_MASK    0xFFFF0000	/* input buffer length,
+-						 excluding IOCTL header */
+-#define CDCL_IOC_INLEN_SHIFT   16
+-
+-/* CDC flag definitions */
+-#define CDCF_IOC_ERROR		0x01	/* 0=success, 1=ioctl cmd failed */
+-#define CDCF_IOC_SET		0x02	/* 0=get, 1=set cmd */
+-#define CDCF_IOC_IF_MASK	0xF000	/* I/F index */
+-#define CDCF_IOC_IF_SHIFT	12
+-#define CDCF_IOC_ID_MASK	0xFFFF0000	/* used to uniquely id an ioctl
+-						 req/resp pairing */
+-#define CDCF_IOC_ID_SHIFT	16	/* # of bits of shift for ID Mask */
+-
+-#define CDC_IOC_IF_IDX(flags)	\
+-	(((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)
+-#define CDC_IOC_ID(flags)	\
+-	(((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT)
+-
+-#define CDC_GET_IF_IDX(hdr) \
+-	((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT))
+-#define CDC_SET_IF_IDX(hdr, idx) \
+-	((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \
+-	((idx) << CDCF_IOC_IF_SHIFT)))
+-
+-/*
+- * BDC header
+- *
+- *   The BDC header is used on data packets to convey priority across USB.
+- */
+-
+-#define	BDC_HEADER_LEN		4
+-
+-#define BDC_PROTO_VER		1	/* Protocol version */
+-
+-#define BDC_FLAG_VER_MASK	0xf0	/* Protocol version mask */
+-#define BDC_FLAG_VER_SHIFT	4	/* Protocol version shift */
+-
+-#define BDC_FLAG__UNUSED	0x03	/* Unassigned */
+-#define BDC_FLAG_SUM_GOOD	0x04	/* Dongle has verified good
+-					 RX checksums */
+-#define BDC_FLAG_SUM_NEEDED	0x08	/* Dongle needs to do TX checksums */
+-
+-#define BDC_PRIORITY_MASK	0x7
+-
+-#define BDC_FLAG2_FC_FLAG	0x10	/* flag to indicate if pkt contains */
+-						/* FLOW CONTROL info only */
+-#define BDC_PRIORITY_FC_SHIFT	4	/* flow control info shift */
+-
+-#define BDC_FLAG2_IF_MASK	0x0f	/* APSTA: interface on which the
+-					 packet was received */
+-#define BDC_FLAG2_IF_SHIFT	0
+-
+-#define BDC_GET_IF_IDX(hdr) \
+-	((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT))
+-#define BDC_SET_IF_IDX(hdr, idx) \
+-	((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \
+-	((idx) << BDC_FLAG2_IF_SHIFT)))
+-
+-struct bdc_header {
+-	u8 flags;		/* Flags */
+-	u8 priority;		/* 802.1d Priority 0:2 bits, 4:7 flow
+-				 control info for usb */
+-	u8 flags2;
+-	u8 rssi;
+-};
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmchip.h b/drivers/staging/brcm80211/brcmfmac/bcmchip.h
+deleted file mode 100644
+index c0d4c3b..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmchip.h
++++ /dev/null
+@@ -1,35 +0,0 @@
+-/*
+- * Copyright (c) 2011 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _bcmchip_h_
+-#define _bcmchip_h_
+-
+-/* Core reg address translation */
+-#define CORE_CC_REG(base, field)	(base + offsetof(chipcregs_t, field))
+-#define CORE_BUS_REG(base, field)	(base + offsetof(sdpcmd_regs_t, field))
+-#define CORE_SB(base, field) \
+-		(base + SBCONFIGOFF + offsetof(sbconfig_t, field))
+-
+-/* bcm4329 */
+-/* SDIO device core, ID 0x829 */
+-#define BCM4329_CORE_BUS_BASE		0x18011000
+-/* internal memory core, ID 0x80e */
+-#define BCM4329_CORE_SOCRAM_BASE	0x18003000
+-/* ARM Cortex M3 core, ID 0x82a */
+-#define BCM4329_CORE_ARM_BASE		0x18002000
+-#define BCM4329_RAMSIZE			0x48000
+-
+-#endif				/* _bcmchip_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
+deleted file mode 100644
+index 53c3291..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h
++++ /dev/null
+@@ -1,113 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_sdio_api_h_
+-#define	_sdio_api_h_
+-
+-#define SDIOH_API_RC_SUCCESS                          (0x00)
+-#define SDIOH_API_RC_FAIL	                      (0x01)
+-#define SDIOH_API_SUCCESS(status) (status == 0)
+-
+-#define SDIOH_READ              0	/* Read request */
+-#define SDIOH_WRITE             1	/* Write request */
+-
+-#define SDIOH_DATA_FIX          0	/* Fixed addressing */
+-#define SDIOH_DATA_INC          1	/* Incremental addressing */
+-
+-#define SDIOH_CMD_TYPE_NORMAL   0	/* Normal command */
+-#define SDIOH_CMD_TYPE_APPEND   1	/* Append command */
+-#define SDIOH_CMD_TYPE_CUTTHRU  2	/* Cut-through command */
+-
+-#define SDIOH_DATA_PIO          0	/* PIO mode */
+-#define SDIOH_DATA_DMA          1	/* DMA mode */
+-
+-typedef int SDIOH_API_RC;
+-
+-/* SDio Host structure */
+-typedef struct sdioh_info sdioh_info_t;
+-
+-/* callback function, taking one arg */
+-typedef void (*sdioh_cb_fn_t) (void *);
+-
+-/* attach, return handler on success, NULL if failed.
+- *  The handler shall be provided by all subsequent calls. No local cache
+- *  cfghdl points to the starting address of pci device mapped memory
+- */
+-extern sdioh_info_t *sdioh_attach(void *cfghdl, uint irq);
+-extern SDIOH_API_RC sdioh_detach(sdioh_info_t *si);
+-extern SDIOH_API_RC sdioh_interrupt_register(sdioh_info_t *si,
+-					     sdioh_cb_fn_t fn, void *argh);
+-extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *si);
+-
+-/* query whether SD interrupt is enabled or not */
+-extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *si, bool *onoff);
+-
+-/* enable or disable SD interrupt */
+-extern SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *si, bool enable_disable);
+-
+-#if defined(DHD_DEBUG)
+-extern bool sdioh_interrupt_pending(sdioh_info_t *si);
+-#endif
+-
+-extern int sdioh_claim_host_and_lock(sdioh_info_t *si);
+-extern int sdioh_release_host_and_unlock(sdioh_info_t *si);
+-
+-/* read or write one byte using cmd52 */
+-extern SDIOH_API_RC sdioh_request_byte(sdioh_info_t *si, uint rw, uint fnc,
+-				       uint addr, u8 *byte);
+-
+-/* read or write 2/4 bytes using cmd53 */
+-extern SDIOH_API_RC sdioh_request_word(sdioh_info_t *si, uint cmd_type,
+-				       uint rw, uint fnc, uint addr,
+-				       u32 *word, uint nbyte);
+-
+-/* read or write any buffer using cmd53 */
+-extern SDIOH_API_RC sdioh_request_buffer(sdioh_info_t *si, uint pio_dma,
+-					 uint fix_inc, uint rw, uint fnc_num,
+-					 u32 addr, uint regwidth,
+-					 u32 buflen, u8 *buffer,
+-					 struct sk_buff *pkt);
+-
+-/* get cis data */
+-extern SDIOH_API_RC sdioh_cis_read(sdioh_info_t *si, uint fuc, u8 *cis,
+-				   u32 length);
+-
+-extern SDIOH_API_RC sdioh_cfg_read(sdioh_info_t *si, uint fuc, u32 addr,
+-				   u8 *data);
+-extern SDIOH_API_RC sdioh_cfg_write(sdioh_info_t *si, uint fuc, u32 addr,
+-				    u8 *data);
+-
+-/* query number of io functions */
+-extern uint sdioh_query_iofnum(sdioh_info_t *si);
+-
+-/* handle iovars */
+-extern int sdioh_iovar_op(sdioh_info_t *si, const char *name,
+-			  void *params, int plen, void *arg, int len, bool set);
+-
+-/* Issue abort to the specified function and clear controller as needed */
+-extern int sdioh_abort(sdioh_info_t *si, uint fnc);
+-
+-/* Start and Stop SDIO without re-enumerating the SD card. */
+-extern int sdioh_start(sdioh_info_t *si, int stage);
+-extern int sdioh_stop(sdioh_info_t *si);
+-
+-/* Reset and re-initialize the device */
+-extern int sdioh_sdio_reset(sdioh_info_t *si);
+-
+-/* Helper function */
+-void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh);
+-
+-#endif				/* _sdio_api_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
+deleted file mode 100644
+index 3750fcf..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c
++++ /dev/null
+@@ -1,631 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-/* ****************** BCMSDH Interface Functions *************************** */
+-
+-#include <linux/types.h>
+-#include <linux/netdevice.h>
+-#include <linux/pci_ids.h>
+-#include <bcmdefs.h>
+-#include <bcmdevs.h>
+-#include <bcmutils.h>
+-#include <hndsoc.h>
+-
+-#include <bcmsdh.h>		/* BRCM API for SDIO
+-			 clients (such as wl, dhd) */
+-#include <bcmsdbus.h>		/* common SDIO/controller interface */
+-#include <sbsdio.h>		/* BRCM sdio device core */
+-
+-#include <sdio.h>		/* sdio spec */
+-#include "dngl_stats.h"
+-#include "dhd.h"
+-
+-#define SDIOH_API_ACCESS_RETRY_LIMIT	2
+-const uint bcmsdh_msglevel = BCMSDH_ERROR_VAL;
+-
+-struct bcmsdh_info {
+-	bool init_success;	/* underlying driver successfully attached */
+-	void *sdioh;		/* handler for sdioh */
+-	u32 vendevid;	/* Target Vendor and Device ID on SD bus */
+-	bool regfail;		/* Save status of last
+-				 reg_read/reg_write call */
+-	u32 sbwad;		/* Save backplane window address */
+-};
+-/* local copy of bcm sd handler */
+-bcmsdh_info_t *l_bcmsdh;
+-
+-#if defined(OOB_INTR_ONLY) && defined(HW_OOB)
+-extern int sdioh_enable_hw_oob_intr(void *sdioh, bool enable);
+-
+-void bcmsdh_enable_hw_oob_intr(bcmsdh_info_t *sdh, bool enable)
+-{
+-	sdioh_enable_hw_oob_intr(sdh->sdioh, enable);
+-}
+-#endif
+-
+-bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq)
+-{
+-	bcmsdh_info_t *bcmsdh;
+-
+-	bcmsdh = kzalloc(sizeof(bcmsdh_info_t), GFP_ATOMIC);
+-	if (bcmsdh == NULL) {
+-		BCMSDH_ERROR(("bcmsdh_attach: out of memory"));
+-		return NULL;
+-	}
+-
+-	/* save the handler locally */
+-	l_bcmsdh = bcmsdh;
+-
+-	bcmsdh->sdioh = sdioh_attach(cfghdl, irq);
+-	if (!bcmsdh->sdioh) {
+-		bcmsdh_detach(bcmsdh);
+-		return NULL;
+-	}
+-
+-	bcmsdh->init_success = true;
+-
+-	*regsva = (u32 *) SI_ENUM_BASE;
+-
+-	/* Report the BAR, to fix if needed */
+-	bcmsdh->sbwad = SI_ENUM_BASE;
+-	return bcmsdh;
+-}
+-
+-int bcmsdh_detach(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	if (bcmsdh != NULL) {
+-		if (bcmsdh->sdioh) {
+-			sdioh_detach(bcmsdh->sdioh);
+-			bcmsdh->sdioh = NULL;
+-		}
+-		kfree(bcmsdh);
+-	}
+-
+-	l_bcmsdh = NULL;
+-	return 0;
+-}
+-
+-int
+-bcmsdh_iovar_op(void *sdh, const char *name,
+-		void *params, int plen, void *arg, int len, bool set)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	return sdioh_iovar_op(bcmsdh->sdioh, name, params, plen, arg, len, set);
+-}
+-
+-bool bcmsdh_intr_query(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	bool on;
+-
+-	ASSERT(bcmsdh);
+-	status = sdioh_interrupt_query(bcmsdh->sdioh, &on);
+-	if (SDIOH_API_SUCCESS(status))
+-		return false;
+-	else
+-		return on;
+-}
+-
+-int bcmsdh_intr_enable(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	ASSERT(bcmsdh);
+-
+-	status = sdioh_interrupt_set(bcmsdh->sdioh, true);
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int bcmsdh_intr_disable(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	ASSERT(bcmsdh);
+-
+-	status = sdioh_interrupt_set(bcmsdh->sdioh, false);
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	ASSERT(bcmsdh);
+-
+-	status = sdioh_interrupt_register(bcmsdh->sdioh, fn, argh);
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int bcmsdh_intr_dereg(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	ASSERT(bcmsdh);
+-
+-	status = sdioh_interrupt_deregister(bcmsdh->sdioh);
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-#if defined(DHD_DEBUG)
+-bool bcmsdh_intr_pending(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	ASSERT(sdh);
+-	return sdioh_interrupt_pending(bcmsdh->sdioh);
+-}
+-#endif
+-
+-int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh)
+-{
+-	ASSERT(sdh);
+-
+-	/* don't support yet */
+-	return -ENOTSUPP;
+-}
+-
+-u8 bcmsdh_cfg_read(void *sdh, uint fnc_num, u32 addr, int *err)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	s32 retry = 0;
+-#endif
+-	u8 data = 0;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	do {
+-		if (retry)	/* wait for 1 ms till bus get settled down */
+-			udelay(1000);
+-#endif
+-		status =
+-		    sdioh_cfg_read(bcmsdh->sdioh, fnc_num, addr,
+-				   (u8 *) &data);
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	} while (!SDIOH_API_SUCCESS(status)
+-		 && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT));
+-#endif
+-	if (err)
+-		*err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO);
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n",
+-		     __func__, fnc_num, addr, data));
+-
+-	return data;
+-}
+-
+-void
+-bcmsdh_cfg_write(void *sdh, uint fnc_num, u32 addr, u8 data, int *err)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	s32 retry = 0;
+-#endif
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	do {
+-		if (retry)	/* wait for 1 ms till bus get settled down */
+-			udelay(1000);
+-#endif
+-		status =
+-		    sdioh_cfg_write(bcmsdh->sdioh, fnc_num, addr,
+-				    (u8 *) &data);
+-#ifdef SDIOH_API_ACCESS_RETRY_LIMIT
+-	} while (!SDIOH_API_SUCCESS(status)
+-		 && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT));
+-#endif
+-	if (err)
+-		*err = SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n",
+-		     __func__, fnc_num, addr, data));
+-}
+-
+-u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, int *err)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	u32 data = 0;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-	status =
+-	    sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL, SDIOH_READ,
+-			       fnc_num, addr, &data, 4);
+-
+-	if (err)
+-		*err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO);
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n",
+-		     __func__, fnc_num, addr, data));
+-
+-	return data;
+-}
+-
+-void
+-bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, u32 data,
+-		      int *err)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-	status =
+-	    sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL,
+-			       SDIOH_WRITE, fnc_num, addr, &data, 4);
+-
+-	if (err)
+-		*err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO);
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n",
+-		     __func__, fnc_num, addr, data));
+-}
+-
+-int bcmsdh_cis_read(void *sdh, uint func, u8 * cis, uint length)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-
+-	u8 *tmp_buf, *tmp_ptr;
+-	u8 *ptr;
+-	bool ascii = func & ~0xf;
+-	func &= 0x7;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-	ASSERT(cis);
+-	ASSERT(length <= SBSDIO_CIS_SIZE_LIMIT);
+-
+-	status = sdioh_cis_read(bcmsdh->sdioh, func, cis, length);
+-
+-	if (ascii) {
+-		/* Move binary bits to tmp and format them
+-			 into the provided buffer. */
+-		tmp_buf = kmalloc(length, GFP_ATOMIC);
+-		if (tmp_buf == NULL) {
+-			BCMSDH_ERROR(("%s: out of memory\n", __func__));
+-			return -ENOMEM;
+-		}
+-		memcpy(tmp_buf, cis, length);
+-		for (tmp_ptr = tmp_buf, ptr = cis; ptr < (cis + length - 4);
+-		     tmp_ptr++) {
+-			ptr += sprintf((char *)ptr, "%.2x ", *tmp_ptr & 0xff);
+-			if ((((tmp_ptr - tmp_buf) + 1) & 0xf) == 0)
+-				ptr += sprintf((char *)ptr, "\n");
+-		}
+-		kfree(tmp_buf);
+-	}
+-
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-static int bcmsdhsdio_set_sbaddr_window(void *sdh, u32 address)
+-{
+-	int err = 0;
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
+-			 (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
+-	if (!err)
+-		bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID,
+-				 (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
+-	if (!err)
+-		bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH,
+-				 (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
+-				 &err);
+-
+-	return err;
+-}
+-
+-u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	u32 word = 0;
+-	uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK;
+-
+-	BCMSDH_INFO(("%s:fun = 1, addr = 0x%x, ", __func__, addr));
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-	if (bar0 != bcmsdh->sbwad) {
+-		if (bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0))
+-			return 0xFFFFFFFF;
+-
+-		bcmsdh->sbwad = bar0;
+-	}
+-
+-	addr &= SBSDIO_SB_OFT_ADDR_MASK;
+-	if (size == 4)
+-		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
+-
+-	status = sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL,
+-				    SDIOH_READ, SDIO_FUNC_1, addr, &word, size);
+-
+-	bcmsdh->regfail = !(SDIOH_API_SUCCESS(status));
+-
+-	BCMSDH_INFO(("u32data = 0x%x\n", word));
+-
+-	/* if ok, return appropriately masked word */
+-	if (SDIOH_API_SUCCESS(status)) {
+-		switch (size) {
+-		case sizeof(u8):
+-			return word & 0xff;
+-		case sizeof(u16):
+-			return word & 0xffff;
+-		case sizeof(u32):
+-			return word;
+-		default:
+-			bcmsdh->regfail = true;
+-
+-		}
+-	}
+-
+-	/* otherwise, bad sdio access or invalid size */
+-	BCMSDH_ERROR(("%s: error reading addr 0x%04x size %d\n", __func__,
+-		      addr, size));
+-	return 0xFFFFFFFF;
+-}
+-
+-u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK;
+-	int err = 0;
+-
+-	BCMSDH_INFO(("%s:fun = 1, addr = 0x%x, uint%ddata = 0x%x\n",
+-		     __func__, addr, size * 8, data));
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	ASSERT(bcmsdh->init_success);
+-
+-	if (bar0 != bcmsdh->sbwad) {
+-		err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0);
+-		if (err)
+-			return err;
+-
+-		bcmsdh->sbwad = bar0;
+-	}
+-
+-	addr &= SBSDIO_SB_OFT_ADDR_MASK;
+-	if (size == 4)
+-		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
+-	status =
+-	    sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL,
+-			       SDIOH_WRITE, SDIO_FUNC_1, addr, &data, size);
+-	bcmsdh->regfail = !(SDIOH_API_SUCCESS(status));
+-
+-	if (SDIOH_API_SUCCESS(status))
+-		return 0;
+-
+-	BCMSDH_ERROR(("%s: error writing 0x%08x to addr 0x%04x size %d\n",
+-		      __func__, data, addr, size));
+-	return 0xFFFFFFFF;
+-}
+-
+-bool bcmsdh_regfail(void *sdh)
+-{
+-	return ((bcmsdh_info_t *) sdh)->regfail;
+-}
+-
+-int
+-bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags,
+-		u8 *buf, uint nbytes, struct sk_buff *pkt,
+-		bcmsdh_cmplt_fn_t complete, void *handle)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	uint incr_fix;
+-	uint width;
+-	uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK;
+-	int err = 0;
+-
+-	ASSERT(bcmsdh);
+-	ASSERT(bcmsdh->init_success);
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n",
+-		     __func__, fn, addr, nbytes));
+-
+-	/* Async not implemented yet */
+-	ASSERT(!(flags & SDIO_REQ_ASYNC));
+-	if (flags & SDIO_REQ_ASYNC)
+-		return -ENOTSUPP;
+-
+-	if (bar0 != bcmsdh->sbwad) {
+-		err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0);
+-		if (err)
+-			return err;
+-
+-		bcmsdh->sbwad = bar0;
+-	}
+-
+-	addr &= SBSDIO_SB_OFT_ADDR_MASK;
+-
+-	incr_fix = (flags & SDIO_REQ_FIXED) ? SDIOH_DATA_FIX : SDIOH_DATA_INC;
+-	width = (flags & SDIO_REQ_4BYTE) ? 4 : 2;
+-	if (width == 4)
+-		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
+-
+-	status = sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, incr_fix,
+-				      SDIOH_READ, fn, addr, width, nbytes, buf,
+-				      pkt);
+-
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int
+-bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags,
+-		u8 *buf, uint nbytes, void *pkt,
+-		bcmsdh_cmplt_fn_t complete, void *handle)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-	uint incr_fix;
+-	uint width;
+-	uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK;
+-	int err = 0;
+-
+-	ASSERT(bcmsdh);
+-	ASSERT(bcmsdh->init_success);
+-
+-	BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n",
+-		     __func__, fn, addr, nbytes));
+-
+-	/* Async not implemented yet */
+-	ASSERT(!(flags & SDIO_REQ_ASYNC));
+-	if (flags & SDIO_REQ_ASYNC)
+-		return -ENOTSUPP;
+-
+-	if (bar0 != bcmsdh->sbwad) {
+-		err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0);
+-		if (err)
+-			return err;
+-
+-		bcmsdh->sbwad = bar0;
+-	}
+-
+-	addr &= SBSDIO_SB_OFT_ADDR_MASK;
+-
+-	incr_fix = (flags & SDIO_REQ_FIXED) ? SDIOH_DATA_FIX : SDIOH_DATA_INC;
+-	width = (flags & SDIO_REQ_4BYTE) ? 4 : 2;
+-	if (width == 4)
+-		addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
+-
+-	status = sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, incr_fix,
+-				      SDIOH_WRITE, fn, addr, width, nbytes, buf,
+-				      pkt);
+-
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, uint nbytes)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	SDIOH_API_RC status;
+-
+-	ASSERT(bcmsdh);
+-	ASSERT(bcmsdh->init_success);
+-	ASSERT((addr & SBSDIO_SBWINDOW_MASK) == 0);
+-
+-	addr &= SBSDIO_SB_OFT_ADDR_MASK;
+-	addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
+-
+-	status =
+-	    sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, SDIOH_DATA_INC,
+-				 (rw ? SDIOH_WRITE : SDIOH_READ), SDIO_FUNC_1,
+-				 addr, 4, nbytes, buf, NULL);
+-
+-	return SDIOH_API_SUCCESS(status) ? 0 : -EIO;
+-}
+-
+-int bcmsdh_abort(void *sdh, uint fn)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	return sdioh_abort(bcmsdh->sdioh, fn);
+-}
+-
+-int bcmsdh_start(void *sdh, int stage)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	return sdioh_start(bcmsdh->sdioh, stage);
+-}
+-
+-int bcmsdh_stop(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	return sdioh_stop(bcmsdh->sdioh);
+-}
+-
+-int bcmsdh_query_device(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-	bcmsdh->vendevid = (PCI_VENDOR_ID_BROADCOM << 16) | 0;
+-	return bcmsdh->vendevid;
+-}
+-
+-uint bcmsdh_query_iofnum(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	return sdioh_query_iofnum(bcmsdh->sdioh);
+-}
+-
+-int bcmsdh_reset(bcmsdh_info_t *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	return sdioh_sdio_reset(bcmsdh->sdioh);
+-}
+-
+-void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh)
+-{
+-	ASSERT(sdh);
+-	return sdh->sdioh;
+-}
+-
+-/* Function to pass device-status bits to DHD. */
+-u32 bcmsdh_get_dstatus(void *sdh)
+-{
+-	return 0;
+-}
+-
+-u32 bcmsdh_cur_sbwad(void *sdh)
+-{
+-	bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh;
+-
+-	if (!bcmsdh)
+-		bcmsdh = l_bcmsdh;
+-
+-	return bcmsdh->sbwad;
+-}
+-
+-void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev)
+-{
+-	return;
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
+deleted file mode 100644
+index 465f623..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c
++++ /dev/null
+@@ -1,386 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-/**
+- * @file bcmsdh_linux.c
+- */
+-
+-#define __UNDEF_NO_VERSION__
+-
+-#include <linux/netdevice.h>
+-#include <linux/pci.h>
+-#include <linux/completion.h>
+-
+-#include <pcicfg.h>
+-#include <bcmdefs.h>
+-#include <bcmdevs.h>
+-#include <bcmutils.h>
+-
+-#if defined(OOB_INTR_ONLY)
+-#include <linux/irq.h>
+-extern void dhdsdio_isr(void *args);
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#endif				/* defined(OOB_INTR_ONLY) */
+-#if defined(CONFIG_MACH_SANDGATE2G) || defined(CONFIG_MACH_LOGICPD_PXA270)
+-#if !defined(BCMPLATFORM_BUS)
+-#define BCMPLATFORM_BUS
+-#endif				/* !defined(BCMPLATFORM_BUS) */
+-
+-#include <linux/platform_device.h>
+-#endif				/* CONFIG_MACH_SANDGATE2G */
+-
+-#include "dngl_stats.h"
+-#include "dhd.h"
+-
+-/**
+- * SDIO Host Controller info
+- */
+-typedef struct bcmsdh_hc bcmsdh_hc_t;
+-
+-struct bcmsdh_hc {
+-	bcmsdh_hc_t *next;
+-#ifdef BCMPLATFORM_BUS
+-	struct device *dev;	/* platform device handle */
+-#else
+-	struct pci_dev *dev;	/* pci device handle */
+-#endif				/* BCMPLATFORM_BUS */
+-	void *regs;		/* SDIO Host Controller address */
+-	bcmsdh_info_t *sdh;	/* SDIO Host Controller handle */
+-	void *ch;
+-	unsigned int oob_irq;
+-	unsigned long oob_flags;	/* OOB Host specifiction
+-					as edge and etc */
+-	bool oob_irq_registered;
+-#if defined(OOB_INTR_ONLY)
+-	spinlock_t irq_lock;
+-#endif
+-};
+-static bcmsdh_hc_t *sdhcinfo;
+-
+-/* driver info, initialized when bcmsdh_register is called */
+-static bcmsdh_driver_t drvinfo = { NULL, NULL };
+-
+-/* debugging macros */
+-#define SDLX_MSG(x)
+-
+-/**
+- * Checks to see if vendor and device IDs match a supported SDIO Host Controller.
+- */
+-bool bcmsdh_chipmatch(u16 vendor, u16 device)
+-{
+-	/* Add other vendors and devices as required */
+-
+-#ifdef BCMSDIOH_STD
+-	/* Check for Arasan host controller */
+-	if (vendor == VENDOR_SI_IMAGE)
+-		return true;
+-
+-	/* Check for BRCM 27XX Standard host controller */
+-	if (device == BCM27XX_SDIOH_ID && vendor == PCI_VENDOR_ID_BROADCOM)
+-		return true;
+-
+-	/* Check for BRCM Standard host controller */
+-	if (device == SDIOH_FPGA_ID && vendor == PCI_VENDOR_ID_BROADCOM)
+-		return true;
+-
+-	/* Check for TI PCIxx21 Standard host controller */
+-	if (device == PCIXX21_SDIOH_ID && vendor == VENDOR_TI)
+-		return true;
+-
+-	if (device == PCIXX21_SDIOH0_ID && vendor == VENDOR_TI)
+-		return true;
+-
+-	/* Ricoh R5C822 Standard SDIO Host */
+-	if (device == R5C822_SDIOH_ID && vendor == VENDOR_RICOH)
+-		return true;
+-
+-	/* JMicron Standard SDIO Host */
+-	if (device == JMICRON_SDIOH_ID && vendor == VENDOR_JMICRON)
+-		return true;
+-#endif				/* BCMSDIOH_STD */
+-#ifdef BCMSDIOH_SPI
+-	/* This is the PciSpiHost. */
+-	if (device == SPIH_FPGA_ID && vendor == PCI_VENDOR_ID_BROADCOM) {
+-		return true;
+-	}
+-#endif				/* BCMSDIOH_SPI */
+-
+-	return false;
+-}
+-
+-#if defined(BCMPLATFORM_BUS)
+-#if defined(BCMLXSDMMC)
+-/* forward declarations */
+-int bcmsdh_probe(struct device *dev);
+-EXPORT_SYMBOL(bcmsdh_probe);
+-
+-int bcmsdh_remove(struct device *dev);
+-EXPORT_SYMBOL(bcmsdh_remove);
+-
+-#else
+-/* forward declarations */
+-static int __devinit bcmsdh_probe(struct device *dev);
+-static int __devexit bcmsdh_remove(struct device *dev);
+-#endif				/* BCMLXSDMMC */
+-
+-#ifndef BCMLXSDMMC
+-static
+-#endif				/* BCMLXSDMMC */
+-int bcmsdh_probe(struct device *dev)
+-{
+-	bcmsdh_hc_t *sdhc = NULL;
+-	unsigned long regs = 0;
+-	bcmsdh_info_t *sdh = NULL;
+-#if !defined(BCMLXSDMMC) && defined(BCMPLATFORM_BUS)
+-	struct platform_device *pdev;
+-	struct resource *r;
+-#endif				/* BCMLXSDMMC */
+-	int irq = 0;
+-	u32 vendevid;
+-	unsigned long irq_flags = 0;
+-
+-#if !defined(BCMLXSDMMC) && defined(BCMPLATFORM_BUS)
+-	pdev = to_platform_device(dev);
+-	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+-	irq = platform_get_irq(pdev, 0);
+-	if (!r || irq == NO_IRQ)
+-		return -ENXIO;
+-#endif				/* BCMLXSDMMC */
+-
+-#if defined(OOB_INTR_ONLY)
+-#ifdef HW_OOB
+-	irq_flags =
+-	    IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL |
+-	    IORESOURCE_IRQ_SHAREABLE;
+-#else
+-	irq_flags = IRQF_TRIGGER_FALLING;
+-#endif				/* HW_OOB */
+-	irq = dhd_customer_oob_irq_map(&irq_flags);
+-	if (irq < 0) {
+-		SDLX_MSG(("%s: Host irq is not defined\n", __func__));
+-		return 1;
+-	}
+-#endif				/* defined(OOB_INTR_ONLY) */
+-	/* allocate SDIO Host Controller state info */
+-	sdhc = kzalloc(sizeof(bcmsdh_hc_t), GFP_ATOMIC);
+-	if (!sdhc) {
+-		SDLX_MSG(("%s: out of memory\n", __func__));
+-		goto err;
+-	}
+-	sdhc->dev = (void *)dev;
+-
+-#ifdef BCMLXSDMMC
+-	sdh = bcmsdh_attach((void *)0, (void **)&regs, irq);
+-	if (!sdh) {
+-		SDLX_MSG(("%s: bcmsdh_attach failed\n", __func__));
+-		goto err;
+-	}
+-#else
+-	sdh = bcmsdh_attach((void *)r->start, (void **)&regs, irq);
+-	if (!sdh) {
+-		SDLX_MSG(("%s: bcmsdh_attach failed\n", __func__));
+-		goto err;
+-	}
+-#endif				/* BCMLXSDMMC */
+-	sdhc->sdh = sdh;
+-	sdhc->oob_irq = irq;
+-	sdhc->oob_flags = irq_flags;
+-	sdhc->oob_irq_registered = false;	/* to make sure.. */
+-#if defined(OOB_INTR_ONLY)
+-	spin_lock_init(&sdhc->irq_lock);
+-#endif
+-
+-	/* chain SDIO Host Controller info together */
+-	sdhc->next = sdhcinfo;
+-	sdhcinfo = sdhc;
+-	/* Read the vendor/device ID from the CIS */
+-	vendevid = bcmsdh_query_device(sdh);
+-
+-	/* try to attach to the target device */
+-	sdhc->ch = drvinfo.attach((vendevid >> 16), (vendevid & 0xFFFF),
+-				  0, 0, 0, 0, (void *)regs, sdh);
+-	if (!sdhc->ch) {
+-		SDLX_MSG(("%s: device attach failed\n", __func__));
+-		goto err;
+-	}
+-
+-	return 0;
+-
+-	/* error handling */
+-err:
+-	if (sdhc) {
+-		if (sdhc->sdh)
+-			bcmsdh_detach(sdhc->sdh);
+-		kfree(sdhc);
+-	}
+-
+-	return -ENODEV;
+-}
+-
+-#ifndef BCMLXSDMMC
+-static
+-#endif				/* BCMLXSDMMC */
+-int bcmsdh_remove(struct device *dev)
+-{
+-	bcmsdh_hc_t *sdhc, *prev;
+-
+-	sdhc = sdhcinfo;
+-	drvinfo.detach(sdhc->ch);
+-	bcmsdh_detach(sdhc->sdh);
+-	/* find the SDIO Host Controller state for this pdev
+-		 and take it out from the list */
+-	for (sdhc = sdhcinfo, prev = NULL; sdhc; sdhc = sdhc->next) {
+-		if (sdhc->dev == (void *)dev) {
+-			if (prev)
+-				prev->next = sdhc->next;
+-			else
+-				sdhcinfo = NULL;
+-			break;
+-		}
+-		prev = sdhc;
+-	}
+-	if (!sdhc) {
+-		SDLX_MSG(("%s: failed\n", __func__));
+-		return 0;
+-	}
+-
+-	/* release SDIO Host Controller info */
+-	kfree(sdhc);
+-
+-#if !defined(BCMLXSDMMC)
+-	dev_set_drvdata(dev, NULL);
+-#endif				/* !defined(BCMLXSDMMC) */
+-
+-	return 0;
+-}
+-#endif				/* BCMPLATFORM_BUS */
+-
+-extern int sdio_function_init(void);
+-
+-int bcmsdh_register(bcmsdh_driver_t *driver)
+-{
+-	drvinfo = *driver;
+-
+-	SDLX_MSG(("Linux Kernel SDIO/MMC Driver\n"));
+-	return sdio_function_init();
+-}
+-
+-extern void sdio_function_cleanup(void);
+-
+-void bcmsdh_unregister(void)
+-{
+-	sdio_function_cleanup();
+-}
+-
+-#if defined(OOB_INTR_ONLY)
+-void bcmsdh_oob_intr_set(bool enable)
+-{
+-	static bool curstate = 1;
+-	unsigned long flags;
+-
+-	spin_lock_irqsave(&sdhcinfo->irq_lock, flags);
+-	if (curstate != enable) {
+-		if (enable)
+-			enable_irq(sdhcinfo->oob_irq);
+-		else
+-			disable_irq_nosync(sdhcinfo->oob_irq);
+-		curstate = enable;
+-	}
+-	spin_unlock_irqrestore(&sdhcinfo->irq_lock, flags);
+-}
+-
+-static irqreturn_t wlan_oob_irq(int irq, void *dev_id)
+-{
+-	dhd_pub_t *dhdp;
+-
+-	dhdp = (dhd_pub_t *) dev_get_drvdata(sdhcinfo->dev);
+-
+-	bcmsdh_oob_intr_set(0);
+-
+-	if (dhdp == NULL) {
+-		SDLX_MSG(("Out of band GPIO interrupt fired way too early\n"));
+-		return IRQ_HANDLED;
+-	}
+-
+-	dhdsdio_isr((void *)dhdp->bus);
+-
+-	return IRQ_HANDLED;
+-}
+-
+-int bcmsdh_register_oob_intr(void *dhdp)
+-{
+-	int error = 0;
+-
+-	SDLX_MSG(("%s Enter\n", __func__));
+-
+-	sdhcinfo->oob_flags =
+-	    IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL |
+-	    IORESOURCE_IRQ_SHAREABLE;
+-	dev_set_drvdata(sdhcinfo->dev, dhdp);
+-
+-	if (!sdhcinfo->oob_irq_registered) {
+-		SDLX_MSG(("%s IRQ=%d Type=%X\n", __func__,
+-			  (int)sdhcinfo->oob_irq, (int)sdhcinfo->oob_flags));
+-		/* Refer to customer Host IRQ docs about
+-			 proper irqflags definition */
+-		error =
+-		    request_irq(sdhcinfo->oob_irq, wlan_oob_irq,
+-				sdhcinfo->oob_flags, "bcmsdh_sdmmc", NULL);
+-		if (error)
+-			return -ENODEV;
+-
+-		irq_set_irq_wake(sdhcinfo->oob_irq, 1);
+-		sdhcinfo->oob_irq_registered = true;
+-	}
+-
+-	return 0;
+-}
+-
+-void bcmsdh_unregister_oob_intr(void)
+-{
+-	SDLX_MSG(("%s: Enter\n", __func__));
+-
+-	irq_set_irq_wake(sdhcinfo->oob_irq, 0);
+-	disable_irq(sdhcinfo->oob_irq);	/* just in case.. */
+-	free_irq(sdhcinfo->oob_irq, NULL);
+-	sdhcinfo->oob_irq_registered = false;
+-}
+-#endif				/* defined(OOB_INTR_ONLY) */
+-/* Module parameters specific to each host-controller driver */
+-
+-extern uint sd_msglevel;	/* Debug message level */
+-module_param(sd_msglevel, uint, 0);
+-
+-extern uint sd_power;		/* 0 = SD Power OFF,
+-					 1 = SD Power ON. */
+-module_param(sd_power, uint, 0);
+-
+-extern uint sd_clock;		/* SD Clock Control, 0 = SD Clock OFF,
+-				 1 = SD Clock ON */
+-module_param(sd_clock, uint, 0);
+-
+-extern uint sd_divisor;		/* Divisor (-1 means external clock) */
+-module_param(sd_divisor, uint, 0);
+-
+-extern uint sd_sdmode;		/* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */
+-module_param(sd_sdmode, uint, 0);
+-
+-extern uint sd_hiok;		/* Ok to use hi-speed mode */
+-module_param(sd_hiok, uint, 0);
+-
+-extern uint sd_f2_blocksize;
+-module_param(sd_f2_blocksize, int, 0);
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
+deleted file mode 100644
+index c0ffbd3..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c
++++ /dev/null
+@@ -1,1239 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/types.h>
+-#include <linux/netdevice.h>
+-#include <bcmdefs.h>
+-#include <bcmdevs.h>
+-#include <bcmutils.h>
+-#include <sdio.h>		/* SDIO Device and Protocol Specs */
+-#include <sdioh.h>		/* SDIO Host Controller Specification */
+-#include <bcmsdbus.h>		/* bcmsdh to/from specific controller APIs */
+-#include <sdiovar.h>		/* ioctl/iovars */
+-
+-#include <linux/mmc/core.h>
+-#include <linux/mmc/sdio_func.h>
+-#include <linux/mmc/sdio_ids.h>
+-#include <linux/suspend.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-
+-#include "bcmsdh_sdmmc.h"
+-
+-extern int sdio_function_init(void);
+-extern void sdio_function_cleanup(void);
+-
+-#if !defined(OOB_INTR_ONLY)
+-static void IRQHandler(struct sdio_func *func);
+-static void IRQHandlerF2(struct sdio_func *func);
+-#endif				/* !defined(OOB_INTR_ONLY) */
+-static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr);
+-extern int sdio_reset_comm(struct mmc_card *card);
+-
+-extern PBCMSDH_SDMMC_INSTANCE gInstance;
+-
+-uint sd_sdmode = SDIOH_MODE_SD4;	/* Use SD4 mode by default */
+-uint sd_f2_blocksize = 512;	/* Default blocksize */
+-
+-uint sd_divisor = 2;		/* Default 48MHz/2 = 24MHz */
+-
+-uint sd_power = 1;		/* Default to SD Slot powered ON */
+-uint sd_clock = 1;		/* Default to SD Clock turned ON */
+-uint sd_hiok = false;		/* Don't use hi-speed mode by default */
+-uint sd_msglevel = 0x01;
+-uint sd_use_dma = true;
+-DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait);
+-DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait);
+-DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait);
+-DHD_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait);
+-
+-#define DMA_ALIGN_MASK	0x03
+-
+-int sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
+-			     int regsize, u32 *data);
+-
+-void sdioh_sdio_set_host_pm_flags(int flag)
+-{
+-	if (sdio_set_host_pm_flags(gInstance->func[1], flag))
+-		printk(KERN_ERR "%s: Failed to set pm_flags 0x%08x\n",\
+-			 __func__, (unsigned int)flag);
+-}
+-
+-static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd)
+-{
+-	int err_ret;
+-	u32 fbraddr;
+-	u8 func;
+-
+-	sd_trace(("%s\n", __func__));
+-
+-	/* Get the Card's common CIS address */
+-	sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0);
+-	sd->func_cis_ptr[0] = sd->com_cis_ptr;
+-	sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
+-		 sd->com_cis_ptr));
+-
+-	/* Get the Card's function CIS (for each function) */
+-	for (fbraddr = SDIOD_FBR_STARTADDR, func = 1;
+-	     func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) {
+-		sd->func_cis_ptr[func] =
+-		    sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr);
+-		sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func,
+-			 sd->func_cis_ptr[func]));
+-	}
+-
+-	sd->func_cis_ptr[0] = sd->com_cis_ptr;
+-	sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__,
+-		 sd->com_cis_ptr));
+-
+-	/* Enable Function 1 */
+-	sdio_claim_host(gInstance->func[1]);
+-	err_ret = sdio_enable_func(gInstance->func[1]);
+-	sdio_release_host(gInstance->func[1]);
+-	if (err_ret) {
+-		sd_err(("bcmsdh_sdmmc: Failed to enable F1 Err: 0x%08x",
+-			err_ret));
+-	}
+-
+-	return false;
+-}
+-
+-/*
+- *	Public entry points & extern's
+- */
+-sdioh_info_t *sdioh_attach(void *bar0, uint irq)
+-{
+-	sdioh_info_t *sd;
+-	int err_ret;
+-
+-	sd_trace(("%s\n", __func__));
+-
+-	if (gInstance == NULL) {
+-		sd_err(("%s: SDIO Device not present\n", __func__));
+-		return NULL;
+-	}
+-
+-	sd = kzalloc(sizeof(sdioh_info_t), GFP_ATOMIC);
+-	if (sd == NULL) {
+-		sd_err(("sdioh_attach: out of memory\n"));
+-		return NULL;
+-	}
+-	if (sdioh_sdmmc_osinit(sd) != 0) {
+-		sd_err(("%s:sdioh_sdmmc_osinit() failed\n", __func__));
+-		kfree(sd);
+-		return NULL;
+-	}
+-
+-	sd->num_funcs = 2;
+-	sd->sd_blockmode = true;
+-	sd->use_client_ints = true;
+-	sd->client_block_size[0] = 64;
+-
+-	gInstance->sd = sd;
+-
+-	/* Claim host controller */
+-	sdio_claim_host(gInstance->func[1]);
+-
+-	sd->client_block_size[1] = 64;
+-	err_ret = sdio_set_block_size(gInstance->func[1], 64);
+-	if (err_ret)
+-		sd_err(("bcmsdh_sdmmc: Failed to set F1 blocksize\n"));
+-
+-	/* Release host controller F1 */
+-	sdio_release_host(gInstance->func[1]);
+-
+-	if (gInstance->func[2]) {
+-		/* Claim host controller F2 */
+-		sdio_claim_host(gInstance->func[2]);
+-
+-		sd->client_block_size[2] = sd_f2_blocksize;
+-		err_ret =
+-		    sdio_set_block_size(gInstance->func[2], sd_f2_blocksize);
+-		if (err_ret)
+-			sd_err(("bcmsdh_sdmmc: Failed to set F2 blocksize "
+-				"to %d\n", sd_f2_blocksize));
+-
+-		/* Release host controller F2 */
+-		sdio_release_host(gInstance->func[2]);
+-	}
+-
+-	sdioh_sdmmc_card_enablefuncs(sd);
+-
+-	sd_trace(("%s: Done\n", __func__));
+-	return sd;
+-}
+-
+-extern SDIOH_API_RC sdioh_detach(sdioh_info_t *sd)
+-{
+-	sd_trace(("%s\n", __func__));
+-
+-	if (sd) {
+-
+-		/* Disable Function 2 */
+-		sdio_claim_host(gInstance->func[2]);
+-		sdio_disable_func(gInstance->func[2]);
+-		sdio_release_host(gInstance->func[2]);
+-
+-		/* Disable Function 1 */
+-		sdio_claim_host(gInstance->func[1]);
+-		sdio_disable_func(gInstance->func[1]);
+-		sdio_release_host(gInstance->func[1]);
+-
+-		/* deregister irq */
+-		sdioh_sdmmc_osfree(sd);
+-
+-		kfree(sd);
+-	}
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-#if defined(OOB_INTR_ONLY) && defined(HW_OOB)
+-
+-extern SDIOH_API_RC sdioh_enable_func_intr(void)
+-{
+-	u8 reg;
+-	int err;
+-
+-	if (gInstance->func[0]) {
+-		sdio_claim_host(gInstance->func[0]);
+-
+-		reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
+-		if (err) {
+-			sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
+-				__func__, err));
+-			sdio_release_host(gInstance->func[0]);
+-			return SDIOH_API_RC_FAIL;
+-		}
+-
+-		/* Enable F1 and F2 interrupts, set master enable */
+-		reg |=
+-		    (INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN |
+-		     INTR_CTL_MASTER_EN);
+-
+-		sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
+-		sdio_release_host(gInstance->func[0]);
+-
+-		if (err) {
+-			sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
+-				__func__, err));
+-			return SDIOH_API_RC_FAIL;
+-		}
+-	}
+-
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-extern SDIOH_API_RC sdioh_disable_func_intr(void)
+-{
+-	u8 reg;
+-	int err;
+-
+-	if (gInstance->func[0]) {
+-		sdio_claim_host(gInstance->func[0]);
+-		reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err);
+-		if (err) {
+-			sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n",
+-				__func__, err));
+-			sdio_release_host(gInstance->func[0]);
+-			return SDIOH_API_RC_FAIL;
+-		}
+-
+-		reg &= ~(INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN);
+-		/* Disable master interrupt with the last function interrupt */
+-		if (!(reg & 0xFE))
+-			reg = 0;
+-		sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err);
+-
+-		sdio_release_host(gInstance->func[0]);
+-		if (err) {
+-			sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n",
+-				__func__, err));
+-			return SDIOH_API_RC_FAIL;
+-		}
+-	}
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-#endif				/* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
+-
+-/* Configure callback to client when we receive client interrupt */
+-extern SDIOH_API_RC
+-sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh)
+-{
+-	sd_trace(("%s: Entering\n", __func__));
+-	if (fn == NULL) {
+-		sd_err(("%s: interrupt handler is NULL, not registering\n",
+-			__func__));
+-		return SDIOH_API_RC_FAIL;
+-	}
+-#if !defined(OOB_INTR_ONLY)
+-	sd->intr_handler = fn;
+-	sd->intr_handler_arg = argh;
+-	sd->intr_handler_valid = true;
+-
+-	/* register and unmask irq */
+-	if (gInstance->func[2]) {
+-		sdio_claim_host(gInstance->func[2]);
+-		sdio_claim_irq(gInstance->func[2], IRQHandlerF2);
+-		sdio_release_host(gInstance->func[2]);
+-	}
+-
+-	if (gInstance->func[1]) {
+-		sdio_claim_host(gInstance->func[1]);
+-		sdio_claim_irq(gInstance->func[1], IRQHandler);
+-		sdio_release_host(gInstance->func[1]);
+-	}
+-#elif defined(HW_OOB)
+-	sdioh_enable_func_intr();
+-#endif				/* defined(OOB_INTR_ONLY) */
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd)
+-{
+-	sd_trace(("%s: Entering\n", __func__));
+-
+-#if !defined(OOB_INTR_ONLY)
+-	if (gInstance->func[1]) {
+-		/* register and unmask irq */
+-		sdio_claim_host(gInstance->func[1]);
+-		sdio_release_irq(gInstance->func[1]);
+-		sdio_release_host(gInstance->func[1]);
+-	}
+-
+-	if (gInstance->func[2]) {
+-		/* Claim host controller F2 */
+-		sdio_claim_host(gInstance->func[2]);
+-		sdio_release_irq(gInstance->func[2]);
+-		/* Release host controller F2 */
+-		sdio_release_host(gInstance->func[2]);
+-	}
+-
+-	sd->intr_handler_valid = false;
+-	sd->intr_handler = NULL;
+-	sd->intr_handler_arg = NULL;
+-#elif defined(HW_OOB)
+-	sdioh_disable_func_intr();
+-#endif				/*  !defined(OOB_INTR_ONLY) */
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff)
+-{
+-	sd_trace(("%s: Entering\n", __func__));
+-	*onoff = sd->client_intr_enabled;
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-#if defined(DHD_DEBUG)
+-extern bool sdioh_interrupt_pending(sdioh_info_t *sd)
+-{
+-	return 0;
+-}
+-#endif
+-
+-uint sdioh_query_iofnum(sdioh_info_t *sd)
+-{
+-	return sd->num_funcs;
+-}
+-
+-/* IOVar table */
+-enum {
+-	IOV_MSGLEVEL = 1,
+-	IOV_BLOCKMODE,
+-	IOV_BLOCKSIZE,
+-	IOV_DMA,
+-	IOV_USEINTS,
+-	IOV_NUMINTS,
+-	IOV_NUMLOCALINTS,
+-	IOV_HOSTREG,
+-	IOV_DEVREG,
+-	IOV_DIVISOR,
+-	IOV_SDMODE,
+-	IOV_HISPEED,
+-	IOV_HCIREGS,
+-	IOV_POWER,
+-	IOV_CLOCK,
+-	IOV_RXCHAIN
+-};
+-
+-const bcm_iovar_t sdioh_iovars[] = {
+-	{"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0},
+-	{"sd_blockmode", IOV_BLOCKMODE, 0, IOVT_BOOL, 0},
+-	{"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) |
+-								 size) */
+-	{"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0},
+-	{"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0},
+-	{"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0},
+-	{"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0},
+-	{"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
+-	,
+-	{"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
+-	,
+-	{"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0}
+-	,
+-	{"sd_power", IOV_POWER, 0, IOVT_UINT32, 0}
+-	,
+-	{"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0}
+-	,
+-	{"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100}
+-	,
+-	{"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0}
+-	,
+-	{"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0}
+-	,
+-	{NULL, 0, 0, 0, 0}
+-};
+-
+-int
+-sdioh_iovar_op(sdioh_info_t *si, const char *name,
+-	       void *params, int plen, void *arg, int len, bool set)
+-{
+-	const bcm_iovar_t *vi = NULL;
+-	int bcmerror = 0;
+-	int val_size;
+-	s32 int_val = 0;
+-	bool bool_val;
+-	u32 actionid;
+-
+-	ASSERT(name);
+-	ASSERT(len >= 0);
+-
+-	/* Get must have return space; Set does not take qualifiers */
+-	ASSERT(set || (arg && len));
+-	ASSERT(!set || (!params && !plen));
+-
+-	sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"),
+-		  name));
+-
+-	vi = bcm_iovar_lookup(sdioh_iovars, name);
+-	if (vi == NULL) {
+-		bcmerror = -ENOTSUPP;
+-		goto exit;
+-	}
+-
+-	bcmerror = bcm_iovar_lencheck(vi, arg, len, set);
+-	if (bcmerror != 0)
+-		goto exit;
+-
+-	/* Set up params so get and set can share the convenience variables */
+-	if (params == NULL) {
+-		params = arg;
+-		plen = len;
+-	}
+-
+-	if (vi->type == IOVT_VOID)
+-		val_size = 0;
+-	else if (vi->type == IOVT_BUFFER)
+-		val_size = len;
+-	else
+-		val_size = sizeof(int);
+-
+-	if (plen >= (int)sizeof(int_val))
+-		memcpy(&int_val, params, sizeof(int_val));
+-
+-	bool_val = (int_val != 0) ? true : false;
+-
+-	actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
+-	switch (actionid) {
+-	case IOV_GVAL(IOV_MSGLEVEL):
+-		int_val = (s32) sd_msglevel;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_MSGLEVEL):
+-		sd_msglevel = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_BLOCKMODE):
+-		int_val = (s32) si->sd_blockmode;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_BLOCKMODE):
+-		si->sd_blockmode = (bool) int_val;
+-		/* Haven't figured out how to make non-block mode with DMA */
+-		break;
+-
+-	case IOV_GVAL(IOV_BLOCKSIZE):
+-		if ((u32) int_val > si->num_funcs) {
+-			bcmerror = -EINVAL;
+-			break;
+-		}
+-		int_val = (s32) si->client_block_size[int_val];
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_BLOCKSIZE):
+-		{
+-			uint func = ((u32) int_val >> 16);
+-			uint blksize = (u16) int_val;
+-			uint maxsize;
+-
+-			if (func > si->num_funcs) {
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-
+-			switch (func) {
+-			case 0:
+-				maxsize = 32;
+-				break;
+-			case 1:
+-				maxsize = BLOCK_SIZE_4318;
+-				break;
+-			case 2:
+-				maxsize = BLOCK_SIZE_4328;
+-				break;
+-			default:
+-				maxsize = 0;
+-			}
+-			if (blksize > maxsize) {
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-			if (!blksize)
+-				blksize = maxsize;
+-
+-			/* Now set it */
+-			si->client_block_size[func] = blksize;
+-
+-			break;
+-		}
+-
+-	case IOV_GVAL(IOV_RXCHAIN):
+-		int_val = false;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_GVAL(IOV_DMA):
+-		int_val = (s32) si->sd_use_dma;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_DMA):
+-		si->sd_use_dma = (bool) int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_USEINTS):
+-		int_val = (s32) si->use_client_ints;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_USEINTS):
+-		si->use_client_ints = (bool) int_val;
+-		if (si->use_client_ints)
+-			si->intmask |= CLIENT_INTR;
+-		else
+-			si->intmask &= ~CLIENT_INTR;
+-
+-		break;
+-
+-	case IOV_GVAL(IOV_DIVISOR):
+-		int_val = (u32) sd_divisor;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_DIVISOR):
+-		sd_divisor = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_POWER):
+-		int_val = (u32) sd_power;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_POWER):
+-		sd_power = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_CLOCK):
+-		int_val = (u32) sd_clock;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_CLOCK):
+-		sd_clock = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_SDMODE):
+-		int_val = (u32) sd_sdmode;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_SDMODE):
+-		sd_sdmode = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_HISPEED):
+-		int_val = (u32) sd_hiok;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_HISPEED):
+-		sd_hiok = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_NUMINTS):
+-		int_val = (s32) si->intrcount;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_GVAL(IOV_NUMLOCALINTS):
+-		int_val = (s32) 0;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_GVAL(IOV_HOSTREG):
+-		{
+-			sdreg_t *sd_ptr = (sdreg_t *) params;
+-
+-			if (sd_ptr->offset < SD_SysAddr
+-			    || sd_ptr->offset > SD_MaxCurCap) {
+-				sd_err(("%s: bad offset 0x%x\n", __func__,
+-					sd_ptr->offset));
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-
+-			sd_trace(("%s: rreg%d at offset %d\n", __func__,
+-				  (sd_ptr->offset & 1) ? 8
+-				  : ((sd_ptr->offset & 2) ? 16 : 32),
+-				  sd_ptr->offset));
+-			if (sd_ptr->offset & 1)
+-				int_val = 8;	/* sdioh_sdmmc_rreg8(si,
+-						 sd_ptr->offset); */
+-			else if (sd_ptr->offset & 2)
+-				int_val = 16;	/* sdioh_sdmmc_rreg16(si,
+-						 sd_ptr->offset); */
+-			else
+-				int_val = 32;	/* sdioh_sdmmc_rreg(si,
+-						 sd_ptr->offset); */
+-
+-			memcpy(arg, &int_val, sizeof(int_val));
+-			break;
+-		}
+-
+-	case IOV_SVAL(IOV_HOSTREG):
+-		{
+-			sdreg_t *sd_ptr = (sdreg_t *) params;
+-
+-			if (sd_ptr->offset < SD_SysAddr
+-			    || sd_ptr->offset > SD_MaxCurCap) {
+-				sd_err(("%s: bad offset 0x%x\n", __func__,
+-					sd_ptr->offset));
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-
+-			sd_trace(("%s: wreg%d value 0x%08x at offset %d\n",
+-				  __func__, sd_ptr->value,
+-				  (sd_ptr->offset & 1) ? 8
+-				  : ((sd_ptr->offset & 2) ? 16 : 32),
+-				  sd_ptr->offset));
+-			break;
+-		}
+-
+-	case IOV_GVAL(IOV_DEVREG):
+-		{
+-			sdreg_t *sd_ptr = (sdreg_t *) params;
+-			u8 data = 0;
+-
+-			if (sdioh_cfg_read
+-			    (si, sd_ptr->func, sd_ptr->offset, &data)) {
+-				bcmerror = -EIO;
+-				break;
+-			}
+-
+-			int_val = (int)data;
+-			memcpy(arg, &int_val, sizeof(int_val));
+-			break;
+-		}
+-
+-	case IOV_SVAL(IOV_DEVREG):
+-		{
+-			sdreg_t *sd_ptr = (sdreg_t *) params;
+-			u8 data = (u8) sd_ptr->value;
+-
+-			if (sdioh_cfg_write
+-			    (si, sd_ptr->func, sd_ptr->offset, &data)) {
+-				bcmerror = -EIO;
+-				break;
+-			}
+-			break;
+-		}
+-
+-	default:
+-		bcmerror = -ENOTSUPP;
+-		break;
+-	}
+-exit:
+-
+-	return bcmerror;
+-}
+-
+-#if defined(OOB_INTR_ONLY) && defined(HW_OOB)
+-
+-SDIOH_API_RC sdioh_enable_hw_oob_intr(sdioh_info_t *sd, bool enable)
+-{
+-	SDIOH_API_RC status;
+-	u8 data;
+-
+-	if (enable)
+-		data = 3;	/* enable hw oob interrupt */
+-	else
+-		data = 4;	/* disable hw oob interrupt */
+-	data |= 4;		/* Active HIGH */
+-
+-	status = sdioh_request_byte(sd, SDIOH_WRITE, 0, 0xf2, &data);
+-	return status;
+-}
+-#endif				/* defined(OOB_INTR_ONLY) && defined(HW_OOB) */
+-
+-extern SDIOH_API_RC
+-sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
+-{
+-	SDIOH_API_RC status;
+-	/* No lock needed since sdioh_request_byte does locking */
+-	status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data);
+-	return status;
+-}
+-
+-extern SDIOH_API_RC
+-sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data)
+-{
+-	/* No lock needed since sdioh_request_byte does locking */
+-	SDIOH_API_RC status;
+-	status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data);
+-	return status;
+-}
+-
+-static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr)
+-{
+-	/* read 24 bits and return valid 17 bit addr */
+-	int i;
+-	u32 scratch, regdata;
+-	u8 *ptr = (u8 *)&scratch;
+-	for (i = 0; i < 3; i++) {
+-		if ((sdioh_sdmmc_card_regread(sd, 0, regaddr, 1, &regdata)) !=
+-		    SUCCESS)
+-			sd_err(("%s: Can't read!\n", __func__));
+-
+-		*ptr++ = (u8) regdata;
+-		regaddr++;
+-	}
+-
+-	/* Only the lower 17-bits are valid */
+-	scratch = le32_to_cpu(scratch);
+-	scratch &= 0x0001FFFF;
+-	return scratch;
+-}
+-
+-extern SDIOH_API_RC
+-sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length)
+-{
+-	u32 count;
+-	int offset;
+-	u32 foo;
+-	u8 *cis = cisd;
+-
+-	sd_trace(("%s: Func = %d\n", __func__, func));
+-
+-	if (!sd->func_cis_ptr[func]) {
+-		memset(cis, 0, length);
+-		sd_err(("%s: no func_cis_ptr[%d]\n", __func__, func));
+-		return SDIOH_API_RC_FAIL;
+-	}
+-
+-	sd_err(("%s: func_cis_ptr[%d]=0x%04x\n", __func__, func,
+-		sd->func_cis_ptr[func]));
+-
+-	for (count = 0; count < length; count++) {
+-		offset = sd->func_cis_ptr[func] + count;
+-		if (sdioh_sdmmc_card_regread(sd, 0, offset, 1, &foo) < 0) {
+-			sd_err(("%s: regread failed: Can't read CIS\n",
+-				__func__));
+-			return SDIOH_API_RC_FAIL;
+-		}
+-
+-		*cis = (u8) (foo & 0xff);
+-		cis++;
+-	}
+-
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-extern SDIOH_API_RC
+-sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr,
+-		   u8 *byte)
+-{
+-	int err_ret;
+-
+-	sd_info(("%s: rw=%d, func=%d, addr=0x%05x\n", __func__, rw, func,
+-		 regaddr));
+-
+-	DHD_PM_RESUME_WAIT(sdioh_request_byte_wait);
+-	DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
+-	if (rw) {		/* CMD52 Write */
+-		if (func == 0) {
+-			/* Can only directly write to some F0 registers.
+-			 * Handle F2 enable
+-			 * as a special case.
+-			 */
+-			if (regaddr == SDIOD_CCCR_IOEN) {
+-				if (gInstance->func[2]) {
+-					sdio_claim_host(gInstance->func[2]);
+-					if (*byte & SDIO_FUNC_ENABLE_2) {
+-						/* Enable Function 2 */
+-						err_ret =
+-						    sdio_enable_func
+-						    (gInstance->func[2]);
+-						if (err_ret)
+-							sd_err(("bcmsdh_sdmmc: enable F2 failed:%d",
+-								 err_ret));
+-					} else {
+-						/* Disable Function 2 */
+-						err_ret =
+-						    sdio_disable_func
+-						    (gInstance->func[2]);
+-						if (err_ret)
+-							sd_err(("bcmsdh_sdmmc: Disab F2 failed:%d",
+-								 err_ret));
+-					}
+-					sdio_release_host(gInstance->func[2]);
+-				}
+-			}
+-#if defined(MMC_SDIO_ABORT)
+-			/* to allow abort command through F1 */
+-			else if (regaddr == SDIOD_CCCR_IOABORT) {
+-				sdio_claim_host(gInstance->func[func]);
+-				/*
+-				 * this sdio_f0_writeb() can be replaced
+-				 * with another api
+-				 * depending upon MMC driver change.
+-				 * As of this time, this is temporaray one
+-				 */
+-				sdio_writeb(gInstance->func[func], *byte,
+-					    regaddr, &err_ret);
+-				sdio_release_host(gInstance->func[func]);
+-			}
+-#endif				/* MMC_SDIO_ABORT */
+-			else if (regaddr < 0xF0) {
+-				sd_err(("bcmsdh_sdmmc: F0 Wr:0x%02x: write "
+-					"disallowed\n", regaddr));
+-			} else {
+-				/* Claim host controller, perform F0 write,
+-				 and release */
+-				sdio_claim_host(gInstance->func[func]);
+-				sdio_f0_writeb(gInstance->func[func], *byte,
+-					       regaddr, &err_ret);
+-				sdio_release_host(gInstance->func[func]);
+-			}
+-		} else {
+-			/* Claim host controller, perform Fn write,
+-			 and release */
+-			sdio_claim_host(gInstance->func[func]);
+-			sdio_writeb(gInstance->func[func], *byte, regaddr,
+-				    &err_ret);
+-			sdio_release_host(gInstance->func[func]);
+-		}
+-	} else {		/* CMD52 Read */
+-		/* Claim host controller, perform Fn read, and release */
+-		sdio_claim_host(gInstance->func[func]);
+-
+-		if (func == 0) {
+-			*byte =
+-			    sdio_f0_readb(gInstance->func[func], regaddr,
+-					  &err_ret);
+-		} else {
+-			*byte =
+-			    sdio_readb(gInstance->func[func], regaddr,
+-				       &err_ret);
+-		}
+-
+-		sdio_release_host(gInstance->func[func]);
+-	}
+-
+-	if (err_ret)
+-		sd_err(("bcmsdh_sdmmc: Failed to %s byte F%d:@0x%05x=%02x, "
+-			"Err: %d\n", rw ? "Write" : "Read", func, regaddr,
+-			*byte, err_ret));
+-
+-	return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
+-}
+-
+-extern SDIOH_API_RC
+-sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func,
+-		   uint addr, u32 *word, uint nbytes)
+-{
+-	int err_ret = SDIOH_API_RC_FAIL;
+-
+-	if (func == 0) {
+-		sd_err(("%s: Only CMD52 allowed to F0.\n", __func__));
+-		return SDIOH_API_RC_FAIL;
+-	}
+-
+-	sd_info(("%s: cmd_type=%d, rw=%d, func=%d, addr=0x%05x, nbytes=%d\n",
+-		 __func__, cmd_type, rw, func, addr, nbytes));
+-
+-	DHD_PM_RESUME_WAIT(sdioh_request_word_wait);
+-	DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
+-	/* Claim host controller */
+-	sdio_claim_host(gInstance->func[func]);
+-
+-	if (rw) {		/* CMD52 Write */
+-		if (nbytes == 4) {
+-			sdio_writel(gInstance->func[func], *word, addr,
+-				    &err_ret);
+-		} else if (nbytes == 2) {
+-			sdio_writew(gInstance->func[func], (*word & 0xFFFF),
+-				    addr, &err_ret);
+-		} else {
+-			sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
+-		}
+-	} else {		/* CMD52 Read */
+-		if (nbytes == 4) {
+-			*word =
+-			    sdio_readl(gInstance->func[func], addr, &err_ret);
+-		} else if (nbytes == 2) {
+-			*word =
+-			    sdio_readw(gInstance->func[func], addr,
+-				       &err_ret) & 0xFFFF;
+-		} else {
+-			sd_err(("%s: Invalid nbytes: %d\n", __func__, nbytes));
+-		}
+-	}
+-
+-	/* Release host controller */
+-	sdio_release_host(gInstance->func[func]);
+-
+-	if (err_ret) {
+-		sd_err(("bcmsdh_sdmmc: Failed to %s word, Err: 0x%08x",
+-			rw ? "Write" : "Read", err_ret));
+-	}
+-
+-	return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
+-}
+-
+-static SDIOH_API_RC
+-sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func,
+-		     uint addr, struct sk_buff *pkt)
+-{
+-	bool fifo = (fix_inc == SDIOH_DATA_FIX);
+-	u32 SGCount = 0;
+-	int err_ret = 0;
+-
+-	struct sk_buff *pnext;
+-
+-	sd_trace(("%s: Enter\n", __func__));
+-
+-	ASSERT(pkt);
+-	DHD_PM_RESUME_WAIT(sdioh_request_packet_wait);
+-	DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
+-
+-	/* Claim host controller */
+-	sdio_claim_host(gInstance->func[func]);
+-	for (pnext = pkt; pnext; pnext = pnext->next) {
+-		uint pkt_len = pnext->len;
+-		pkt_len += 3;
+-		pkt_len &= 0xFFFFFFFC;
+-
+-#ifdef CONFIG_MMC_MSM7X00A
+-		if ((pkt_len % 64) == 32) {
+-			sd_trace(("%s: Rounding up TX packet +=32\n",
+-				  __func__));
+-			pkt_len += 32;
+-		}
+-#endif				/* CONFIG_MMC_MSM7X00A */
+-		/* Make sure the packet is aligned properly.
+-		 * If it isn't, then this
+-		 * is the fault of sdioh_request_buffer() which
+-		 * is supposed to give
+-		 * us something we can work with.
+-		 */
+-		ASSERT(((u32) (pkt->data) & DMA_ALIGN_MASK) == 0);
+-
+-		if ((write) && (!fifo)) {
+-			err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
+-						   ((u8 *) (pnext->data)),
+-						   pkt_len);
+-		} else if (write) {
+-			err_ret = sdio_memcpy_toio(gInstance->func[func], addr,
+-						   ((u8 *) (pnext->data)),
+-						   pkt_len);
+-		} else if (fifo) {
+-			err_ret = sdio_readsb(gInstance->func[func],
+-					      ((u8 *) (pnext->data)),
+-					      addr, pkt_len);
+-		} else {
+-			err_ret = sdio_memcpy_fromio(gInstance->func[func],
+-						     ((u8 *) (pnext->data)),
+-						     addr, pkt_len);
+-		}
+-
+-		if (err_ret) {
+-			sd_err(("%s: %s FAILED %p[%d], addr=0x%05x, pkt_len=%d,"
+-				 "ERR=0x%08x\n", __func__,
+-				 (write) ? "TX" : "RX",
+-				 pnext, SGCount, addr, pkt_len, err_ret));
+-		} else {
+-			sd_trace(("%s: %s xfr'd %p[%d], addr=0x%05x, len=%d\n",
+-				  __func__,
+-				  (write) ? "TX" : "RX",
+-				  pnext, SGCount, addr, pkt_len));
+-		}
+-
+-		if (!fifo)
+-			addr += pkt_len;
+-		SGCount++;
+-
+-	}
+-
+-	/* Release host controller */
+-	sdio_release_host(gInstance->func[func]);
+-
+-	sd_trace(("%s: Exit\n", __func__));
+-	return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL);
+-}
+-
+-/*
+- * This function takes a buffer or packet, and fixes everything up
+- * so that in the end, a DMA-able packet is created.
+- *
+- * A buffer does not have an associated packet pointer,
+- * and may or may not be aligned.
+- * A packet may consist of a single packet, or a packet chain.
+- * If it is a packet chain, then all the packets in the chain
+- * must be properly aligned.
+- *
+- * If the packet data is not aligned, then there may only be
+- * one packet, and in this case,  it is copied to a new
+- * aligned packet.
+- *
+- */
+-extern SDIOH_API_RC
+-sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write,
+-		     uint func, uint addr, uint reg_width, uint buflen_u,
+-		     u8 *buffer, struct sk_buff *pkt)
+-{
+-	SDIOH_API_RC Status;
+-	struct sk_buff *mypkt = NULL;
+-
+-	sd_trace(("%s: Enter\n", __func__));
+-
+-	DHD_PM_RESUME_WAIT(sdioh_request_buffer_wait);
+-	DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL);
+-	/* Case 1: we don't have a packet. */
+-	if (pkt == NULL) {
+-		sd_data(("%s: Creating new %s Packet, len=%d\n",
+-			 __func__, write ? "TX" : "RX", buflen_u));
+-		mypkt = bcm_pkt_buf_get_skb(buflen_u);
+-		if (!mypkt) {
+-			sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
+-				__func__, buflen_u));
+-			return SDIOH_API_RC_FAIL;
+-		}
+-
+-		/* For a write, copy the buffer data into the packet. */
+-		if (write)
+-			memcpy(mypkt->data, buffer, buflen_u);
+-
+-		Status =
+-		    sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
+-
+-		/* For a read, copy the packet data back to the buffer. */
+-		if (!write)
+-			memcpy(buffer, mypkt->data, buflen_u);
+-
+-		bcm_pkt_buf_free_skb(mypkt);
+-	} else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) {
+-		/* Case 2: We have a packet, but it is unaligned. */
+-
+-		/* In this case, we cannot have a chain. */
+-		ASSERT(pkt->next == NULL);
+-
+-		sd_data(("%s: Creating aligned %s Packet, len=%d\n",
+-			 __func__, write ? "TX" : "RX", pkt->len));
+-		mypkt = bcm_pkt_buf_get_skb(pkt->len);
+-		if (!mypkt) {
+-			sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n",
+-				__func__, pkt->len));
+-			return SDIOH_API_RC_FAIL;
+-		}
+-
+-		/* For a write, copy the buffer data into the packet. */
+-		if (write)
+-			memcpy(mypkt->data, pkt->data, pkt->len);
+-
+-		Status =
+-		    sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt);
+-
+-		/* For a read, copy the packet data back to the buffer. */
+-		if (!write)
+-			memcpy(pkt->data, mypkt->data, mypkt->len);
+-
+-		bcm_pkt_buf_free_skb(mypkt);
+-	} else {		/* case 3: We have a packet and
+-				 it is aligned. */
+-		sd_data(("%s: Aligned %s Packet, direct DMA\n",
+-			 __func__, write ? "Tx" : "Rx"));
+-		Status =
+-		    sdioh_request_packet(sd, fix_inc, write, func, addr, pkt);
+-	}
+-
+-	return Status;
+-}
+-
+-/* this function performs "abort" for both of host & device */
+-extern int sdioh_abort(sdioh_info_t *sd, uint func)
+-{
+-#if defined(MMC_SDIO_ABORT)
+-	char t_func = (char)func;
+-#endif				/* defined(MMC_SDIO_ABORT) */
+-	sd_trace(("%s: Enter\n", __func__));
+-
+-#if defined(MMC_SDIO_ABORT)
+-	/* issue abort cmd52 command through F1 */
+-	sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT,
+-			   &t_func);
+-#endif				/* defined(MMC_SDIO_ABORT) */
+-
+-	sd_trace(("%s: Exit\n", __func__));
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-/* Reset and re-initialize the device */
+-int sdioh_sdio_reset(sdioh_info_t *si)
+-{
+-	sd_trace(("%s: Enter\n", __func__));
+-	sd_trace(("%s: Exit\n", __func__));
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-/* Disable device interrupt */
+-void sdioh_sdmmc_devintr_off(sdioh_info_t *sd)
+-{
+-	sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
+-	sd->intmask &= ~CLIENT_INTR;
+-}
+-
+-/* Enable device interrupt */
+-void sdioh_sdmmc_devintr_on(sdioh_info_t *sd)
+-{
+-	sd_trace(("%s: %d\n", __func__, sd->use_client_ints));
+-	sd->intmask |= CLIENT_INTR;
+-}
+-
+-/* Read client card reg */
+-int
+-sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr,
+-			 int regsize, u32 *data)
+-{
+-
+-	if ((func == 0) || (regsize == 1)) {
+-		u8 temp = 0;
+-
+-		sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
+-		*data = temp;
+-		*data &= 0xff;
+-		sd_data(("%s: byte read data=0x%02x\n", __func__, *data));
+-	} else {
+-		sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data,
+-				   regsize);
+-		if (regsize == 2)
+-			*data &= 0xffff;
+-
+-		sd_data(("%s: word read data=0x%08x\n", __func__, *data));
+-	}
+-
+-	return SUCCESS;
+-}
+-
+-#if !defined(OOB_INTR_ONLY)
+-/* bcmsdh_sdmmc interrupt handler */
+-static void IRQHandler(struct sdio_func *func)
+-{
+-	sdioh_info_t *sd;
+-
+-	sd_trace(("bcmsdh_sdmmc: ***IRQHandler\n"));
+-	sd = gInstance->sd;
+-
+-	ASSERT(sd != NULL);
+-	sdio_release_host(gInstance->func[0]);
+-
+-	if (sd->use_client_ints) {
+-		sd->intrcount++;
+-		ASSERT(sd->intr_handler);
+-		ASSERT(sd->intr_handler_arg);
+-		(sd->intr_handler) (sd->intr_handler_arg);
+-	} else {
+-		sd_err(("bcmsdh_sdmmc: ***IRQHandler\n"));
+-
+-		sd_err(("%s: Not ready for intr: enabled %d, handler %p\n",
+-			__func__, sd->client_intr_enabled, sd->intr_handler));
+-	}
+-
+-	sdio_claim_host(gInstance->func[0]);
+-}
+-
+-/* bcmsdh_sdmmc interrupt handler for F2 (dummy handler) */
+-static void IRQHandlerF2(struct sdio_func *func)
+-{
+-	sdioh_info_t *sd;
+-
+-	sd_trace(("bcmsdh_sdmmc: ***IRQHandlerF2\n"));
+-
+-	sd = gInstance->sd;
+-
+-	ASSERT(sd != NULL);
+-}
+-#endif				/* !defined(OOB_INTR_ONLY) */
+-
+-#ifdef NOTUSED
+-/* Write client card reg */
+-static int
+-sdioh_sdmmc_card_regwrite(sdioh_info_t *sd, int func, u32 regaddr,
+-			  int regsize, u32 data)
+-{
+-
+-	if ((func == 0) || (regsize == 1)) {
+-		u8 temp;
+-
+-		temp = data & 0xff;
+-		sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp);
+-		sd_data(("%s: byte write data=0x%02x\n", __func__, data));
+-	} else {
+-		if (regsize == 2)
+-			data &= 0xffff;
+-
+-		sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, &data,
+-				   regsize);
+-
+-		sd_data(("%s: word write data=0x%08x\n", __func__, data));
+-	}
+-
+-	return SUCCESS;
+-}
+-#endif				/* NOTUSED */
+-
+-int sdioh_start(sdioh_info_t *si, int stage)
+-{
+-	return 0;
+-}
+-
+-int sdioh_stop(sdioh_info_t *si)
+-{
+-	return 0;
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
+deleted file mode 100644
+index 3ef42b3..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h
++++ /dev/null
+@@ -1,134 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef __BCMSDH_SDMMC_H__
+-#define __BCMSDH_SDMMC_H__
+-
+-#ifdef BCMDBG
+-#define sd_err(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_ERROR_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#define sd_trace(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_TRACE_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#define sd_info(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_INFO_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#define sd_debug(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_DEBUG_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#define sd_data(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_DATA_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#define sd_ctrl(x)	\
+-	do { \
+-		if ((sd_msglevel & SDH_CTRL_VAL) && net_ratelimit()) \
+-			printk x; \
+-	} while (0)
+-#else
+-#define sd_err(x)
+-#define sd_trace(x)
+-#define sd_info(x)
+-#define sd_debug(x)
+-#define sd_data(x)
+-#define sd_ctrl(x)
+-#endif
+-
+-/* Allocate/init/free per-OS private data */
+-extern int sdioh_sdmmc_osinit(sdioh_info_t *sd);
+-extern void sdioh_sdmmc_osfree(sdioh_info_t *sd);
+-
+-#define BLOCK_SIZE_64 64
+-#define BLOCK_SIZE_512 512
+-#define BLOCK_SIZE_4318 64
+-#define BLOCK_SIZE_4328 512
+-
+-/* internal return code */
+-#define SUCCESS	0
+-#define ERROR	1
+-
+-/* private bus modes */
+-#define SDIOH_MODE_SD4		2
+-#define CLIENT_INTR 		0x100	/* Get rid of this! */
+-
+-struct sdioh_info {
+-	struct osl_info *osh;		/* osh handler */
+-	bool client_intr_enabled;	/* interrupt connnected flag */
+-	bool intr_handler_valid;	/* client driver interrupt handler valid */
+-	sdioh_cb_fn_t intr_handler;	/* registered interrupt handler */
+-	void *intr_handler_arg;	/* argument to call interrupt handler */
+-	u16 intmask;		/* Current active interrupts */
+-	void *sdos_info;	/* Pointer to per-OS private data */
+-
+-	uint irq;		/* Client irq */
+-	int intrcount;		/* Client interrupts */
+-	bool sd_use_dma;	/* DMA on CMD53 */
+-	bool sd_blockmode;	/* sd_blockmode == false => 64 Byte Cmd 53s. */
+-	/*  Must be on for sd_multiblock to be effective */
+-	bool use_client_ints;	/* If this is false, make sure to restore */
+-	int sd_mode;		/* SD1/SD4/SPI */
+-	int client_block_size[SDIOD_MAX_IOFUNCS];	/* Blocksize */
+-	u8 num_funcs;	/* Supported funcs on client */
+-	u32 com_cis_ptr;
+-	u32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
+-	uint max_dma_len;
+-	uint max_dma_descriptors;	/* DMA Descriptors supported by this controller. */
+-	/*	SDDMA_DESCRIPTOR	SGList[32]; *//* Scatter/Gather DMA List */
+-};
+-
+-/************************************************************
+- * Internal interfaces: per-port references into bcmsdh_sdmmc.c
+- */
+-
+-/* Global message bits */
+-extern uint sd_msglevel;
+-
+-/* OS-independent interrupt handler */
+-extern bool check_client_intr(sdioh_info_t *sd);
+-
+-/* Core interrupt enable/disable of device interrupts */
+-extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd);
+-extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd);
+-
+-/**************************************************************
+- * Internal interfaces: bcmsdh_sdmmc.c references to per-port code
+- */
+-
+-/* Register mapping routines */
+-extern u32 *sdioh_sdmmc_reg_map(s32 addr, int size);
+-extern void sdioh_sdmmc_reg_unmap(s32 addr, int size);
+-
+-/* Interrupt (de)registration routines */
+-extern int sdioh_sdmmc_register_irq(sdioh_info_t *sd, uint irq);
+-extern void sdioh_sdmmc_free_irq(uint irq, sdioh_info_t *sd);
+-
+-typedef struct _BCMSDH_SDMMC_INSTANCE {
+-	sdioh_info_t *sd;
+-	struct sdio_func *func[SDIOD_MAX_IOFUNCS];
+-	u32 host_claimed;
+-} BCMSDH_SDMMC_INSTANCE, *PBCMSDH_SDMMC_INSTANCE;
+-
+-#endif				/* __BCMSDH_SDMMC_H__ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
+deleted file mode 100644
+index 2792a4d..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c
++++ /dev/null
+@@ -1,235 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/types.h>
+-#include <linux/sched.h>	/* request_irq() */
+-#include <linux/netdevice.h>
+-#include <bcmdefs.h>
+-#include <bcmutils.h>
+-#include <sdio.h>		/* SDIO Specs */
+-#include <bcmsdbus.h>		/* bcmsdh to/from specific controller APIs */
+-#include <sdiovar.h>		/* to get msglevel bit values */
+-
+-#include <linux/mmc/core.h>
+-#include <linux/mmc/card.h>
+-#include <linux/mmc/sdio_func.h>
+-#include <linux/mmc/sdio_ids.h>
+-
+-#include "dngl_stats.h"
+-#include "dhd.h"
+-
+-#if !defined(SDIO_VENDOR_ID_BROADCOM)
+-#define SDIO_VENDOR_ID_BROADCOM		0x02d0
+-#endif				/* !defined(SDIO_VENDOR_ID_BROADCOM) */
+-
+-#define SDIO_DEVICE_ID_BROADCOM_DEFAULT	0x0000
+-
+-#if !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB)
+-#define SDIO_DEVICE_ID_BROADCOM_4325_SDGWB	0x0492	/* BCM94325SDGWB */
+-#endif		/* !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB) */
+-#if !defined(SDIO_DEVICE_ID_BROADCOM_4325)
+-#define SDIO_DEVICE_ID_BROADCOM_4325	0x0493
+-#endif		/* !defined(SDIO_DEVICE_ID_BROADCOM_4325) */
+-#if !defined(SDIO_DEVICE_ID_BROADCOM_4329)
+-#define SDIO_DEVICE_ID_BROADCOM_4329	0x4329
+-#endif		/* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */
+-#if !defined(SDIO_DEVICE_ID_BROADCOM_4319)
+-#define SDIO_DEVICE_ID_BROADCOM_4319	0x4319
+-#endif		/* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */
+-
+-#include <bcmsdh_sdmmc.h>
+-
+-#include <dhd_dbg.h>
+-#include <wl_cfg80211.h>
+-
+-extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd);
+-extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd);
+-
+-int sdio_function_init(void);
+-void sdio_function_cleanup(void);
+-
+-/* module param defaults */
+-static int clockoverride;
+-
+-module_param(clockoverride, int, 0644);
+-MODULE_PARM_DESC(clockoverride, "SDIO card clock override");
+-
+-PBCMSDH_SDMMC_INSTANCE gInstance;
+-
+-/* Maximum number of bcmsdh_sdmmc devices supported by driver */
+-#define BCMSDH_SDMMC_MAX_DEVICES 1
+-
+-extern int bcmsdh_probe(struct device *dev);
+-extern int bcmsdh_remove(struct device *dev);
+-struct device sdmmc_dev;
+-
+-static int bcmsdh_sdmmc_probe(struct sdio_func *func,
+-			      const struct sdio_device_id *id)
+-{
+-	int ret = 0;
+-	static struct sdio_func sdio_func_0;
+-	sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__));
+-	sd_trace(("sdio_bcmsdh: func->class=%x\n", func->class));
+-	sd_trace(("sdio_vendor: 0x%04x\n", func->vendor));
+-	sd_trace(("sdio_device: 0x%04x\n", func->device));
+-	sd_trace(("Function#: 0x%04x\n", func->num));
+-
+-	if (func->num == 1) {
+-		sdio_func_0.num = 0;
+-		sdio_func_0.card = func->card;
+-		gInstance->func[0] = &sdio_func_0;
+-		if (func->device == 0x4) {	/* 4318 */
+-			gInstance->func[2] = NULL;
+-			sd_trace(("NIC found, calling bcmsdh_probe...\n"));
+-			ret = bcmsdh_probe(&sdmmc_dev);
+-		}
+-	}
+-
+-	gInstance->func[func->num] = func;
+-
+-	if (func->num == 2) {
+-		wl_cfg80211_sdio_func(func);
+-		sd_trace(("F2 found, calling bcmsdh_probe...\n"));
+-		ret = bcmsdh_probe(&sdmmc_dev);
+-	}
+-
+-	return ret;
+-}
+-
+-static void bcmsdh_sdmmc_remove(struct sdio_func *func)
+-{
+-	sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__));
+-	sd_info(("sdio_bcmsdh: func->class=%x\n", func->class));
+-	sd_info(("sdio_vendor: 0x%04x\n", func->vendor));
+-	sd_info(("sdio_device: 0x%04x\n", func->device));
+-	sd_info(("Function#: 0x%04x\n", func->num));
+-
+-	if (func->num == 2) {
+-		sd_trace(("F2 found, calling bcmsdh_remove...\n"));
+-		bcmsdh_remove(&sdmmc_dev);
+-	}
+-}
+-
+-/* devices we support, null terminated */
+-static const struct sdio_device_id bcmsdh_sdmmc_ids[] = {
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_DEFAULT)},
+-	{SDIO_DEVICE
+-	 (SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325_SDGWB)},
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325)},
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)},
+-	{SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4319)},
+-	{ /* end: all zeroes */ },
+-};
+-
+-MODULE_DEVICE_TABLE(sdio, bcmsdh_sdmmc_ids);
+-
+-static struct sdio_driver bcmsdh_sdmmc_driver = {
+-	.probe = bcmsdh_sdmmc_probe,
+-	.remove = bcmsdh_sdmmc_remove,
+-	.name = "brcmfmac",
+-	.id_table = bcmsdh_sdmmc_ids,
+-};
+-
+-struct sdos_info {
+-	sdioh_info_t *sd;
+-	spinlock_t lock;
+-};
+-
+-int sdioh_sdmmc_osinit(sdioh_info_t *sd)
+-{
+-	struct sdos_info *sdos;
+-
+-	sdos = kmalloc(sizeof(struct sdos_info), GFP_ATOMIC);
+-	sd->sdos_info = (void *)sdos;
+-	if (sdos == NULL)
+-		return -ENOMEM;
+-
+-	sdos->sd = sd;
+-	spin_lock_init(&sdos->lock);
+-	return 0;
+-}
+-
+-void sdioh_sdmmc_osfree(sdioh_info_t *sd)
+-{
+-	struct sdos_info *sdos;
+-	ASSERT(sd && sd->sdos_info);
+-
+-	sdos = (struct sdos_info *)sd->sdos_info;
+-	kfree(sdos);
+-}
+-
+-/* Interrupt enable/disable */
+-SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *sd, bool enable)
+-{
+-	unsigned long flags;
+-	struct sdos_info *sdos;
+-
+-	sd_trace(("%s: %s\n", __func__, enable ? "Enabling" : "Disabling"));
+-
+-	sdos = (struct sdos_info *)sd->sdos_info;
+-	ASSERT(sdos);
+-
+-#if !defined(OOB_INTR_ONLY)
+-	if (enable && !(sd->intr_handler && sd->intr_handler_arg)) {
+-		sd_err(("%s: no handler registered, will not enable\n",
+-			__func__));
+-		return SDIOH_API_RC_FAIL;
+-	}
+-#endif				/* !defined(OOB_INTR_ONLY) */
+-
+-	/* Ensure atomicity for enable/disable calls */
+-	spin_lock_irqsave(&sdos->lock, flags);
+-
+-	sd->client_intr_enabled = enable;
+-	if (enable)
+-		sdioh_sdmmc_devintr_on(sd);
+-	else
+-		sdioh_sdmmc_devintr_off(sd);
+-
+-	spin_unlock_irqrestore(&sdos->lock, flags);
+-
+-	return SDIOH_API_RC_SUCCESS;
+-}
+-
+-/*
+- * module init
+-*/
+-int sdio_function_init(void)
+-{
+-	int error = 0;
+-	sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__));
+-
+-	gInstance = kzalloc(sizeof(BCMSDH_SDMMC_INSTANCE), GFP_KERNEL);
+-	if (!gInstance)
+-		return -ENOMEM;
+-
+-	memset(&sdmmc_dev, 0, sizeof(sdmmc_dev));
+-	error = sdio_register_driver(&bcmsdh_sdmmc_driver);
+-
+-	return error;
+-}
+-
+-/*
+- * module cleanup
+-*/
+-extern int bcmsdh_remove(struct device *dev);
+-void sdio_function_cleanup(void)
+-{
+-	sd_trace(("%s Enter\n", __func__));
+-
+-	sdio_unregister_driver(&bcmsdh_sdmmc_driver);
+-
+-	kfree(gInstance);
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h
+deleted file mode 100644
+index a726b49..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd.h
++++ /dev/null
+@@ -1,414 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-/****************
+- * Common types *
+- */
+-
+-#ifndef _dhd_h_
+-#define _dhd_h_
+-
+-#include <linux/sched.h>
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/slab.h>
+-#include <linux/skbuff.h>
+-#include <linux/netdevice.h>
+-#include <linux/etherdevice.h>
+-#include <linux/random.h>
+-#include <linux/spinlock.h>
+-#include <linux/ethtool.h>
+-#include <linux/suspend.h>
+-#include <asm/uaccess.h>
+-#include <asm/unaligned.h>
+-/* The kernel threading is sdio-specific */
+-
+-#include <wlioctl.h>
+-
+-/* Forward decls */
+-struct dhd_bus;
+-struct dhd_prot;
+-struct dhd_info;
+-
+-/* The level of bus communication with the dongle */
+-enum dhd_bus_state {
+-	DHD_BUS_DOWN,		/* Not ready for frame transfers */
+-	DHD_BUS_LOAD,		/* Download access only (CPU reset) */
+-	DHD_BUS_DATA		/* Ready for frame transfers */
+-};
+-
+-/* Common structure for module and instance linkage */
+-typedef struct dhd_pub {
+-	/* Linkage ponters */
+-	struct dhd_bus *bus;	/* Bus module handle */
+-	struct dhd_prot *prot;	/* Protocol module handle */
+-	struct dhd_info *info;	/* Info module handle */
+-
+-	/* Internal dhd items */
+-	bool up;		/* Driver up/down (to OS) */
+-	bool txoff;		/* Transmit flow-controlled */
+-	bool dongle_reset;	/* true = DEVRESET put dongle into reset */
+-	enum dhd_bus_state busstate;
+-	uint hdrlen;		/* Total DHD header length (proto + bus) */
+-	uint maxctl;		/* Max size rxctl request from proto to bus */
+-	uint rxsz;		/* Rx buffer size bus module should use */
+-	u8 wme_dp;		/* wme discard priority */
+-
+-	/* Dongle media info */
+-	bool iswl;		/* Dongle-resident driver is wl */
+-	unsigned long drv_version;	/* Version of dongle-resident driver */
+-	u8 mac[ETH_ALEN];			/* MAC address obtained from dongle */
+-	dngl_stats_t dstats;		/* Stats for dongle-based data */
+-
+-	/* Additional stats for the bus level */
+-	unsigned long tx_packets;	/* Data packets sent to dongle */
+-	unsigned long tx_multicast;	/* Multicast data packets sent to dongle */
+-	unsigned long tx_errors;	/* Errors in sending data to dongle */
+-	unsigned long tx_ctlpkts;	/* Control packets sent to dongle */
+-	unsigned long tx_ctlerrs;	/* Errors sending control frames to dongle */
+-	unsigned long rx_packets;	/* Packets sent up the network interface */
+-	unsigned long rx_multicast;	/* Multicast packets sent up the network
+-					 interface */
+-	unsigned long rx_errors;	/* Errors processing rx data packets */
+-	unsigned long rx_ctlpkts;	/* Control frames processed from dongle */
+-	unsigned long rx_ctlerrs;	/* Errors in processing rx control frames */
+-	unsigned long rx_dropped;	/* Packets dropped locally (no memory) */
+-	unsigned long rx_flushed;	/* Packets flushed due to
+-				unscheduled sendup thread */
+-	unsigned long wd_dpc_sched;	/* Number of times dhd dpc scheduled by
+-					 watchdog timer */
+-
+-	unsigned long rx_readahead_cnt;	/* Number of packets where header read-ahead
+-					 was used. */
+-	unsigned long tx_realloc;	/* Number of tx packets we had to realloc for
+-					 headroom */
+-	unsigned long fc_packets;	/* Number of flow control pkts recvd */
+-
+-	/* Last error return */
+-	int bcmerror;
+-	uint tickcnt;
+-
+-	/* Last error from dongle */
+-	int dongle_error;
+-
+-	/* Suspend disable flag  flag */
+-	int suspend_disable_flag;	/* "1" to disable all extra powersaving
+-					 during suspend */
+-	int in_suspend;		/* flag set to 1 when early suspend called */
+-#ifdef PNO_SUPPORT
+-	int pno_enable;		/* pno status : "1" is pno enable */
+-#endif				/* PNO_SUPPORT */
+-	int dtim_skip;		/* dtim skip , default 0 means wake each dtim */
+-
+-	/* Pkt filter defination */
+-	char *pktfilter[100];
+-	int pktfilter_count;
+-
+-	u8 country_code[WLC_CNTRY_BUF_SZ];
+-	char eventmask[WL_EVENTING_MASK_LEN];
+-
+-} dhd_pub_t;
+-
+-#if defined(CONFIG_PM_SLEEP)
+-extern atomic_t dhd_mmc_suspend;
+-#define DHD_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a);
+-#define _DHD_PM_RESUME_WAIT(a, b) do { \
+-		int retry = 0; \
+-		while (atomic_read(&dhd_mmc_suspend) && retry++ != b) { \
+-			wait_event_timeout(a, false, HZ/100); \
+-		} \
+-	}	while (0)
+-#define DHD_PM_RESUME_WAIT(a)	_DHD_PM_RESUME_WAIT(a, 30)
+-#define DHD_PM_RESUME_WAIT_FOREVER(a)	_DHD_PM_RESUME_WAIT(a, ~0)
+-#define DHD_PM_RESUME_RETURN_ERROR(a)	\
+-	do { if (atomic_read(&dhd_mmc_suspend)) return a; } while (0)
+-#define DHD_PM_RESUME_RETURN	do { \
+-	if (atomic_read(&dhd_mmc_suspend)) \
+-		return; \
+-	} while (0)
+-
+-#define DHD_SPINWAIT_SLEEP_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a);
+-#define SPINWAIT_SLEEP(a, exp, us) do { \
+-		uint countdown = (us) + 9999; \
+-		while ((exp) && (countdown >= 10000)) { \
+-			wait_event_timeout(a, false, HZ/100); \
+-			countdown -= 10000; \
+-		} \
+-	} while (0)
+-
+-#else
+-
+-#define DHD_PM_RESUME_WAIT_INIT(a)
+-#define DHD_PM_RESUME_WAIT(a)
+-#define DHD_PM_RESUME_WAIT_FOREVER(a)
+-#define DHD_PM_RESUME_RETURN_ERROR(a)
+-#define DHD_PM_RESUME_RETURN
+-
+-#define DHD_SPINWAIT_SLEEP_INIT(a)
+-#define SPINWAIT_SLEEP(a, exp, us)  do { \
+-		uint countdown = (us) + 9; \
+-		while ((exp) && (countdown >= 10)) { \
+-			udelay(10);  \
+-			countdown -= 10;  \
+-		} \
+-	} while (0)
+-
+-#endif	/* defined(CONFIG_PM_SLEEP) */
+-#define DHD_IF_VIF	0x01	/* Virtual IF (Hidden from user) */
+-
+-static inline void MUTEX_LOCK_INIT(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_LOCK(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_UNLOCK(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_LOCK_SOFTAP_SET_INIT(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_LOCK_SOFTAP_SET(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_UNLOCK_SOFTAP_SET(dhd_pub_t *dhdp)
+-{
+-}
+-
+-static inline void MUTEX_LOCK_WL_SCAN_SET_INIT(void)
+-{
+-}
+-
+-static inline void MUTEX_LOCK_WL_SCAN_SET(void)
+-{
+-}
+-
+-static inline void MUTEX_UNLOCK_WL_SCAN_SET(void)
+-{
+-}
+-
+-typedef struct dhd_if_event {
+-	u8 ifidx;
+-	u8 action;
+-	u8 flags;
+-	u8 bssidx;
+-} dhd_if_event_t;
+-
+-/*
+- * Exported from dhd OS modules (dhd_linux/dhd_ndis)
+- */
+-
+-/* Indication from bus module regarding presence/insertion of dongle.
+- * Return dhd_pub_t pointer, used as handle to OS module in later calls.
+- * Returned structure should have bus and prot pointers filled in.
+- * bus_hdrlen specifies required headroom for bus module header.
+- */
+-extern dhd_pub_t *dhd_attach(struct dhd_bus *bus,
+-				uint bus_hdrlen);
+-extern int dhd_net_attach(dhd_pub_t *dhdp, int idx);
+-
+-/* Indication from bus module regarding removal/absence of dongle */
+-extern void dhd_detach(dhd_pub_t *dhdp);
+-
+-/* Indication from bus module to change flow-control state */
+-extern void dhd_txflowcontrol(dhd_pub_t *dhdp, int ifidx, bool on);
+-
+-extern bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q,
+-			 struct sk_buff *pkt, int prec);
+-
+-/* Receive frame for delivery to OS.  Callee disposes of rxp. */
+-extern void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx,
+-			 struct sk_buff *rxp, int numpkt);
+-
+-/* Return pointer to interface name */
+-extern char *dhd_ifname(dhd_pub_t *dhdp, int idx);
+-
+-/* Request scheduling of the bus dpc */
+-extern void dhd_sched_dpc(dhd_pub_t *dhdp);
+-
+-/* Notify tx completion */
+-extern void dhd_txcomplete(dhd_pub_t *dhdp, struct sk_buff *txp, bool success);
+-
+-/* Query ioctl */
+-extern int dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf,
+-			      uint len);
+-
+-/* OS independent layer functions */
+-extern int dhd_os_proto_block(dhd_pub_t *pub);
+-extern int dhd_os_proto_unblock(dhd_pub_t *pub);
+-extern int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition,
+-				  bool *pending);
+-extern int dhd_os_ioctl_resp_wake(dhd_pub_t *pub);
+-extern unsigned int dhd_os_get_ioctl_resp_timeout(void);
+-extern void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec);
+-extern void *dhd_os_open_image(char *filename);
+-extern int dhd_os_get_image_block(char *buf, int len, void *image);
+-extern void dhd_os_close_image(void *image);
+-extern void dhd_os_wd_timer(void *bus, uint wdtick);
+-extern void dhd_os_sdlock(dhd_pub_t *pub);
+-extern void dhd_os_sdunlock(dhd_pub_t *pub);
+-extern void dhd_os_sdlock_txq(dhd_pub_t *pub);
+-extern void dhd_os_sdunlock_txq(dhd_pub_t *pub);
+-extern void dhd_os_sdlock_rxq(dhd_pub_t *pub);
+-extern void dhd_os_sdunlock_rxq(dhd_pub_t *pub);
+-extern void dhd_os_sdlock_sndup_rxq(dhd_pub_t *pub);
+-extern void dhd_customer_gpio_wlan_ctrl(int onoff);
+-extern int dhd_custom_get_mac_address(unsigned char *buf);
+-extern void dhd_os_sdunlock_sndup_rxq(dhd_pub_t *pub);
+-extern void dhd_os_sdlock_eventq(dhd_pub_t *pub);
+-extern void dhd_os_sdunlock_eventq(dhd_pub_t *pub);
+-#ifdef DHD_DEBUG
+-extern int write_to_file(dhd_pub_t *dhd, u8 *buf, int size);
+-#endif				/* DHD_DEBUG */
+-#if defined(OOB_INTR_ONLY)
+-extern int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr);
+-#endif				/* defined(OOB_INTR_ONLY) */
+-extern void dhd_os_sdtxlock(dhd_pub_t *pub);
+-extern void dhd_os_sdtxunlock(dhd_pub_t *pub);
+-
+-int setScheduler(struct task_struct *p, int policy, struct sched_param *param);
+-
+-typedef struct {
+-	u32 limit;		/* Expiration time (usec) */
+-	u32 increment;	/* Current expiration increment (usec) */
+-	u32 elapsed;		/* Current elapsed time (usec) */
+-	u32 tick;		/* O/S tick time (usec) */
+-} dhd_timeout_t;
+-
+-extern void dhd_timeout_start(dhd_timeout_t *tmo, uint usec);
+-extern int dhd_timeout_expired(dhd_timeout_t *tmo);
+-
+-extern int dhd_ifname2idx(struct dhd_info *dhd, char *name);
+-extern u8 *dhd_bssidx2bssid(dhd_pub_t *dhd, int idx);
+-extern int wl_host_event(struct dhd_info *dhd, int *idx, void *pktdata,
+-			 wl_event_msg_t *, void **data_ptr);
+-
+-extern void dhd_common_init(void);
+-
+-extern int dhd_add_if(struct dhd_info *dhd, int ifidx, void *handle,
+-		      char *name, u8 *mac_addr, u32 flags, u8 bssidx);
+-extern void dhd_del_if(struct dhd_info *dhd, int ifidx);
+-
+-extern void dhd_vif_add(struct dhd_info *dhd, int ifidx, char *name);
+-extern void dhd_vif_del(struct dhd_info *dhd, int ifidx);
+-
+-extern void dhd_event(struct dhd_info *dhd, char *evpkt, int evlen, int ifidx);
+-extern void dhd_vif_sendup(struct dhd_info *dhd, int ifidx, unsigned char * cp,
+-			   int len);
+-
+-/* Send packet to dongle via data channel */
+-extern int dhd_sendpkt(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pkt);
+-
+-/* Send event to host */
+-extern void dhd_sendup_event(dhd_pub_t *dhdp, wl_event_msg_t *event,
+-			     void *data);
+-extern int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag);
+-extern uint dhd_bus_status(dhd_pub_t *dhdp);
+-extern int dhd_bus_start(dhd_pub_t *dhdp);
+-
+-enum cust_gpio_modes {
+-	WLAN_RESET_ON,
+-	WLAN_RESET_OFF,
+-	WLAN_POWER_ON,
+-	WLAN_POWER_OFF
+-};
+-/*
+- * Insmod parameters for debug/test
+- */
+-
+-/* Watchdog timer interval */
+-extern uint dhd_watchdog_ms;
+-
+-#if defined(DHD_DEBUG)
+-/* Console output poll interval */
+-extern uint dhd_console_ms;
+-#endif				/* defined(DHD_DEBUG) */
+-
+-/* Use interrupts */
+-extern uint dhd_intr;
+-
+-/* Use polling */
+-extern uint dhd_poll;
+-
+-/* ARP offload agent mode */
+-extern uint dhd_arp_mode;
+-
+-/* ARP offload enable */
+-extern uint dhd_arp_enable;
+-
+-/* Pkt filte enable control */
+-extern uint dhd_pkt_filter_enable;
+-
+-/*  Pkt filter init setup */
+-extern uint dhd_pkt_filter_init;
+-
+-/* Pkt filter mode control */
+-extern uint dhd_master_mode;
+-
+-/* Roaming mode control */
+-extern uint dhd_roam;
+-
+-/* Roaming mode control */
+-extern uint dhd_radio_up;
+-
+-/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */
+-extern int dhd_idletime;
+-#define DHD_IDLETIME_TICKS 1
+-
+-/* SDIO Drive Strength */
+-extern uint dhd_sdiod_drive_strength;
+-
+-/* Override to force tx queueing all the time */
+-extern uint dhd_force_tx_queueing;
+-
+-#ifdef SDTEST
+-/* Echo packet generator (SDIO), pkts/s */
+-extern uint dhd_pktgen;
+-
+-/* Echo packet len (0 => sawtooth, max 1800) */
+-extern uint dhd_pktgen_len;
+-#define MAX_PKTGEN_LEN 1800
+-#endif
+-
+-/* optionally set by a module_param_string() */
+-#define MOD_PARAM_PATHLEN	2048
+-extern char fw_path[MOD_PARAM_PATHLEN];
+-extern char nv_path[MOD_PARAM_PATHLEN];
+-
+-/* For supporting multiple interfaces */
+-#define DHD_MAX_IFS	16
+-#define DHD_DEL_IF	-0xe
+-#define DHD_BAD_IF	-0xf
+-
+-extern void dhd_wait_for_event(dhd_pub_t *dhd, bool * lockvar);
+-extern void dhd_wait_event_wakeup(dhd_pub_t *dhd);
+-
+-extern u32 g_assert_type;
+-
+-#ifdef BCMDBG
+-#define ASSERT(exp) \
+-	  do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0)
+-extern void osl_assert(char *exp, char *file, int line);
+-#else
+-#define ASSERT(exp)	do {} while (0)
+-#endif  /* defined(BCMDBG) */
+-
+-#endif				/* _dhd_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h
+deleted file mode 100644
+index 065f1ae..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h
++++ /dev/null
+@@ -1,82 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _dhd_bus_h_
+-#define _dhd_bus_h_
+-
+-/*
+- * Exported from dhd bus module (dhd_usb, dhd_sdio)
+- */
+-
+-/* Indicate (dis)interest in finding dongles. */
+-extern int dhd_bus_register(void);
+-extern void dhd_bus_unregister(void);
+-
+-/* Download firmware image and nvram image */
+-extern bool dhd_bus_download_firmware(struct dhd_bus *bus,
+-				      char *fw_path, char *nv_path);
+-
+-/* Stop bus module: clear pending frames, disable data flow */
+-extern void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex);
+-
+-/* Initialize bus module: prepare for communication w/dongle */
+-extern int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex);
+-
+-/* Send a data frame to the dongle.  Callee disposes of txp. */
+-extern int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *txp);
+-
+-/* Send/receive a control message to/from the dongle.
+- * Expects caller to enforce a single outstanding transaction.
+- */
+-extern int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen);
+-extern int dhd_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen);
+-
+-/* Watchdog timer function */
+-extern bool dhd_bus_watchdog(dhd_pub_t *dhd);
+-
+-#ifdef DHD_DEBUG
+-/* Device console input function */
+-extern int dhd_bus_console_in(dhd_pub_t *dhd, unsigned char *msg, uint msglen);
+-#endif				/* DHD_DEBUG */
+-
+-/* Deferred processing for the bus, return true requests reschedule */
+-extern bool dhd_bus_dpc(struct dhd_bus *bus);
+-extern void dhd_bus_isr(bool *InterruptRecognized,
+-			bool *QueueMiniportHandleInterrupt, void *arg);
+-
+-/* Check for and handle local prot-specific iovar commands */
+-extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
+-			    void *params, int plen, void *arg, int len,
+-			    bool set);
+-
+-/* Add bus dump output to a buffer */
+-extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
+-
+-/* Clear any bus counters */
+-extern void dhd_bus_clearcounts(dhd_pub_t *dhdp);
+-
+-/* return the dongle chipid */
+-extern uint dhd_bus_chip(struct dhd_bus *bus);
+-
+-/* Set user-specified nvram parameters. */
+-extern void dhd_bus_set_nvram_params(struct dhd_bus *bus,
+-				     const char *nvram_params);
+-
+-extern void *dhd_bus_pub(struct dhd_bus *bus);
+-extern void *dhd_bus_txq(struct dhd_bus *bus);
+-extern uint dhd_bus_hdrlen(struct dhd_bus *bus);
+-
+-#endif				/* _dhd_bus_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
+deleted file mode 100644
+index ba5a5cb..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c
++++ /dev/null
+@@ -1,474 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/types.h>
+-#include <linux/netdevice.h>
+-#include <bcmdefs.h>
+-
+-#include <bcmutils.h>
+-#include <bcmcdc.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhd_proto.h>
+-#include <dhd_bus.h>
+-#include <dhd_dbg.h>
+-#ifdef CUSTOMER_HW2
+-int wifi_get_mac_addr(unsigned char *buf);
+-#endif
+-
+-extern int dhd_preinit_ioctls(dhd_pub_t *dhd);
+-
+-/* Packet alignment for most efficient SDIO (can change based on platform) */
+-#ifndef DHD_SDALIGN
+-#define DHD_SDALIGN	32
+-#endif
+-#if !ISPOWEROF2(DHD_SDALIGN)
+-#error DHD_SDALIGN is not a power of 2!
+-#endif
+-
+-#define RETRIES 2	/* # of retries to retrieve matching ioctl response */
+-#define BUS_HEADER_LEN	(16+DHD_SDALIGN) /* Must be atleast SDPCM_RESERVE
+-					 * defined in dhd_sdio.c
+-					 * (amount of header tha might be added)
+-					 * plus any space that might be needed
+-					 * for alignment padding.
+-					 */
+-#define ROUND_UP_MARGIN	2048	/* Biggest SDIO block size possible for
+-				 * round off at the end of buffer
+-				 */
+-
+-typedef struct dhd_prot {
+-	u16 reqid;
+-	u8 pending;
+-	u32 lastcmd;
+-	u8 bus_header[BUS_HEADER_LEN];
+-	cdc_ioctl_t msg;
+-	unsigned char buf[WLC_IOCTL_MAXLEN + ROUND_UP_MARGIN];
+-} dhd_prot_t;
+-
+-static int dhdcdc_msg(dhd_pub_t *dhd)
+-{
+-	dhd_prot_t *prot = dhd->prot;
+-	int len = le32_to_cpu(prot->msg.len) + sizeof(cdc_ioctl_t);
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* NOTE : cdc->msg.len holds the desired length of the buffer to be
+-	 *        returned. Only up to CDC_MAX_MSG_SIZE of this buffer area
+-	 *        is actually sent to the dongle
+-	 */
+-	if (len > CDC_MAX_MSG_SIZE)
+-		len = CDC_MAX_MSG_SIZE;
+-
+-	/* Send request */
+-	return dhd_bus_txctl(dhd->bus, (unsigned char *)&prot->msg, len);
+-}
+-
+-static int dhdcdc_cmplt(dhd_pub_t *dhd, u32 id, u32 len)
+-{
+-	int ret;
+-	dhd_prot_t *prot = dhd->prot;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	do {
+-		ret =
+-		    dhd_bus_rxctl(dhd->bus, (unsigned char *)&prot->msg,
+-				  len + sizeof(cdc_ioctl_t));
+-		if (ret < 0)
+-			break;
+-	} while (CDC_IOC_ID(le32_to_cpu(prot->msg.flags)) != id);
+-
+-	return ret;
+-}
+-
+-int
+-dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len)
+-{
+-	dhd_prot_t *prot = dhd->prot;
+-	cdc_ioctl_t *msg = &prot->msg;
+-	void *info;
+-	int ret = 0, retries = 0;
+-	u32 id, flags = 0;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-	DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len));
+-
+-	/* Respond "bcmerror" and "bcmerrorstr" with local cache */
+-	if (cmd == WLC_GET_VAR && buf) {
+-		if (!strcmp((char *)buf, "bcmerrorstr")) {
+-			strncpy((char *)buf, "bcm_error",
+-				BCME_STRLEN);
+-			goto done;
+-		} else if (!strcmp((char *)buf, "bcmerror")) {
+-			*(int *)buf = dhd->dongle_error;
+-			goto done;
+-		}
+-	}
+-
+-	memset(msg, 0, sizeof(cdc_ioctl_t));
+-
+-	msg->cmd = cpu_to_le32(cmd);
+-	msg->len = cpu_to_le32(len);
+-	msg->flags = (++prot->reqid << CDCF_IOC_ID_SHIFT);
+-	CDC_SET_IF_IDX(msg, ifidx);
+-	msg->flags = cpu_to_le32(msg->flags);
+-
+-	if (buf)
+-		memcpy(prot->buf, buf, len);
+-
+-	ret = dhdcdc_msg(dhd);
+-	if (ret < 0) {
+-		DHD_ERROR(("dhdcdc_query_ioctl: dhdcdc_msg failed w/status "
+-			"%d\n", ret));
+-		goto done;
+-	}
+-
+-retry:
+-	/* wait for interrupt and get first fragment */
+-	ret = dhdcdc_cmplt(dhd, prot->reqid, len);
+-	if (ret < 0)
+-		goto done;
+-
+-	flags = le32_to_cpu(msg->flags);
+-	id = (flags & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT;
+-
+-	if ((id < prot->reqid) && (++retries < RETRIES))
+-		goto retry;
+-	if (id != prot->reqid) {
+-		DHD_ERROR(("%s: %s: unexpected request id %d (expected %d)\n",
+-			   dhd_ifname(dhd, ifidx), __func__, id, prot->reqid));
+-		ret = -EINVAL;
+-		goto done;
+-	}
+-
+-	/* Check info buffer */
+-	info = (void *)&msg[1];
+-
+-	/* Copy info buffer */
+-	if (buf) {
+-		if (ret < (int)len)
+-			len = ret;
+-		memcpy(buf, info, len);
+-	}
+-
+-	/* Check the ERROR flag */
+-	if (flags & CDCF_IOC_ERROR) {
+-		ret = le32_to_cpu(msg->status);
+-		/* Cache error from dongle */
+-		dhd->dongle_error = ret;
+-	}
+-
+-done:
+-	return ret;
+-}
+-
+-int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len)
+-{
+-	dhd_prot_t *prot = dhd->prot;
+-	cdc_ioctl_t *msg = &prot->msg;
+-	int ret = 0;
+-	u32 flags, id;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-	DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len));
+-
+-	memset(msg, 0, sizeof(cdc_ioctl_t));
+-
+-	msg->cmd = cpu_to_le32(cmd);
+-	msg->len = cpu_to_le32(len);
+-	msg->flags = (++prot->reqid << CDCF_IOC_ID_SHIFT) | CDCF_IOC_SET;
+-	CDC_SET_IF_IDX(msg, ifidx);
+-	msg->flags = cpu_to_le32(msg->flags);
+-
+-	if (buf)
+-		memcpy(prot->buf, buf, len);
+-
+-	ret = dhdcdc_msg(dhd);
+-	if (ret < 0)
+-		goto done;
+-
+-	ret = dhdcdc_cmplt(dhd, prot->reqid, len);
+-	if (ret < 0)
+-		goto done;
+-
+-	flags = le32_to_cpu(msg->flags);
+-	id = (flags & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT;
+-
+-	if (id != prot->reqid) {
+-		DHD_ERROR(("%s: %s: unexpected request id %d (expected %d)\n",
+-			   dhd_ifname(dhd, ifidx), __func__, id, prot->reqid));
+-		ret = -EINVAL;
+-		goto done;
+-	}
+-
+-	/* Check the ERROR flag */
+-	if (flags & CDCF_IOC_ERROR) {
+-		ret = le32_to_cpu(msg->status);
+-		/* Cache error from dongle */
+-		dhd->dongle_error = ret;
+-	}
+-
+-done:
+-	return ret;
+-}
+-
+-extern int dhd_bus_interface(struct dhd_bus *bus, uint arg, void *arg2);
+-int
+-dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len)
+-{
+-	dhd_prot_t *prot = dhd->prot;
+-	int ret = -1;
+-
+-	if (dhd->busstate == DHD_BUS_DOWN) {
+-		DHD_ERROR(("%s : bus is down. we have nothing to do\n",
+-			   __func__));
+-		return ret;
+-	}
+-	dhd_os_proto_block(dhd);
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ASSERT(len <= WLC_IOCTL_MAXLEN);
+-
+-	if (len > WLC_IOCTL_MAXLEN)
+-		goto done;
+-
+-	if (prot->pending == true) {
+-		DHD_TRACE(("CDC packet is pending!!!! cmd=0x%x (%lu) "
+-			"lastcmd=0x%x (%lu)\n",
+-			ioc->cmd, (unsigned long)ioc->cmd, prot->lastcmd,
+-			(unsigned long)prot->lastcmd));
+-		if ((ioc->cmd == WLC_SET_VAR) || (ioc->cmd == WLC_GET_VAR))
+-			DHD_TRACE(("iovar cmd=%s\n", (char *)buf));
+-
+-		goto done;
+-	}
+-
+-	prot->pending = true;
+-	prot->lastcmd = ioc->cmd;
+-	if (ioc->set)
+-		ret = dhdcdc_set_ioctl(dhd, ifidx, ioc->cmd, buf, len);
+-	else {
+-		ret = dhdcdc_query_ioctl(dhd, ifidx, ioc->cmd, buf, len);
+-		if (ret > 0)
+-			ioc->used = ret - sizeof(cdc_ioctl_t);
+-	}
+-
+-	/* Too many programs assume ioctl() returns 0 on success */
+-	if (ret >= 0)
+-		ret = 0;
+-	else {
+-		cdc_ioctl_t *msg = &prot->msg;
+-		/* len == needed when set/query fails from dongle */
+-		ioc->needed = le32_to_cpu(msg->len);
+-	}
+-
+-	/* Intercept the wme_dp ioctl here */
+-	if ((!ret) && (ioc->cmd == WLC_SET_VAR) && (!strcmp(buf, "wme_dp"))) {
+-		int slen, val = 0;
+-
+-		slen = strlen("wme_dp") + 1;
+-		if (len >= (int)(slen + sizeof(int)))
+-			memcpy(&val, (char *)buf + slen, sizeof(int));
+-		dhd->wme_dp = (u8) le32_to_cpu(val);
+-	}
+-
+-	prot->pending = false;
+-
+-done:
+-	dhd_os_proto_unblock(dhd);
+-
+-	return ret;
+-}
+-
+-#define PKTSUMNEEDED(skb) \
+-		(((struct sk_buff *)(skb))->ip_summed == CHECKSUM_PARTIAL)
+-#define PKTSETSUMGOOD(skb, x) \
+-		(((struct sk_buff *)(skb))->ip_summed = \
+-		((x) ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE))
+-
+-/* PKTSETSUMNEEDED and PKTSUMGOOD are not possible because
+-	skb->ip_summed is overloaded */
+-
+-int
+-dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name,
+-		  void *params, int plen, void *arg, int len, bool set)
+-{
+-	return -ENOTSUPP;
+-}
+-
+-void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
+-{
+-	bcm_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid);
+-}
+-
+-void dhd_prot_hdrpush(dhd_pub_t *dhd, int ifidx, struct sk_buff *pktbuf)
+-{
+-#ifdef BDC
+-	struct bdc_header *h;
+-#endif				/* BDC */
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-#ifdef BDC
+-	/* Push BDC header used to convey priority for buses that don't */
+-
+-	skb_push(pktbuf, BDC_HEADER_LEN);
+-
+-	h = (struct bdc_header *)(pktbuf->data);
+-
+-	h->flags = (BDC_PROTO_VER << BDC_FLAG_VER_SHIFT);
+-	if (PKTSUMNEEDED(pktbuf))
+-		h->flags |= BDC_FLAG_SUM_NEEDED;
+-
+-	h->priority = (pktbuf->priority & BDC_PRIORITY_MASK);
+-	h->flags2 = 0;
+-	h->rssi = 0;
+-#endif				/* BDC */
+-	BDC_SET_IF_IDX(h, ifidx);
+-}
+-
+-int dhd_prot_hdrpull(dhd_pub_t *dhd, int *ifidx, struct sk_buff *pktbuf)
+-{
+-#ifdef BDC
+-	struct bdc_header *h;
+-#endif
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-#ifdef BDC
+-	/* Pop BDC header used to convey priority for buses that don't */
+-
+-	if (pktbuf->len < BDC_HEADER_LEN) {
+-		DHD_ERROR(("%s: rx data too short (%d < %d)\n", __func__,
+-			   pktbuf->len, BDC_HEADER_LEN));
+-		return -EBADE;
+-	}
+-
+-	h = (struct bdc_header *)(pktbuf->data);
+-
+-	*ifidx = BDC_GET_IF_IDX(h);
+-	if (*ifidx >= DHD_MAX_IFS) {
+-		DHD_ERROR(("%s: rx data ifnum out of range (%d)\n",
+-			   __func__, *ifidx));
+-		return -EBADE;
+-	}
+-
+-	if (((h->flags & BDC_FLAG_VER_MASK) >> BDC_FLAG_VER_SHIFT) !=
+-	    BDC_PROTO_VER) {
+-		DHD_ERROR(("%s: non-BDC packet received, flags 0x%x\n",
+-			   dhd_ifname(dhd, *ifidx), h->flags));
+-		return -EBADE;
+-	}
+-
+-	if (h->flags & BDC_FLAG_SUM_GOOD) {
+-		DHD_INFO(("%s: BDC packet received with good rx-csum, "
+-			"flags 0x%x\n",
+-			dhd_ifname(dhd, *ifidx), h->flags));
+-		PKTSETSUMGOOD(pktbuf, true);
+-	}
+-
+-	pktbuf->priority = h->priority & BDC_PRIORITY_MASK;
+-
+-	skb_pull(pktbuf, BDC_HEADER_LEN);
+-#endif				/* BDC */
+-
+-	return 0;
+-}
+-
+-int dhd_prot_attach(dhd_pub_t *dhd)
+-{
+-	dhd_prot_t *cdc;
+-
+-	cdc = kzalloc(sizeof(dhd_prot_t), GFP_ATOMIC);
+-	if (!cdc) {
+-		DHD_ERROR(("%s: kmalloc failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* ensure that the msg buf directly follows the cdc msg struct */
+-	if ((unsigned long)(&cdc->msg + 1) != (unsigned long)cdc->buf) {
+-		DHD_ERROR(("dhd_prot_t is not correctly defined\n"));
+-		goto fail;
+-	}
+-
+-	dhd->prot = cdc;
+-#ifdef BDC
+-	dhd->hdrlen += BDC_HEADER_LEN;
+-#endif
+-	dhd->maxctl = WLC_IOCTL_MAXLEN + sizeof(cdc_ioctl_t) + ROUND_UP_MARGIN;
+-	return 0;
+-
+-fail:
+-	kfree(cdc);
+-	return -ENOMEM;
+-}
+-
+-/* ~NOTE~ What if another thread is waiting on the semaphore?  Holding it? */
+-void dhd_prot_detach(dhd_pub_t *dhd)
+-{
+-	kfree(dhd->prot);
+-	dhd->prot = NULL;
+-}
+-
+-void dhd_prot_dstats(dhd_pub_t *dhd)
+-{
+-	/* No stats from dongle added yet, copy bus stats */
+-	dhd->dstats.tx_packets = dhd->tx_packets;
+-	dhd->dstats.tx_errors = dhd->tx_errors;
+-	dhd->dstats.rx_packets = dhd->rx_packets;
+-	dhd->dstats.rx_errors = dhd->rx_errors;
+-	dhd->dstats.rx_dropped = dhd->rx_dropped;
+-	dhd->dstats.multicast = dhd->rx_multicast;
+-	return;
+-}
+-
+-int dhd_prot_init(dhd_pub_t *dhd)
+-{
+-	int ret = 0;
+-	char buf[128];
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	dhd_os_proto_block(dhd);
+-
+-	/* Get the device MAC address */
+-	strcpy(buf, "cur_etheraddr");
+-	ret = dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf));
+-	if (ret < 0) {
+-		dhd_os_proto_unblock(dhd);
+-		return ret;
+-	}
+-	memcpy(dhd->mac, buf, ETH_ALEN);
+-
+-	dhd_os_proto_unblock(dhd);
+-
+-#ifdef EMBEDDED_PLATFORM
+-	ret = dhd_preinit_ioctls(dhd);
+-#endif				/* EMBEDDED_PLATFORM */
+-
+-	/* Always assumes wl for now */
+-	dhd->iswl = true;
+-
+-	return ret;
+-}
+-
+-void dhd_prot_stop(dhd_pub_t *dhd)
+-{
+-	/* Nothing to do for CDC */
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c
+deleted file mode 100644
+index 0bfb93c..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c
++++ /dev/null
+@@ -1,1848 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <bcmdefs.h>
+-#include <linux/netdevice.h>
+-#include <bcmutils.h>
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhd_bus.h>
+-#include <dhd_proto.h>
+-#include <dhd_dbg.h>
+-#include <msgtrace.h>
+-#include <wlioctl.h>
+-
+-int dhd_msg_level;
+-char fw_path[MOD_PARAM_PATHLEN];
+-char nv_path[MOD_PARAM_PATHLEN];
+-
+-/* Last connection success/failure status */
+-u32 dhd_conn_event;
+-u32 dhd_conn_status;
+-u32 dhd_conn_reason;
+-
+-extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf,
+-			    uint len);
+-extern void dhd_ind_scan_confirm(void *h, bool status);
+-extern int dhd_wl_ioctl(dhd_pub_t *dhd, uint cmd, char *buf, uint buflen);
+-void dhd_iscan_lock(void);
+-void dhd_iscan_unlock(void);
+-
+-/* Packet alignment for most efficient SDIO (can change based on platform) */
+-#ifndef DHD_SDALIGN
+-#define DHD_SDALIGN	32
+-#endif
+-#if !ISPOWEROF2(DHD_SDALIGN)
+-#error DHD_SDALIGN is not a power of 2!
+-#endif
+-
+-#define EPI_VERSION_STR         "4.218.248.5"
+-#ifdef DHD_DEBUG
+-const char dhd_version[] =
+-"Dongle Host Driver, version " EPI_VERSION_STR "\nCompiled on " __DATE__
+-" at " __TIME__;
+-#else
+-const char dhd_version[] = "Dongle Host Driver, version " EPI_VERSION_STR;
+-#endif
+-
+-void dhd_set_timer(void *bus, uint wdtick);
+-
+-/* IOVar table */
+-enum {
+-	IOV_VERSION = 1,
+-	IOV_MSGLEVEL,
+-	IOV_BCMERRORSTR,
+-	IOV_BCMERROR,
+-	IOV_WDTICK,
+-	IOV_DUMP,
+-#ifdef DHD_DEBUG
+-	IOV_CONS,
+-	IOV_DCONSOLE_POLL,
+-#endif
+-	IOV_CLEARCOUNTS,
+-	IOV_LOGDUMP,
+-	IOV_LOGCAL,
+-	IOV_LOGSTAMP,
+-	IOV_GPIOOB,
+-	IOV_IOCTLTIMEOUT,
+-	IOV_LAST
+-};
+-
+-const bcm_iovar_t dhd_iovars[] = {
+-	{"version", IOV_VERSION, 0, IOVT_BUFFER, sizeof(dhd_version)}
+-	,
+-#ifdef DHD_DEBUG
+-	{"msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0}
+-	,
+-#endif				/* DHD_DEBUG */
+-	{"bcmerrorstr", IOV_BCMERRORSTR, 0, IOVT_BUFFER, BCME_STRLEN}
+-	,
+-	{"bcmerror", IOV_BCMERROR, 0, IOVT_INT8, 0}
+-	,
+-	{"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0}
+-	,
+-	{"dump", IOV_DUMP, 0, IOVT_BUFFER, DHD_IOCTL_MAXLEN}
+-	,
+-#ifdef DHD_DEBUG
+-	{"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0}
+-	,
+-	{"cons", IOV_CONS, 0, IOVT_BUFFER, 0}
+-	,
+-#endif
+-	{"clearcounts", IOV_CLEARCOUNTS, 0, IOVT_VOID, 0}
+-	,
+-	{"gpioob", IOV_GPIOOB, 0, IOVT_UINT32, 0}
+-	,
+-	{"ioctl_timeout", IOV_IOCTLTIMEOUT, 0, IOVT_UINT32, 0}
+-	,
+-	{NULL, 0, 0, 0, 0}
+-};
+-
+-void dhd_common_init(void)
+-{
+-	/* Init global variables at run-time, not as part of the declaration.
+-	 * This is required to support init/de-init of the driver.
+-	 * Initialization
+-	 * of globals as part of the declaration results in non-deterministic
+-	 * behaviour since the value of the globals may be different on the
+-	 * first time that the driver is initialized vs subsequent
+-	 * initializations.
+-	 */
+-	dhd_msg_level = DHD_ERROR_VAL;
+-#ifdef CONFIG_BCM4329_FW_PATH
+-	strncpy(fw_path, CONFIG_BCM4329_FW_PATH, MOD_PARAM_PATHLEN - 1);
+-#else
+-	fw_path[0] = '\0';
+-#endif
+-#ifdef CONFIG_BCM4329_NVRAM_PATH
+-	strncpy(nv_path, CONFIG_BCM4329_NVRAM_PATH, MOD_PARAM_PATHLEN - 1);
+-#else
+-	nv_path[0] = '\0';
+-#endif
+-}
+-
+-static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen)
+-{
+-	struct bcmstrbuf b;
+-	struct bcmstrbuf *strbuf = &b;
+-
+-	bcm_binit(strbuf, buf, buflen);
+-
+-	/* Base DHD info */
+-	bcm_bprintf(strbuf, "%s\n", dhd_version);
+-	bcm_bprintf(strbuf, "\n");
+-	bcm_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n",
+-		    dhdp->up, dhdp->txoff, dhdp->busstate);
+-	bcm_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n",
+-		    dhdp->hdrlen, dhdp->maxctl, dhdp->rxsz);
+-	bcm_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n",
+-		    dhdp->iswl, dhdp->drv_version, &dhdp->mac);
+-	bcm_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror,
+-		    dhdp->tickcnt);
+-
+-	bcm_bprintf(strbuf, "dongle stats:\n");
+-	bcm_bprintf(strbuf,
+-		    "tx_packets %ld tx_bytes %ld tx_errors %ld tx_dropped %ld\n",
+-		    dhdp->dstats.tx_packets, dhdp->dstats.tx_bytes,
+-		    dhdp->dstats.tx_errors, dhdp->dstats.tx_dropped);
+-	bcm_bprintf(strbuf,
+-		    "rx_packets %ld rx_bytes %ld rx_errors %ld rx_dropped %ld\n",
+-		    dhdp->dstats.rx_packets, dhdp->dstats.rx_bytes,
+-		    dhdp->dstats.rx_errors, dhdp->dstats.rx_dropped);
+-	bcm_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast);
+-
+-	bcm_bprintf(strbuf, "bus stats:\n");
+-	bcm_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n",
+-		    dhdp->tx_packets, dhdp->tx_multicast, dhdp->tx_errors);
+-	bcm_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n",
+-		    dhdp->tx_ctlpkts, dhdp->tx_ctlerrs);
+-	bcm_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n",
+-		    dhdp->rx_packets, dhdp->rx_multicast, dhdp->rx_errors);
+-	bcm_bprintf(strbuf,
+-		    "rx_ctlpkts %ld rx_ctlerrs %ld rx_dropped %ld rx_flushed %ld\n",
+-		    dhdp->rx_ctlpkts, dhdp->rx_ctlerrs, dhdp->rx_dropped,
+-		    dhdp->rx_flushed);
+-	bcm_bprintf(strbuf,
+-		    "rx_readahead_cnt %ld tx_realloc %ld fc_packets %ld\n",
+-		    dhdp->rx_readahead_cnt, dhdp->tx_realloc, dhdp->fc_packets);
+-	bcm_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched);
+-	bcm_bprintf(strbuf, "\n");
+-
+-	/* Add any prot info */
+-	dhd_prot_dump(dhdp, strbuf);
+-	bcm_bprintf(strbuf, "\n");
+-
+-	/* Add any bus info */
+-	dhd_bus_dump(dhdp, strbuf);
+-
+-	return !strbuf->size ? -EOVERFLOW : 0;
+-}
+-
+-static int
+-dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid,
+-	    const char *name, void *params, int plen, void *arg, int len,
+-	    int val_size)
+-{
+-	int bcmerror = 0;
+-	s32 int_val = 0;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
+-	if (bcmerror != 0)
+-		goto exit;
+-
+-	if (plen >= (int)sizeof(int_val))
+-		memcpy(&int_val, params, sizeof(int_val));
+-
+-	switch (actionid) {
+-	case IOV_GVAL(IOV_VERSION):
+-		/* Need to have checked buffer length */
+-		strncpy((char *)arg, dhd_version, len);
+-		break;
+-
+-	case IOV_GVAL(IOV_MSGLEVEL):
+-		int_val = (s32) dhd_msg_level;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_MSGLEVEL):
+-		dhd_msg_level = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_BCMERRORSTR):
+-		strncpy((char *)arg, "bcm_error",
+-			BCME_STRLEN);
+-		((char *)arg)[BCME_STRLEN - 1] = 0x00;
+-		break;
+-
+-	case IOV_GVAL(IOV_BCMERROR):
+-		int_val = (s32) dhd_pub->bcmerror;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_GVAL(IOV_WDTICK):
+-		int_val = (s32) dhd_watchdog_ms;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_WDTICK):
+-		if (!dhd_pub->up) {
+-			bcmerror = -ENOLINK;
+-			break;
+-		}
+-		dhd_os_wd_timer(dhd_pub, (uint) int_val);
+-		break;
+-
+-	case IOV_GVAL(IOV_DUMP):
+-		bcmerror = dhd_dump(dhd_pub, arg, len);
+-		break;
+-
+-#ifdef DHD_DEBUG
+-	case IOV_GVAL(IOV_DCONSOLE_POLL):
+-		int_val = (s32) dhd_console_ms;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_DCONSOLE_POLL):
+-		dhd_console_ms = (uint) int_val;
+-		break;
+-
+-	case IOV_SVAL(IOV_CONS):
+-		if (len > 0)
+-			bcmerror = dhd_bus_console_in(dhd_pub, arg, len - 1);
+-		break;
+-#endif
+-
+-	case IOV_SVAL(IOV_CLEARCOUNTS):
+-		dhd_pub->tx_packets = dhd_pub->rx_packets = 0;
+-		dhd_pub->tx_errors = dhd_pub->rx_errors = 0;
+-		dhd_pub->tx_ctlpkts = dhd_pub->rx_ctlpkts = 0;
+-		dhd_pub->tx_ctlerrs = dhd_pub->rx_ctlerrs = 0;
+-		dhd_pub->rx_dropped = 0;
+-		dhd_pub->rx_readahead_cnt = 0;
+-		dhd_pub->tx_realloc = 0;
+-		dhd_pub->wd_dpc_sched = 0;
+-		memset(&dhd_pub->dstats, 0, sizeof(dhd_pub->dstats));
+-		dhd_bus_clearcounts(dhd_pub);
+-		break;
+-
+-	case IOV_GVAL(IOV_IOCTLTIMEOUT):{
+-			int_val = (s32) dhd_os_get_ioctl_resp_timeout();
+-			memcpy(arg, &int_val, sizeof(int_val));
+-			break;
+-		}
+-
+-	case IOV_SVAL(IOV_IOCTLTIMEOUT):{
+-			if (int_val <= 0)
+-				bcmerror = -EINVAL;
+-			else
+-				dhd_os_set_ioctl_resp_timeout((unsigned int)
+-							      int_val);
+-			break;
+-		}
+-
+-	default:
+-		bcmerror = -ENOTSUPP;
+-		break;
+-	}
+-
+-exit:
+-	return bcmerror;
+-}
+-
+-bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt,
+-		  int prec)
+-{
+-	struct sk_buff *p;
+-	int eprec = -1;		/* precedence to evict from */
+-	bool discard_oldest;
+-
+-	/* Fast case, precedence queue is not full and we are also not
+-	 * exceeding total queue length
+-	 */
+-	if (!pktq_pfull(q, prec) && !pktq_full(q)) {
+-		bcm_pktq_penq(q, prec, pkt);
+-		return true;
+-	}
+-
+-	/* Determine precedence from which to evict packet, if any */
+-	if (pktq_pfull(q, prec))
+-		eprec = prec;
+-	else if (pktq_full(q)) {
+-		p = bcm_pktq_peek_tail(q, &eprec);
+-		ASSERT(p);
+-		if (eprec > prec)
+-			return false;
+-	}
+-
+-	/* Evict if needed */
+-	if (eprec >= 0) {
+-		/* Detect queueing to unconfigured precedence */
+-		ASSERT(!pktq_pempty(q, eprec));
+-		discard_oldest = AC_BITMAP_TST(dhdp->wme_dp, eprec);
+-		if (eprec == prec && !discard_oldest)
+-			return false;	/* refuse newer (incoming) packet */
+-		/* Evict packet according to discard policy */
+-		p = discard_oldest ? bcm_pktq_pdeq(q, eprec) :
+-			bcm_pktq_pdeq_tail(q, eprec);
+-		if (p == NULL) {
+-			DHD_ERROR(("%s: bcm_pktq_penq() failed, oldest %d.",
+-				   __func__, discard_oldest));
+-			ASSERT(p);
+-		}
+-
+-		bcm_pkt_buf_free_skb(p);
+-	}
+-
+-	/* Enqueue */
+-	p = bcm_pktq_penq(q, prec, pkt);
+-	if (p == NULL) {
+-		DHD_ERROR(("%s: bcm_pktq_penq() failed.", __func__));
+-		ASSERT(p);
+-	}
+-
+-	return true;
+-}
+-
+-static int
+-dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name,
+-	     void *params, int plen, void *arg, int len, bool set)
+-{
+-	int bcmerror = 0;
+-	int val_size;
+-	const bcm_iovar_t *vi = NULL;
+-	u32 actionid;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ASSERT(name);
+-	ASSERT(len >= 0);
+-
+-	/* Get MUST have return space */
+-	ASSERT(set || (arg && len));
+-
+-	/* Set does NOT take qualifiers */
+-	ASSERT(!set || (!params && !plen));
+-
+-	vi = bcm_iovar_lookup(dhd_iovars, name);
+-	if (vi == NULL) {
+-		bcmerror = -ENOTSUPP;
+-		goto exit;
+-	}
+-
+-	DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__,
+-		 name, (set ? "set" : "get"), len, plen));
+-
+-	/* set up 'params' pointer in case this is a set command so that
+-	 * the convenience int and bool code can be common to set and get
+-	 */
+-	if (params == NULL) {
+-		params = arg;
+-		plen = len;
+-	}
+-
+-	if (vi->type == IOVT_VOID)
+-		val_size = 0;
+-	else if (vi->type == IOVT_BUFFER)
+-		val_size = len;
+-	else
+-		/* all other types are integer sized */
+-		val_size = sizeof(int);
+-
+-	actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
+-	bcmerror =
+-	    dhd_doiovar(dhd_pub, vi, actionid, name, params, plen, arg, len,
+-			val_size);
+-
+-exit:
+-	return bcmerror;
+-}
+-
+-int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf, uint buflen)
+-{
+-	int bcmerror = 0;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (!buf)
+-		return -EINVAL;
+-
+-	switch (ioc->cmd) {
+-	case DHD_GET_MAGIC:
+-		if (buflen < sizeof(int))
+-			bcmerror = -EOVERFLOW;
+-		else
+-			*(int *)buf = DHD_IOCTL_MAGIC;
+-		break;
+-
+-	case DHD_GET_VERSION:
+-		if (buflen < sizeof(int))
+-			bcmerror = -EOVERFLOW;
+-		else
+-			*(int *)buf = DHD_IOCTL_VERSION;
+-		break;
+-
+-	case DHD_GET_VAR:
+-	case DHD_SET_VAR:{
+-			char *arg;
+-			uint arglen;
+-
+-			/* scan past the name to any arguments */
+-			for (arg = buf, arglen = buflen; *arg && arglen;
+-			     arg++, arglen--)
+-				;
+-
+-			if (*arg) {
+-				bcmerror = -EOVERFLOW;
+-				break;
+-			}
+-
+-			/* account for the NUL terminator */
+-			arg++, arglen--;
+-
+-			/* call with the appropriate arguments */
+-			if (ioc->cmd == DHD_GET_VAR)
+-				bcmerror =
+-				    dhd_iovar_op(dhd_pub, buf, arg, arglen, buf,
+-						 buflen, IOV_GET);
+-			else
+-				bcmerror =
+-				    dhd_iovar_op(dhd_pub, buf, NULL, 0, arg,
+-						 arglen, IOV_SET);
+-			if (bcmerror != -ENOTSUPP)
+-				break;
+-
+-			/* not in generic table, try protocol module */
+-			if (ioc->cmd == DHD_GET_VAR)
+-				bcmerror = dhd_prot_iovar_op(dhd_pub, buf, arg,
+-							     arglen, buf,
+-							     buflen, IOV_GET);
+-			else
+-				bcmerror = dhd_prot_iovar_op(dhd_pub, buf,
+-							     NULL, 0, arg,
+-							     arglen, IOV_SET);
+-			if (bcmerror != -ENOTSUPP)
+-				break;
+-
+-			/* if still not found, try bus module */
+-			if (ioc->cmd == DHD_GET_VAR)
+-				bcmerror = dhd_bus_iovar_op(dhd_pub, buf,
+-							    arg, arglen, buf,
+-							    buflen, IOV_GET);
+-			else
+-				bcmerror = dhd_bus_iovar_op(dhd_pub, buf,
+-							    NULL, 0, arg,
+-							    arglen, IOV_SET);
+-
+-			break;
+-		}
+-
+-	default:
+-		bcmerror = -ENOTSUPP;
+-	}
+-
+-	return bcmerror;
+-}
+-
+-#ifdef SHOW_EVENTS
+-static void wl_show_host_event(wl_event_msg_t *event, void *event_data)
+-{
+-	uint i, status, reason;
+-	bool group = false, flush_txq = false, link = false;
+-	char *auth_str, *event_name;
+-	unsigned char *buf;
+-	char err_msg[256], eabuf[ETHER_ADDR_STR_LEN];
+-	static struct {
+-		uint event;
+-		char *event_name;
+-	} event_names[] = {
+-		{
+-		WLC_E_SET_SSID, "SET_SSID"}, {
+-		WLC_E_JOIN, "JOIN"}, {
+-		WLC_E_START, "START"}, {
+-		WLC_E_AUTH, "AUTH"}, {
+-		WLC_E_AUTH_IND, "AUTH_IND"}, {
+-		WLC_E_DEAUTH, "DEAUTH"}, {
+-		WLC_E_DEAUTH_IND, "DEAUTH_IND"}, {
+-		WLC_E_ASSOC, "ASSOC"}, {
+-		WLC_E_ASSOC_IND, "ASSOC_IND"}, {
+-		WLC_E_REASSOC, "REASSOC"}, {
+-		WLC_E_REASSOC_IND, "REASSOC_IND"}, {
+-		WLC_E_DISASSOC, "DISASSOC"}, {
+-		WLC_E_DISASSOC_IND, "DISASSOC_IND"}, {
+-		WLC_E_QUIET_START, "START_QUIET"}, {
+-		WLC_E_QUIET_END, "END_QUIET"}, {
+-		WLC_E_BEACON_RX, "BEACON_RX"}, {
+-		WLC_E_LINK, "LINK"}, {
+-		WLC_E_MIC_ERROR, "MIC_ERROR"}, {
+-		WLC_E_NDIS_LINK, "NDIS_LINK"}, {
+-		WLC_E_ROAM, "ROAM"}, {
+-		WLC_E_TXFAIL, "TXFAIL"}, {
+-		WLC_E_PMKID_CACHE, "PMKID_CACHE"}, {
+-		WLC_E_RETROGRADE_TSF, "RETROGRADE_TSF"}, {
+-		WLC_E_PRUNE, "PRUNE"}, {
+-		WLC_E_AUTOAUTH, "AUTOAUTH"}, {
+-		WLC_E_EAPOL_MSG, "EAPOL_MSG"}, {
+-		WLC_E_SCAN_COMPLETE, "SCAN_COMPLETE"}, {
+-		WLC_E_ADDTS_IND, "ADDTS_IND"}, {
+-		WLC_E_DELTS_IND, "DELTS_IND"}, {
+-		WLC_E_BCNSENT_IND, "BCNSENT_IND"}, {
+-		WLC_E_BCNRX_MSG, "BCNRX_MSG"}, {
+-		WLC_E_BCNLOST_MSG, "BCNLOST_MSG"}, {
+-		WLC_E_ROAM_PREP, "ROAM_PREP"}, {
+-		WLC_E_PFN_NET_FOUND, "PNO_NET_FOUND"}, {
+-		WLC_E_PFN_NET_LOST, "PNO_NET_LOST"}, {
+-		WLC_E_RESET_COMPLETE, "RESET_COMPLETE"}, {
+-		WLC_E_JOIN_START, "JOIN_START"}, {
+-		WLC_E_ROAM_START, "ROAM_START"}, {
+-		WLC_E_ASSOC_START, "ASSOC_START"}, {
+-		WLC_E_IBSS_ASSOC, "IBSS_ASSOC"}, {
+-		WLC_E_RADIO, "RADIO"}, {
+-		WLC_E_PSM_WATCHDOG, "PSM_WATCHDOG"}, {
+-		WLC_E_PROBREQ_MSG, "PROBREQ_MSG"}, {
+-		WLC_E_SCAN_CONFIRM_IND, "SCAN_CONFIRM_IND"}, {
+-		WLC_E_PSK_SUP, "PSK_SUP"}, {
+-		WLC_E_COUNTRY_CODE_CHANGED, "COUNTRY_CODE_CHANGED"}, {
+-		WLC_E_EXCEEDED_MEDIUM_TIME, "EXCEEDED_MEDIUM_TIME"}, {
+-		WLC_E_ICV_ERROR, "ICV_ERROR"}, {
+-		WLC_E_UNICAST_DECODE_ERROR, "UNICAST_DECODE_ERROR"}, {
+-		WLC_E_MULTICAST_DECODE_ERROR, "MULTICAST_DECODE_ERROR"}, {
+-		WLC_E_TRACE, "TRACE"}, {
+-		WLC_E_ACTION_FRAME, "ACTION FRAME"}, {
+-		WLC_E_ACTION_FRAME_COMPLETE, "ACTION FRAME TX COMPLETE"}, {
+-		WLC_E_IF, "IF"}, {
+-		WLC_E_RSSI, "RSSI"}, {
+-		WLC_E_PFN_SCAN_COMPLETE, "SCAN_COMPLETE"}
+-	};
+-	uint event_type, flags, auth_type, datalen;
+-	event_type = be32_to_cpu(event->event_type);
+-	flags = be16_to_cpu(event->flags);
+-	status = be32_to_cpu(event->status);
+-	reason = be32_to_cpu(event->reason);
+-	auth_type = be32_to_cpu(event->auth_type);
+-	datalen = be32_to_cpu(event->datalen);
+-	/* debug dump of event messages */
+-	sprintf(eabuf, "%pM", event->addr);
+-
+-	event_name = "UNKNOWN";
+-	for (i = 0; i < ARRAY_SIZE(event_names); i++) {
+-		if (event_names[i].event == event_type)
+-			event_name = event_names[i].event_name;
+-	}
+-
+-	DHD_EVENT(("EVENT: %s, event ID = %d\n", event_name, event_type));
+-	DHD_EVENT(("flags 0x%04x, status %d, reason %d, auth_type %d MAC %s\n",
+-				flags, status, reason, auth_type, eabuf));
+-
+-	if (flags & WLC_EVENT_MSG_LINK)
+-		link = true;
+-	if (flags & WLC_EVENT_MSG_GROUP)
+-		group = true;
+-	if (flags & WLC_EVENT_MSG_FLUSHTXQ)
+-		flush_txq = true;
+-
+-	switch (event_type) {
+-	case WLC_E_START:
+-	case WLC_E_DEAUTH:
+-	case WLC_E_DISASSOC:
+-		DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf));
+-		break;
+-
+-	case WLC_E_ASSOC_IND:
+-	case WLC_E_REASSOC_IND:
+-		DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf));
+-		break;
+-
+-	case WLC_E_ASSOC:
+-	case WLC_E_REASSOC:
+-		if (status == WLC_E_STATUS_SUCCESS) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, SUCCESS\n",
+-				   event_name, eabuf));
+-		} else if (status == WLC_E_STATUS_TIMEOUT) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, TIMEOUT\n",
+-				   event_name, eabuf));
+-		} else if (status == WLC_E_STATUS_FAIL) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, FAILURE, reason %d\n",
+-				   event_name, eabuf, (int)reason));
+-		} else {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, unexpected status "
+-				"%d\n", event_name, eabuf, (int)status));
+-		}
+-		break;
+-
+-	case WLC_E_DEAUTH_IND:
+-	case WLC_E_DISASSOC_IND:
+-		DHD_EVENT(("MACEVENT: %s, MAC %s, reason %d\n", event_name,
+-			   eabuf, (int)reason));
+-		break;
+-
+-	case WLC_E_AUTH:
+-	case WLC_E_AUTH_IND:
+-		if (auth_type == WLAN_AUTH_OPEN)
+-			auth_str = "Open System";
+-		else if (auth_type == WLAN_AUTH_SHARED_KEY)
+-			auth_str = "Shared Key";
+-		else {
+-			sprintf(err_msg, "AUTH unknown: %d", (int)auth_type);
+-			auth_str = err_msg;
+-		}
+-		if (event_type == WLC_E_AUTH_IND) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, %s\n", event_name,
+-				   eabuf, auth_str));
+-		} else if (status == WLC_E_STATUS_SUCCESS) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, %s, SUCCESS\n",
+-				   event_name, eabuf, auth_str));
+-		} else if (status == WLC_E_STATUS_TIMEOUT) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, %s, TIMEOUT\n",
+-				   event_name, eabuf, auth_str));
+-		} else if (status == WLC_E_STATUS_FAIL) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s, %s, FAILURE, "
+-				"reason %d\n",
+-				event_name, eabuf, auth_str, (int)reason));
+-		}
+-
+-		break;
+-
+-	case WLC_E_JOIN:
+-	case WLC_E_ROAM:
+-	case WLC_E_SET_SSID:
+-		if (status == WLC_E_STATUS_SUCCESS) {
+-			DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name,
+-				   eabuf));
+-		} else if (status == WLC_E_STATUS_FAIL) {
+-			DHD_EVENT(("MACEVENT: %s, failed\n", event_name));
+-		} else if (status == WLC_E_STATUS_NO_NETWORKS) {
+-			DHD_EVENT(("MACEVENT: %s, no networks found\n",
+-				   event_name));
+-		} else {
+-			DHD_EVENT(("MACEVENT: %s, unexpected status %d\n",
+-				   event_name, (int)status));
+-		}
+-		break;
+-
+-	case WLC_E_BEACON_RX:
+-		if (status == WLC_E_STATUS_SUCCESS) {
+-			DHD_EVENT(("MACEVENT: %s, SUCCESS\n", event_name));
+-		} else if (status == WLC_E_STATUS_FAIL) {
+-			DHD_EVENT(("MACEVENT: %s, FAIL\n", event_name));
+-		} else {
+-			DHD_EVENT(("MACEVENT: %s, status %d\n", event_name,
+-				   status));
+-		}
+-		break;
+-
+-	case WLC_E_LINK:
+-		DHD_EVENT(("MACEVENT: %s %s\n", event_name,
+-			   link ? "UP" : "DOWN"));
+-		break;
+-
+-	case WLC_E_MIC_ERROR:
+-		DHD_EVENT(("MACEVENT: %s, MAC %s, Group %d, Flush %d\n",
+-			   event_name, eabuf, group, flush_txq));
+-		break;
+-
+-	case WLC_E_ICV_ERROR:
+-	case WLC_E_UNICAST_DECODE_ERROR:
+-	case WLC_E_MULTICAST_DECODE_ERROR:
+-		DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf));
+-		break;
+-
+-	case WLC_E_TXFAIL:
+-		DHD_EVENT(("MACEVENT: %s, RA %s\n", event_name, eabuf));
+-		break;
+-
+-	case WLC_E_SCAN_COMPLETE:
+-	case WLC_E_PMKID_CACHE:
+-		DHD_EVENT(("MACEVENT: %s\n", event_name));
+-		break;
+-
+-	case WLC_E_PFN_NET_FOUND:
+-	case WLC_E_PFN_NET_LOST:
+-	case WLC_E_PFN_SCAN_COMPLETE:
+-		DHD_EVENT(("PNOEVENT: %s\n", event_name));
+-		break;
+-
+-	case WLC_E_PSK_SUP:
+-	case WLC_E_PRUNE:
+-		DHD_EVENT(("MACEVENT: %s, status %d, reason %d\n",
+-			   event_name, (int)status, (int)reason));
+-		break;
+-
+-	case WLC_E_TRACE:
+-		{
+-			static u32 seqnum_prev;
+-			msgtrace_hdr_t hdr;
+-			u32 nblost;
+-			char *s, *p;
+-
+-			buf = (unsigned char *) event_data;
+-			memcpy(&hdr, buf, MSGTRACE_HDRLEN);
+-
+-			if (hdr.version != MSGTRACE_VERSION) {
+-				DHD_ERROR(
+-				    ("\nMACEVENT: %s [unsupported version --> "
+-				     "dhd version:%d dongle version:%d]\n",
+-				     event_name, MSGTRACE_VERSION, hdr.version)
+-				);
+-				/* Reset datalen to avoid display below */
+-				datalen = 0;
+-				break;
+-			}
+-
+-			/* There are 2 bytes available at the end of data */
+-			buf[MSGTRACE_HDRLEN + be16_to_cpu(hdr.len)] = '\0';
+-
+-			if (be32_to_cpu(hdr.discarded_bytes)
+-			    || be32_to_cpu(hdr.discarded_printf)) {
+-				DHD_ERROR(
+-				    ("\nWLC_E_TRACE: [Discarded traces in dongle -->"
+-				     "discarded_bytes %d discarded_printf %d]\n",
+-				     be32_to_cpu(hdr.discarded_bytes),
+-				     be32_to_cpu(hdr.discarded_printf)));
+-			}
+-
+-			nblost = be32_to_cpu(hdr.seqnum) - seqnum_prev - 1;
+-			if (nblost > 0) {
+-				DHD_ERROR(
+-				    ("\nWLC_E_TRACE: [Event lost --> seqnum %d nblost %d\n",
+-				     be32_to_cpu(hdr.seqnum), nblost));
+-			}
+-			seqnum_prev = be32_to_cpu(hdr.seqnum);
+-
+-			/* Display the trace buffer. Advance from \n to \n to
+-			 * avoid display big
+-			 * printf (issue with Linux printk )
+-			 */
+-			p = (char *)&buf[MSGTRACE_HDRLEN];
+-			while ((s = strstr(p, "\n")) != NULL) {
+-				*s = '\0';
+-				printk(KERN_DEBUG"%s\n", p);
+-				p = s + 1;
+-			}
+-			printk(KERN_DEBUG "%s\n", p);
+-
+-			/* Reset datalen to avoid display below */
+-			datalen = 0;
+-		}
+-		break;
+-
+-	case WLC_E_RSSI:
+-		DHD_EVENT(("MACEVENT: %s %d\n", event_name,
+-			   be32_to_cpu(*((int *)event_data))));
+-		break;
+-
+-	default:
+-		DHD_EVENT(("MACEVENT: %s %d, MAC %s, status %d, reason %d, "
+-			"auth %d\n", event_name, event_type, eabuf,
+-			(int)status, (int)reason, (int)auth_type));
+-		break;
+-	}
+-
+-	/* show any appended data */
+-	if (datalen) {
+-		buf = (unsigned char *) event_data;
+-		DHD_EVENT((" data (%d) : ", datalen));
+-		for (i = 0; i < datalen; i++)
+-			DHD_EVENT((" 0x%02x ", *buf++));
+-		DHD_EVENT(("\n"));
+-	}
+-}
+-#endif				/* SHOW_EVENTS */
+-
+-int
+-wl_host_event(struct dhd_info *dhd, int *ifidx, void *pktdata,
+-	      wl_event_msg_t *event, void **data_ptr)
+-{
+-	/* check whether packet is a BRCM event pkt */
+-	bcm_event_t *pvt_data = (bcm_event_t *) pktdata;
+-	char *event_data;
+-	u32 type, status;
+-	u16 flags;
+-	int evlen;
+-
+-	if (memcmp(BRCM_OUI, &pvt_data->bcm_hdr.oui[0], DOT11_OUI_LEN)) {
+-		DHD_ERROR(("%s: mismatched OUI, bailing\n", __func__));
+-		return -EBADE;
+-	}
+-
+-	/* BRCM event pkt may be unaligned - use xxx_ua to load user_subtype. */
+-	if (get_unaligned_be16(&pvt_data->bcm_hdr.usr_subtype) !=
+-	    BCMILCP_BCM_SUBTYPE_EVENT) {
+-		DHD_ERROR(("%s: mismatched subtype, bailing\n", __func__));
+-		return -EBADE;
+-	}
+-
+-	*data_ptr = &pvt_data[1];
+-	event_data = *data_ptr;
+-
+-	/* memcpy since BRCM event pkt may be unaligned. */
+-	memcpy(event, &pvt_data->event, sizeof(wl_event_msg_t));
+-
+-	type = get_unaligned_be32(&event->event_type);
+-	flags = get_unaligned_be16(&event->flags);
+-	status = get_unaligned_be32(&event->status);
+-	evlen = get_unaligned_be32(&event->datalen) + sizeof(bcm_event_t);
+-
+-	switch (type) {
+-	case WLC_E_IF:
+-		{
+-			dhd_if_event_t *ifevent = (dhd_if_event_t *) event_data;
+-			DHD_TRACE(("%s: if event\n", __func__));
+-
+-			if (ifevent->ifidx > 0 &&
+-				 ifevent->ifidx < DHD_MAX_IFS) {
+-				if (ifevent->action == WLC_E_IF_ADD)
+-					dhd_add_if(dhd, ifevent->ifidx,
+-						   NULL, event->ifname,
+-						   pvt_data->eth.h_dest,
+-						   ifevent->flags,
+-						   ifevent->bssidx);
+-				else
+-					dhd_del_if(dhd, ifevent->ifidx);
+-			} else {
+-				DHD_ERROR(("%s: Invalid ifidx %d for %s\n",
+-					   __func__, ifevent->ifidx,
+-					   event->ifname));
+-			}
+-		}
+-		/* send up the if event: btamp user needs it */
+-		*ifidx = dhd_ifname2idx(dhd, event->ifname);
+-		/* push up to external supp/auth */
+-		dhd_event(dhd, (char *)pvt_data, evlen, *ifidx);
+-		break;
+-
+-#ifdef P2P
+-	case WLC_E_NDIS_LINK:
+-		break;
+-#endif
+-		/* fall through */
+-		/* These are what external supplicant/authenticator wants */
+-	case WLC_E_LINK:
+-	case WLC_E_ASSOC_IND:
+-	case WLC_E_REASSOC_IND:
+-	case WLC_E_DISASSOC_IND:
+-	case WLC_E_MIC_ERROR:
+-	default:
+-		/* Fall through: this should get _everything_  */
+-
+-		*ifidx = dhd_ifname2idx(dhd, event->ifname);
+-		/* push up to external supp/auth */
+-		dhd_event(dhd, (char *)pvt_data, evlen, *ifidx);
+-		DHD_TRACE(("%s: MAC event %d, flags %x, status %x\n",
+-			   __func__, type, flags, status));
+-
+-		/* put it back to WLC_E_NDIS_LINK */
+-		if (type == WLC_E_NDIS_LINK) {
+-			u32 temp;
+-
+-			temp = get_unaligned_be32(&event->event_type);
+-			DHD_TRACE(("Converted to WLC_E_LINK type %d\n", temp));
+-
+-			temp = be32_to_cpu(WLC_E_NDIS_LINK);
+-			memcpy((void *)(&pvt_data->event.event_type), &temp,
+-			       sizeof(pvt_data->event.event_type));
+-		}
+-		break;
+-	}
+-
+-#ifdef SHOW_EVENTS
+-	wl_show_host_event(event, event_data);
+-#endif				/* SHOW_EVENTS */
+-
+-	return 0;
+-}
+-
+-/* Convert user's input in hex pattern to byte-size mask */
+-static int wl_pattern_atoh(char *src, char *dst)
+-{
+-	int i;
+-	if (strncmp(src, "0x", 2) != 0 && strncmp(src, "0X", 2) != 0) {
+-		DHD_ERROR(("Mask invalid format. Needs to start with 0x\n"));
+-		return -1;
+-	}
+-	src = src + 2;		/* Skip past 0x */
+-	if (strlen(src) % 2 != 0) {
+-		DHD_ERROR(("Mask invalid format. Length must be even.\n"));
+-		return -1;
+-	}
+-	for (i = 0; *src != '\0'; i++) {
+-		char num[3];
+-		strncpy(num, src, 2);
+-		num[2] = '\0';
+-		dst[i] = (u8) simple_strtoul(num, NULL, 16);
+-		src += 2;
+-	}
+-	return i;
+-}
+-
+-void
+-dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable,
+-			     int master_mode)
+-{
+-	char *argv[8];
+-	int i = 0;
+-	const char *str;
+-	int buf_len;
+-	int str_len;
+-	char *arg_save = 0, *arg_org = 0;
+-	int rc;
+-	char buf[128];
+-	wl_pkt_filter_enable_t enable_parm;
+-	wl_pkt_filter_enable_t *pkt_filterp;
+-
+-	arg_save = kmalloc(strlen(arg) + 1, GFP_ATOMIC);
+-	if (!arg_save) {
+-		DHD_ERROR(("%s: kmalloc failed\n", __func__));
+-		goto fail;
+-	}
+-	arg_org = arg_save;
+-	memcpy(arg_save, arg, strlen(arg) + 1);
+-
+-	argv[i] = strsep(&arg_save, " ");
+-
+-	i = 0;
+-	if (NULL == argv[i]) {
+-		DHD_ERROR(("No args provided\n"));
+-		goto fail;
+-	}
+-
+-	str = "pkt_filter_enable";
+-	str_len = strlen(str);
+-	strncpy(buf, str, str_len);
+-	buf[str_len] = '\0';
+-	buf_len = str_len + 1;
+-
+-	pkt_filterp = (wl_pkt_filter_enable_t *) (buf + str_len + 1);
+-
+-	/* Parse packet filter id. */
+-	enable_parm.id = simple_strtoul(argv[i], NULL, 0);
+-
+-	/* Parse enable/disable value. */
+-	enable_parm.enable = enable;
+-
+-	buf_len += sizeof(enable_parm);
+-	memcpy((char *)pkt_filterp, &enable_parm, sizeof(enable_parm));
+-
+-	/* Enable/disable the specified filter. */
+-	rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, buf_len);
+-	rc = rc >= 0 ? 0 : rc;
+-	if (rc)
+-		DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n",
+-			   __func__, arg, rc));
+-	else
+-		DHD_TRACE(("%s: successfully added pktfilter %s\n",
+-			   __func__, arg));
+-
+-	/* Contorl the master mode */
+-	bcm_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf,
+-		    sizeof(buf));
+-	rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf));
+-	rc = rc >= 0 ? 0 : rc;
+-	if (rc)
+-		DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n",
+-			   __func__, arg, rc));
+-
+-fail:
+-	kfree(arg_org);
+-}
+-
+-void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg)
+-{
+-	const char *str;
+-	wl_pkt_filter_t pkt_filter;
+-	wl_pkt_filter_t *pkt_filterp;
+-	int buf_len;
+-	int str_len;
+-	int rc;
+-	u32 mask_size;
+-	u32 pattern_size;
+-	char *argv[8], *buf = 0;
+-	int i = 0;
+-	char *arg_save = 0, *arg_org = 0;
+-#define BUF_SIZE		2048
+-
+-	arg_save = kmalloc(strlen(arg) + 1, GFP_ATOMIC);
+-	if (!arg_save) {
+-		DHD_ERROR(("%s: kmalloc failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	arg_org = arg_save;
+-
+-	buf = kmalloc(BUF_SIZE, GFP_ATOMIC);
+-	if (!buf) {
+-		DHD_ERROR(("%s: kmalloc failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	memcpy(arg_save, arg, strlen(arg) + 1);
+-
+-	if (strlen(arg) > BUF_SIZE) {
+-		DHD_ERROR(("Not enough buffer %d < %d\n", (int)strlen(arg),
+-			   (int)sizeof(buf)));
+-		goto fail;
+-	}
+-
+-	argv[i] = strsep(&arg_save, " ");
+-	while (argv[i++])
+-		argv[i] = strsep(&arg_save, " ");
+-
+-	i = 0;
+-	if (NULL == argv[i]) {
+-		DHD_ERROR(("No args provided\n"));
+-		goto fail;
+-	}
+-
+-	str = "pkt_filter_add";
+-	str_len = strlen(str);
+-	strncpy(buf, str, str_len);
+-	buf[str_len] = '\0';
+-	buf_len = str_len + 1;
+-
+-	pkt_filterp = (wl_pkt_filter_t *) (buf + str_len + 1);
+-
+-	/* Parse packet filter id. */
+-	pkt_filter.id = simple_strtoul(argv[i], NULL, 0);
+-
+-	if (NULL == argv[++i]) {
+-		DHD_ERROR(("Polarity not provided\n"));
+-		goto fail;
+-	}
+-
+-	/* Parse filter polarity. */
+-	pkt_filter.negate_match = simple_strtoul(argv[i], NULL, 0);
+-
+-	if (NULL == argv[++i]) {
+-		DHD_ERROR(("Filter type not provided\n"));
+-		goto fail;
+-	}
+-
+-	/* Parse filter type. */
+-	pkt_filter.type = simple_strtoul(argv[i], NULL, 0);
+-
+-	if (NULL == argv[++i]) {
+-		DHD_ERROR(("Offset not provided\n"));
+-		goto fail;
+-	}
+-
+-	/* Parse pattern filter offset. */
+-	pkt_filter.u.pattern.offset = simple_strtoul(argv[i], NULL, 0);
+-
+-	if (NULL == argv[++i]) {
+-		DHD_ERROR(("Bitmask not provided\n"));
+-		goto fail;
+-	}
+-
+-	/* Parse pattern filter mask. */
+-	mask_size =
+-	    wl_pattern_atoh
+-		   (argv[i], (char *)pkt_filterp->u.pattern.mask_and_pattern);
+-
+-	if (NULL == argv[++i]) {
+-		DHD_ERROR(("Pattern not provided\n"));
+-		goto fail;
+-	}
+-
+-	/* Parse pattern filter pattern. */
+-	pattern_size =
+-	    wl_pattern_atoh(argv[i],
+-				   (char *)&pkt_filterp->u.pattern.
+-				   mask_and_pattern[mask_size]);
+-
+-	if (mask_size != pattern_size) {
+-		DHD_ERROR(("Mask and pattern not the same size\n"));
+-		goto fail;
+-	}
+-
+-	pkt_filter.u.pattern.size_bytes = mask_size;
+-	buf_len += WL_PKT_FILTER_FIXED_LEN;
+-	buf_len += (WL_PKT_FILTER_PATTERN_FIXED_LEN + 2 * mask_size);
+-
+-	/* Keep-alive attributes are set in local
+-	 * variable (keep_alive_pkt), and
+-	 ** then memcpy'ed into buffer (keep_alive_pktp) since there is no
+-	 ** guarantee that the buffer is properly aligned.
+-	 */
+-	memcpy((char *)pkt_filterp,
+-	       &pkt_filter,
+-	       WL_PKT_FILTER_FIXED_LEN + WL_PKT_FILTER_PATTERN_FIXED_LEN);
+-
+-	rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, buf_len);
+-	rc = rc >= 0 ? 0 : rc;
+-
+-	if (rc)
+-		DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n",
+-			   __func__, arg, rc));
+-	else
+-		DHD_TRACE(("%s: successfully added pktfilter %s\n",
+-			   __func__, arg));
+-
+-fail:
+-	kfree(arg_org);
+-
+-	kfree(buf);
+-}
+-
+-void dhd_arp_offload_set(dhd_pub_t *dhd, int arp_mode)
+-{
+-	char iovbuf[32];
+-	int retcode;
+-
+-	bcm_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf));
+-	retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	retcode = retcode >= 0 ? 0 : retcode;
+-	if (retcode)
+-		DHD_TRACE(("%s: failed to set ARP offload mode to 0x%x, "
+-			"retcode = %d\n", __func__, arp_mode, retcode));
+-	else
+-		DHD_TRACE(("%s: successfully set ARP offload mode to 0x%x\n",
+-			   __func__, arp_mode));
+-}
+-
+-void dhd_arp_offload_enable(dhd_pub_t *dhd, int arp_enable)
+-{
+-	char iovbuf[32];
+-	int retcode;
+-
+-	bcm_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf));
+-	retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	retcode = retcode >= 0 ? 0 : retcode;
+-	if (retcode)
+-		DHD_TRACE(("%s: failed to enabe ARP offload to %d, "
+-			"retcode = %d\n", __func__, arp_enable, retcode));
+-	else
+-		DHD_TRACE(("%s: successfully enabed ARP offload to %d\n",
+-			   __func__, arp_enable));
+-}
+-
+-int dhd_preinit_ioctls(dhd_pub_t *dhd)
+-{
+-	char iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for
+-				 "event_msgs" + '\0' + bitvec  */
+-	uint up = 0;
+-	char buf[128], *ptr;
+-	uint power_mode = PM_FAST;
+-	u32 dongle_align = DHD_SDALIGN;
+-	u32 glom = 0;
+-	uint bcn_timeout = 3;
+-	int scan_assoc_time = 40;
+-	int scan_unassoc_time = 40;
+-#ifdef GET_CUSTOM_MAC_ENABLE
+-	int ret = 0;
+-	u8 ea_addr[ETH_ALEN];
+-#endif				/* GET_CUSTOM_MAC_ENABLE */
+-
+-	dhd_os_proto_block(dhd);
+-
+-#ifdef GET_CUSTOM_MAC_ENABLE
+-	/* Read MAC address from external customer place
+-	 ** NOTE that default mac address has to be present in
+-	 ** otp or nvram file to bring up
+-	 ** firmware but unique per board mac address maybe provided by
+-	 ** customer code
+-	 */
+-	ret = dhd_custom_get_mac_address(ea_addr);
+-	if (!ret) {
+-		bcm_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN,
+-			    buf, sizeof(buf));
+-		ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf));
+-		if (ret < 0) {
+-			DHD_ERROR(("%s: can't set MAC address , error=%d\n",
+-				   __func__, ret));
+-		} else
+-			memcpy(dhd->mac.octet, (void *)&ea_addr,
+-			       ETH_ALEN);
+-	}
+-#endif				/* GET_CUSTOM_MAC_ENABLE */
+-
+-	/* Set Country code */
+-	if (dhd->country_code[0] != 0) {
+-		if (dhdcdc_set_ioctl(dhd, 0, WLC_SET_COUNTRY,
+-				     dhd->country_code,
+-				     sizeof(dhd->country_code)) < 0) {
+-			DHD_ERROR(("%s: country code setting failed\n",
+-				   __func__));
+-		}
+-	}
+-
+-	/* query for 'ver' to get version info from firmware */
+-	memset(buf, 0, sizeof(buf));
+-	ptr = buf;
+-	bcm_mkiovar("ver", 0, 0, buf, sizeof(buf));
+-	dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf));
+-	strsep(&ptr, "\n");
+-	/* Print fw version info */
+-	DHD_ERROR(("Firmware version = %s\n", buf));
+-
+-	/* Set PowerSave mode */
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM, (char *)&power_mode,
+-			 sizeof(power_mode));
+-
+-	/* Match Host and Dongle rx alignment */
+-	bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
+-		    sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	/* disable glom option per default */
+-	bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	/* Setup timeout if Beacons are lost and roam is off to report
+-		 link down */
+-	bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf,
+-		    sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	/* Enable/Disable build-in roaming to allowed ext supplicant to take
+-		 of romaing */
+-	bcm_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	/* Force STA UP */
+-	if (dhd_radio_up)
+-		dhdcdc_set_ioctl(dhd, 0, WLC_UP, (char *)&up, sizeof(up));
+-
+-	/* Setup event_msgs */
+-	bcm_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+-		    sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_CHANNEL_TIME,
+-			 (char *)&scan_assoc_time, sizeof(scan_assoc_time));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_UNASSOC_TIME,
+-			 (char *)&scan_unassoc_time, sizeof(scan_unassoc_time));
+-
+-#ifdef ARP_OFFLOAD_SUPPORT
+-	/* Set and enable ARP offload feature */
+-	if (dhd_arp_enable)
+-		dhd_arp_offload_set(dhd, dhd_arp_mode);
+-	dhd_arp_offload_enable(dhd, dhd_arp_enable);
+-#endif				/* ARP_OFFLOAD_SUPPORT */
+-
+-#ifdef PKT_FILTER_SUPPORT
+-	{
+-		int i;
+-		/* Set up pkt filter */
+-		if (dhd_pkt_filter_enable) {
+-			for (i = 0; i < dhd->pktfilter_count; i++) {
+-				dhd_pktfilter_offload_set(dhd,
+-							  dhd->pktfilter[i]);
+-				dhd_pktfilter_offload_enable(dhd,
+-				     dhd->pktfilter[i],
+-				     dhd_pkt_filter_init,
+-				     dhd_master_mode);
+-			}
+-		}
+-	}
+-#endif				/* PKT_FILTER_SUPPORT */
+-
+-	dhd_os_proto_unblock(dhd);
+-
+-	return 0;
+-}
+-
+-#ifdef SIMPLE_ISCAN
+-uint iscan_thread_id;
+-iscan_buf_t *iscan_chain;
+-
+-iscan_buf_t *dhd_iscan_allocate_buf(dhd_pub_t *dhd, iscan_buf_t **iscanbuf)
+-{
+-	iscan_buf_t *iscanbuf_alloc = 0;
+-	iscan_buf_t *iscanbuf_head;
+-
+-	dhd_iscan_lock();
+-
+-	iscanbuf_alloc = kmalloc(sizeof(iscan_buf_t), GFP_ATOMIC);
+-	if (iscanbuf_alloc == NULL)
+-		goto fail;
+-
+-	iscanbuf_alloc->next = NULL;
+-	iscanbuf_head = *iscanbuf;
+-
+-	DHD_ISCAN(("%s: addr of allocated node = 0x%X"
+-		   "addr of iscanbuf_head = 0x%X dhd = 0x%X\n",
+-		   __func__, iscanbuf_alloc, iscanbuf_head, dhd));
+-
+-	if (iscanbuf_head == NULL) {
+-		*iscanbuf = iscanbuf_alloc;
+-		DHD_ISCAN(("%s: Head is allocated\n", __func__));
+-		goto fail;
+-	}
+-
+-	while (iscanbuf_head->next)
+-		iscanbuf_head = iscanbuf_head->next;
+-
+-	iscanbuf_head->next = iscanbuf_alloc;
+-
+-fail:
+-	dhd_iscan_unlock();
+-	return iscanbuf_alloc;
+-}
+-
+-void dhd_iscan_free_buf(void *dhdp, iscan_buf_t *iscan_delete)
+-{
+-	iscan_buf_t *iscanbuf_free = 0;
+-	iscan_buf_t *iscanbuf_prv = 0;
+-	iscan_buf_t *iscanbuf_cur = iscan_chain;
+-	dhd_pub_t *dhd = dhd_bus_pub(dhdp);
+-
+-	dhd_iscan_lock();
+-	/* If iscan_delete is null then delete the entire
+-	 * chain or else delete specific one provided
+-	 */
+-	if (!iscan_delete) {
+-		while (iscanbuf_cur) {
+-			iscanbuf_free = iscanbuf_cur;
+-			iscanbuf_cur = iscanbuf_cur->next;
+-			iscanbuf_free->next = 0;
+-			kfree(iscanbuf_free);
+-		}
+-		iscan_chain = 0;
+-	} else {
+-		while (iscanbuf_cur) {
+-			if (iscanbuf_cur == iscan_delete)
+-				break;
+-			iscanbuf_prv = iscanbuf_cur;
+-			iscanbuf_cur = iscanbuf_cur->next;
+-		}
+-		if (iscanbuf_prv)
+-			iscanbuf_prv->next = iscan_delete->next;
+-
+-		iscan_delete->next = 0;
+-		kfree(iscan_delete);
+-
+-		if (!iscanbuf_prv)
+-			iscan_chain = 0;
+-	}
+-	dhd_iscan_unlock();
+-}
+-
+-iscan_buf_t *dhd_iscan_result_buf(void)
+-{
+-	return iscan_chain;
+-}
+-
+-/*
+-* print scan cache
+-* print partial iscan_skip list differently
+-*/
+-int dhd_iscan_print_cache(iscan_buf_t *iscan_skip)
+-{
+-	int i = 0, l = 0;
+-	iscan_buf_t *iscan_cur;
+-	wl_iscan_results_t *list;
+-	wl_scan_results_t *results;
+-	wl_bss_info_t UNALIGNED *bi;
+-
+-	dhd_iscan_lock();
+-
+-	iscan_cur = dhd_iscan_result_buf();
+-
+-	while (iscan_cur) {
+-		list = (wl_iscan_results_t *)iscan_cur->iscan_buf;
+-		if (!list)
+-			break;
+-
+-		results = (wl_scan_results_t *)&list->results;
+-		if (!results)
+-			break;
+-
+-		if (results->version != WL_BSS_INFO_VERSION) {
+-			DHD_ISCAN(("%s: results->version %d != "
+-				"WL_BSS_INFO_VERSION\n",
+-				__func__, results->version));
+-			goto done;
+-		}
+-
+-		bi = results->bss_info;
+-		for (i = 0; i < results->count; i++) {
+-			if (!bi)
+-				break;
+-
+-			DHD_ISCAN(("%s[%2.2d:%2.2d] %X:%X:%X:%X:%X:%X\n",
+-				   iscan_cur != iscan_skip ? "BSS" : "bss", l,
+-				   i, bi->BSSID.octet[0], bi->BSSID.octet[1],
+-				   bi->BSSID.octet[2], bi->BSSID.octet[3],
+-				   bi->BSSID.octet[4], bi->BSSID.octet[5]));
+-
+-			bi = (wl_bss_info_t *)((unsigned long)bi + bi->length);
+-		}
+-		iscan_cur = iscan_cur->next;
+-		l++;
+-	}
+-
+-done:
+-	dhd_iscan_unlock();
+-	return 0;
+-}
+-
+-/*
+-* delete disappeared AP from specific scan cache but skip partial
+-* list in iscan_skip
+-*/
+-int dhd_iscan_delete_bss(void *dhdp, void *addr, iscan_buf_t *iscan_skip)
+-{
+-	int i = 0, j = 0, l = 0;
+-	iscan_buf_t *iscan_cur;
+-	wl_iscan_results_t *list;
+-	wl_scan_results_t *results;
+-	wl_bss_info_t UNALIGNED *bi, *bi_new, *bi_next;
+-
+-	unsigned char *s_addr = addr;
+-
+-	dhd_iscan_lock();
+-	DHD_ISCAN(("%s: BSS to remove %X:%X:%X:%X:%X:%X\n",
+-		   __func__, s_addr[0], s_addr[1], s_addr[2],
+-		   s_addr[3], s_addr[4], s_addr[5]));
+-
+-	iscan_cur = dhd_iscan_result_buf();
+-
+-	while (iscan_cur) {
+-		if (iscan_cur != iscan_skip) {
+-			list = (wl_iscan_results_t *)iscan_cur->iscan_buf;
+-			if (!list)
+-				break;
+-
+-			results = (wl_scan_results_t *)&list->results;
+-			if (!results)
+-				break;
+-
+-			if (results->version != WL_BSS_INFO_VERSION) {
+-				DHD_ERROR(("%s: results->version %d != "
+-					"WL_BSS_INFO_VERSION\n",
+-					__func__, results->version));
+-				goto done;
+-			}
+-
+-			bi = results->bss_info;
+-			for (i = 0; i < results->count; i++) {
+-				if (!bi)
+-					break;
+-
+-				if (!memcmp
+-				    (bi->BSSID.octet, addr, ETH_ALEN)) {
+-					DHD_ISCAN(("%s: Del BSS[%2.2d:%2.2d] "
+-					"%X:%X:%X:%X:%X:%X\n",
+-					__func__, l, i, bi->BSSID.octet[0],
+-					bi->BSSID.octet[1], bi->BSSID.octet[2],
+-					bi->BSSID.octet[3], bi->BSSID.octet[4],
+-					bi->BSSID.octet[5]));
+-
+-					bi_new = bi;
+-					bi = (wl_bss_info_t *)((unsigned long)
+-							       bi + bi->length);
+-/*
+-			if(bi && bi_new) {
+-				memcpy(bi_new, bi, results->buflen -
+-				bi_new->length);
+-				results->buflen -= bi_new->length;
+-			}
+-*/
+-					results->buflen -= bi_new->length;
+-					results->count--;
+-
+-					for (j = i; j < results->count; j++) {
+-						if (bi && bi_new) {
+-							DHD_ISCAN(("%s: Moved up BSS[%2.2d:%2.2d]" "%X:%X:%X:%X:%X:%X\n",
+-							__func__, l, j,
+-							bi->BSSID.octet[0],
+-							bi->BSSID.octet[1],
+-							bi->BSSID.octet[2],
+-							bi->BSSID.octet[3],
+-							bi->BSSID.octet[4],
+-							bi->BSSID.octet[5]));
+-
+-							bi_next =
+-							    (wl_bss_info_t *)((unsigned long)bi +
+-								 bi->length);
+-							memcpy(bi_new, bi,
+-							      bi->length);
+-							bi_new =
+-							    (wl_bss_info_t *)((unsigned long)bi_new +
+-								 bi_new->
+-								  length);
+-							bi = bi_next;
+-						}
+-					}
+-
+-					if (results->count == 0) {
+-						/* Prune now empty partial
+-						scan list */
+-						dhd_iscan_free_buf(dhdp,
+-								   iscan_cur);
+-						goto done;
+-					}
+-					break;
+-				}
+-				bi = (wl_bss_info_t *)((unsigned long)bi +
+-							bi->length);
+-			}
+-		}
+-		iscan_cur = iscan_cur->next;
+-		l++;
+-	}
+-
+-done:
+-	dhd_iscan_unlock();
+-	return 0;
+-}
+-
+-int dhd_iscan_remove_duplicates(void *dhdp, iscan_buf_t *iscan_cur)
+-{
+-	int i = 0;
+-	wl_iscan_results_t *list;
+-	wl_scan_results_t *results;
+-	wl_bss_info_t UNALIGNED *bi, *bi_new, *bi_next;
+-
+-	dhd_iscan_lock();
+-
+-	DHD_ISCAN(("%s: Scan cache before delete\n", __func__));
+-	dhd_iscan_print_cache(iscan_cur);
+-
+-	if (!iscan_cur)
+-		goto done;
+-
+-	list = (wl_iscan_results_t *)iscan_cur->iscan_buf;
+-	if (!list)
+-		goto done;
+-
+-	results = (wl_scan_results_t *)&list->results;
+-	if (!results)
+-		goto done;
+-
+-	if (results->version != WL_BSS_INFO_VERSION) {
+-		DHD_ERROR(("%s: results->version %d != WL_BSS_INFO_VERSION\n",
+-			   __func__, results->version));
+-		goto done;
+-	}
+-
+-	bi = results->bss_info;
+-	for (i = 0; i < results->count; i++) {
+-		if (!bi)
+-			break;
+-
+-		DHD_ISCAN(("%s: Find dups for BSS[%2.2d] %X:%X:%X:%X:%X:%X\n",
+-			   __func__, i, bi->BSSID.octet[0],
+-			   bi->BSSID.octet[1], bi->BSSID.octet[2],
+-			   bi->BSSID.octet[3], bi->BSSID.octet[4],
+-			   bi->BSSID.octet[5]));
+-
+-		dhd_iscan_delete_bss(dhdp, bi->BSSID.octet, iscan_cur);
+-
+-		bi = (wl_bss_info_t *)((unsigned long)bi + bi->length);
+-	}
+-
+-done:
+-	DHD_ISCAN(("%s: Scan cache after delete\n", __func__));
+-	dhd_iscan_print_cache(iscan_cur);
+-	dhd_iscan_unlock();
+-	return 0;
+-}
+-
+-void dhd_iscan_ind_scan_confirm(void *dhdp, bool status)
+-{
+-
+-	dhd_ind_scan_confirm(dhdp, status);
+-}
+-
+-int dhd_iscan_request(void *dhdp, u16 action)
+-{
+-	int rc;
+-	wl_iscan_params_t params;
+-	dhd_pub_t *dhd = dhd_bus_pub(dhdp);
+-	char buf[WLC_IOCTL_SMLEN];
+-
+-	memset(&params, 0, sizeof(wl_iscan_params_t));
+-	memcpy(&params.params.bssid, &ether_bcast, ETH_ALEN);
+-
+-	params.params.bss_type = DOT11_BSSTYPE_ANY;
+-	params.params.scan_type = DOT11_SCANTYPE_ACTIVE;
+-
+-	params.params.nprobes = -1;
+-	params.params.active_time = -1;
+-	params.params.passive_time = -1;
+-	params.params.home_time = -1;
+-	params.params.channel_num = 0;
+-
+-	params.version = ISCAN_REQ_VERSION;
+-	params.action = action;
+-	params.scan_duration = 0;
+-
+-	bcm_mkiovar("iscan", (char *)&params, sizeof(wl_iscan_params_t), buf,
+-		    WLC_IOCTL_SMLEN);
+-	rc = dhd_wl_ioctl(dhdp, WLC_SET_VAR, buf, WLC_IOCTL_SMLEN);
+-
+-	return rc;
+-}
+-
+-static int dhd_iscan_get_partial_result(void *dhdp, uint *scan_count)
+-{
+-	wl_iscan_results_t *list_buf;
+-	wl_iscan_results_t list;
+-	wl_scan_results_t *results;
+-	iscan_buf_t *iscan_cur;
+-	int status = -1;
+-	dhd_pub_t *dhd = dhd_bus_pub(dhdp);
+-	int rc;
+-
+-	iscan_cur = dhd_iscan_allocate_buf(dhd, &iscan_chain);
+-	if (!iscan_cur) {
+-		DHD_ERROR(("%s: Failed to allocate node\n", __func__));
+-		dhd_iscan_free_buf(dhdp, 0);
+-		dhd_iscan_request(dhdp, WL_SCAN_ACTION_ABORT);
+-		goto fail;
+-	}
+-
+-	dhd_iscan_lock();
+-
+-	memset(iscan_cur->iscan_buf, 0, WLC_IW_ISCAN_MAXLEN);
+-	list_buf = (wl_iscan_results_t *) iscan_cur->iscan_buf;
+-	results = &list_buf->results;
+-	results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE;
+-	results->version = 0;
+-	results->count = 0;
+-
+-	memset(&list, 0, sizeof(list));
+-	list.results.buflen = WLC_IW_ISCAN_MAXLEN;
+-	bcm_mkiovar("iscanresults", (char *)&list, WL_ISCAN_RESULTS_FIXED_SIZE,
+-		    iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN);
+-	rc = dhd_wl_ioctl(dhdp, WLC_GET_VAR, iscan_cur->iscan_buf,
+-			  WLC_IW_ISCAN_MAXLEN);
+-
+-	results->buflen = results->buflen;
+-	results->version = results->version;
+-	*scan_count = results->count = results->count;
+-	status = list_buf->status;
+-
+-	dhd_iscan_unlock();
+-
+-	if (!(*scan_count))
+-		dhd_iscan_free_buf(dhdp, iscan_cur);
+-	else
+-		dhd_iscan_remove_duplicates(dhdp, iscan_cur);
+-
+-fail:
+-	return status;
+-}
+-#endif				/* SIMPLE_ISCAN */
+-
+-#ifdef PNO_SUPPORT
+-int dhd_pno_clean(dhd_pub_t *dhd)
+-{
+-	char iovbuf[128];
+-	int pfn_enabled = 0;
+-	int iov_len = 0;
+-	int ret;
+-
+-	/* Disable pfn */
+-	iov_len =
+-	    bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, sizeof(iovbuf));
+-	ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (ret >= 0) {
+-		/* clear pfn */
+-		iov_len = bcm_mkiovar("pfnclear", 0, 0, iovbuf, sizeof(iovbuf));
+-		if (iov_len) {
+-			ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					iov_len);
+-			if (ret < 0) {
+-				DHD_ERROR(("%s failed code %d\n", __func__,
+-					   ret));
+-			}
+-		} else {
+-			ret = -1;
+-			DHD_ERROR(("%s failed code %d\n", __func__, iov_len));
+-		}
+-	} else
+-		DHD_ERROR(("%s failed code %d\n", __func__, ret));
+-
+-	return ret;
+-}
+-
+-int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled)
+-{
+-	char iovbuf[128];
+-	int ret = -1;
+-
+-	if ((!dhd) && ((pfn_enabled != 0) || (pfn_enabled != 1))) {
+-		DHD_ERROR(("%s error exit\n", __func__));
+-		return ret;
+-	}
+-
+-	/* Enable/disable PNO */
+-	ret = bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf,
+-			sizeof(iovbuf));
+-	if (ret > 0) {
+-		ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-				sizeof(iovbuf));
+-		if (ret < 0) {
+-			DHD_ERROR(("%s failed for error=%d\n", __func__, ret));
+-			return ret;
+-		} else {
+-			dhd->pno_enable = pfn_enabled;
+-			DHD_TRACE(("%s set pno as %d\n", __func__,
+-				   dhd->pno_enable));
+-		}
+-	} else
+-		DHD_ERROR(("%s failed err=%d\n", __func__, ret));
+-
+-	return ret;
+-}
+-
+-/* Function to execute combined scan */
+-int
+-dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char scan_fr)
+-{
+-	int err = -1;
+-	char iovbuf[128];
+-	int k, i;
+-	wl_pfn_param_t pfn_param;
+-	wl_pfn_t pfn_element;
+-
+-	DHD_TRACE(("%s nssid=%d nchan=%d\n", __func__, nssid, scan_fr));
+-
+-	if ((!dhd) && (!ssids_local)) {
+-		DHD_ERROR(("%s error exit\n", __func__));
+-		err = -1;
+-	}
+-
+-	/* Check for broadcast ssid */
+-	for (k = 0; k < nssid; k++) {
+-		if (!ssids_local[k].SSID_len) {
+-			DHD_ERROR(("%d: Broadcast SSID is ilegal for PNO "
+-				"setting\n", k));
+-			return err;
+-		}
+-	}
+-/* #define  PNO_DUMP 1 */
+-#ifdef PNO_DUMP
+-	{
+-		int j;
+-		for (j = 0; j < nssid; j++) {
+-			DHD_ERROR(("%d: scan  for  %s size =%d\n", j,
+-				   ssids_local[j].SSID,
+-				   ssids_local[j].SSID_len));
+-		}
+-	}
+-#endif				/* PNO_DUMP */
+-
+-	/* clean up everything */
+-	err = dhd_pno_clean(dhd);
+-	if (err < 0) {
+-		DHD_ERROR(("%s failed error=%d\n", __func__, err));
+-		return err;
+-	}
+-	memset(&pfn_param, 0, sizeof(pfn_param));
+-	memset(&pfn_element, 0, sizeof(pfn_element));
+-
+-	/* set pfn parameters */
+-	pfn_param.version = PFN_VERSION;
+-	pfn_param.flags = (PFN_LIST_ORDER << SORT_CRITERIA_BIT);
+-
+-	/* set up pno scan fr */
+-	if (scan_fr != 0)
+-		pfn_param.scan_freq = scan_fr;
+-
+-	bcm_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf,
+-		    sizeof(iovbuf));
+-	dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-
+-	/* set all pfn ssid */
+-	for (i = 0; i < nssid; i++) {
+-
+-		pfn_element.bss_type = DOT11_BSSTYPE_INFRASTRUCTURE;
+-		pfn_element.auth = WLAN_AUTH_OPEN;
+-		pfn_element.wpa_auth = WPA_AUTH_PFN_ANY;
+-		pfn_element.wsec = 0;
+-		pfn_element.infra = 1;
+-
+-		memcpy((char *)pfn_element.ssid.SSID, ssids_local[i].SSID,
+-		       ssids_local[i].SSID_len);
+-		pfn_element.ssid.SSID_len = ssids_local[i].SSID_len;
+-
+-		err = bcm_mkiovar("pfn_add", (char *)&pfn_element,
+-				sizeof(pfn_element), iovbuf, sizeof(iovbuf));
+-		if (err > 0) {
+-			err = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					sizeof(iovbuf));
+-			if (err < 0) {
+-				DHD_ERROR(("%s failed for i=%d error=%d\n",
+-					   __func__, i, err));
+-				return err;
+-			}
+-		} else
+-			DHD_ERROR(("%s failed err=%d\n", __func__, err));
+-	}
+-
+-	/* Enable PNO */
+-	/* dhd_pno_enable(dhd, 1); */
+-	return err;
+-}
+-
+-int dhd_pno_get_status(dhd_pub_t *dhd)
+-{
+-	int ret = -1;
+-
+-	if (!dhd)
+-		return ret;
+-	else
+-		return dhd->pno_enable;
+-}
+-
+-#endif				/* PNO_SUPPORT */
+-
+-/* Androd ComboSCAN support */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
+deleted file mode 100644
+index 1cf6c5d..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c
++++ /dev/null
+@@ -1,158 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/netdevice.h>
+-#include <bcmutils.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-
+-#include <wlioctl.h>
+-#include <wl_iw.h>
+-
+-#define WL_ERROR(fmt, args...) printk(fmt, ##args)
+-#define WL_TRACE(fmt, args...) no_printk(fmt, ##args)
+-
+-#ifdef CUSTOMER_HW
+-extern void bcm_wlan_power_off(int);
+-extern void bcm_wlan_power_on(int);
+-#endif				/* CUSTOMER_HW */
+-#ifdef CUSTOMER_HW2
+-int wifi_set_carddetect(int on);
+-int wifi_set_power(int on, unsigned long msec);
+-int wifi_get_irq_number(unsigned long *irq_flags_ptr);
+-#endif
+-
+-#if defined(OOB_INTR_ONLY)
+-
+-#if defined(BCMLXSDMMC)
+-extern int sdioh_mmc_irq(int irq);
+-#endif				/* (BCMLXSDMMC)  */
+-
+-#ifdef CUSTOMER_HW3
+-#include <mach/gpio.h>
+-#endif
+-
+-/* Customer specific Host GPIO definition  */
+-static int dhd_oob_gpio_num = -1;	/* GG 19 */
+-
+-module_param(dhd_oob_gpio_num, int, 0644);
+-MODULE_PARM_DESC(dhd_oob_gpio_num, "DHD oob gpio number");
+-
+-int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr)
+-{
+-	int host_oob_irq = 0;
+-
+-#ifdef CUSTOMER_HW2
+-	host_oob_irq = wifi_get_irq_number(irq_flags_ptr);
+-
+-#else				/* for NOT  CUSTOMER_HW2 */
+-#if defined(CUSTOM_OOB_GPIO_NUM)
+-	if (dhd_oob_gpio_num < 0)
+-		dhd_oob_gpio_num = CUSTOM_OOB_GPIO_NUM;
+-#endif
+-
+-	if (dhd_oob_gpio_num < 0) {
+-		WL_ERROR("%s: ERROR customer specific Host GPIO is NOT defined\n",
+-			 __func__);
+-		return dhd_oob_gpio_num;
+-	}
+-
+-	WL_ERROR("%s: customer specific Host GPIO number is (%d)\n",
+-		 __func__, dhd_oob_gpio_num);
+-
+-#if defined CUSTOMER_HW
+-	host_oob_irq = MSM_GPIO_TO_INT(dhd_oob_gpio_num);
+-#elif defined CUSTOMER_HW3
+-	gpio_request(dhd_oob_gpio_num, "oob irq");
+-	host_oob_irq = gpio_to_irq(dhd_oob_gpio_num);
+-	gpio_direction_input(dhd_oob_gpio_num);
+-#endif				/* CUSTOMER_HW */
+-#endif				/* CUSTOMER_HW2 */
+-
+-	return host_oob_irq;
+-}
+-#endif				/* defined(OOB_INTR_ONLY) */
+-
+-/* Customer function to control hw specific wlan gpios */
+-void dhd_customer_gpio_wlan_ctrl(int onoff)
+-{
+-	switch (onoff) {
+-	case WLAN_RESET_OFF:
+-		WL_TRACE("%s: call customer specific GPIO to insert WLAN RESET\n",
+-			 __func__);
+-#ifdef CUSTOMER_HW
+-		bcm_wlan_power_off(2);
+-#endif				/* CUSTOMER_HW */
+-#ifdef CUSTOMER_HW2
+-		wifi_set_power(0, 0);
+-#endif
+-		WL_ERROR("=========== WLAN placed in RESET ========\n");
+-		break;
+-
+-	case WLAN_RESET_ON:
+-		WL_TRACE("%s: callc customer specific GPIO to remove WLAN RESET\n",
+-			 __func__);
+-#ifdef CUSTOMER_HW
+-		bcm_wlan_power_on(2);
+-#endif				/* CUSTOMER_HW */
+-#ifdef CUSTOMER_HW2
+-		wifi_set_power(1, 0);
+-#endif
+-		WL_ERROR("=========== WLAN going back to live  ========\n");
+-		break;
+-
+-	case WLAN_POWER_OFF:
+-		WL_TRACE("%s: call customer specific GPIO to turn off WL_REG_ON\n",
+-			 __func__);
+-#ifdef CUSTOMER_HW
+-		bcm_wlan_power_off(1);
+-#endif				/* CUSTOMER_HW */
+-		break;
+-
+-	case WLAN_POWER_ON:
+-		WL_TRACE("%s: call customer specific GPIO to turn on WL_REG_ON\n",
+-			 __func__);
+-#ifdef CUSTOMER_HW
+-		bcm_wlan_power_on(1);
+-#endif				/* CUSTOMER_HW */
+-		/* Lets customer power to get stable */
+-		udelay(200);
+-		break;
+-	}
+-}
+-
+-#ifdef GET_CUSTOM_MAC_ENABLE
+-/* Function to get custom MAC address */
+-int dhd_custom_get_mac_address(unsigned char *buf)
+-{
+-	WL_TRACE("%s Enter\n", __func__);
+-	if (!buf)
+-		return -EINVAL;
+-
+-	/* Customer access to MAC address stored outside of DHD driver */
+-
+-#ifdef EXAMPLE_GET_MAC
+-	/* EXAMPLE code */
+-	{
+-		u8 ea_example[ETH_ALEN] = {0x00, 0x11, 0x22, 0x33, 0x44, 0xFF};
+-		memcpy(buf, ea_example, ETH_ALEN);
+-	}
+-#endif				/* EXAMPLE_GET_MAC */
+-
+-	return 0;
+-}
+-#endif				/* GET_CUSTOM_MAC_ENABLE */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
+deleted file mode 100644
+index 0817f13..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h
++++ /dev/null
+@@ -1,103 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _dhd_dbg_
+-#define _dhd_dbg_
+-
+-#if defined(DHD_DEBUG)
+-
+-#define DHD_ERROR(args)	       \
+-	do {if ((dhd_msg_level & DHD_ERROR_VAL) && (net_ratelimit())) \
+-		printk args; } while (0)
+-#define DHD_TRACE(args)		do {if (dhd_msg_level & DHD_TRACE_VAL)	\
+-					printk args; } while (0)
+-#define DHD_INFO(args)		do {if (dhd_msg_level & DHD_INFO_VAL)	\
+-					printk args; } while (0)
+-#define DHD_DATA(args)		do {if (dhd_msg_level & DHD_DATA_VAL)	\
+-					printk args; } while (0)
+-#define DHD_CTL(args)		do {if (dhd_msg_level & DHD_CTL_VAL)	\
+-					printk args; } while (0)
+-#define DHD_TIMER(args)		do {if (dhd_msg_level & DHD_TIMER_VAL)	\
+-					printk args; } while (0)
+-#define DHD_HDRS(args)		do {if (dhd_msg_level & DHD_HDRS_VAL)	\
+-					printk args; } while (0)
+-#define DHD_BYTES(args)		do {if (dhd_msg_level & DHD_BYTES_VAL)	\
+-					printk args; } while (0)
+-#define DHD_INTR(args)		do {if (dhd_msg_level & DHD_INTR_VAL)	\
+-					printk args; } while (0)
+-#define DHD_GLOM(args)		do {if (dhd_msg_level & DHD_GLOM_VAL)	\
+-					printk args; } while (0)
+-#define DHD_EVENT(args)		do {if (dhd_msg_level & DHD_EVENT_VAL)	\
+-					printk args; } while (0)
+-#define DHD_BTA(args)		do {if (dhd_msg_level & DHD_BTA_VAL)	\
+-					printk args; } while (0)
+-#define DHD_ISCAN(args)		do {if (dhd_msg_level & DHD_ISCAN_VAL)	\
+-					printk args; } while (0)
+-
+-#define DHD_ERROR_ON()		(dhd_msg_level & DHD_ERROR_VAL)
+-#define DHD_TRACE_ON()		(dhd_msg_level & DHD_TRACE_VAL)
+-#define DHD_INFO_ON()		(dhd_msg_level & DHD_INFO_VAL)
+-#define DHD_DATA_ON()		(dhd_msg_level & DHD_DATA_VAL)
+-#define DHD_CTL_ON()		(dhd_msg_level & DHD_CTL_VAL)
+-#define DHD_TIMER_ON()		(dhd_msg_level & DHD_TIMER_VAL)
+-#define DHD_HDRS_ON()		(dhd_msg_level & DHD_HDRS_VAL)
+-#define DHD_BYTES_ON()		(dhd_msg_level & DHD_BYTES_VAL)
+-#define DHD_INTR_ON()		(dhd_msg_level & DHD_INTR_VAL)
+-#define DHD_GLOM_ON()		(dhd_msg_level & DHD_GLOM_VAL)
+-#define DHD_EVENT_ON()		(dhd_msg_level & DHD_EVENT_VAL)
+-#define DHD_BTA_ON()		(dhd_msg_level & DHD_BTA_VAL)
+-#define DHD_ISCAN_ON()		(dhd_msg_level & DHD_ISCAN_VAL)
+-
+-#else	/* (defined BCMDBG) || (defined DHD_DEBUG) */
+-
+-#define DHD_ERROR(args)  do {if (net_ratelimit()) printk args; } while (0)
+-#define DHD_TRACE(args)
+-#define DHD_INFO(args)
+-#define DHD_DATA(args)
+-#define DHD_CTL(args)
+-#define DHD_TIMER(args)
+-#define DHD_HDRS(args)
+-#define DHD_BYTES(args)
+-#define DHD_INTR(args)
+-#define DHD_GLOM(args)
+-#define DHD_EVENT(args)
+-#define DHD_BTA(args)
+-#define DHD_ISCAN(args)
+-
+-#define DHD_ERROR_ON()		0
+-#define DHD_TRACE_ON()		0
+-#define DHD_INFO_ON()		0
+-#define DHD_DATA_ON()		0
+-#define DHD_CTL_ON()		0
+-#define DHD_TIMER_ON()		0
+-#define DHD_HDRS_ON()		0
+-#define DHD_BYTES_ON()		0
+-#define DHD_INTR_ON()		0
+-#define DHD_GLOM_ON()		0
+-#define DHD_EVENT_ON()		0
+-#define DHD_BTA_ON()		0
+-#define DHD_ISCAN_ON()		0
+-#endif				/* defined(DHD_DEBUG) */
+-
+-#define DHD_LOG(args)
+-
+-#define DHD_NONE(args)
+-extern int dhd_msg_level;
+-
+-/* Defines msg bits */
+-#include <dhdioctl.h>
+-
+-#endif				/* _dhd_dbg_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c
+deleted file mode 100644
+index f356c56..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c
++++ /dev/null
+@@ -1,2862 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifdef CONFIG_WIFI_CONTROL_FUNC
+-#include <linux/platform_device.h>
+-#endif
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/kthread.h>
+-#include <linux/slab.h>
+-#include <linux/skbuff.h>
+-#include <linux/netdevice.h>
+-#include <linux/etherdevice.h>
+-#include <linux/mmc/sdio_func.h>
+-#include <linux/random.h>
+-#include <linux/spinlock.h>
+-#include <linux/ethtool.h>
+-#include <linux/fcntl.h>
+-#include <linux/fs.h>
+-#include <linux/uaccess.h>
+-#include <bcmdefs.h>
+-#include <bcmutils.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhd_bus.h>
+-#include <dhd_proto.h>
+-#include <dhd_dbg.h>
+-
+-#include <wl_cfg80211.h>
+-
+-#define EPI_VERSION_STR		"4.218.248.5"
+-#define ETH_P_BRCM			0x886c
+-
+-#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC)
+-#include <linux/wifi_tiwlan.h>
+-
+-struct semaphore wifi_control_sem;
+-
+-struct dhd_bus *g_bus;
+-
+-static struct wifi_platform_data *wifi_control_data;
+-static struct resource *wifi_irqres;
+-
+-int wifi_get_irq_number(unsigned long *irq_flags_ptr)
+-{
+-	if (wifi_irqres) {
+-		*irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK;
+-		return (int)wifi_irqres->start;
+-	}
+-#ifdef CUSTOM_OOB_GPIO_NUM
+-	return CUSTOM_OOB_GPIO_NUM;
+-#else
+-	return -1;
+-#endif
+-}
+-
+-int wifi_set_carddetect(int on)
+-{
+-	printk(KERN_ERR "%s = %d\n", __func__, on);
+-	if (wifi_control_data && wifi_control_data->set_carddetect)
+-		wifi_control_data->set_carddetect(on);
+-	return 0;
+-}
+-
+-int wifi_set_power(int on, unsigned long msec)
+-{
+-	printk(KERN_ERR "%s = %d\n", __func__, on);
+-	if (wifi_control_data && wifi_control_data->set_power)
+-		wifi_control_data->set_power(on);
+-	if (msec)
+-		mdelay(msec);
+-	return 0;
+-}
+-
+-int wifi_set_reset(int on, unsigned long msec)
+-{
+-	printk(KERN_ERR "%s = %d\n", __func__, on);
+-	if (wifi_control_data && wifi_control_data->set_reset)
+-		wifi_control_data->set_reset(on);
+-	if (msec)
+-		mdelay(msec);
+-	return 0;
+-}
+-
+-static int wifi_probe(struct platform_device *pdev)
+-{
+-	struct wifi_platform_data *wifi_ctrl =
+-	    (struct wifi_platform_data *)(pdev->dev.platform_data);
+-
+-	printk(KERN_ERR "## %s\n", __func__);
+-	wifi_irqres =
+-	    platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+-					 "bcm4329_wlan_irq");
+-	wifi_control_data = wifi_ctrl;
+-
+-	wifi_set_power(1, 0);	/* Power On */
+-	wifi_set_carddetect(1);	/* CardDetect (0->1) */
+-
+-	up(&wifi_control_sem);
+-	return 0;
+-}
+-
+-static int wifi_remove(struct platform_device *pdev)
+-{
+-	struct wifi_platform_data *wifi_ctrl =
+-	    (struct wifi_platform_data *)(pdev->dev.platform_data);
+-
+-	printk(KERN_ERR "## %s\n", __func__);
+-	wifi_control_data = wifi_ctrl;
+-
+-	wifi_set_carddetect(0);	/* CardDetect (1->0) */
+-	wifi_set_power(0, 0);	/* Power Off */
+-
+-	up(&wifi_control_sem);
+-	return 0;
+-}
+-
+-static int wifi_suspend(struct platform_device *pdev, pm_message_t state)
+-{
+-	DHD_TRACE(("##> %s\n", __func__));
+-	return 0;
+-}
+-
+-static int wifi_resume(struct platform_device *pdev)
+-{
+-	DHD_TRACE(("##> %s\n", __func__));
+-	return 0;
+-}
+-
+-static struct platform_driver wifi_device = {
+-	.probe = wifi_probe,
+-	.remove = wifi_remove,
+-	.suspend = wifi_suspend,
+-	.resume = wifi_resume,
+-	.driver = {
+-		   .name = KBUILD_MODNAME,
+-		   }
+-};
+-
+-int wifi_add_dev(void)
+-{
+-	DHD_TRACE(("## Calling platform_driver_register\n"));
+-	return platform_driver_register(&wifi_device);
+-}
+-
+-void wifi_del_dev(void)
+-{
+-	DHD_TRACE(("## Unregister platform_driver_register\n"));
+-	platform_driver_unregister(&wifi_device);
+-}
+-#endif	/* defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) */
+-
+-#if defined(CONFIG_PM_SLEEP)
+-#include <linux/suspend.h>
+-atomic_t dhd_mmc_suspend;
+-DECLARE_WAIT_QUEUE_HEAD(dhd_dpc_wait);
+-#endif	/*  defined(CONFIG_PM_SLEEP) */
+-
+-#if defined(OOB_INTR_ONLY)
+-extern void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable);
+-#endif	/* defined(OOB_INTR_ONLY) */
+-
+-MODULE_AUTHOR("Broadcom Corporation");
+-MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN fullmac driver.");
+-MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN fullmac cards");
+-MODULE_LICENSE("Dual BSD/GPL");
+-
+-#define DRV_MODULE_NAME "brcmfmac"
+-
+-/* Linux wireless extension support */
+-#if defined(CONFIG_WIRELESS_EXT)
+-#include <wl_iw.h>
+-extern wl_iw_extra_params_t g_wl_iw_params;
+-#endif		/* defined(CONFIG_WIRELESS_EXT) */
+-
+-#if defined(CONFIG_HAS_EARLYSUSPEND)
+-#include <linux/earlysuspend.h>
+-extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf,
+-			    uint len);
+-#endif		/* defined(CONFIG_HAS_EARLYSUSPEND) */
+-
+-#ifdef PKT_FILTER_SUPPORT
+-extern void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg);
+-extern void dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable,
+-					 int master_mode);
+-#endif
+-
+-/* Interface control information */
+-typedef struct dhd_if {
+-	struct dhd_info *info;	/* back pointer to dhd_info */
+-	/* OS/stack specifics */
+-	struct net_device *net;
+-	struct net_device_stats stats;
+-	int idx;		/* iface idx in dongle */
+-	int state;		/* interface state */
+-	uint subunit;		/* subunit */
+-	u8 mac_addr[ETH_ALEN];	/* assigned MAC address */
+-	bool attached;		/* Delayed attachment when unset */
+-	bool txflowcontrol;	/* Per interface flow control indicator */
+-	char name[IFNAMSIZ];	/* linux interface name */
+-} dhd_if_t;
+-
+-/* Local private structure (extension of pub) */
+-typedef struct dhd_info {
+-#if defined(CONFIG_WIRELESS_EXT)
+-	wl_iw_t iw;		/* wireless extensions state (must be first) */
+-#endif				/* defined(CONFIG_WIRELESS_EXT) */
+-
+-	dhd_pub_t pub;
+-
+-	/* OS/stack specifics */
+-	dhd_if_t *iflist[DHD_MAX_IFS];
+-
+-	struct semaphore proto_sem;
+-	wait_queue_head_t ioctl_resp_wait;
+-	struct timer_list timer;
+-	bool wd_timer_valid;
+-	struct tasklet_struct tasklet;
+-	spinlock_t sdlock;
+-	spinlock_t txqlock;
+-	/* Thread based operation */
+-	bool threads_only;
+-	struct semaphore sdsem;
+-	struct task_struct *watchdog_tsk;
+-	struct semaphore watchdog_sem;
+-	struct task_struct *dpc_tsk;
+-	struct semaphore dpc_sem;
+-
+-	/* Thread to issue ioctl for multicast */
+-	struct task_struct *sysioc_tsk;
+-	struct semaphore sysioc_sem;
+-	bool set_multicast;
+-	bool set_macaddress;
+-	u8 macvalue[ETH_ALEN];
+-	wait_queue_head_t ctrl_wait;
+-	atomic_t pend_8021x_cnt;
+-
+-#ifdef CONFIG_HAS_EARLYSUSPEND
+-	struct early_suspend early_suspend;
+-#endif				/* CONFIG_HAS_EARLYSUSPEND */
+-} dhd_info_t;
+-
+-/* Definitions to provide path to the firmware and nvram
+- * example nvram_path[MOD_PARAM_PATHLEN]="/projects/wlan/nvram.txt"
+- */
+-char firmware_path[MOD_PARAM_PATHLEN];
+-char nvram_path[MOD_PARAM_PATHLEN];
+-
+-/* load firmware and/or nvram values from the filesystem */
+-module_param_string(firmware_path, firmware_path, MOD_PARAM_PATHLEN, 0);
+-module_param_string(nvram_path, nvram_path, MOD_PARAM_PATHLEN, 0);
+-
+-/* Error bits */
+-module_param(dhd_msg_level, int, 0);
+-
+-/* Spawn a thread for system ioctls (set mac, set mcast) */
+-uint dhd_sysioc = true;
+-module_param(dhd_sysioc, uint, 0);
+-
+-/* Watchdog interval */
+-uint dhd_watchdog_ms = 10;
+-module_param(dhd_watchdog_ms, uint, 0);
+-
+-#ifdef DHD_DEBUG
+-/* Console poll interval */
+-uint dhd_console_ms;
+-module_param(dhd_console_ms, uint, 0);
+-#endif				/* DHD_DEBUG */
+-
+-/* ARP offload agent mode : Enable ARP Host Auto-Reply
+-and ARP Peer Auto-Reply */
+-uint dhd_arp_mode = 0xb;
+-module_param(dhd_arp_mode, uint, 0);
+-
+-/* ARP offload enable */
+-uint dhd_arp_enable = true;
+-module_param(dhd_arp_enable, uint, 0);
+-
+-/* Global Pkt filter enable control */
+-uint dhd_pkt_filter_enable = true;
+-module_param(dhd_pkt_filter_enable, uint, 0);
+-
+-/*  Pkt filter init setup */
+-uint dhd_pkt_filter_init;
+-module_param(dhd_pkt_filter_init, uint, 0);
+-
+-/* Pkt filter mode control */
+-uint dhd_master_mode = true;
+-module_param(dhd_master_mode, uint, 1);
+-
+-/* Watchdog thread priority, -1 to use kernel timer */
+-int dhd_watchdog_prio = 97;
+-module_param(dhd_watchdog_prio, int, 0);
+-
+-/* DPC thread priority, -1 to use tasklet */
+-int dhd_dpc_prio = 98;
+-module_param(dhd_dpc_prio, int, 0);
+-
+-/* DPC thread priority, -1 to use tasklet */
+-extern int dhd_dongle_memsize;
+-module_param(dhd_dongle_memsize, int, 0);
+-
+-/* Contorl fw roaming */
+-#ifdef CUSTOMER_HW2
+-uint dhd_roam;
+-#else
+-uint dhd_roam = 1;
+-#endif
+-
+-/* Control radio state */
+-uint dhd_radio_up = 1;
+-
+-/* Network inteface name */
+-char iface_name[IFNAMSIZ] = "wlan";
+-module_param_string(iface_name, iface_name, IFNAMSIZ, 0);
+-
+-/* The following are specific to the SDIO dongle */
+-
+-/* IOCTL response timeout */
+-int dhd_ioctl_timeout_msec = IOCTL_RESP_TIMEOUT;
+-
+-/* Idle timeout for backplane clock */
+-int dhd_idletime = DHD_IDLETIME_TICKS;
+-module_param(dhd_idletime, int, 0);
+-
+-/* Use polling */
+-uint dhd_poll = false;
+-module_param(dhd_poll, uint, 0);
+-
+-/* Use cfg80211 */
+-uint dhd_cfg80211 = true;
+-module_param(dhd_cfg80211, uint, 0);
+-
+-/* Use interrupts */
+-uint dhd_intr = true;
+-module_param(dhd_intr, uint, 0);
+-
+-/* SDIO Drive Strength (in milliamps) */
+-uint dhd_sdiod_drive_strength = 6;
+-module_param(dhd_sdiod_drive_strength, uint, 0);
+-
+-/* Tx/Rx bounds */
+-extern uint dhd_txbound;
+-extern uint dhd_rxbound;
+-module_param(dhd_txbound, uint, 0);
+-module_param(dhd_rxbound, uint, 0);
+-
+-/* Deferred transmits */
+-extern uint dhd_deferred_tx;
+-module_param(dhd_deferred_tx, uint, 0);
+-
+-#ifdef SDTEST
+-/* Echo packet generator (pkts/s) */
+-uint dhd_pktgen;
+-module_param(dhd_pktgen, uint, 0);
+-
+-/* Echo packet len (0 => sawtooth, max 2040) */
+-uint dhd_pktgen_len;
+-module_param(dhd_pktgen_len, uint, 0);
+-#endif
+-
+-#define FAVORITE_WIFI_CP	(!!dhd_cfg80211)
+-#define IS_CFG80211_FAVORITE() FAVORITE_WIFI_CP
+-#define DBG_CFG80211_GET() ((dhd_cfg80211 & WL_DBG_MASK) >> 1)
+-#define NO_FW_REQ() (dhd_cfg80211 & 0x80)
+-
+-/* Version string to report */
+-#ifdef DHD_DEBUG
+-#define DHD_COMPILED "\nCompiled in " SRCBASE
+-#else
+-#define DHD_COMPILED
+-#endif
+-
+-static void dhd_dpc(unsigned long data);
+-/* forward decl */
+-extern int dhd_wait_pend8021x(struct net_device *dev);
+-
+-#ifdef TOE
+-#ifndef BDC
+-#error TOE requires BDC
+-#endif				/* !BDC */
+-static int dhd_toe_get(dhd_info_t *dhd, int idx, u32 *toe_ol);
+-static int dhd_toe_set(dhd_info_t *dhd, int idx, u32 toe_ol);
+-#endif				/* TOE */
+-
+-static int dhd_wl_host_event(dhd_info_t *dhd, int *ifidx, void *pktdata,
+-			     wl_event_msg_t *event_ptr, void **data_ptr);
+-
+-#if defined(CONFIG_PM_SLEEP)
+-static int dhd_sleep_pm_callback(struct notifier_block *nfb,
+-				 unsigned long action, void *ignored)
+-{
+-	switch (action) {
+-	case PM_HIBERNATION_PREPARE:
+-	case PM_SUSPEND_PREPARE:
+-		atomic_set(&dhd_mmc_suspend, true);
+-		return NOTIFY_OK;
+-	case PM_POST_HIBERNATION:
+-	case PM_POST_SUSPEND:
+-		atomic_set(&dhd_mmc_suspend, false);
+-		return NOTIFY_OK;
+-	}
+-	return 0;
+-}
+-
+-static struct notifier_block dhd_sleep_pm_notifier = {
+-	.notifier_call = dhd_sleep_pm_callback,
+-	.priority = 0
+-};
+-
+-extern int register_pm_notifier(struct notifier_block *nb);
+-extern int unregister_pm_notifier(struct notifier_block *nb);
+-#endif	/* defined(CONFIG_PM_SLEEP) */
+-	/* && defined(DHD_GPL) */
+-static void dhd_set_packet_filter(int value, dhd_pub_t *dhd)
+-{
+-#ifdef PKT_FILTER_SUPPORT
+-	DHD_TRACE(("%s: %d\n", __func__, value));
+-	/* 1 - Enable packet filter, only allow unicast packet to send up */
+-	/* 0 - Disable packet filter */
+-	if (dhd_pkt_filter_enable) {
+-		int i;
+-
+-		for (i = 0; i < dhd->pktfilter_count; i++) {
+-			dhd_pktfilter_offload_set(dhd, dhd->pktfilter[i]);
+-			dhd_pktfilter_offload_enable(dhd, dhd->pktfilter[i],
+-						     value, dhd_master_mode);
+-		}
+-	}
+-#endif
+-}
+-
+-#if defined(CONFIG_HAS_EARLYSUSPEND)
+-static int dhd_set_suspend(int value, dhd_pub_t *dhd)
+-{
+-	int power_mode = PM_MAX;
+-	/* wl_pkt_filter_enable_t       enable_parm; */
+-	char iovbuf[32];
+-	int bcn_li_dtim = 3;
+-#ifdef CUSTOMER_HW2
+-	uint roamvar = 1;
+-#endif				/* CUSTOMER_HW2 */
+-
+-	DHD_TRACE(("%s: enter, value = %d in_suspend=%d\n",
+-		   __func__, value, dhd->in_suspend));
+-
+-	if (dhd && dhd->up) {
+-		if (value && dhd->in_suspend) {
+-
+-			/* Kernel suspended */
+-			DHD_TRACE(("%s: force extra Suspend setting\n",
+-				   __func__));
+-
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM,
+-					 (char *)&power_mode,
+-					 sizeof(power_mode));
+-
+-			/* Enable packet filter, only allow unicast
+-				 packet to send up */
+-			dhd_set_packet_filter(1, dhd);
+-
+-			/* if dtim skip setup as default force it
+-			 * to wake each third dtim
+-			 * for better power saving.
+-			 * Note that side effect is chance to miss BC/MC
+-			 * packet
+-			 */
+-			if ((dhd->dtim_skip == 0) || (dhd->dtim_skip == 1))
+-				bcn_li_dtim = 3;
+-			else
+-				bcn_li_dtim = dhd->dtim_skip;
+-			bcm_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim,
+-				    4, iovbuf, sizeof(iovbuf));
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					 sizeof(iovbuf));
+-#ifdef CUSTOMER_HW2
+-			/* Disable build-in roaming to allowed \
+-			 * supplicant to take of romaing
+-			 */
+-			bcm_mkiovar("roam_off", (char *)&roamvar, 4,
+-				    iovbuf, sizeof(iovbuf));
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					 sizeof(iovbuf));
+-#endif				/* CUSTOMER_HW2 */
+-		} else {
+-
+-			/* Kernel resumed  */
+-			DHD_TRACE(("%s: Remove extra suspend setting\n",
+-				   __func__));
+-
+-			power_mode = PM_FAST;
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM,
+-					 (char *)&power_mode,
+-					 sizeof(power_mode));
+-
+-			/* disable pkt filter */
+-			dhd_set_packet_filter(0, dhd);
+-
+-			/* restore pre-suspend setting for dtim_skip */
+-			bcm_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip,
+-				    4, iovbuf, sizeof(iovbuf));
+-
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					 sizeof(iovbuf));
+-#ifdef CUSTOMER_HW2
+-			roamvar = 0;
+-			bcm_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf,
+-				    sizeof(iovbuf));
+-			dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf,
+-					 sizeof(iovbuf));
+-#endif				/* CUSTOMER_HW2 */
+-		}
+-	}
+-
+-	return 0;
+-}
+-
+-static void dhd_suspend_resume_helper(struct dhd_info *dhd, int val)
+-{
+-	dhd_pub_t *dhdp = &dhd->pub;
+-
+-	dhd_os_proto_block(dhdp);
+-	/* Set flag when early suspend was called */
+-	dhdp->in_suspend = val;
+-	if (!dhdp->suspend_disable_flag)
+-		dhd_set_suspend(val, dhdp);
+-	dhd_os_proto_unblock(dhdp);
+-}
+-
+-static void dhd_early_suspend(struct early_suspend *h)
+-{
+-	struct dhd_info *dhd = container_of(h, struct dhd_info, early_suspend);
+-
+-	DHD_TRACE(("%s: enter\n", __func__));
+-
+-	if (dhd)
+-		dhd_suspend_resume_helper(dhd, 1);
+-
+-}
+-
+-static void dhd_late_resume(struct early_suspend *h)
+-{
+-	struct dhd_info *dhd = container_of(h, struct dhd_info, early_suspend);
+-
+-	DHD_TRACE(("%s: enter\n", __func__));
+-
+-	if (dhd)
+-		dhd_suspend_resume_helper(dhd, 0);
+-}
+-#endif				/* defined(CONFIG_HAS_EARLYSUSPEND) */
+-
+-/*
+- * Generalized timeout mechanism.  Uses spin sleep with exponential
+- * back-off until
+- * the sleep time reaches one jiffy, then switches over to task delay.  Usage:
+- *
+- *      dhd_timeout_start(&tmo, usec);
+- *      while (!dhd_timeout_expired(&tmo))
+- *              if (poll_something())
+- *                      break;
+- *      if (dhd_timeout_expired(&tmo))
+- *              fatal();
+- */
+-
+-void dhd_timeout_start(dhd_timeout_t *tmo, uint usec)
+-{
+-	tmo->limit = usec;
+-	tmo->increment = 0;
+-	tmo->elapsed = 0;
+-	tmo->tick = 1000000 / HZ;
+-}
+-
+-int dhd_timeout_expired(dhd_timeout_t *tmo)
+-{
+-	/* Does nothing the first call */
+-	if (tmo->increment == 0) {
+-		tmo->increment = 1;
+-		return 0;
+-	}
+-
+-	if (tmo->elapsed >= tmo->limit)
+-		return 1;
+-
+-	/* Add the delay that's about to take place */
+-	tmo->elapsed += tmo->increment;
+-
+-	if (tmo->increment < tmo->tick) {
+-		udelay(tmo->increment);
+-		tmo->increment *= 2;
+-		if (tmo->increment > tmo->tick)
+-			tmo->increment = tmo->tick;
+-	} else {
+-		wait_queue_head_t delay_wait;
+-		DECLARE_WAITQUEUE(wait, current);
+-		int pending;
+-		init_waitqueue_head(&delay_wait);
+-		add_wait_queue(&delay_wait, &wait);
+-		set_current_state(TASK_INTERRUPTIBLE);
+-		schedule_timeout(1);
+-		pending = signal_pending(current);
+-		remove_wait_queue(&delay_wait, &wait);
+-		set_current_state(TASK_RUNNING);
+-		if (pending)
+-			return 1;	/* Interrupted */
+-	}
+-
+-	return 0;
+-}
+-
+-static int dhd_net2idx(dhd_info_t *dhd, struct net_device *net)
+-{
+-	int i = 0;
+-
+-	ASSERT(dhd);
+-	while (i < DHD_MAX_IFS) {
+-		if (dhd->iflist[i] && (dhd->iflist[i]->net == net))
+-			return i;
+-		i++;
+-	}
+-
+-	return DHD_BAD_IF;
+-}
+-
+-int dhd_ifname2idx(dhd_info_t *dhd, char *name)
+-{
+-	int i = DHD_MAX_IFS;
+-
+-	ASSERT(dhd);
+-
+-	if (name == NULL || *name == '\0')
+-		return 0;
+-
+-	while (--i > 0)
+-		if (dhd->iflist[i]
+-		    && !strncmp(dhd->iflist[i]->name, name, IFNAMSIZ))
+-			break;
+-
+-	DHD_TRACE(("%s: return idx %d for \"%s\"\n", __func__, i, name));
+-
+-	return i;		/* default - the primary interface */
+-}
+-
+-char *dhd_ifname(dhd_pub_t *dhdp, int ifidx)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) dhdp->info;
+-
+-	ASSERT(dhd);
+-
+-	if (ifidx < 0 || ifidx >= DHD_MAX_IFS) {
+-		DHD_ERROR(("%s: ifidx %d out of range\n", __func__, ifidx));
+-		return "<if_bad>";
+-	}
+-
+-	if (dhd->iflist[ifidx] == NULL) {
+-		DHD_ERROR(("%s: null i/f %d\n", __func__, ifidx));
+-		return "<if_null>";
+-	}
+-
+-	if (dhd->iflist[ifidx]->net)
+-		return dhd->iflist[ifidx]->net->name;
+-
+-	return "<if_none>";
+-}
+-
+-static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx)
+-{
+-	struct net_device *dev;
+-	struct netdev_hw_addr *ha;
+-	u32 allmulti, cnt;
+-
+-	wl_ioctl_t ioc;
+-	char *buf, *bufp;
+-	uint buflen;
+-	int ret;
+-
+-	ASSERT(dhd && dhd->iflist[ifidx]);
+-	dev = dhd->iflist[ifidx]->net;
+-	cnt = netdev_mc_count(dev);
+-
+-	/* Determine initial value of allmulti flag */
+-	allmulti = (dev->flags & IFF_ALLMULTI) ? true : false;
+-
+-	/* Send down the multicast list first. */
+-
+-	buflen = sizeof("mcast_list") + sizeof(cnt) + (cnt * ETH_ALEN);
+-	bufp = buf = kmalloc(buflen, GFP_ATOMIC);
+-	if (!bufp) {
+-		DHD_ERROR(("%s: out of memory for mcast_list, cnt %d\n",
+-			   dhd_ifname(&dhd->pub, ifidx), cnt));
+-		return;
+-	}
+-
+-	strcpy(bufp, "mcast_list");
+-	bufp += strlen("mcast_list") + 1;
+-
+-	cnt = cpu_to_le32(cnt);
+-	memcpy(bufp, &cnt, sizeof(cnt));
+-	bufp += sizeof(cnt);
+-
+-	netdev_for_each_mc_addr(ha, dev) {
+-		if (!cnt)
+-			break;
+-		memcpy(bufp, ha->addr, ETH_ALEN);
+-		bufp += ETH_ALEN;
+-		cnt--;
+-	}
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-	ioc.cmd = WLC_SET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = buflen;
+-	ioc.set = true;
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: set mcast_list failed, cnt %d\n",
+-			   dhd_ifname(&dhd->pub, ifidx), cnt));
+-		allmulti = cnt ? true : allmulti;
+-	}
+-
+-	kfree(buf);
+-
+-	/* Now send the allmulti setting.  This is based on the setting in the
+-	 * net_device flags, but might be modified above to be turned on if we
+-	 * were trying to set some addresses and dongle rejected it...
+-	 */
+-
+-	buflen = sizeof("allmulti") + sizeof(allmulti);
+-	buf = kmalloc(buflen, GFP_ATOMIC);
+-	if (!buf) {
+-		DHD_ERROR(("%s: out of memory for allmulti\n",
+-			   dhd_ifname(&dhd->pub, ifidx)));
+-		return;
+-	}
+-	allmulti = cpu_to_le32(allmulti);
+-
+-	if (!bcm_mkiovar
+-	    ("allmulti", (void *)&allmulti, sizeof(allmulti), buf, buflen)) {
+-		DHD_ERROR(("%s: mkiovar failed for allmulti, datalen %d "
+-			"buflen %u\n", dhd_ifname(&dhd->pub, ifidx),
+-			(int)sizeof(allmulti), buflen));
+-		kfree(buf);
+-		return;
+-	}
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-	ioc.cmd = WLC_SET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = buflen;
+-	ioc.set = true;
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: set allmulti %d failed\n",
+-			   dhd_ifname(&dhd->pub, ifidx),
+-			   le32_to_cpu(allmulti)));
+-	}
+-
+-	kfree(buf);
+-
+-	/* Finally, pick up the PROMISC flag as well, like the NIC
+-		 driver does */
+-
+-	allmulti = (dev->flags & IFF_PROMISC) ? true : false;
+-	allmulti = cpu_to_le32(allmulti);
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-	ioc.cmd = WLC_SET_PROMISC;
+-	ioc.buf = &allmulti;
+-	ioc.len = sizeof(allmulti);
+-	ioc.set = true;
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: set promisc %d failed\n",
+-			   dhd_ifname(&dhd->pub, ifidx),
+-			   le32_to_cpu(allmulti)));
+-	}
+-}
+-
+-static int
+-_dhd_set_mac_address(dhd_info_t *dhd, int ifidx, u8 *addr)
+-{
+-	char buf[32];
+-	wl_ioctl_t ioc;
+-	int ret;
+-
+-	DHD_TRACE(("%s enter\n", __func__));
+-	if (!bcm_mkiovar
+-	    ("cur_etheraddr", (char *)addr, ETH_ALEN, buf, 32)) {
+-		DHD_ERROR(("%s: mkiovar failed for cur_etheraddr\n",
+-			   dhd_ifname(&dhd->pub, ifidx)));
+-		return -1;
+-	}
+-	memset(&ioc, 0, sizeof(ioc));
+-	ioc.cmd = WLC_SET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = 32;
+-	ioc.set = true;
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: set cur_etheraddr failed\n",
+-			   dhd_ifname(&dhd->pub, ifidx)));
+-	} else {
+-		memcpy(dhd->iflist[ifidx]->net->dev_addr, addr, ETH_ALEN);
+-	}
+-
+-	return ret;
+-}
+-
+-#ifdef SOFTAP
+-extern struct net_device *ap_net_dev;
+-#endif
+-
+-static void dhd_op_if(dhd_if_t *ifp)
+-{
+-	dhd_info_t *dhd;
+-	int ret = 0, err = 0;
+-
+-	ASSERT(ifp && ifp->info && ifp->idx);	/* Virtual interfaces only */
+-
+-	dhd = ifp->info;
+-
+-	DHD_TRACE(("%s: idx %d, state %d\n", __func__, ifp->idx, ifp->state));
+-
+-	switch (ifp->state) {
+-	case WLC_E_IF_ADD:
+-		/*
+-		 * Delete the existing interface before overwriting it
+-		 * in case we missed the WLC_E_IF_DEL event.
+-		 */
+-		if (ifp->net != NULL) {
+-			DHD_ERROR(("%s: ERROR: netdev:%s already exists, "
+-			"try free & unregister\n",
+-			__func__, ifp->net->name));
+-			netif_stop_queue(ifp->net);
+-			unregister_netdev(ifp->net);
+-			free_netdev(ifp->net);
+-		}
+-		/* Allocate etherdev, including space for private structure */
+-		ifp->net = alloc_etherdev(sizeof(dhd));
+-		if (!ifp->net) {
+-			DHD_ERROR(("%s: OOM - alloc_etherdev\n", __func__));
+-			ret = -ENOMEM;
+-		}
+-		if (ret == 0) {
+-			strcpy(ifp->net->name, ifp->name);
+-			memcpy(netdev_priv(ifp->net), &dhd, sizeof(dhd));
+-			err = dhd_net_attach(&dhd->pub, ifp->idx);
+-			if (err != 0) {
+-				DHD_ERROR(("%s: dhd_net_attach failed, "
+-					"err %d\n",
+-					__func__, err));
+-				ret = -EOPNOTSUPP;
+-			} else {
+-#ifdef SOFTAP
+-				/* semaphore that the soft AP CODE
+-					 waits on */
+-				extern struct semaphore ap_eth_sema;
+-
+-				/* save ptr to wl0.1 netdev for use
+-					 in wl_iw.c  */
+-				ap_net_dev = ifp->net;
+-				/* signal to the SOFTAP 'sleeper' thread,
+-					 wl0.1 is ready */
+-				up(&ap_eth_sema);
+-#endif
+-				DHD_TRACE(("\n ==== pid:%x, net_device for "
+-					"if:%s created ===\n\n",
+-					current->pid, ifp->net->name));
+-				ifp->state = 0;
+-			}
+-		}
+-		break;
+-	case WLC_E_IF_DEL:
+-		if (ifp->net != NULL) {
+-			DHD_TRACE(("\n%s: got 'WLC_E_IF_DEL' state\n",
+-				   __func__));
+-			netif_stop_queue(ifp->net);
+-			unregister_netdev(ifp->net);
+-			ret = DHD_DEL_IF;	/* Make sure the free_netdev()
+-							 is called */
+-		}
+-		break;
+-	default:
+-		DHD_ERROR(("%s: bad op %d\n", __func__, ifp->state));
+-		ASSERT(!ifp->state);
+-		break;
+-	}
+-
+-	if (ret < 0) {
+-		if (ifp->net)
+-			free_netdev(ifp->net);
+-
+-		dhd->iflist[ifp->idx] = NULL;
+-		kfree(ifp);
+-#ifdef SOFTAP
+-		if (ifp->net == ap_net_dev)
+-			ap_net_dev = NULL;	/*  NULL  SOFTAP global
+-							 wl0.1 as well */
+-#endif				/*  SOFTAP */
+-	}
+-}
+-
+-static int _dhd_sysioc_thread(void *data)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) data;
+-	int i;
+-#ifdef SOFTAP
+-	bool in_ap = false;
+-#endif
+-
+-	allow_signal(SIGTERM);
+-
+-	while (down_interruptible(&dhd->sysioc_sem) == 0) {
+-		if (kthread_should_stop())
+-			break;
+-		for (i = 0; i < DHD_MAX_IFS; i++) {
+-			if (dhd->iflist[i]) {
+-#ifdef SOFTAP
+-				in_ap = (ap_net_dev != NULL);
+-#endif				/* SOFTAP */
+-				if (dhd->iflist[i]->state)
+-					dhd_op_if(dhd->iflist[i]);
+-#ifdef SOFTAP
+-				if (dhd->iflist[i] == NULL) {
+-					DHD_TRACE(("\n\n %s: interface %d "
+-						"removed!\n", __func__, i));
+-					continue;
+-				}
+-
+-				if (in_ap && dhd->set_macaddress) {
+-					DHD_TRACE(("attempt to set MAC for %s "
+-						"in AP Mode," "blocked. \n",
+-						dhd->iflist[i]->net->name));
+-					dhd->set_macaddress = false;
+-					continue;
+-				}
+-
+-				if (in_ap && dhd->set_multicast) {
+-					DHD_TRACE(("attempt to set MULTICAST list for %s" "in AP Mode, blocked. \n",
+-						dhd->iflist[i]->net->name));
+-					dhd->set_multicast = false;
+-					continue;
+-				}
+-#endif				/* SOFTAP */
+-				if (dhd->set_multicast) {
+-					dhd->set_multicast = false;
+-					_dhd_set_multicast_list(dhd, i);
+-				}
+-				if (dhd->set_macaddress) {
+-					dhd->set_macaddress = false;
+-					_dhd_set_mac_address(dhd, i,
+-							     dhd->macvalue);
+-				}
+-			}
+-		}
+-	}
+-	return 0;
+-}
+-
+-static int dhd_set_mac_address(struct net_device *dev, void *addr)
+-{
+-	int ret = 0;
+-
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev);
+-	struct sockaddr *sa = (struct sockaddr *)addr;
+-	int ifidx;
+-
+-	ifidx = dhd_net2idx(dhd, dev);
+-	if (ifidx == DHD_BAD_IF)
+-		return -1;
+-
+-	ASSERT(dhd->sysioc_tsk);
+-	memcpy(&dhd->macvalue, sa->sa_data, ETH_ALEN);
+-	dhd->set_macaddress = true;
+-	up(&dhd->sysioc_sem);
+-
+-	return ret;
+-}
+-
+-static void dhd_set_multicast_list(struct net_device *dev)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev);
+-	int ifidx;
+-
+-	ifidx = dhd_net2idx(dhd, dev);
+-	if (ifidx == DHD_BAD_IF)
+-		return;
+-
+-	ASSERT(dhd->sysioc_tsk);
+-	dhd->set_multicast = true;
+-	up(&dhd->sysioc_sem);
+-}
+-
+-int dhd_sendpkt(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf)
+-{
+-	int ret;
+-	dhd_info_t *dhd = (dhd_info_t *) (dhdp->info);
+-
+-	/* Reject if down */
+-	if (!dhdp->up || (dhdp->busstate == DHD_BUS_DOWN))
+-		return -ENODEV;
+-
+-	/* Update multicast statistic */
+-	if (pktbuf->len >= ETH_ALEN) {
+-		u8 *pktdata = (u8 *) (pktbuf->data);
+-		struct ethhdr *eh = (struct ethhdr *)pktdata;
+-
+-		if (is_multicast_ether_addr(eh->h_dest))
+-			dhdp->tx_multicast++;
+-		if (ntohs(eh->h_proto) == ETH_P_PAE)
+-			atomic_inc(&dhd->pend_8021x_cnt);
+-	}
+-
+-	/* If the protocol uses a data header, apply it */
+-	dhd_prot_hdrpush(dhdp, ifidx, pktbuf);
+-
+-	/* Use bus module to send data frame */
+-#ifdef BCMDBUS
+-	ret = dbus_send_pkt(dhdp->dbus, pktbuf, NULL /* pktinfo */);
+-#else
+-	ret = dhd_bus_txdata(dhdp->bus, pktbuf);
+-#endif				/* BCMDBUS */
+-
+-	return ret;
+-}
+-
+-static inline void *
+-osl_pkt_frmnative(struct sk_buff *skb)
+-{
+-	return (void *)skb;
+-}
+-#define PKTFRMNATIVE(osh, skb)	\
+-	osl_pkt_frmnative((struct sk_buff *)(skb))
+-
+-static inline struct sk_buff *
+-osl_pkt_tonative(void *pkt)
+-{
+-	return (struct sk_buff *)pkt;
+-}
+-#define PKTTONATIVE(osh, pkt)	\
+-	osl_pkt_tonative((pkt))
+-
+-static int dhd_start_xmit(struct sk_buff *skb, struct net_device *net)
+-{
+-	int ret;
+-	void *pktbuf;
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-	int ifidx;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Reject if down */
+-	if (!dhd->pub.up || (dhd->pub.busstate == DHD_BUS_DOWN)) {
+-		DHD_ERROR(("%s: xmit rejected pub.up=%d busstate=%d\n",
+-			   __func__, dhd->pub.up, dhd->pub.busstate));
+-		netif_stop_queue(net);
+-		return -ENODEV;
+-	}
+-
+-	ifidx = dhd_net2idx(dhd, net);
+-	if (ifidx == DHD_BAD_IF) {
+-		DHD_ERROR(("%s: bad ifidx %d\n", __func__, ifidx));
+-		netif_stop_queue(net);
+-		return -ENODEV;
+-	}
+-
+-	/* Make sure there's enough room for any header */
+-	if (skb_headroom(skb) < dhd->pub.hdrlen) {
+-		struct sk_buff *skb2;
+-
+-		DHD_INFO(("%s: insufficient headroom\n",
+-			  dhd_ifname(&dhd->pub, ifidx)));
+-		dhd->pub.tx_realloc++;
+-		skb2 = skb_realloc_headroom(skb, dhd->pub.hdrlen);
+-		dev_kfree_skb(skb);
+-		skb = skb2;
+-		if (skb == NULL) {
+-			DHD_ERROR(("%s: skb_realloc_headroom failed\n",
+-				   dhd_ifname(&dhd->pub, ifidx)));
+-			ret = -ENOMEM;
+-			goto done;
+-		}
+-	}
+-
+-	/* Convert to packet */
+-	pktbuf = PKTFRMNATIVE(dhd->pub.osh, skb);
+-	if (!pktbuf) {
+-		DHD_ERROR(("%s: PKTFRMNATIVE failed\n",
+-			   dhd_ifname(&dhd->pub, ifidx)));
+-		dev_kfree_skb_any(skb);
+-		ret = -ENOMEM;
+-		goto done;
+-	}
+-
+-	ret = dhd_sendpkt(&dhd->pub, ifidx, pktbuf);
+-
+-done:
+-	if (ret)
+-		dhd->pub.dstats.tx_dropped++;
+-	else
+-		dhd->pub.tx_packets++;
+-
+-	/* Return ok: we always eat the packet */
+-	return 0;
+-}
+-
+-void dhd_txflowcontrol(dhd_pub_t *dhdp, int ifidx, bool state)
+-{
+-	struct net_device *net;
+-	dhd_info_t *dhd = dhdp->info;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	dhdp->txoff = state;
+-	ASSERT(dhd && dhd->iflist[ifidx]);
+-	net = dhd->iflist[ifidx]->net;
+-	if (state == ON)
+-		netif_stop_queue(net);
+-	else
+-		netif_wake_queue(net);
+-}
+-
+-void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf,
+-		  int numpkt)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) dhdp->info;
+-	struct sk_buff *skb;
+-	unsigned char *eth;
+-	uint len;
+-	void *data;
+-	struct sk_buff *pnext, *save_pktbuf;
+-	int i;
+-	dhd_if_t *ifp;
+-	wl_event_msg_t event;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	save_pktbuf = pktbuf;
+-
+-	for (i = 0; pktbuf && i < numpkt; i++, pktbuf = pnext) {
+-
+-		pnext = pktbuf->next;
+-		pktbuf->next = NULL;
+-
+-		skb = PKTTONATIVE(dhdp->osh, pktbuf);
+-
+-		/* Get the protocol, maintain skb around eth_type_trans()
+-		 * The main reason for this hack is for the limitation of
+-		 * Linux 2.4 where 'eth_type_trans' uses the
+-		 * 'net->hard_header_len'
+-		 * to perform skb_pull inside vs ETH_HLEN. Since to avoid
+-		 * coping of the packet coming from the network stack to add
+-		 * BDC, Hardware header etc, during network interface
+-		 * registration
+-		 * we set the 'net->hard_header_len' to ETH_HLEN + extra space
+-		 * required
+-		 * for BDC, Hardware header etc. and not just the ETH_HLEN
+-		 */
+-		eth = skb->data;
+-		len = skb->len;
+-
+-		ifp = dhd->iflist[ifidx];
+-		if (ifp == NULL)
+-			ifp = dhd->iflist[0];
+-
+-		ASSERT(ifp);
+-		skb->dev = ifp->net;
+-		skb->protocol = eth_type_trans(skb, skb->dev);
+-
+-		if (skb->pkt_type == PACKET_MULTICAST)
+-			dhd->pub.rx_multicast++;
+-
+-		skb->data = eth;
+-		skb->len = len;
+-
+-		/* Strip header, count, deliver upward */
+-		skb_pull(skb, ETH_HLEN);
+-
+-		/* Process special event packets and then discard them */
+-		if (ntohs(skb->protocol) == ETH_P_BRCM)
+-			dhd_wl_host_event(dhd, &ifidx,
+-					  skb_mac_header(skb),
+-					  &event, &data);
+-
+-		ASSERT(ifidx < DHD_MAX_IFS && dhd->iflist[ifidx]);
+-		if (dhd->iflist[ifidx] && !dhd->iflist[ifidx]->state)
+-			ifp = dhd->iflist[ifidx];
+-
+-		if (ifp->net)
+-			ifp->net->last_rx = jiffies;
+-
+-		dhdp->dstats.rx_bytes += skb->len;
+-		dhdp->rx_packets++;	/* Local count */
+-
+-		if (in_interrupt()) {
+-			netif_rx(skb);
+-		} else {
+-			/* If the receive is not processed inside an ISR,
+-			 * the softirqd must be woken explicitly to service
+-			 * the NET_RX_SOFTIRQ.  In 2.6 kernels, this is handled
+-			 * by netif_rx_ni(), but in earlier kernels, we need
+-			 * to do it manually.
+-			 */
+-			netif_rx_ni(skb);
+-		}
+-	}
+-}
+-
+-void dhd_event(struct dhd_info *dhd, char *evpkt, int evlen, int ifidx)
+-{
+-	/* Linux version has nothing to do */
+-	return;
+-}
+-
+-void dhd_txcomplete(dhd_pub_t *dhdp, struct sk_buff *txp, bool success)
+-{
+-	uint ifidx;
+-	dhd_info_t *dhd = (dhd_info_t *) (dhdp->info);
+-	struct ethhdr *eh;
+-	u16 type;
+-
+-	dhd_prot_hdrpull(dhdp, &ifidx, txp);
+-
+-	eh = (struct ethhdr *)(txp->data);
+-	type = ntohs(eh->h_proto);
+-
+-	if (type == ETH_P_PAE)
+-		atomic_dec(&dhd->pend_8021x_cnt);
+-
+-}
+-
+-static struct net_device_stats *dhd_get_stats(struct net_device *net)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-	dhd_if_t *ifp;
+-	int ifidx;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ifidx = dhd_net2idx(dhd, net);
+-	if (ifidx == DHD_BAD_IF)
+-		return NULL;
+-
+-	ifp = dhd->iflist[ifidx];
+-	ASSERT(dhd && ifp);
+-
+-	if (dhd->pub.up) {
+-		/* Use the protocol to get dongle stats */
+-		dhd_prot_dstats(&dhd->pub);
+-	}
+-
+-	/* Copy dongle stats to net device stats */
+-	ifp->stats.rx_packets = dhd->pub.dstats.rx_packets;
+-	ifp->stats.tx_packets = dhd->pub.dstats.tx_packets;
+-	ifp->stats.rx_bytes = dhd->pub.dstats.rx_bytes;
+-	ifp->stats.tx_bytes = dhd->pub.dstats.tx_bytes;
+-	ifp->stats.rx_errors = dhd->pub.dstats.rx_errors;
+-	ifp->stats.tx_errors = dhd->pub.dstats.tx_errors;
+-	ifp->stats.rx_dropped = dhd->pub.dstats.rx_dropped;
+-	ifp->stats.tx_dropped = dhd->pub.dstats.tx_dropped;
+-	ifp->stats.multicast = dhd->pub.dstats.multicast;
+-
+-	return &ifp->stats;
+-}
+-
+-static int dhd_watchdog_thread(void *data)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) data;
+-
+-	/* This thread doesn't need any user-level access,
+-	 * so get rid of all our resources
+-	 */
+-#ifdef DHD_SCHED
+-	if (dhd_watchdog_prio > 0) {
+-		struct sched_param param;
+-		param.sched_priority = (dhd_watchdog_prio < MAX_RT_PRIO) ?
+-		    dhd_watchdog_prio : (MAX_RT_PRIO - 1);
+-		setScheduler(current, SCHED_FIFO, &param);
+-	}
+-#endif				/* DHD_SCHED */
+-
+-	allow_signal(SIGTERM);
+-	/* Run until signal received */
+-	while (1) {
+-		if (kthread_should_stop())
+-			break;
+-		if (down_interruptible(&dhd->watchdog_sem) == 0) {
+-			if (dhd->pub.dongle_reset == false) {
+-				/* Call the bus module watchdog */
+-				dhd_bus_watchdog(&dhd->pub);
+-			}
+-			/* Count the tick for reference */
+-			dhd->pub.tickcnt++;
+-		} else
+-			break;
+-	}
+-	return 0;
+-}
+-
+-static void dhd_watchdog(unsigned long data)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) data;
+-
+-	if (dhd->watchdog_tsk) {
+-		up(&dhd->watchdog_sem);
+-
+-		/* Reschedule the watchdog */
+-		if (dhd->wd_timer_valid) {
+-			mod_timer(&dhd->timer,
+-				  jiffies + dhd_watchdog_ms * HZ / 1000);
+-		}
+-		return;
+-	}
+-
+-	/* Call the bus module watchdog */
+-	dhd_bus_watchdog(&dhd->pub);
+-
+-	/* Count the tick for reference */
+-	dhd->pub.tickcnt++;
+-
+-	/* Reschedule the watchdog */
+-	if (dhd->wd_timer_valid)
+-		mod_timer(&dhd->timer, jiffies + dhd_watchdog_ms * HZ / 1000);
+-}
+-
+-static int dhd_dpc_thread(void *data)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) data;
+-
+-	/* This thread doesn't need any user-level access,
+-	 * so get rid of all our resources
+-	 */
+-#ifdef DHD_SCHED
+-	if (dhd_dpc_prio > 0) {
+-		struct sched_param param;
+-		param.sched_priority =
+-		    (dhd_dpc_prio <
+-		     MAX_RT_PRIO) ? dhd_dpc_prio : (MAX_RT_PRIO - 1);
+-		setScheduler(current, SCHED_FIFO, &param);
+-	}
+-#endif				/* DHD_SCHED */
+-
+-	allow_signal(SIGTERM);
+-	/* Run until signal received */
+-	while (1) {
+-		if (kthread_should_stop())
+-			break;
+-		if (down_interruptible(&dhd->dpc_sem) == 0) {
+-			/* Call bus dpc unless it indicated down
+-				 (then clean stop) */
+-			if (dhd->pub.busstate != DHD_BUS_DOWN) {
+-				if (dhd_bus_dpc(dhd->pub.bus)) {
+-					up(&dhd->dpc_sem);
+-				}
+-			} else {
+-				dhd_bus_stop(dhd->pub.bus, true);
+-			}
+-		} else
+-			break;
+-	}
+-	return 0;
+-}
+-
+-static void dhd_dpc(unsigned long data)
+-{
+-	dhd_info_t *dhd;
+-
+-	dhd = (dhd_info_t *) data;
+-
+-	/* Call bus dpc unless it indicated down (then clean stop) */
+-	if (dhd->pub.busstate != DHD_BUS_DOWN) {
+-		if (dhd_bus_dpc(dhd->pub.bus))
+-			tasklet_schedule(&dhd->tasklet);
+-	} else {
+-		dhd_bus_stop(dhd->pub.bus, true);
+-	}
+-}
+-
+-void dhd_sched_dpc(dhd_pub_t *dhdp)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) dhdp->info;
+-
+-	if (dhd->dpc_tsk) {
+-		up(&dhd->dpc_sem);
+-		return;
+-	}
+-
+-	tasklet_schedule(&dhd->tasklet);
+-}
+-
+-#ifdef TOE
+-/* Retrieve current toe component enables, which are kept
+-	 as a bitmap in toe_ol iovar */
+-static int dhd_toe_get(dhd_info_t *dhd, int ifidx, u32 *toe_ol)
+-{
+-	wl_ioctl_t ioc;
+-	char buf[32];
+-	int ret;
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-
+-	ioc.cmd = WLC_GET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = (uint) sizeof(buf);
+-	ioc.set = false;
+-
+-	strcpy(buf, "toe_ol");
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		/* Check for older dongle image that doesn't support toe_ol */
+-		if (ret == -EIO) {
+-			DHD_ERROR(("%s: toe not supported by device\n",
+-				   dhd_ifname(&dhd->pub, ifidx)));
+-			return -EOPNOTSUPP;
+-		}
+-
+-		DHD_INFO(("%s: could not get toe_ol: ret=%d\n",
+-			  dhd_ifname(&dhd->pub, ifidx), ret));
+-		return ret;
+-	}
+-
+-	memcpy(toe_ol, buf, sizeof(u32));
+-	return 0;
+-}
+-
+-/* Set current toe component enables in toe_ol iovar,
+-	 and set toe global enable iovar */
+-static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol)
+-{
+-	wl_ioctl_t ioc;
+-	char buf[32];
+-	int toe, ret;
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-
+-	ioc.cmd = WLC_SET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = (uint) sizeof(buf);
+-	ioc.set = true;
+-
+-	/* Set toe_ol as requested */
+-
+-	strcpy(buf, "toe_ol");
+-	memcpy(&buf[sizeof("toe_ol")], &toe_ol, sizeof(u32));
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: could not set toe_ol: ret=%d\n",
+-			   dhd_ifname(&dhd->pub, ifidx), ret));
+-		return ret;
+-	}
+-
+-	/* Enable toe globally only if any components are enabled. */
+-
+-	toe = (toe_ol != 0);
+-
+-	strcpy(buf, "toe");
+-	memcpy(&buf[sizeof("toe")], &toe, sizeof(u32));
+-
+-	ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (ret < 0) {
+-		DHD_ERROR(("%s: could not set toe: ret=%d\n",
+-			   dhd_ifname(&dhd->pub, ifidx), ret));
+-		return ret;
+-	}
+-
+-	return 0;
+-}
+-#endif				/* TOE */
+-
+-static void dhd_ethtool_get_drvinfo(struct net_device *net,
+-				    struct ethtool_drvinfo *info)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-
+-	sprintf(info->driver, DRV_MODULE_NAME);
+-	sprintf(info->version, "%lu", dhd->pub.drv_version);
+-	sprintf(info->fw_version, "%s", wl_cfg80211_get_fwname());
+-	sprintf(info->bus_info, "%s", dev_name(&wl_cfg80211_get_sdio_func()->dev));
+-}
+-
+-struct ethtool_ops dhd_ethtool_ops = {
+-	.get_drvinfo = dhd_ethtool_get_drvinfo
+-};
+-
+-static int dhd_ethtool(dhd_info_t *dhd, void *uaddr)
+-{
+-	struct ethtool_drvinfo info;
+-	char drvname[sizeof(info.driver)];
+-	u32 cmd;
+-#ifdef TOE
+-	struct ethtool_value edata;
+-	u32 toe_cmpnt, csum_dir;
+-	int ret;
+-#endif
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* all ethtool calls start with a cmd word */
+-	if (copy_from_user(&cmd, uaddr, sizeof(u32)))
+-		return -EFAULT;
+-
+-	switch (cmd) {
+-	case ETHTOOL_GDRVINFO:
+-		/* Copy out any request driver name */
+-		if (copy_from_user(&info, uaddr, sizeof(info)))
+-			return -EFAULT;
+-		strncpy(drvname, info.driver, sizeof(info.driver));
+-		drvname[sizeof(info.driver) - 1] = '\0';
+-
+-		/* clear struct for return */
+-		memset(&info, 0, sizeof(info));
+-		info.cmd = cmd;
+-
+-		/* if dhd requested, identify ourselves */
+-		if (strcmp(drvname, "?dhd") == 0) {
+-			sprintf(info.driver, "dhd");
+-			strcpy(info.version, EPI_VERSION_STR);
+-		}
+-
+-		/* otherwise, require dongle to be up */
+-		else if (!dhd->pub.up) {
+-			DHD_ERROR(("%s: dongle is not up\n", __func__));
+-			return -ENODEV;
+-		}
+-
+-		/* finally, report dongle driver type */
+-		else if (dhd->pub.iswl)
+-			sprintf(info.driver, "wl");
+-		else
+-			sprintf(info.driver, "xx");
+-
+-		sprintf(info.version, "%lu", dhd->pub.drv_version);
+-		if (copy_to_user(uaddr, &info, sizeof(info)))
+-			return -EFAULT;
+-		DHD_CTL(("%s: given %*s, returning %s\n", __func__,
+-			 (int)sizeof(drvname), drvname, info.driver));
+-		break;
+-
+-#ifdef TOE
+-		/* Get toe offload components from dongle */
+-	case ETHTOOL_GRXCSUM:
+-	case ETHTOOL_GTXCSUM:
+-		ret = dhd_toe_get(dhd, 0, &toe_cmpnt);
+-		if (ret < 0)
+-			return ret;
+-
+-		csum_dir =
+-		    (cmd == ETHTOOL_GTXCSUM) ? TOE_TX_CSUM_OL : TOE_RX_CSUM_OL;
+-
+-		edata.cmd = cmd;
+-		edata.data = (toe_cmpnt & csum_dir) ? 1 : 0;
+-
+-		if (copy_to_user(uaddr, &edata, sizeof(edata)))
+-			return -EFAULT;
+-		break;
+-
+-		/* Set toe offload components in dongle */
+-	case ETHTOOL_SRXCSUM:
+-	case ETHTOOL_STXCSUM:
+-		if (copy_from_user(&edata, uaddr, sizeof(edata)))
+-			return -EFAULT;
+-
+-		/* Read the current settings, update and write back */
+-		ret = dhd_toe_get(dhd, 0, &toe_cmpnt);
+-		if (ret < 0)
+-			return ret;
+-
+-		csum_dir =
+-		    (cmd == ETHTOOL_STXCSUM) ? TOE_TX_CSUM_OL : TOE_RX_CSUM_OL;
+-
+-		if (edata.data != 0)
+-			toe_cmpnt |= csum_dir;
+-		else
+-			toe_cmpnt &= ~csum_dir;
+-
+-		ret = dhd_toe_set(dhd, 0, toe_cmpnt);
+-		if (ret < 0)
+-			return ret;
+-
+-		/* If setting TX checksum mode, tell Linux the new mode */
+-		if (cmd == ETHTOOL_STXCSUM) {
+-			if (edata.data)
+-				dhd->iflist[0]->net->features |=
+-				    NETIF_F_IP_CSUM;
+-			else
+-				dhd->iflist[0]->net->features &=
+-				    ~NETIF_F_IP_CSUM;
+-		}
+-
+-		break;
+-#endif				/* TOE */
+-
+-	default:
+-		return -EOPNOTSUPP;
+-	}
+-
+-	return 0;
+-}
+-
+-static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-	dhd_ioctl_t ioc;
+-	int bcmerror = 0;
+-	int buflen = 0;
+-	void *buf = NULL;
+-	uint driver = 0;
+-	int ifidx;
+-	bool is_set_key_cmd;
+-
+-	ifidx = dhd_net2idx(dhd, net);
+-	DHD_TRACE(("%s: ifidx %d, cmd 0x%04x\n", __func__, ifidx, cmd));
+-
+-	if (ifidx == DHD_BAD_IF)
+-		return -1;
+-
+-#if defined(CONFIG_WIRELESS_EXT)
+-	/* linux wireless extensions */
+-	if ((cmd >= SIOCIWFIRST) && (cmd <= SIOCIWLAST)) {
+-		/* may recurse, do NOT lock */
+-		return wl_iw_ioctl(net, ifr, cmd);
+-	}
+-#endif				/* defined(CONFIG_WIRELESS_EXT) */
+-
+-	if (cmd == SIOCETHTOOL)
+-		return dhd_ethtool(dhd, (void *)ifr->ifr_data);
+-
+-	if (cmd != SIOCDEVPRIVATE)
+-		return -EOPNOTSUPP;
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-
+-	/* Copy the ioc control structure part of ioctl request */
+-	if (copy_from_user(&ioc, ifr->ifr_data, sizeof(wl_ioctl_t))) {
+-		bcmerror = -EINVAL;
+-		goto done;
+-	}
+-
+-	/* Copy out any buffer passed */
+-	if (ioc.buf) {
+-		buflen = min_t(int, ioc.len, DHD_IOCTL_MAXLEN);
+-		/* optimization for direct ioctl calls from kernel */
+-		/*
+-		   if (segment_eq(get_fs(), KERNEL_DS)) {
+-		   buf = ioc.buf;
+-		   } else {
+-		 */
+-		{
+-			buf = kmalloc(buflen, GFP_ATOMIC);
+-			if (!buf) {
+-				bcmerror = -ENOMEM;
+-				goto done;
+-			}
+-			if (copy_from_user(buf, ioc.buf, buflen)) {
+-				bcmerror = -EINVAL;
+-				goto done;
+-			}
+-		}
+-	}
+-
+-	/* To differentiate between wl and dhd read 4 more byes */
+-	if ((copy_from_user(&driver, (char *)ifr->ifr_data + sizeof(wl_ioctl_t),
+-			    sizeof(uint)) != 0)) {
+-		bcmerror = -EINVAL;
+-		goto done;
+-	}
+-
+-	if (!capable(CAP_NET_ADMIN)) {
+-		bcmerror = -EPERM;
+-		goto done;
+-	}
+-
+-	/* check for local dhd ioctl and handle it */
+-	if (driver == DHD_IOCTL_MAGIC) {
+-		bcmerror = dhd_ioctl((void *)&dhd->pub, &ioc, buf, buflen);
+-		if (bcmerror)
+-			dhd->pub.bcmerror = bcmerror;
+-		goto done;
+-	}
+-
+-	/* send to dongle (must be up, and wl) */
+-	if ((dhd->pub.busstate != DHD_BUS_DATA)) {
+-		DHD_ERROR(("%s DONGLE_DOWN,__func__\n", __func__));
+-		bcmerror = -EIO;
+-		goto done;
+-	}
+-
+-	if (!dhd->pub.iswl) {
+-		bcmerror = -EIO;
+-		goto done;
+-	}
+-
+-	/* Intercept WLC_SET_KEY IOCTL - serialize M4 send and set key IOCTL to
+-	 * prevent M4 encryption.
+-	 */
+-	is_set_key_cmd = ((ioc.cmd == WLC_SET_KEY) ||
+-			  ((ioc.cmd == WLC_SET_VAR) &&
+-			   !(strncmp("wsec_key", ioc.buf, 9))) ||
+-			  ((ioc.cmd == WLC_SET_VAR) &&
+-			   !(strncmp("bsscfg:wsec_key", ioc.buf, 15))));
+-	if (is_set_key_cmd)
+-		dhd_wait_pend8021x(net);
+-
+-	bcmerror =
+-	    dhd_prot_ioctl(&dhd->pub, ifidx, (wl_ioctl_t *)&ioc, buf, buflen);
+-
+-done:
+-	if (!bcmerror && buf && ioc.buf) {
+-		if (copy_to_user(ioc.buf, buf, buflen))
+-			bcmerror = -EFAULT;
+-	}
+-
+-	kfree(buf);
+-
+-	if (bcmerror > 0)
+-		bcmerror = 0;
+-
+-	return bcmerror;
+-}
+-
+-static int dhd_stop(struct net_device *net)
+-{
+-#if !defined(IGNORE_ETH0_DOWN)
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-	if (IS_CFG80211_FAVORITE()) {
+-		wl_cfg80211_down();
+-	}
+-	if (dhd->pub.up == 0)
+-		return 0;
+-
+-	/* Set state and stop OS transmissions */
+-	dhd->pub.up = 0;
+-	netif_stop_queue(net);
+-#else
+-	DHD_ERROR(("BYPASS %s:due to BRCM compilation : under investigation\n",
+-		__func__));
+-#endif				/* !defined(IGNORE_ETH0_DOWN) */
+-
+-	return 0;
+-}
+-
+-static int dhd_open(struct net_device *net)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net);
+-#ifdef TOE
+-	u32 toe_ol;
+-#endif
+-	int ifidx = dhd_net2idx(dhd, net);
+-	s32 ret = 0;
+-
+-	DHD_TRACE(("%s: ifidx %d\n", __func__, ifidx));
+-
+-	if (ifidx == 0) {	/* do it only for primary eth0 */
+-
+-		/* try to bring up bus */
+-		ret = dhd_bus_start(&dhd->pub);
+-		if (ret != 0) {
+-			DHD_ERROR(("%s: failed with code %d\n", __func__, ret));
+-			return -1;
+-		}
+-		atomic_set(&dhd->pend_8021x_cnt, 0);
+-
+-		memcpy(net->dev_addr, dhd->pub.mac, ETH_ALEN);
+-
+-#ifdef TOE
+-		/* Get current TOE mode from dongle */
+-		if (dhd_toe_get(dhd, ifidx, &toe_ol) >= 0
+-		    && (toe_ol & TOE_TX_CSUM_OL) != 0)
+-			dhd->iflist[ifidx]->net->features |= NETIF_F_IP_CSUM;
+-		else
+-			dhd->iflist[ifidx]->net->features &= ~NETIF_F_IP_CSUM;
+-#endif
+-	}
+-	/* Allow transmit calls */
+-	netif_start_queue(net);
+-	dhd->pub.up = 1;
+-	if (IS_CFG80211_FAVORITE()) {
+-		if (unlikely(wl_cfg80211_up())) {
+-			DHD_ERROR(("%s: failed to bring up cfg80211\n",
+-				   __func__));
+-			return -1;
+-		}
+-	}
+-
+-	return ret;
+-}
+-
+-int
+-dhd_add_if(dhd_info_t *dhd, int ifidx, void *handle, char *name,
+-	   u8 *mac_addr, u32 flags, u8 bssidx)
+-{
+-	dhd_if_t *ifp;
+-
+-	DHD_TRACE(("%s: idx %d, handle->%p\n", __func__, ifidx, handle));
+-
+-	ASSERT(dhd && (ifidx < DHD_MAX_IFS));
+-
+-	ifp = dhd->iflist[ifidx];
+-	if (!ifp && !(ifp = kmalloc(sizeof(dhd_if_t), GFP_ATOMIC))) {
+-		DHD_ERROR(("%s: OOM - dhd_if_t\n", __func__));
+-		return -ENOMEM;
+-	}
+-
+-	memset(ifp, 0, sizeof(dhd_if_t));
+-	ifp->info = dhd;
+-	dhd->iflist[ifidx] = ifp;
+-	strlcpy(ifp->name, name, IFNAMSIZ);
+-	if (mac_addr != NULL)
+-		memcpy(&ifp->mac_addr, mac_addr, ETH_ALEN);
+-
+-	if (handle == NULL) {
+-		ifp->state = WLC_E_IF_ADD;
+-		ifp->idx = ifidx;
+-		ASSERT(dhd->sysioc_tsk);
+-		up(&dhd->sysioc_sem);
+-	} else
+-		ifp->net = (struct net_device *)handle;
+-
+-	return 0;
+-}
+-
+-void dhd_del_if(dhd_info_t *dhd, int ifidx)
+-{
+-	dhd_if_t *ifp;
+-
+-	DHD_TRACE(("%s: idx %d\n", __func__, ifidx));
+-
+-	ASSERT(dhd && ifidx && (ifidx < DHD_MAX_IFS));
+-	ifp = dhd->iflist[ifidx];
+-	if (!ifp) {
+-		DHD_ERROR(("%s: Null interface\n", __func__));
+-		return;
+-	}
+-
+-	ifp->state = WLC_E_IF_DEL;
+-	ifp->idx = ifidx;
+-	ASSERT(dhd->sysioc_tsk);
+-	up(&dhd->sysioc_sem);
+-}
+-
+-dhd_pub_t *dhd_attach(struct dhd_bus *bus, uint bus_hdrlen)
+-{
+-	dhd_info_t *dhd = NULL;
+-	struct net_device *net;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-	/* updates firmware nvram path if it was provided as module
+-		 paramters */
+-	if ((firmware_path != NULL) && (firmware_path[0] != '\0'))
+-		strcpy(fw_path, firmware_path);
+-	if ((nvram_path != NULL) && (nvram_path[0] != '\0'))
+-		strcpy(nv_path, nvram_path);
+-
+-	/* Allocate etherdev, including space for private structure */
+-	net = alloc_etherdev(sizeof(dhd));
+-	if (!net) {
+-		DHD_ERROR(("%s: OOM - alloc_etherdev\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* Allocate primary dhd_info */
+-	dhd = kzalloc(sizeof(dhd_info_t), GFP_ATOMIC);
+-	if (!dhd) {
+-		DHD_ERROR(("%s: OOM - alloc dhd_info\n", __func__));
+-		goto fail;
+-	}
+-
+-	/*
+-	 * Save the dhd_info into the priv
+-	 */
+-	memcpy(netdev_priv(net), &dhd, sizeof(dhd));
+-
+-	/* Set network interface name if it was provided as module parameter */
+-	if (iface_name[0]) {
+-		int len;
+-		char ch;
+-		strncpy(net->name, iface_name, IFNAMSIZ);
+-		net->name[IFNAMSIZ - 1] = 0;
+-		len = strlen(net->name);
+-		ch = net->name[len - 1];
+-		if ((ch > '9' || ch < '0') && (len < IFNAMSIZ - 2))
+-			strcat(net->name, "%d");
+-	}
+-
+-	if (dhd_add_if(dhd, 0, (void *)net, net->name, NULL, 0, 0) ==
+-	    DHD_BAD_IF)
+-		goto fail;
+-
+-	net->netdev_ops = NULL;
+-	sema_init(&dhd->proto_sem, 1);
+-	/* Initialize other structure content */
+-	init_waitqueue_head(&dhd->ioctl_resp_wait);
+-	init_waitqueue_head(&dhd->ctrl_wait);
+-
+-	/* Initialize the spinlocks */
+-	spin_lock_init(&dhd->sdlock);
+-	spin_lock_init(&dhd->txqlock);
+-
+-	/* Link to info module */
+-	dhd->pub.info = dhd;
+-
+-	/* Link to bus module */
+-	dhd->pub.bus = bus;
+-	dhd->pub.hdrlen = bus_hdrlen;
+-
+-	/* Attach and link in the protocol */
+-	if (dhd_prot_attach(&dhd->pub) != 0) {
+-		DHD_ERROR(("dhd_prot_attach failed\n"));
+-		goto fail;
+-	}
+-#if defined(CONFIG_WIRELESS_EXT)
+-	/* Attach and link in the iw */
+-	if (wl_iw_attach(net, (void *)&dhd->pub) != 0) {
+-		DHD_ERROR(("wl_iw_attach failed\n"));
+-		goto fail;
+-	}
+-#endif	/* defined(CONFIG_WIRELESS_EXT) */
+-
+-	/* Attach and link in the cfg80211 */
+-	if (IS_CFG80211_FAVORITE()) {
+-		if (unlikely(wl_cfg80211_attach(net, &dhd->pub))) {
+-			DHD_ERROR(("wl_cfg80211_attach failed\n"));
+-			goto fail;
+-		}
+-		if (!NO_FW_REQ()) {
+-			strcpy(fw_path, wl_cfg80211_get_fwname());
+-			strcpy(nv_path, wl_cfg80211_get_nvramname());
+-		}
+-	}
+-
+-	/* Set up the watchdog timer */
+-	init_timer(&dhd->timer);
+-	dhd->timer.data = (unsigned long) dhd;
+-	dhd->timer.function = dhd_watchdog;
+-
+-	/* Initialize thread based operation and lock */
+-	sema_init(&dhd->sdsem, 1);
+-	if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0))
+-		dhd->threads_only = true;
+-	else
+-		dhd->threads_only = false;
+-
+-	if (dhd_dpc_prio >= 0) {
+-		/* Initialize watchdog thread */
+-		sema_init(&dhd->watchdog_sem, 0);
+-		dhd->watchdog_tsk = kthread_run(dhd_watchdog_thread, dhd,
+-						"dhd_watchdog");
+-		if (IS_ERR(dhd->watchdog_tsk)) {
+-			printk(KERN_WARNING
+-				"dhd_watchdog thread failed to start\n");
+-			dhd->watchdog_tsk = NULL;
+-		}
+-	} else {
+-		dhd->watchdog_tsk = NULL;
+-	}
+-
+-	/* Set up the bottom half handler */
+-	if (dhd_dpc_prio >= 0) {
+-		/* Initialize DPC thread */
+-		sema_init(&dhd->dpc_sem, 0);
+-		dhd->dpc_tsk = kthread_run(dhd_dpc_thread, dhd, "dhd_dpc");
+-		if (IS_ERR(dhd->dpc_tsk)) {
+-			printk(KERN_WARNING
+-				"dhd_dpc thread failed to start\n");
+-			dhd->dpc_tsk = NULL;
+-		}
+-	} else {
+-		tasklet_init(&dhd->tasklet, dhd_dpc, (unsigned long) dhd);
+-		dhd->dpc_tsk = NULL;
+-	}
+-
+-	if (dhd_sysioc) {
+-		sema_init(&dhd->sysioc_sem, 0);
+-		dhd->sysioc_tsk = kthread_run(_dhd_sysioc_thread, dhd,
+-						"_dhd_sysioc");
+-		if (IS_ERR(dhd->sysioc_tsk)) {
+-			printk(KERN_WARNING
+-				"_dhd_sysioc thread failed to start\n");
+-			dhd->sysioc_tsk = NULL;
+-		}
+-	} else
+-		dhd->sysioc_tsk = NULL;
+-
+-	/*
+-	 * Save the dhd_info into the priv
+-	 */
+-	memcpy(netdev_priv(net), &dhd, sizeof(dhd));
+-
+-#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC)
+-	g_bus = bus;
+-#endif
+-#if defined(CONFIG_PM_SLEEP)
+-	atomic_set(&dhd_mmc_suspend, false);
+-	if (!IS_CFG80211_FAVORITE())
+-		register_pm_notifier(&dhd_sleep_pm_notifier);
+-#endif	/* defined(CONFIG_PM_SLEEP) */
+-	/* && defined(DHD_GPL) */
+-	/* Init lock suspend to prevent kernel going to suspend */
+-#ifdef CONFIG_HAS_EARLYSUSPEND
+-	dhd->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 20;
+-	dhd->early_suspend.suspend = dhd_early_suspend;
+-	dhd->early_suspend.resume = dhd_late_resume;
+-	register_early_suspend(&dhd->early_suspend);
+-#endif
+-
+-	return &dhd->pub;
+-
+-fail:
+-	if (net)
+-		free_netdev(net);
+-	if (dhd)
+-		dhd_detach(&dhd->pub);
+-
+-	return NULL;
+-}
+-
+-int dhd_bus_start(dhd_pub_t *dhdp)
+-{
+-	int ret = -1;
+-	dhd_info_t *dhd = (dhd_info_t *) dhdp->info;
+-#ifdef EMBEDDED_PLATFORM
+-	char iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for "event_msgs" +
+-						 '\0' + bitvec  */
+-#endif				/* EMBEDDED_PLATFORM */
+-
+-	ASSERT(dhd);
+-
+-	DHD_TRACE(("%s:\n", __func__));
+-
+-	/* try to download image and nvram to the dongle */
+-	if (dhd->pub.busstate == DHD_BUS_DOWN) {
+-		if (!(dhd_bus_download_firmware(dhd->pub.bus,
+-						fw_path, nv_path))) {
+-			DHD_ERROR(("%s: dhdsdio_probe_download failed. "
+-				"firmware = %s nvram = %s\n",
+-				__func__, fw_path, nv_path));
+-			return -1;
+-		}
+-	}
+-
+-	/* Start the watchdog timer */
+-	dhd->pub.tickcnt = 0;
+-	dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms);
+-
+-	/* Bring up the bus */
+-	ret = dhd_bus_init(&dhd->pub, true);
+-	if (ret != 0) {
+-		DHD_ERROR(("%s, dhd_bus_init failed %d\n", __func__, ret));
+-		return ret;
+-	}
+-#if defined(OOB_INTR_ONLY)
+-	/* Host registration for OOB interrupt */
+-	if (bcmsdh_register_oob_intr(dhdp)) {
+-		del_timer_sync(&dhd->timer);
+-		dhd->wd_timer_valid = false;
+-		DHD_ERROR(("%s Host failed to resgister for OOB\n", __func__));
+-		return -ENODEV;
+-	}
+-
+-	/* Enable oob at firmware */
+-	dhd_enable_oob_intr(dhd->pub.bus, true);
+-#endif				/* defined(OOB_INTR_ONLY) */
+-
+-	/* If bus is not ready, can't come up */
+-	if (dhd->pub.busstate != DHD_BUS_DATA) {
+-		del_timer_sync(&dhd->timer);
+-		dhd->wd_timer_valid = false;
+-		DHD_ERROR(("%s failed bus is not ready\n", __func__));
+-		return -ENODEV;
+-	}
+-#ifdef EMBEDDED_PLATFORM
+-	bcm_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+-		    sizeof(iovbuf));
+-	dhdcdc_query_ioctl(dhdp, 0, WLC_GET_VAR, iovbuf, sizeof(iovbuf));
+-	memcpy(dhdp->eventmask, iovbuf, WL_EVENTING_MASK_LEN);
+-
+-	setbit(dhdp->eventmask, WLC_E_SET_SSID);
+-	setbit(dhdp->eventmask, WLC_E_PRUNE);
+-	setbit(dhdp->eventmask, WLC_E_AUTH);
+-	setbit(dhdp->eventmask, WLC_E_REASSOC);
+-	setbit(dhdp->eventmask, WLC_E_REASSOC_IND);
+-	setbit(dhdp->eventmask, WLC_E_DEAUTH_IND);
+-	setbit(dhdp->eventmask, WLC_E_DISASSOC_IND);
+-	setbit(dhdp->eventmask, WLC_E_DISASSOC);
+-	setbit(dhdp->eventmask, WLC_E_JOIN);
+-	setbit(dhdp->eventmask, WLC_E_ASSOC_IND);
+-	setbit(dhdp->eventmask, WLC_E_PSK_SUP);
+-	setbit(dhdp->eventmask, WLC_E_LINK);
+-	setbit(dhdp->eventmask, WLC_E_NDIS_LINK);
+-	setbit(dhdp->eventmask, WLC_E_MIC_ERROR);
+-	setbit(dhdp->eventmask, WLC_E_PMKID_CACHE);
+-	setbit(dhdp->eventmask, WLC_E_TXFAIL);
+-	setbit(dhdp->eventmask, WLC_E_JOIN_START);
+-	setbit(dhdp->eventmask, WLC_E_SCAN_COMPLETE);
+-#ifdef PNO_SUPPORT
+-	setbit(dhdp->eventmask, WLC_E_PFN_NET_FOUND);
+-#endif				/* PNO_SUPPORT */
+-
+-/* enable dongle roaming event */
+-
+-	dhdp->pktfilter_count = 1;
+-	/* Setup filter to allow only unicast */
+-	dhdp->pktfilter[0] = "100 0 0 0 0x01 0x00";
+-#endif				/* EMBEDDED_PLATFORM */
+-
+-	/* Bus is ready, do any protocol initialization */
+-	ret = dhd_prot_init(&dhd->pub);
+-	if (ret < 0)
+-		return ret;
+-
+-	return 0;
+-}
+-
+-int
+-dhd_iovar(dhd_pub_t *pub, int ifidx, char *name, char *cmd_buf, uint cmd_len,
+-	  int set)
+-{
+-	char buf[strlen(name) + 1 + cmd_len];
+-	int len = sizeof(buf);
+-	wl_ioctl_t ioc;
+-	int ret;
+-
+-	len = bcm_mkiovar(name, cmd_buf, cmd_len, buf, len);
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-
+-	ioc.cmd = set ? WLC_SET_VAR : WLC_GET_VAR;
+-	ioc.buf = buf;
+-	ioc.len = len;
+-	ioc.set = set;
+-
+-	ret = dhd_prot_ioctl(pub, ifidx, &ioc, ioc.buf, ioc.len);
+-	if (!set && ret >= 0)
+-		memcpy(cmd_buf, buf, cmd_len);
+-
+-	return ret;
+-}
+-
+-static struct net_device_ops dhd_ops_pri = {
+-	.ndo_open = dhd_open,
+-	.ndo_stop = dhd_stop,
+-	.ndo_get_stats = dhd_get_stats,
+-	.ndo_do_ioctl = dhd_ioctl_entry,
+-	.ndo_start_xmit = dhd_start_xmit,
+-	.ndo_set_mac_address = dhd_set_mac_address,
+-	.ndo_set_multicast_list = dhd_set_multicast_list
+-};
+-
+-int dhd_net_attach(dhd_pub_t *dhdp, int ifidx)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) dhdp->info;
+-	struct net_device *net;
+-	u8 temp_addr[ETH_ALEN] = {
+-		0x00, 0x90, 0x4c, 0x11, 0x22, 0x33};
+-
+-	DHD_TRACE(("%s: ifidx %d\n", __func__, ifidx));
+-
+-	ASSERT(dhd && dhd->iflist[ifidx]);
+-
+-	net = dhd->iflist[ifidx]->net;
+-	ASSERT(net);
+-
+-	ASSERT(!net->netdev_ops);
+-	net->netdev_ops = &dhd_ops_pri;
+-
+-	/*
+-	 * We have to use the primary MAC for virtual interfaces
+-	 */
+-	if (ifidx != 0) {
+-		/* for virtual interfaces use the primary MAC  */
+-		memcpy(temp_addr, dhd->pub.mac, ETH_ALEN);
+-
+-	}
+-
+-	if (ifidx == 1) {
+-		DHD_TRACE(("%s ACCESS POINT MAC: \n", __func__));
+-		/*  ACCESSPOINT INTERFACE CASE */
+-		temp_addr[0] |= 0X02;	/* set bit 2 ,
+-			 - Locally Administered address  */
+-
+-	}
+-	net->hard_header_len = ETH_HLEN + dhd->pub.hdrlen;
+-	net->ethtool_ops = &dhd_ethtool_ops;
+-
+-	dhd->pub.rxsz = net->mtu + net->hard_header_len + dhd->pub.hdrlen;
+-
+-	memcpy(net->dev_addr, temp_addr, ETH_ALEN);
+-
+-	if (register_netdev(net) != 0) {
+-		DHD_ERROR(("%s: couldn't register the net device\n",
+-			__func__));
+-		goto fail;
+-	}
+-
+-	DHD_INFO(("%s: Broadcom Dongle Host Driver\n", net->name));
+-
+-	return 0;
+-
+-fail:
+-	net->netdev_ops = NULL;
+-	return -EBADE;
+-}
+-
+-void dhd_bus_detach(dhd_pub_t *dhdp)
+-{
+-	dhd_info_t *dhd;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (dhdp) {
+-		dhd = (dhd_info_t *) dhdp->info;
+-		if (dhd) {
+-			/* Stop the protocol module */
+-			dhd_prot_stop(&dhd->pub);
+-
+-			/* Stop the bus module */
+-			dhd_bus_stop(dhd->pub.bus, true);
+-#if defined(OOB_INTR_ONLY)
+-			bcmsdh_unregister_oob_intr();
+-#endif				/* defined(OOB_INTR_ONLY) */
+-
+-			/* Clear the watchdog timer */
+-			del_timer_sync(&dhd->timer);
+-			dhd->wd_timer_valid = false;
+-		}
+-	}
+-}
+-
+-void dhd_detach(dhd_pub_t *dhdp)
+-{
+-	dhd_info_t *dhd;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (dhdp) {
+-		dhd = (dhd_info_t *) dhdp->info;
+-		if (dhd) {
+-			dhd_if_t *ifp;
+-			int i;
+-
+-#if defined(CONFIG_HAS_EARLYSUSPEND)
+-			if (dhd->early_suspend.suspend)
+-				unregister_early_suspend(&dhd->early_suspend);
+-#endif				/* defined(CONFIG_HAS_EARLYSUSPEND) */
+-
+-			for (i = 1; i < DHD_MAX_IFS; i++)
+-				if (dhd->iflist[i])
+-					dhd_del_if(dhd, i);
+-
+-			ifp = dhd->iflist[0];
+-			ASSERT(ifp);
+-			if (ifp->net->netdev_ops == &dhd_ops_pri) {
+-				dhd_stop(ifp->net);
+-				unregister_netdev(ifp->net);
+-			}
+-
+-			if (dhd->watchdog_tsk) {
+-				send_sig(SIGTERM, dhd->watchdog_tsk, 1);
+-				kthread_stop(dhd->watchdog_tsk);
+-				dhd->watchdog_tsk = NULL;
+-			}
+-
+-			if (dhd->dpc_tsk) {
+-				send_sig(SIGTERM, dhd->dpc_tsk, 1);
+-				kthread_stop(dhd->dpc_tsk);
+-				dhd->dpc_tsk = NULL;
+-			} else
+-				tasklet_kill(&dhd->tasklet);
+-
+-			if (dhd->sysioc_tsk) {
+-				send_sig(SIGTERM, dhd->sysioc_tsk, 1);
+-				kthread_stop(dhd->sysioc_tsk);
+-				dhd->sysioc_tsk = NULL;
+-			}
+-
+-			dhd_bus_detach(dhdp);
+-
+-			if (dhdp->prot)
+-				dhd_prot_detach(dhdp);
+-
+-#if defined(CONFIG_WIRELESS_EXT)
+-			wl_iw_detach();
+-#endif				/* (CONFIG_WIRELESS_EXT) */
+-
+-			if (IS_CFG80211_FAVORITE())
+-				wl_cfg80211_detach();
+-
+-#if defined(CONFIG_PM_SLEEP)
+-			if (!IS_CFG80211_FAVORITE())
+-				unregister_pm_notifier(&dhd_sleep_pm_notifier);
+-#endif	/* defined(CONFIG_PM_SLEEP) */
+-			/* && defined(DHD_GPL) */
+-			free_netdev(ifp->net);
+-			kfree(ifp);
+-			kfree(dhd);
+-		}
+-	}
+-}
+-
+-static void __exit dhd_module_cleanup(void)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	dhd_bus_unregister();
+-#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC)
+-	wifi_del_dev();
+-#endif
+-	/* Call customer gpio to turn off power with WL_REG_ON signal */
+-	dhd_customer_gpio_wlan_ctrl(WLAN_POWER_OFF);
+-}
+-
+-static int __init dhd_module_init(void)
+-{
+-	int error;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Sanity check on the module parameters */
+-	do {
+-		/* Both watchdog and DPC as tasklets are ok */
+-		if ((dhd_watchdog_prio < 0) && (dhd_dpc_prio < 0))
+-			break;
+-
+-		/* If both watchdog and DPC are threads, TX must be deferred */
+-		if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0)
+-		    && dhd_deferred_tx)
+-			break;
+-
+-		DHD_ERROR(("Invalid module parameters.\n"));
+-		return -EINVAL;
+-	} while (0);
+-	/* Call customer gpio to turn on power with WL_REG_ON signal */
+-	dhd_customer_gpio_wlan_ctrl(WLAN_POWER_ON);
+-
+-#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC)
+-	sema_init(&wifi_control_sem, 0);
+-
+-	error = wifi_add_dev();
+-	if (error) {
+-		DHD_ERROR(("%s: platform_driver_register failed\n", __func__));
+-		goto failed;
+-	}
+-
+-	/* Waiting callback after platform_driver_register is done or
+-		 exit with error */
+-	if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) {
+-		printk(KERN_ERR "%s: platform_driver_register timeout\n",
+-			__func__);
+-		/* remove device */
+-		wifi_del_dev();
+-		goto failed;
+-	}
+-#endif	/* #if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) */
+-
+-	error = dhd_bus_register();
+-
+-	if (error) {
+-		DHD_ERROR(("%s: sdio_register_driver failed\n", __func__));
+-		goto failed;
+-	}
+-	return error;
+-
+-failed:
+-	/* turn off power and exit */
+-	dhd_customer_gpio_wlan_ctrl(WLAN_POWER_OFF);
+-	return -EINVAL;
+-}
+-
+-module_init(dhd_module_init);
+-module_exit(dhd_module_cleanup);
+-
+-/*
+- * OS specific functions required to implement DHD driver in OS independent way
+- */
+-int dhd_os_proto_block(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) (pub->info);
+-
+-	if (dhd) {
+-		down(&dhd->proto_sem);
+-		return 1;
+-	}
+-	return 0;
+-}
+-
+-int dhd_os_proto_unblock(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) (pub->info);
+-
+-	if (dhd) {
+-		up(&dhd->proto_sem);
+-		return 1;
+-	}
+-
+-	return 0;
+-}
+-
+-unsigned int dhd_os_get_ioctl_resp_timeout(void)
+-{
+-	return (unsigned int)dhd_ioctl_timeout_msec;
+-}
+-
+-void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec)
+-{
+-	dhd_ioctl_timeout_msec = (int)timeout_msec;
+-}
+-
+-int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool *pending)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) (pub->info);
+-	DECLARE_WAITQUEUE(wait, current);
+-	int timeout = dhd_ioctl_timeout_msec;
+-
+-	/* Convert timeout in millsecond to jiffies */
+-	timeout = timeout * HZ / 1000;
+-
+-	/* Wait until control frame is available */
+-	add_wait_queue(&dhd->ioctl_resp_wait, &wait);
+-	set_current_state(TASK_INTERRUPTIBLE);
+-
+-	while (!(*condition) && (!signal_pending(current) && timeout))
+-		timeout = schedule_timeout(timeout);
+-
+-	if (signal_pending(current))
+-		*pending = true;
+-
+-	set_current_state(TASK_RUNNING);
+-	remove_wait_queue(&dhd->ioctl_resp_wait, &wait);
+-
+-	return timeout;
+-}
+-
+-int dhd_os_ioctl_resp_wake(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd = (dhd_info_t *) (pub->info);
+-
+-	if (waitqueue_active(&dhd->ioctl_resp_wait))
+-		wake_up_interruptible(&dhd->ioctl_resp_wait);
+-
+-	return 0;
+-}
+-
+-void dhd_os_wd_timer(void *bus, uint wdtick)
+-{
+-	dhd_pub_t *pub = bus;
+-	static uint save_dhd_watchdog_ms;
+-	dhd_info_t *dhd = (dhd_info_t *) pub->info;
+-
+-	/* don't start the wd until fw is loaded */
+-	if (pub->busstate == DHD_BUS_DOWN)
+-		return;
+-
+-	/* Totally stop the timer */
+-	if (!wdtick && dhd->wd_timer_valid == true) {
+-		del_timer_sync(&dhd->timer);
+-		dhd->wd_timer_valid = false;
+-		save_dhd_watchdog_ms = wdtick;
+-		return;
+-	}
+-
+-	if (wdtick) {
+-		dhd_watchdog_ms = (uint) wdtick;
+-
+-		if (save_dhd_watchdog_ms != dhd_watchdog_ms) {
+-
+-			if (dhd->wd_timer_valid == true)
+-				/* Stop timer and restart at new value */
+-				del_timer_sync(&dhd->timer);
+-
+-			/* Create timer again when watchdog period is
+-			   dynamically changed or in the first instance
+-			 */
+-			dhd->timer.expires =
+-			    jiffies + dhd_watchdog_ms * HZ / 1000;
+-			add_timer(&dhd->timer);
+-
+-		} else {
+-			/* Re arm the timer, at last watchdog period */
+-			mod_timer(&dhd->timer,
+-				  jiffies + dhd_watchdog_ms * HZ / 1000);
+-		}
+-
+-		dhd->wd_timer_valid = true;
+-		save_dhd_watchdog_ms = wdtick;
+-	}
+-}
+-
+-void *dhd_os_open_image(char *filename)
+-{
+-	struct file *fp;
+-
+-	if (IS_CFG80211_FAVORITE() && !NO_FW_REQ())
+-		return wl_cfg80211_request_fw(filename);
+-
+-	fp = filp_open(filename, O_RDONLY, 0);
+-	/*
+-	 * 2.6.11 (FC4) supports filp_open() but later revs don't?
+-	 * Alternative:
+-	 * fp = open_namei(AT_FDCWD, filename, O_RD, 0);
+-	 * ???
+-	 */
+-	if (IS_ERR(fp))
+-		fp = NULL;
+-
+-	return fp;
+-}
+-
+-int dhd_os_get_image_block(char *buf, int len, void *image)
+-{
+-	struct file *fp = (struct file *)image;
+-	int rdlen;
+-
+-	if (IS_CFG80211_FAVORITE() && !NO_FW_REQ())
+-		return wl_cfg80211_read_fw(buf, len);
+-
+-	if (!image)
+-		return 0;
+-
+-	rdlen = kernel_read(fp, fp->f_pos, buf, len);
+-	if (rdlen > 0)
+-		fp->f_pos += rdlen;
+-
+-	return rdlen;
+-}
+-
+-void dhd_os_close_image(void *image)
+-{
+-	if (IS_CFG80211_FAVORITE() && !NO_FW_REQ())
+-		return wl_cfg80211_release_fw();
+-	if (image)
+-		filp_close((struct file *)image, NULL);
+-}
+-
+-void dhd_os_sdlock(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd;
+-
+-	dhd = (dhd_info_t *) (pub->info);
+-
+-	if (dhd->threads_only)
+-		down(&dhd->sdsem);
+-	else
+-		spin_lock_bh(&dhd->sdlock);
+-}
+-
+-void dhd_os_sdunlock(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd;
+-
+-	dhd = (dhd_info_t *) (pub->info);
+-
+-	if (dhd->threads_only)
+-		up(&dhd->sdsem);
+-	else
+-		spin_unlock_bh(&dhd->sdlock);
+-}
+-
+-void dhd_os_sdlock_txq(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd;
+-
+-	dhd = (dhd_info_t *) (pub->info);
+-	spin_lock_bh(&dhd->txqlock);
+-}
+-
+-void dhd_os_sdunlock_txq(dhd_pub_t *pub)
+-{
+-	dhd_info_t *dhd;
+-
+-	dhd = (dhd_info_t *) (pub->info);
+-	spin_unlock_bh(&dhd->txqlock);
+-}
+-
+-void dhd_os_sdlock_rxq(dhd_pub_t *pub)
+-{
+-}
+-
+-void dhd_os_sdunlock_rxq(dhd_pub_t *pub)
+-{
+-}
+-
+-void dhd_os_sdtxlock(dhd_pub_t *pub)
+-{
+-	dhd_os_sdlock(pub);
+-}
+-
+-void dhd_os_sdtxunlock(dhd_pub_t *pub)
+-{
+-	dhd_os_sdunlock(pub);
+-}
+-
+-static int
+-dhd_wl_host_event(dhd_info_t *dhd, int *ifidx, void *pktdata,
+-		  wl_event_msg_t *event, void **data)
+-{
+-	int bcmerror = 0;
+-
+-	ASSERT(dhd != NULL);
+-
+-	bcmerror = wl_host_event(dhd, ifidx, pktdata, event, data);
+-	if (bcmerror != 0)
+-		return bcmerror;
+-
+-#if defined(CONFIG_WIRELESS_EXT)
+-	if (!IS_CFG80211_FAVORITE()) {
+-		if ((dhd->iflist[*ifidx] == NULL)
+-		    || (dhd->iflist[*ifidx]->net == NULL)) {
+-			DHD_ERROR(("%s Exit null pointer\n", __func__));
+-			return bcmerror;
+-		}
+-
+-		if (dhd->iflist[*ifidx]->net)
+-			wl_iw_event(dhd->iflist[*ifidx]->net, event, *data);
+-	}
+-#endif				/* defined(CONFIG_WIRELESS_EXT)  */
+-
+-	if (IS_CFG80211_FAVORITE()) {
+-		ASSERT(dhd->iflist[*ifidx] != NULL);
+-		ASSERT(dhd->iflist[*ifidx]->net != NULL);
+-		if (dhd->iflist[*ifidx]->net)
+-			wl_cfg80211_event(dhd->iflist[*ifidx]->net, event,
+-					  *data);
+-	}
+-
+-	return bcmerror;
+-}
+-
+-/* send up locally generated event */
+-void dhd_sendup_event(dhd_pub_t *dhdp, wl_event_msg_t *event, void *data)
+-{
+-	switch (be32_to_cpu(event->event_type)) {
+-	default:
+-		break;
+-	}
+-}
+-
+-void dhd_wait_for_event(dhd_pub_t *dhd, bool *lockvar)
+-{
+-	struct dhd_info *dhdinfo = dhd->info;
+-	dhd_os_sdunlock(dhd);
+-	wait_event_interruptible_timeout(dhdinfo->ctrl_wait,
+-					 (*lockvar == false), HZ * 2);
+-	dhd_os_sdlock(dhd);
+-	return;
+-}
+-
+-void dhd_wait_event_wakeup(dhd_pub_t *dhd)
+-{
+-	struct dhd_info *dhdinfo = dhd->info;
+-	if (waitqueue_active(&dhdinfo->ctrl_wait))
+-		wake_up_interruptible(&dhdinfo->ctrl_wait);
+-	return;
+-}
+-
+-int dhd_dev_reset(struct net_device *dev, u8 flag)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	/* Turning off watchdog */
+-	if (flag)
+-		dhd_os_wd_timer(&dhd->pub, 0);
+-
+-	dhd_bus_devreset(&dhd->pub, flag);
+-
+-	/* Turning on watchdog back */
+-	if (!flag)
+-		dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms);
+-	DHD_ERROR(("%s:  WLAN OFF DONE\n", __func__));
+-
+-	return 1;
+-}
+-
+-int net_os_set_suspend_disable(struct net_device *dev, int val)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-	int ret = 0;
+-
+-	if (dhd) {
+-		ret = dhd->pub.suspend_disable_flag;
+-		dhd->pub.suspend_disable_flag = val;
+-	}
+-	return ret;
+-}
+-
+-int net_os_set_suspend(struct net_device *dev, int val)
+-{
+-	int ret = 0;
+-#if defined(CONFIG_HAS_EARLYSUSPEND)
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	if (dhd) {
+-		dhd_os_proto_block(&dhd->pub);
+-		ret = dhd_set_suspend(val, &dhd->pub);
+-		dhd_os_proto_unblock(&dhd->pub);
+-	}
+-#endif		/* defined(CONFIG_HAS_EARLYSUSPEND) */
+-	return ret;
+-}
+-
+-int net_os_set_dtim_skip(struct net_device *dev, int val)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev);
+-
+-	if (dhd)
+-		dhd->pub.dtim_skip = val;
+-
+-	return 0;
+-}
+-
+-int net_os_set_packet_filter(struct net_device *dev, int val)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev);
+-	int ret = 0;
+-
+-	/* Packet filtering is set only if we still in early-suspend and
+-	 * we need either to turn it ON or turn it OFF
+-	 * We can always turn it OFF in case of early-suspend, but we turn it
+-	 * back ON only if suspend_disable_flag was not set
+-	 */
+-	if (dhd && dhd->pub.up) {
+-		dhd_os_proto_block(&dhd->pub);
+-		if (dhd->pub.in_suspend) {
+-			if (!val || (val && !dhd->pub.suspend_disable_flag))
+-				dhd_set_packet_filter(val, &dhd->pub);
+-		}
+-		dhd_os_proto_unblock(&dhd->pub);
+-	}
+-	return ret;
+-}
+-
+-void dhd_dev_init_ioctl(struct net_device *dev)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	dhd_preinit_ioctls(&dhd->pub);
+-}
+-
+-#ifdef PNO_SUPPORT
+-/* Linux wrapper to call common dhd_pno_clean */
+-int dhd_dev_pno_reset(struct net_device *dev)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	return dhd_pno_clean(&dhd->pub);
+-}
+-
+-/* Linux wrapper to call common dhd_pno_enable */
+-int dhd_dev_pno_enable(struct net_device *dev, int pfn_enabled)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	return dhd_pno_enable(&dhd->pub, pfn_enabled);
+-}
+-
+-/* Linux wrapper to call common dhd_pno_set */
+-int
+-dhd_dev_pno_set(struct net_device *dev, wlc_ssid_t *ssids_local, int nssid,
+-		unsigned char scan_fr)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	return dhd_pno_set(&dhd->pub, ssids_local, nssid, scan_fr);
+-}
+-
+-/* Linux wrapper to get  pno status */
+-int dhd_dev_get_pno_status(struct net_device *dev)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-
+-	return dhd_pno_get_status(&dhd->pub);
+-}
+-
+-#endif				/* PNO_SUPPORT */
+-
+-static int dhd_get_pend_8021x_cnt(dhd_info_t *dhd)
+-{
+-	return atomic_read(&dhd->pend_8021x_cnt);
+-}
+-
+-#define MAX_WAIT_FOR_8021X_TX	10
+-
+-int dhd_wait_pend8021x(struct net_device *dev)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev);
+-	int timeout = 10 * HZ / 1000;
+-	int ntimes = MAX_WAIT_FOR_8021X_TX;
+-	int pend = dhd_get_pend_8021x_cnt(dhd);
+-
+-	while (ntimes && pend) {
+-		if (pend) {
+-			set_current_state(TASK_INTERRUPTIBLE);
+-			schedule_timeout(timeout);
+-			set_current_state(TASK_RUNNING);
+-			ntimes--;
+-		}
+-		pend = dhd_get_pend_8021x_cnt(dhd);
+-	}
+-	return pend;
+-}
+-
+-void wl_os_wd_timer(struct net_device *ndev, uint wdtick)
+-{
+-	dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(ndev);
+-
+-	dhd_os_wd_timer(&dhd->pub, wdtick);
+-}
+-
+-#ifdef DHD_DEBUG
+-int write_to_file(dhd_pub_t *dhd, u8 *buf, int size)
+-{
+-	int ret = 0;
+-	struct file *fp;
+-	mm_segment_t old_fs;
+-	loff_t pos = 0;
+-
+-	/* change to KERNEL_DS address limit */
+-	old_fs = get_fs();
+-	set_fs(KERNEL_DS);
+-
+-	/* open file to write */
+-	fp = filp_open("/tmp/mem_dump", O_WRONLY | O_CREAT, 0640);
+-	if (!fp) {
+-		DHD_ERROR(("%s: open file error\n", __func__));
+-		ret = -1;
+-		goto exit;
+-	}
+-
+-	/* Write buf to file */
+-	fp->f_op->write(fp, buf, size, &pos);
+-
+-exit:
+-	/* free buf before return */
+-	kfree(buf);
+-	/* close file before return */
+-	if (fp)
+-		filp_close(fp, current->files);
+-	/* restore previous address limit */
+-	set_fs(old_fs);
+-
+-	return ret;
+-}
+-#endif				/* DHD_DEBUG */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c
+deleted file mode 100644
+index c66f1c2..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c
++++ /dev/null
+@@ -1,25 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/kernel.h>
+-#include <linux/module.h>
+-#include <linux/sched.h>
+-
+-int setScheduler(struct task_struct *p, int policy, struct sched_param *param)
+-{
+-	int rc = 0;
+-	rc = sched_setscheduler(p, policy, param);
+-	return rc;
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h
+deleted file mode 100644
+index 030d5ff..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h
++++ /dev/null
+@@ -1,90 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _dhd_proto_h_
+-#define _dhd_proto_h_
+-
+-#include <dhdioctl.h>
+-#include <wlioctl.h>
+-
+-#ifndef IOCTL_RESP_TIMEOUT
+-#define IOCTL_RESP_TIMEOUT  2000	/* In milli second */
+-#endif
+-
+-#ifndef IOCTL_CHIP_ACTIVE_TIMEOUT
+-#define IOCTL_CHIP_ACTIVE_TIMEOUT  10	/* In milli second */
+-#endif
+-
+-/*
+- * Exported from the dhd protocol module (dhd_cdc, dhd_rndis)
+- */
+-
+-/* Linkage, sets prot link and updates hdrlen in pub */
+-extern int dhd_prot_attach(dhd_pub_t *dhdp);
+-
+-/* Unlink, frees allocated protocol memory (including dhd_prot) */
+-extern void dhd_prot_detach(dhd_pub_t *dhdp);
+-
+-/* Initialize protocol: sync w/dongle state.
+- * Sets dongle media info (iswl, drv_version, mac address).
+- */
+-extern int dhd_prot_init(dhd_pub_t *dhdp);
+-
+-/* Stop protocol: sync w/dongle state. */
+-extern void dhd_prot_stop(dhd_pub_t *dhdp);
+-
+-/* Add any protocol-specific data header.
+- * Caller must reserve prot_hdrlen prepend space.
+- */
+-extern void dhd_prot_hdrpush(dhd_pub_t *, int ifidx, struct sk_buff *txp);
+-
+-/* Remove any protocol-specific data header. */
+-extern int dhd_prot_hdrpull(dhd_pub_t *, int *ifidx, struct sk_buff *rxp);
+-
+-/* Use protocol to issue ioctl to dongle */
+-extern int dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc,
+-			  void *buf, int len);
+-
+-/* Check for and handle local prot-specific iovar commands */
+-extern int dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name,
+-			     void *params, int plen, void *arg, int len,
+-			     bool set);
+-
+-/* Add prot dump output to a buffer */
+-extern void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf);
+-
+-/* Update local copy of dongle statistics */
+-extern void dhd_prot_dstats(dhd_pub_t *dhdp);
+-
+-extern int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf,
+-		     uint buflen);
+-
+-extern int dhd_preinit_ioctls(dhd_pub_t *dhd);
+-
+-/********************************
+- * For version-string expansion *
+- */
+-#if defined(BDC)
+-#define DHD_PROTOCOL "bdc"
+-#elif defined(CDC)
+-#define DHD_PROTOCOL "cdc"
+-#elif defined(RNDIS)
+-#define DHD_PROTOCOL "rndis"
+-#else
+-#define DHD_PROTOCOL "unknown"
+-#endif				/* proto */
+-
+-#endif				/* _dhd_proto_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
+deleted file mode 100644
+index a71c6f8..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c
++++ /dev/null
+@@ -1,6390 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/types.h>
+-#include <linux/kernel.h>
+-#include <linux/printk.h>
+-#include <linux/pci_ids.h>
+-#include <linux/netdevice.h>
+-#include <bcmdefs.h>
+-#include <bcmsdh.h>
+-
+-#ifdef BCMEMBEDIMAGE
+-#include BCMEMBEDIMAGE
+-#endif				/* BCMEMBEDIMAGE */
+-
+-#include <bcmdefs.h>
+-#include <bcmutils.h>
+-#include <bcmdevs.h>
+-
+-#include <hndsoc.h>
+-#ifdef DHD_DEBUG
+-#include <hndrte_armtrap.h>
+-#include <hndrte_cons.h>
+-#endif				/* DHD_DEBUG */
+-#include <sbchipc.h>
+-#include <sbhnddma.h>
+-
+-#include <sdio.h>
+-#include <sbsdio.h>
+-#include <sbsdpcmdev.h>
+-#include <bcmsdpcm.h>
+-
+-#include <proto/802.11.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhd_bus.h>
+-#include <dhd_proto.h>
+-#include <dhd_dbg.h>
+-#include <dhdioctl.h>
+-#include <sdiovar.h>
+-#include <bcmchip.h>
+-
+-#ifndef DHDSDIO_MEM_DUMP_FNAME
+-#define DHDSDIO_MEM_DUMP_FNAME         "mem_dump"
+-#endif
+-
+-#define TXQLEN		2048	/* bulk tx queue length */
+-#define TXHI		(TXQLEN - 256)	/* turn on flow control above TXHI */
+-#define TXLOW		(TXHI - 256)	/* turn off flow control below TXLOW */
+-#define PRIOMASK	7
+-
+-#define TXRETRIES	2	/* # of retries for tx frames */
+-
+-#if defined(CONFIG_MACH_SANDGATE2G)
+-#define DHD_RXBOUND	250	/* Default for max rx frames in
+-				 one scheduling */
+-#else
+-#define DHD_RXBOUND	50	/* Default for max rx frames in
+-				 one scheduling */
+-#endif				/* defined(CONFIG_MACH_SANDGATE2G) */
+-
+-#define DHD_TXBOUND	20	/* Default for max tx frames in
+-				 one scheduling */
+-
+-#define DHD_TXMINMAX	1	/* Max tx frames if rx still pending */
+-
+-#define MEMBLOCK	2048	/* Block size used for downloading
+-				 of dongle image */
+-#define MAX_DATA_BUF	(32 * 1024)	/* Must be large enough to hold
+-				 biggest possible glom */
+-
+-/* Packet alignment for most efficient SDIO (can change based on platform) */
+-#ifndef DHD_SDALIGN
+-#define DHD_SDALIGN	32
+-#endif
+-#if !ISPOWEROF2(DHD_SDALIGN)
+-#error DHD_SDALIGN is not a power of 2!
+-#endif
+-
+-#ifndef DHD_FIRSTREAD
+-#define DHD_FIRSTREAD	32
+-#endif
+-#if !ISPOWEROF2(DHD_FIRSTREAD)
+-#error DHD_FIRSTREAD is not a power of 2!
+-#endif
+-
+-/* Total length of frame header for dongle protocol */
+-#define SDPCM_HDRLEN	(SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
+-#ifdef SDTEST
+-#define SDPCM_RESERVE	(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN)
+-#else
+-#define SDPCM_RESERVE	(SDPCM_HDRLEN + DHD_SDALIGN)
+-#endif
+-
+-/* Space for header read, limit for data packets */
+-#ifndef MAX_HDR_READ
+-#define MAX_HDR_READ	32
+-#endif
+-#if !ISPOWEROF2(MAX_HDR_READ)
+-#error MAX_HDR_READ is not a power of 2!
+-#endif
+-
+-#define MAX_RX_DATASZ	2048
+-
+-/* Maximum milliseconds to wait for F2 to come up */
+-#define DHD_WAIT_F2RDY	3000
+-
+-/* Bump up limit on waiting for HT to account for first startup;
+- * if the image is doing a CRC calculation before programming the PMU
+- * for HT availability, it could take a couple hundred ms more, so
+- * max out at a 1 second (1000000us).
+- */
+-#if (PMU_MAX_TRANSITION_DLY <= 1000000)
+-#undef PMU_MAX_TRANSITION_DLY
+-#define PMU_MAX_TRANSITION_DLY 1000000
+-#endif
+-
+-/* Value for ChipClockCSR during initial setup */
+-#define DHD_INIT_CLKCTL1	(SBSDIO_FORCE_HW_CLKREQ_OFF |	\
+-					SBSDIO_ALP_AVAIL_REQ)
+-#define DHD_INIT_CLKCTL2	(SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP)
+-
+-/* Flags for SDH calls */
+-#define F2SYNC	(SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
+-
+-/*
+- * Conversion of 802.1D priority to precedence level
+- */
+-#define PRIO2PREC(prio) \
+-	(((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \
+-	((prio^2)) : (prio))
+-
+-DHD_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep);
+-extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf,
+-			    uint len);
+-
+-#ifdef DHD_DEBUG
+-/* Device console log buffer state */
+-typedef struct dhd_console {
+-	uint count;		/* Poll interval msec counter */
+-	uint log_addr;		/* Log struct address (fixed) */
+-	hndrte_log_t log;	/* Log struct (host copy) */
+-	uint bufsize;		/* Size of log buffer */
+-	u8 *buf;		/* Log buffer (host copy) */
+-	uint last;		/* Last buffer read index */
+-} dhd_console_t;
+-#endif				/* DHD_DEBUG */
+-
+-/* misc chip info needed by some of the routines */
+-struct chip_info {
+-	u32 chip;
+-	u32 chiprev;
+-	u32 cccorebase;
+-	u32 ccrev;
+-	u32 cccaps;
+-	u32 buscorebase;
+-	u32 buscorerev;
+-	u32 buscoretype;
+-	u32 ramcorebase;
+-	u32 armcorebase;
+-	u32 pmurev;
+-	u32 ramsize;
+-};
+-
+-/* Private data for SDIO bus interaction */
+-typedef struct dhd_bus {
+-	dhd_pub_t *dhd;
+-
+-	bcmsdh_info_t *sdh;	/* Handle for BCMSDH calls */
+-	struct chip_info *ci;	/* Chip info struct */
+-	char *vars;		/* Variables (from CIS and/or other) */
+-	uint varsz;		/* Size of variables buffer */
+-	u32 sbaddr;		/* Current SB window pointer (-1, invalid) */
+-
+-	sdpcmd_regs_t *regs;	/* Registers for SDIO core */
+-	uint sdpcmrev;		/* SDIO core revision */
+-	uint armrev;		/* CPU core revision */
+-	uint ramrev;		/* SOCRAM core revision */
+-	u32 ramsize;		/* Size of RAM in SOCRAM (bytes) */
+-	u32 orig_ramsize;	/* Size of RAM in SOCRAM (bytes) */
+-
+-	u32 bus;		/* gSPI or SDIO bus */
+-	u32 hostintmask;	/* Copy of Host Interrupt Mask */
+-	u32 intstatus;	/* Intstatus bits (events) pending */
+-	bool dpc_sched;		/* Indicates DPC schedule (intrpt rcvd) */
+-	bool fcstate;		/* State of dongle flow-control */
+-
+-	u16 cl_devid;	/* cached devid for dhdsdio_probe_attach() */
+-	char *fw_path;		/* module_param: path to firmware image */
+-	char *nv_path;		/* module_param: path to nvram vars file */
+-	const char *nvram_params;	/* user specified nvram params. */
+-
+-	uint blocksize;		/* Block size of SDIO transfers */
+-	uint roundup;		/* Max roundup limit */
+-
+-	struct pktq txq;	/* Queue length used for flow-control */
+-	u8 flowcontrol;	/* per prio flow control bitmask */
+-	u8 tx_seq;		/* Transmit sequence number (next) */
+-	u8 tx_max;		/* Maximum transmit sequence allowed */
+-
+-	u8 hdrbuf[MAX_HDR_READ + DHD_SDALIGN];
+-	u8 *rxhdr;		/* Header of current rx frame (in hdrbuf) */
+-	u16 nextlen;		/* Next Read Len from last header */
+-	u8 rx_seq;		/* Receive sequence number (expected) */
+-	bool rxskip;		/* Skip receive (awaiting NAK ACK) */
+-
+-	struct sk_buff *glomd;	/* Packet containing glomming descriptor */
+-	struct sk_buff *glom;	/* Packet chain for glommed superframe */
+-	uint glomerr;		/* Glom packet read errors */
+-
+-	u8 *rxbuf;		/* Buffer for receiving control packets */
+-	uint rxblen;		/* Allocated length of rxbuf */
+-	u8 *rxctl;		/* Aligned pointer into rxbuf */
+-	u8 *databuf;		/* Buffer for receiving big glom packet */
+-	u8 *dataptr;		/* Aligned pointer into databuf */
+-	uint rxlen;		/* Length of valid data in buffer */
+-
+-	u8 sdpcm_ver;	/* Bus protocol reported by dongle */
+-
+-	bool intr;		/* Use interrupts */
+-	bool poll;		/* Use polling */
+-	bool ipend;		/* Device interrupt is pending */
+-	bool intdis;		/* Interrupts disabled by isr */
+-	uint intrcount;		/* Count of device interrupt callbacks */
+-	uint lastintrs;		/* Count as of last watchdog timer */
+-	uint spurious;		/* Count of spurious interrupts */
+-	uint pollrate;		/* Ticks between device polls */
+-	uint polltick;		/* Tick counter */
+-	uint pollcnt;		/* Count of active polls */
+-
+-#ifdef DHD_DEBUG
+-	dhd_console_t console;	/* Console output polling support */
+-	uint console_addr;	/* Console address from shared struct */
+-#endif				/* DHD_DEBUG */
+-
+-	uint regfails;		/* Count of R_REG/W_REG failures */
+-
+-	uint clkstate;		/* State of sd and backplane clock(s) */
+-	bool activity;		/* Activity flag for clock down */
+-	s32 idletime;		/* Control for activity timeout */
+-	s32 idlecount;	/* Activity timeout counter */
+-	s32 idleclock;	/* How to set bus driver when idle */
+-	s32 sd_divisor;	/* Speed control to bus driver */
+-	s32 sd_mode;		/* Mode control to bus driver */
+-	s32 sd_rxchain;	/* If bcmsdh api accepts PKT chains */
+-	bool use_rxchain;	/* If dhd should use PKT chains */
+-	bool sleeping;		/* Is SDIO bus sleeping? */
+-	bool rxflow_mode;	/* Rx flow control mode */
+-	bool rxflow;		/* Is rx flow control on */
+-	uint prev_rxlim_hit;	/* Is prev rx limit exceeded
+-					 (per dpc schedule) */
+-	bool alp_only;		/* Don't use HT clock (ALP only) */
+-/* Field to decide if rx of control frames happen in rxbuf or lb-pool */
+-	bool usebufpool;
+-
+-#ifdef SDTEST
+-	/* external loopback */
+-	bool ext_loop;
+-	u8 loopid;
+-
+-	/* pktgen configuration */
+-	uint pktgen_freq;	/* Ticks between bursts */
+-	uint pktgen_count;	/* Packets to send each burst */
+-	uint pktgen_print;	/* Bursts between count displays */
+-	uint pktgen_total;	/* Stop after this many */
+-	uint pktgen_minlen;	/* Minimum packet data len */
+-	uint pktgen_maxlen;	/* Maximum packet data len */
+-	uint pktgen_mode;	/* Configured mode: tx, rx, or echo */
+-	uint pktgen_stop;	/* Number of tx failures causing stop */
+-
+-	/* active pktgen fields */
+-	uint pktgen_tick;	/* Tick counter for bursts */
+-	uint pktgen_ptick;	/* Burst counter for printing */
+-	uint pktgen_sent;	/* Number of test packets generated */
+-	uint pktgen_rcvd;	/* Number of test packets received */
+-	uint pktgen_fail;	/* Number of failed send attempts */
+-	u16 pktgen_len;	/* Length of next packet to send */
+-#endif				/* SDTEST */
+-
+-	/* Some additional counters */
+-	uint tx_sderrs;		/* Count of tx attempts with sd errors */
+-	uint fcqueued;		/* Tx packets that got queued */
+-	uint rxrtx;		/* Count of rtx requests (NAK to dongle) */
+-	uint rx_toolong;	/* Receive frames too long to receive */
+-	uint rxc_errors;	/* SDIO errors when reading control frames */
+-	uint rx_hdrfail;	/* SDIO errors on header reads */
+-	uint rx_badhdr;		/* Bad received headers (roosync?) */
+-	uint rx_badseq;		/* Mismatched rx sequence number */
+-	uint fc_rcvd;		/* Number of flow-control events received */
+-	uint fc_xoff;		/* Number which turned on flow-control */
+-	uint fc_xon;		/* Number which turned off flow-control */
+-	uint rxglomfail;	/* Failed deglom attempts */
+-	uint rxglomframes;	/* Number of glom frames (superframes) */
+-	uint rxglompkts;	/* Number of packets from glom frames */
+-	uint f2rxhdrs;		/* Number of header reads */
+-	uint f2rxdata;		/* Number of frame data reads */
+-	uint f2txdata;		/* Number of f2 frame writes */
+-	uint f1regdata;		/* Number of f1 register accesses */
+-
+-	u8 *ctrl_frame_buf;
+-	u32 ctrl_frame_len;
+-	bool ctrl_frame_stat;
+-} dhd_bus_t;
+-
+-/* clkstate */
+-#define CLK_NONE	0
+-#define CLK_SDONLY	1
+-#define CLK_PENDING	2	/* Not used yet */
+-#define CLK_AVAIL	3
+-
+-#define DHD_NOPMU(dhd)	(false)
+-
+-#ifdef DHD_DEBUG
+-static int qcount[NUMPRIO];
+-static int tx_packets[NUMPRIO];
+-#endif				/* DHD_DEBUG */
+-
+-/* Deferred transmit */
+-const uint dhd_deferred_tx = 1;
+-
+-extern uint dhd_watchdog_ms;
+-extern void dhd_os_wd_timer(void *bus, uint wdtick);
+-
+-/* Tx/Rx bounds */
+-uint dhd_txbound;
+-uint dhd_rxbound;
+-uint dhd_txminmax;
+-
+-/* override the RAM size if possible */
+-#define DONGLE_MIN_MEMSIZE (128 * 1024)
+-int dhd_dongle_memsize;
+-
+-static bool dhd_alignctl;
+-
+-static bool sd1idle;
+-
+-static bool retrydata;
+-#define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata)
+-
+-static const uint watermark = 8;
+-static const uint firstread = DHD_FIRSTREAD;
+-
+-#define HDATLEN (firstread - (SDPCM_HDRLEN))
+-
+-/* Retry count for register access failures */
+-static const uint retry_limit = 2;
+-
+-/* Force even SD lengths (some host controllers mess up on odd bytes) */
+-static bool forcealign;
+-
+-#define ALIGNMENT  4
+-
+-#if defined(OOB_INTR_ONLY) && defined(HW_OOB)
+-extern void bcmsdh_enable_hw_oob_intr(void *sdh, bool enable);
+-#endif
+-
+-#if defined(OOB_INTR_ONLY) && defined(SDIO_ISR_THREAD)
+-#error OOB_INTR_ONLY is NOT working with SDIO_ISR_THREAD
+-#endif	/* defined(OOB_INTR_ONLY) && defined(SDIO_ISR_THREAD) */
+-#define PKTALIGN(_p, _len, _align)				\
+-	do {								\
+-		uint datalign;						\
+-		datalign = (unsigned long)((_p)->data);			\
+-		datalign = roundup(datalign, (_align)) - datalign;	\
+-		ASSERT(datalign < (_align));				\
+-		ASSERT((_p)->len >= ((_len) + datalign));		\
+-		if (datalign)						\
+-			skb_pull((_p), datalign);			\
+-		__skb_trim((_p), (_len));				\
+-	} while (0)
+-
+-/* Limit on rounding up frames */
+-static const uint max_roundup = 512;
+-
+-/* Try doing readahead */
+-static bool dhd_readahead;
+-
+-/* To check if there's window offered */
+-#define DATAOK(bus) \
+-	(((u8)(bus->tx_max - bus->tx_seq) != 0) && \
+-	(((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0))
+-
+-/* Macros to get register read/write status */
+-/* NOTE: these assume a local dhdsdio_bus_t *bus! */
+-#define R_SDREG(regvar, regaddr, retryvar) \
+-do { \
+-	retryvar = 0; \
+-	do { \
+-		regvar = R_REG(regaddr); \
+-	} while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
+-	if (retryvar) { \
+-		bus->regfails += (retryvar-1); \
+-		if (retryvar > retry_limit) { \
+-			DHD_ERROR(("%s: FAILED" #regvar "READ, LINE %d\n", \
+-			__func__, __LINE__)); \
+-			regvar = 0; \
+-		} \
+-	} \
+-} while (0)
+-
+-#define W_SDREG(regval, regaddr, retryvar) \
+-do { \
+-	retryvar = 0; \
+-	do { \
+-		W_REG(regaddr, regval); \
+-	} while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \
+-	if (retryvar) { \
+-		bus->regfails += (retryvar-1); \
+-		if (retryvar > retry_limit) \
+-			DHD_ERROR(("%s: FAILED REGISTER WRITE, LINE %d\n", \
+-			__func__, __LINE__)); \
+-	} \
+-} while (0)
+-
+-#define DHD_BUS			SDIO_BUS
+-
+-#define PKT_AVAILABLE()		(intstatus & I_HMB_FRAME_IND)
+-
+-#define HOSTINTMASK		(I_HMB_SW_MASK | I_CHIPACTIVE)
+-
+-#ifdef SDTEST
+-static void dhdsdio_testrcv(dhd_bus_t *bus, void *pkt, uint seq);
+-static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start);
+-#endif
+-
+-#ifdef DHD_DEBUG
+-static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size);
+-static int dhdsdio_mem_dump(dhd_bus_t *bus);
+-#endif				/* DHD_DEBUG  */
+-static int dhdsdio_download_state(dhd_bus_t *bus, bool enter);
+-
+-static void dhdsdio_release(dhd_bus_t *bus);
+-static void dhdsdio_release_malloc(dhd_bus_t *bus);
+-static void dhdsdio_disconnect(void *ptr);
+-static bool dhdsdio_chipmatch(u16 chipid);
+-static bool dhdsdio_probe_attach(dhd_bus_t *bus, void *sdh,
+-				 void *regsva, u16 devid);
+-static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh);
+-static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh);
+-static void dhdsdio_release_dongle(dhd_bus_t *bus);
+-
+-static uint process_nvram_vars(char *varbuf, uint len);
+-
+-static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size);
+-static int dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn,
+-			       uint flags, u8 *buf, uint nbytes,
+-			       struct sk_buff *pkt, bcmsdh_cmplt_fn_t complete,
+-			       void *handle);
+-
+-static bool dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh);
+-static int _dhdsdio_download_firmware(struct dhd_bus *bus);
+-
+-static int dhdsdio_download_code_file(struct dhd_bus *bus, char *image_path);
+-static int dhdsdio_download_nvram(struct dhd_bus *bus);
+-#ifdef BCMEMBEDIMAGE
+-static int dhdsdio_download_code_array(struct dhd_bus *bus);
+-#endif
+-static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase);
+-static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs);
+-static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase);
+-static void dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus,
+-					u32 drivestrength);
+-static void dhdsdio_chip_detach(struct dhd_bus *bus);
+-
+-/* Packet free applicable unconditionally for sdio and sdspi.
+- * Conditional if bufpool was present for gspi bus.
+- */
+-static void dhdsdio_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt)
+-{
+-	dhd_os_sdlock_rxq(bus->dhd);
+-	if ((bus->bus != SPI_BUS) || bus->usebufpool)
+-		bcm_pkt_buf_free_skb(pkt);
+-	dhd_os_sdunlock_rxq(bus->dhd);
+-}
+-
+-static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size)
+-{
+-	s32 min_size = DONGLE_MIN_MEMSIZE;
+-	/* Restrict the memsize to user specified limit */
+-	DHD_ERROR(("user: Restrict the dongle ram size to %d, min %d\n",
+-		dhd_dongle_memsize, min_size));
+-	if ((dhd_dongle_memsize > min_size) &&
+-	    (dhd_dongle_memsize < (s32) bus->orig_ramsize))
+-		bus->ramsize = dhd_dongle_memsize;
+-}
+-
+-static int dhdsdio_set_siaddr_window(dhd_bus_t *bus, u32 address)
+-{
+-	int err = 0;
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW,
+-			 (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err);
+-	if (!err)
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID,
+-				 (address >> 16) & SBSDIO_SBADDRMID_MASK, &err);
+-	if (!err)
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH,
+-				 (address >> 24) & SBSDIO_SBADDRHIGH_MASK,
+-				 &err);
+-	return err;
+-}
+-
+-/* Turn backplane clock on or off */
+-static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok)
+-{
+-	int err;
+-	u8 clkctl, clkreq, devctl;
+-	bcmsdh_info_t *sdh;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-#if defined(OOB_INTR_ONLY)
+-	pendok = false;
+-#endif
+-	clkctl = 0;
+-	sdh = bus->sdh;
+-
+-	if (on) {
+-		/* Request HT Avail */
+-		clkreq =
+-		    bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
+-
+-		if ((bus->ci->chip == BCM4329_CHIP_ID)
+-		    && (bus->ci->chiprev == 0))
+-			clkreq |= SBSDIO_FORCE_ALP;
+-
+-		bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 clkreq, &err);
+-		if (err) {
+-			DHD_ERROR(("%s: HT Avail request error: %d\n",
+-				   __func__, err));
+-			return -EBADE;
+-		}
+-
+-		if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID)
+-			       && (bus->ci->buscorerev == 9))) {
+-			u32 dummy, retries;
+-			R_SDREG(dummy, &bus->regs->clockctlstatus, retries);
+-		}
+-
+-		/* Check current status */
+-		clkctl =
+-		    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				    &err);
+-		if (err) {
+-			DHD_ERROR(("%s: HT Avail read error: %d\n",
+-				   __func__, err));
+-			return -EBADE;
+-		}
+-
+-		/* Go to pending and await interrupt if appropriate */
+-		if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
+-			/* Allow only clock-available interrupt */
+-			devctl =
+-			    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					    &err);
+-			if (err) {
+-				DHD_ERROR(("%s: Devctl error setting CA: %d\n",
+-					__func__, err));
+-				return -EBADE;
+-			}
+-
+-			devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					 devctl, &err);
+-			DHD_INFO(("CLKCTL: set PENDING\n"));
+-			bus->clkstate = CLK_PENDING;
+-
+-			return 0;
+-		} else if (bus->clkstate == CLK_PENDING) {
+-			/* Cancel CA-only interrupt filter */
+-			devctl =
+-			    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					    &err);
+-			devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					 devctl, &err);
+-		}
+-
+-		/* Otherwise, wait here (polling) for HT Avail */
+-		if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
+-			SPINWAIT_SLEEP(sdioh_spinwait_sleep,
+-				       ((clkctl =
+-					 bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						 SBSDIO_FUNC1_CHIPCLKCSR,
+-							 &err)),
+-					!SBSDIO_CLKAV(clkctl, bus->alp_only)),
+-				       PMU_MAX_TRANSITION_DLY);
+-		}
+-		if (err) {
+-			DHD_ERROR(("%s: HT Avail request error: %d\n",
+-				   __func__, err));
+-			return -EBADE;
+-		}
+-		if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
+-			DHD_ERROR(("%s: HT Avail timeout (%d): clkctl 0x%02x\n",
+-				   __func__, PMU_MAX_TRANSITION_DLY, clkctl));
+-			return -EBADE;
+-		}
+-
+-		/* Mark clock available */
+-		bus->clkstate = CLK_AVAIL;
+-		DHD_INFO(("CLKCTL: turned ON\n"));
+-
+-#if defined(DHD_DEBUG)
+-		if (bus->alp_only == true) {
+-#if !defined(BCMLXSDMMC)
+-			if (!SBSDIO_ALPONLY(clkctl)) {
+-				DHD_ERROR(("%s: HT Clock, when ALP Only\n",
+-					   __func__));
+-			}
+-#endif				/* !defined(BCMLXSDMMC) */
+-		} else {
+-			if (SBSDIO_ALPONLY(clkctl)) {
+-				DHD_ERROR(("%s: HT Clock should be on.\n",
+-					   __func__));
+-			}
+-		}
+-#endif				/* defined (DHD_DEBUG) */
+-
+-		bus->activity = true;
+-	} else {
+-		clkreq = 0;
+-
+-		if (bus->clkstate == CLK_PENDING) {
+-			/* Cancel CA-only interrupt filter */
+-			devctl =
+-			    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					    &err);
+-			devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					 devctl, &err);
+-		}
+-
+-		bus->clkstate = CLK_SDONLY;
+-		bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 clkreq, &err);
+-		DHD_INFO(("CLKCTL: turned OFF\n"));
+-		if (err) {
+-			DHD_ERROR(("%s: Failed access turning clock off: %d\n",
+-				   __func__, err));
+-			return -EBADE;
+-		}
+-	}
+-	return 0;
+-}
+-
+-/* Change idle/active SD state */
+-static int dhdsdio_sdclk(dhd_bus_t *bus, bool on)
+-{
+-	int err;
+-	s32 iovalue;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (on) {
+-		if (bus->idleclock == DHD_IDLE_STOP) {
+-			/* Turn on clock and restore mode */
+-			iovalue = 1;
+-			err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0,
+-					      &iovalue, sizeof(iovalue), true);
+-			if (err) {
+-				DHD_ERROR(("%s: error enabling sd_clock: %d\n",
+-					   __func__, err));
+-				return -EBADE;
+-			}
+-
+-			iovalue = bus->sd_mode;
+-			err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0,
+-					      &iovalue, sizeof(iovalue), true);
+-			if (err) {
+-				DHD_ERROR(("%s: error changing sd_mode: %d\n",
+-					   __func__, err));
+-				return -EBADE;
+-			}
+-		} else if (bus->idleclock != DHD_IDLE_ACTIVE) {
+-			/* Restore clock speed */
+-			iovalue = bus->sd_divisor;
+-			err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
+-					      &iovalue, sizeof(iovalue), true);
+-			if (err) {
+-				DHD_ERROR(("%s: error restoring sd_divisor: %d\n",
+-					__func__, err));
+-				return -EBADE;
+-			}
+-		}
+-		bus->clkstate = CLK_SDONLY;
+-	} else {
+-		/* Stop or slow the SD clock itself */
+-		if ((bus->sd_divisor == -1) || (bus->sd_mode == -1)) {
+-			DHD_TRACE(("%s: can't idle clock, divisor %d mode %d\n",
+-				   __func__, bus->sd_divisor, bus->sd_mode));
+-			return -EBADE;
+-		}
+-		if (bus->idleclock == DHD_IDLE_STOP) {
+-			if (sd1idle) {
+-				/* Change to SD1 mode and turn off clock */
+-				iovalue = 1;
+-				err =
+-				    bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL,
+-						    0, &iovalue,
+-						    sizeof(iovalue), true);
+-				if (err) {
+-					DHD_ERROR(("%s: error changing sd_clock: %d\n",
+-						__func__, err));
+-					return -EBADE;
+-				}
+-			}
+-
+-			iovalue = 0;
+-			err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0,
+-					      &iovalue, sizeof(iovalue), true);
+-			if (err) {
+-				DHD_ERROR(("%s: error disabling sd_clock: %d\n",
+-					   __func__, err));
+-				return -EBADE;
+-			}
+-		} else if (bus->idleclock != DHD_IDLE_ACTIVE) {
+-			/* Set divisor to idle value */
+-			iovalue = bus->idleclock;
+-			err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
+-					      &iovalue, sizeof(iovalue), true);
+-			if (err) {
+-				DHD_ERROR(("%s: error changing sd_divisor: %d\n",
+-					__func__, err));
+-				return -EBADE;
+-			}
+-		}
+-		bus->clkstate = CLK_NONE;
+-	}
+-
+-	return 0;
+-}
+-
+-/* Transition SD and backplane clock readiness */
+-static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok)
+-{
+-#ifdef DHD_DEBUG
+-	uint oldstate = bus->clkstate;
+-#endif				/* DHD_DEBUG */
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Early exit if we're already there */
+-	if (bus->clkstate == target) {
+-		if (target == CLK_AVAIL) {
+-			dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
+-			bus->activity = true;
+-		}
+-		return 0;
+-	}
+-
+-	switch (target) {
+-	case CLK_AVAIL:
+-		/* Make sure SD clock is available */
+-		if (bus->clkstate == CLK_NONE)
+-			dhdsdio_sdclk(bus, true);
+-		/* Now request HT Avail on the backplane */
+-		dhdsdio_htclk(bus, true, pendok);
+-		dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
+-		bus->activity = true;
+-		break;
+-
+-	case CLK_SDONLY:
+-		/* Remove HT request, or bring up SD clock */
+-		if (bus->clkstate == CLK_NONE)
+-			dhdsdio_sdclk(bus, true);
+-		else if (bus->clkstate == CLK_AVAIL)
+-			dhdsdio_htclk(bus, false, false);
+-		else
+-			DHD_ERROR(("dhdsdio_clkctl: request for %d -> %d\n",
+-				   bus->clkstate, target));
+-		dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
+-		break;
+-
+-	case CLK_NONE:
+-		/* Make sure to remove HT request */
+-		if (bus->clkstate == CLK_AVAIL)
+-			dhdsdio_htclk(bus, false, false);
+-		/* Now remove the SD clock */
+-		dhdsdio_sdclk(bus, false);
+-		dhd_os_wd_timer(bus->dhd, 0);
+-		break;
+-	}
+-#ifdef DHD_DEBUG
+-	DHD_INFO(("dhdsdio_clkctl: %d -> %d\n", oldstate, bus->clkstate));
+-#endif				/* DHD_DEBUG */
+-
+-	return 0;
+-}
+-
+-int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep)
+-{
+-	bcmsdh_info_t *sdh = bus->sdh;
+-	sdpcmd_regs_t *regs = bus->regs;
+-	uint retries = 0;
+-
+-	DHD_INFO(("dhdsdio_bussleep: request %s (currently %s)\n",
+-		  (sleep ? "SLEEP" : "WAKE"),
+-		  (bus->sleeping ? "SLEEP" : "WAKE")));
+-
+-	/* Done if we're already in the requested state */
+-	if (sleep == bus->sleeping)
+-		return 0;
+-
+-	/* Going to sleep: set the alarm and turn off the lights... */
+-	if (sleep) {
+-		/* Don't sleep if something is pending */
+-		if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
+-			return -EBUSY;
+-
+-		/* Disable SDIO interrupts (no longer interested) */
+-		bcmsdh_intr_disable(bus->sdh);
+-
+-		/* Make sure the controller has the bus up */
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-		/* Tell device to start using OOB wakeup */
+-		W_SDREG(SMB_USE_OOB, &regs->tosbmailbox, retries);
+-		if (retries > retry_limit)
+-			DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
+-
+-		/* Turn off our contribution to the HT clock request */
+-		dhdsdio_clkctl(bus, CLK_SDONLY, false);
+-
+-		bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
+-
+-		/* Isolate the bus */
+-		if (bus->ci->chip != BCM4329_CHIP_ID
+-		    && bus->ci->chip != BCM4319_CHIP_ID) {
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					 SBSDIO_DEVCTL_PADS_ISO, NULL);
+-		}
+-
+-		/* Change state */
+-		bus->sleeping = true;
+-
+-	} else {
+-		/* Waking up: bus power up is ok, set local state */
+-
+-		bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 0, NULL);
+-
+-		/* Force pad isolation off if possible
+-			 (in case power never toggled) */
+-		if ((bus->ci->buscoretype == PCMCIA_CORE_ID)
+-		    && (bus->ci->buscorerev >= 10))
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, 0,
+-					 NULL);
+-
+-		/* Make sure the controller has the bus up */
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-		/* Send misc interrupt to indicate OOB not needed */
+-		W_SDREG(0, &regs->tosbmailboxdata, retries);
+-		if (retries <= retry_limit)
+-			W_SDREG(SMB_DEV_INT, &regs->tosbmailbox, retries);
+-
+-		if (retries > retry_limit)
+-			DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n"));
+-
+-		/* Make sure we have SD bus access */
+-		dhdsdio_clkctl(bus, CLK_SDONLY, false);
+-
+-		/* Change state */
+-		bus->sleeping = false;
+-
+-		/* Enable interrupts again */
+-		if (bus->intr && (bus->dhd->busstate == DHD_BUS_DATA)) {
+-			bus->intdis = false;
+-			bcmsdh_intr_enable(bus->sdh);
+-		}
+-	}
+-
+-	return 0;
+-}
+-
+-#if defined(OOB_INTR_ONLY)
+-void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable)
+-{
+-#if defined(HW_OOB)
+-	bcmsdh_enable_hw_oob_intr(bus->sdh, enable);
+-#else
+-	sdpcmd_regs_t *regs = bus->regs;
+-	uint retries = 0;
+-
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-	if (enable == true) {
+-
+-		/* Tell device to start using OOB wakeup */
+-		W_SDREG(SMB_USE_OOB, &regs->tosbmailbox, retries);
+-		if (retries > retry_limit)
+-			DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n"));
+-
+-	} else {
+-		/* Send misc interrupt to indicate OOB not needed */
+-		W_SDREG(0, &regs->tosbmailboxdata, retries);
+-		if (retries <= retry_limit)
+-			W_SDREG(SMB_DEV_INT, &regs->tosbmailbox, retries);
+-	}
+-
+-	/* Turn off our contribution to the HT clock request */
+-	dhdsdio_clkctl(bus, CLK_SDONLY, false);
+-#endif				/* !defined(HW_OOB) */
+-}
+-#endif				/* defined(OOB_INTR_ONLY) */
+-
+-#define BUS_WAKE(bus) \
+-	do { \
+-		if ((bus)->sleeping) \
+-			dhdsdio_bussleep((bus), false); \
+-	} while (0);
+-
+-/* Writes a HW/SW header into the packet and sends it. */
+-/* Assumes: (a) header space already there, (b) caller holds lock */
+-static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan,
+-			 bool free_pkt)
+-{
+-	int ret;
+-	u8 *frame;
+-	u16 len, pad = 0;
+-	u32 swheader;
+-	uint retries = 0;
+-	bcmsdh_info_t *sdh;
+-	struct sk_buff *new;
+-	int i;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	sdh = bus->sdh;
+-
+-	if (bus->dhd->dongle_reset) {
+-		ret = -EPERM;
+-		goto done;
+-	}
+-
+-	frame = (u8 *) (pkt->data);
+-
+-	/* Add alignment padding, allocate new packet if needed */
+-	pad = ((unsigned long)frame % DHD_SDALIGN);
+-	if (pad) {
+-		if (skb_headroom(pkt) < pad) {
+-			DHD_INFO(("%s: insufficient headroom %d for %d pad\n",
+-				  __func__, skb_headroom(pkt), pad));
+-			bus->dhd->tx_realloc++;
+-			new = bcm_pkt_buf_get_skb(pkt->len + DHD_SDALIGN);
+-			if (!new) {
+-				DHD_ERROR(("%s: couldn't allocate new %d-byte "
+-					"packet\n",
+-					__func__, pkt->len + DHD_SDALIGN));
+-				ret = -ENOMEM;
+-				goto done;
+-			}
+-
+-			PKTALIGN(new, pkt->len, DHD_SDALIGN);
+-			memcpy(new->data, pkt->data, pkt->len);
+-			if (free_pkt)
+-				bcm_pkt_buf_free_skb(pkt);
+-			/* free the pkt if canned one is not used */
+-			free_pkt = true;
+-			pkt = new;
+-			frame = (u8 *) (pkt->data);
+-			ASSERT(((unsigned long)frame % DHD_SDALIGN) == 0);
+-			pad = 0;
+-		} else {
+-			skb_push(pkt, pad);
+-			frame = (u8 *) (pkt->data);
+-
+-			ASSERT((pad + SDPCM_HDRLEN) <= (int)(pkt->len));
+-			memset(frame, 0, pad + SDPCM_HDRLEN);
+-		}
+-	}
+-	ASSERT(pad < DHD_SDALIGN);
+-
+-	/* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
+-	len = (u16) (pkt->len);
+-	*(u16 *) frame = cpu_to_le16(len);
+-	*(((u16 *) frame) + 1) = cpu_to_le16(~len);
+-
+-	/* Software tag: channel, sequence number, data offset */
+-	swheader =
+-	    ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
+-	    (((pad +
+-	       SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
+-
+-	put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
+-	put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
+-
+-#ifdef DHD_DEBUG
+-	tx_packets[pkt->priority]++;
+-	if (DHD_BYTES_ON() &&
+-	    (((DHD_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) ||
+-	      (DHD_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) {
+-		printk(KERN_DEBUG "Tx Frame:\n");
+-		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len);
+-	} else if (DHD_HDRS_ON()) {
+-		printk(KERN_DEBUG "TxHdr:\n");
+-		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-				     frame, min_t(u16, len, 16));
+-	}
+-#endif
+-
+-	/* Raise len to next SDIO block to eliminate tail command */
+-	if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
+-		u16 pad = bus->blocksize - (len % bus->blocksize);
+-		if ((pad <= bus->roundup) && (pad < bus->blocksize))
+-#ifdef NOTUSED
+-			if (pad <= skb_tailroom(pkt))
+-#endif				/* NOTUSED */
+-				len += pad;
+-	} else if (len % DHD_SDALIGN) {
+-		len += DHD_SDALIGN - (len % DHD_SDALIGN);
+-	}
+-
+-	/* Some controllers have trouble with odd bytes -- round to even */
+-	if (forcealign && (len & (ALIGNMENT - 1))) {
+-#ifdef NOTUSED
+-		if (skb_tailroom(pkt))
+-#endif
+-			len = roundup(len, ALIGNMENT);
+-#ifdef NOTUSED
+-		else
+-			DHD_ERROR(("%s: sending unrounded %d-byte packet\n",
+-				   __func__, len));
+-#endif
+-	}
+-
+-	do {
+-		ret =
+-		    dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
+-					F2SYNC, frame, len, pkt, NULL, NULL);
+-		bus->f2txdata++;
+-		ASSERT(ret != -BCME_PENDING);
+-
+-		if (ret < 0) {
+-			/* On failure, abort the command
+-			 and terminate the frame */
+-			DHD_INFO(("%s: sdio error %d, abort command and "
+-				"terminate frame.\n", __func__, ret));
+-			bus->tx_sderrs++;
+-
+-			bcmsdh_abort(sdh, SDIO_FUNC_2);
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+-					 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
+-					 NULL);
+-			bus->f1regdata++;
+-
+-			for (i = 0; i < 3; i++) {
+-				u8 hi, lo;
+-				hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						     SBSDIO_FUNC1_WFRAMEBCHI,
+-						     NULL);
+-				lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						     SBSDIO_FUNC1_WFRAMEBCLO,
+-						     NULL);
+-				bus->f1regdata += 2;
+-				if ((hi == 0) && (lo == 0))
+-					break;
+-			}
+-
+-		}
+-		if (ret == 0)
+-			bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
+-
+-	} while ((ret < 0) && retrydata && retries++ < TXRETRIES);
+-
+-done:
+-	/* restore pkt buffer pointer before calling tx complete routine */
+-	skb_pull(pkt, SDPCM_HDRLEN + pad);
+-	dhd_os_sdunlock(bus->dhd);
+-	dhd_txcomplete(bus->dhd, pkt, ret != 0);
+-	dhd_os_sdlock(bus->dhd);
+-
+-	if (free_pkt)
+-		bcm_pkt_buf_free_skb(pkt);
+-
+-	return ret;
+-}
+-
+-int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt)
+-{
+-	int ret = -EBADE;
+-	uint datalen, prec;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	datalen = pkt->len;
+-
+-#ifdef SDTEST
+-	/* Push the test header if doing loopback */
+-	if (bus->ext_loop) {
+-		u8 *data;
+-		skb_push(pkt, SDPCM_TEST_HDRLEN);
+-		data = pkt->data;
+-		*data++ = SDPCM_TEST_ECHOREQ;
+-		*data++ = (u8) bus->loopid++;
+-		*data++ = (datalen >> 0);
+-		*data++ = (datalen >> 8);
+-		datalen += SDPCM_TEST_HDRLEN;
+-	}
+-#endif				/* SDTEST */
+-
+-	/* Add space for the header */
+-	skb_push(pkt, SDPCM_HDRLEN);
+-	ASSERT(IS_ALIGNED((unsigned long)(pkt->data), 2));
+-
+-	prec = PRIO2PREC((pkt->priority & PRIOMASK));
+-
+-	/* Check for existing queue, current flow-control,
+-			 pending event, or pending clock */
+-	if (dhd_deferred_tx || bus->fcstate || pktq_len(&bus->txq)
+-	    || bus->dpc_sched || (!DATAOK(bus))
+-	    || (bus->flowcontrol & NBITVAL(prec))
+-	    || (bus->clkstate != CLK_AVAIL)) {
+-		DHD_TRACE(("%s: deferring pktq len %d\n", __func__,
+-			   pktq_len(&bus->txq)));
+-		bus->fcqueued++;
+-
+-		/* Priority based enq */
+-		dhd_os_sdlock_txq(bus->dhd);
+-		if (dhd_prec_enq(bus->dhd, &bus->txq, pkt, prec) == false) {
+-			skb_pull(pkt, SDPCM_HDRLEN);
+-			dhd_txcomplete(bus->dhd, pkt, false);
+-			bcm_pkt_buf_free_skb(pkt);
+-			DHD_ERROR(("%s: out of bus->txq !!!\n", __func__));
+-			ret = -ENOSR;
+-		} else {
+-			ret = 0;
+-		}
+-		dhd_os_sdunlock_txq(bus->dhd);
+-
+-		if (pktq_len(&bus->txq) >= TXHI)
+-			dhd_txflowcontrol(bus->dhd, 0, ON);
+-
+-#ifdef DHD_DEBUG
+-		if (pktq_plen(&bus->txq, prec) > qcount[prec])
+-			qcount[prec] = pktq_plen(&bus->txq, prec);
+-#endif
+-		/* Schedule DPC if needed to send queued packet(s) */
+-		if (dhd_deferred_tx && !bus->dpc_sched) {
+-			bus->dpc_sched = true;
+-			dhd_sched_dpc(bus->dhd);
+-		}
+-	} else {
+-		/* Lock: we're about to use shared data/code (and SDIO) */
+-		dhd_os_sdlock(bus->dhd);
+-
+-		/* Otherwise, send it now */
+-		BUS_WAKE(bus);
+-		/* Make sure back plane ht clk is on, no pending allowed */
+-		dhdsdio_clkctl(bus, CLK_AVAIL, true);
+-
+-#ifndef SDTEST
+-		DHD_TRACE(("%s: calling txpkt\n", __func__));
+-		ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
+-#else
+-		ret = dhdsdio_txpkt(bus, pkt,
+-				    (bus->ext_loop ? SDPCM_TEST_CHANNEL :
+-				     SDPCM_DATA_CHANNEL), true);
+-#endif
+-		if (ret)
+-			bus->dhd->tx_errors++;
+-		else
+-			bus->dhd->dstats.tx_bytes += datalen;
+-
+-		if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
+-			bus->activity = false;
+-			dhdsdio_clkctl(bus, CLK_NONE, true);
+-		}
+-
+-		dhd_os_sdunlock(bus->dhd);
+-	}
+-
+-	return ret;
+-}
+-
+-static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes)
+-{
+-	struct sk_buff *pkt;
+-	u32 intstatus = 0;
+-	uint retries = 0;
+-	int ret = 0, prec_out;
+-	uint cnt = 0;
+-	uint datalen;
+-	u8 tx_prec_map;
+-
+-	dhd_pub_t *dhd = bus->dhd;
+-	sdpcmd_regs_t *regs = bus->regs;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	tx_prec_map = ~bus->flowcontrol;
+-
+-	/* Send frames until the limit or some other event */
+-	for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) {
+-		dhd_os_sdlock_txq(bus->dhd);
+-		pkt = bcm_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
+-		if (pkt == NULL) {
+-			dhd_os_sdunlock_txq(bus->dhd);
+-			break;
+-		}
+-		dhd_os_sdunlock_txq(bus->dhd);
+-		datalen = pkt->len - SDPCM_HDRLEN;
+-
+-#ifndef SDTEST
+-		ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
+-#else
+-		ret = dhdsdio_txpkt(bus, pkt,
+-				    (bus->ext_loop ? SDPCM_TEST_CHANNEL :
+-				     SDPCM_DATA_CHANNEL), true);
+-#endif
+-		if (ret)
+-			bus->dhd->tx_errors++;
+-		else
+-			bus->dhd->dstats.tx_bytes += datalen;
+-
+-		/* In poll mode, need to check for other events */
+-		if (!bus->intr && cnt) {
+-			/* Check device status, signal pending interrupt */
+-			R_SDREG(intstatus, &regs->intstatus, retries);
+-			bus->f2txdata++;
+-			if (bcmsdh_regfail(bus->sdh))
+-				break;
+-			if (intstatus & bus->hostintmask)
+-				bus->ipend = true;
+-		}
+-	}
+-
+-	/* Deflow-control stack if needed */
+-	if (dhd->up && (dhd->busstate == DHD_BUS_DATA) &&
+-	    dhd->txoff && (pktq_len(&bus->txq) < TXLOW))
+-		dhd_txflowcontrol(dhd, 0, OFF);
+-
+-	return cnt;
+-}
+-
+-int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
+-{
+-	u8 *frame;
+-	u16 len;
+-	u32 swheader;
+-	uint retries = 0;
+-	bcmsdh_info_t *sdh = bus->sdh;
+-	u8 doff = 0;
+-	int ret = -1;
+-	int i;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus->dhd->dongle_reset)
+-		return -EIO;
+-
+-	/* Back the pointer to make a room for bus header */
+-	frame = msg - SDPCM_HDRLEN;
+-	len = (msglen += SDPCM_HDRLEN);
+-
+-	/* Add alignment padding (optional for ctl frames) */
+-	if (dhd_alignctl) {
+-		doff = ((unsigned long)frame % DHD_SDALIGN);
+-		if (doff) {
+-			frame -= doff;
+-			len += doff;
+-			msglen += doff;
+-			memset(frame, 0, doff + SDPCM_HDRLEN);
+-		}
+-		ASSERT(doff < DHD_SDALIGN);
+-	}
+-	doff += SDPCM_HDRLEN;
+-
+-	/* Round send length to next SDIO block */
+-	if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
+-		u16 pad = bus->blocksize - (len % bus->blocksize);
+-		if ((pad <= bus->roundup) && (pad < bus->blocksize))
+-			len += pad;
+-	} else if (len % DHD_SDALIGN) {
+-		len += DHD_SDALIGN - (len % DHD_SDALIGN);
+-	}
+-
+-	/* Satisfy length-alignment requirements */
+-	if (forcealign && (len & (ALIGNMENT - 1)))
+-		len = roundup(len, ALIGNMENT);
+-
+-	ASSERT(IS_ALIGNED((unsigned long)frame, 2));
+-
+-	/* Need to lock here to protect txseq and SDIO tx calls */
+-	dhd_os_sdlock(bus->dhd);
+-
+-	BUS_WAKE(bus);
+-
+-	/* Make sure backplane clock is on */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-	/* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
+-	*(u16 *) frame = cpu_to_le16((u16) msglen);
+-	*(((u16 *) frame) + 1) = cpu_to_le16(~msglen);
+-
+-	/* Software tag: channel, sequence number, data offset */
+-	swheader =
+-	    ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
+-	     SDPCM_CHANNEL_MASK)
+-	    | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
+-			     SDPCM_DOFFSET_MASK);
+-	put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
+-	put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
+-
+-	if (!DATAOK(bus)) {
+-		DHD_INFO(("%s: No bus credit bus->tx_max %d, bus->tx_seq %d\n",
+-			  __func__, bus->tx_max, bus->tx_seq));
+-		bus->ctrl_frame_stat = true;
+-		/* Send from dpc */
+-		bus->ctrl_frame_buf = frame;
+-		bus->ctrl_frame_len = len;
+-
+-		dhd_wait_for_event(bus->dhd, &bus->ctrl_frame_stat);
+-
+-		if (bus->ctrl_frame_stat == false) {
+-			DHD_INFO(("%s: ctrl_frame_stat == false\n", __func__));
+-			ret = 0;
+-		} else {
+-			DHD_INFO(("%s: ctrl_frame_stat == true\n", __func__));
+-			ret = -1;
+-		}
+-	}
+-
+-	if (ret == -1) {
+-#ifdef DHD_DEBUG
+-		if (DHD_BYTES_ON() && DHD_CTL_ON()) {
+-			printk(KERN_DEBUG "Tx Frame:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-					     frame, len);
+-		} else if (DHD_HDRS_ON()) {
+-			printk(KERN_DEBUG "TxHdr:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-					     frame, min_t(u16, len, 16));
+-		}
+-#endif
+-
+-		do {
+-			bus->ctrl_frame_stat = false;
+-			ret =
+-			    dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh),
+-						SDIO_FUNC_2, F2SYNC, frame, len,
+-						NULL, NULL, NULL);
+-
+-			ASSERT(ret != -BCME_PENDING);
+-
+-			if (ret < 0) {
+-				/* On failure, abort the command and
+-				 terminate the frame */
+-				DHD_INFO(("%s: sdio error %d, abort command and terminate frame.\n",
+-					__func__, ret));
+-				bus->tx_sderrs++;
+-
+-				bcmsdh_abort(sdh, SDIO_FUNC_2);
+-
+-				bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+-						 SBSDIO_FUNC1_FRAMECTRL,
+-						 SFC_WF_TERM, NULL);
+-				bus->f1regdata++;
+-
+-				for (i = 0; i < 3; i++) {
+-					u8 hi, lo;
+-					hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-					     SBSDIO_FUNC1_WFRAMEBCHI,
+-					     NULL);
+-					lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-					     SBSDIO_FUNC1_WFRAMEBCLO,
+-							     NULL);
+-					bus->f1regdata += 2;
+-					if ((hi == 0) && (lo == 0))
+-						break;
+-				}
+-
+-			}
+-			if (ret == 0) {
+-				bus->tx_seq =
+-				    (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
+-			}
+-		} while ((ret < 0) && retries++ < TXRETRIES);
+-	}
+-
+-	if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
+-		bus->activity = false;
+-		dhdsdio_clkctl(bus, CLK_NONE, true);
+-	}
+-
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	if (ret)
+-		bus->dhd->tx_ctlerrs++;
+-	else
+-		bus->dhd->tx_ctlpkts++;
+-
+-	return ret ? -EIO : 0;
+-}
+-
+-int dhd_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen)
+-{
+-	int timeleft;
+-	uint rxlen = 0;
+-	bool pending;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus->dhd->dongle_reset)
+-		return -EIO;
+-
+-	/* Wait until control frame is available */
+-	timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, &pending);
+-
+-	dhd_os_sdlock(bus->dhd);
+-	rxlen = bus->rxlen;
+-	memcpy(msg, bus->rxctl, min(msglen, rxlen));
+-	bus->rxlen = 0;
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	if (rxlen) {
+-		DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n",
+-			 __func__, rxlen, msglen));
+-	} else if (timeleft == 0) {
+-		DHD_ERROR(("%s: resumed on timeout\n", __func__));
+-#ifdef DHD_DEBUG
+-		dhd_os_sdlock(bus->dhd);
+-		dhdsdio_checkdied(bus, NULL, 0);
+-		dhd_os_sdunlock(bus->dhd);
+-#endif				/* DHD_DEBUG */
+-	} else if (pending == true) {
+-		DHD_CTL(("%s: cancelled\n", __func__));
+-		return -ERESTARTSYS;
+-	} else {
+-		DHD_CTL(("%s: resumed for unknown reason?\n", __func__));
+-#ifdef DHD_DEBUG
+-		dhd_os_sdlock(bus->dhd);
+-		dhdsdio_checkdied(bus, NULL, 0);
+-		dhd_os_sdunlock(bus->dhd);
+-#endif				/* DHD_DEBUG */
+-	}
+-
+-	if (rxlen)
+-		bus->dhd->rx_ctlpkts++;
+-	else
+-		bus->dhd->rx_ctlerrs++;
+-
+-	return rxlen ? (int)rxlen : -ETIMEDOUT;
+-}
+-
+-/* IOVar table */
+-enum {
+-	IOV_INTR = 1,
+-	IOV_POLLRATE,
+-	IOV_SDREG,
+-	IOV_SBREG,
+-	IOV_SDCIS,
+-	IOV_MEMBYTES,
+-	IOV_MEMSIZE,
+-#ifdef DHD_DEBUG
+-	IOV_CHECKDIED,
+-#endif
+-	IOV_DOWNLOAD,
+-	IOV_FORCEEVEN,
+-	IOV_SDIOD_DRIVE,
+-	IOV_READAHEAD,
+-	IOV_SDRXCHAIN,
+-	IOV_ALIGNCTL,
+-	IOV_SDALIGN,
+-	IOV_DEVRESET,
+-	IOV_CPU,
+-#ifdef SDTEST
+-	IOV_PKTGEN,
+-	IOV_EXTLOOP,
+-#endif				/* SDTEST */
+-	IOV_SPROM,
+-	IOV_TXBOUND,
+-	IOV_RXBOUND,
+-	IOV_TXMINMAX,
+-	IOV_IDLETIME,
+-	IOV_IDLECLOCK,
+-	IOV_SD1IDLE,
+-	IOV_SLEEP,
+-	IOV_VARS
+-};
+-
+-const bcm_iovar_t dhdsdio_iovars[] = {
+-	{"intr", IOV_INTR, 0, IOVT_BOOL, 0},
+-	{"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0},
+-	{"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0},
+-	{"idletime", IOV_IDLETIME, 0, IOVT_INT32, 0},
+-	{"idleclock", IOV_IDLECLOCK, 0, IOVT_INT32, 0},
+-	{"sd1idle", IOV_SD1IDLE, 0, IOVT_BOOL, 0},
+-	{"membytes", IOV_MEMBYTES, 0, IOVT_BUFFER, 2 * sizeof(int)},
+-	{"memsize", IOV_MEMSIZE, 0, IOVT_UINT32, 0},
+-	{"download", IOV_DOWNLOAD, 0, IOVT_BOOL, 0},
+-	{"vars", IOV_VARS, 0, IOVT_BUFFER, 0},
+-	{"sdiod_drive", IOV_SDIOD_DRIVE, 0, IOVT_UINT32, 0},
+-	{"readahead", IOV_READAHEAD, 0, IOVT_BOOL, 0},
+-	{"sdrxchain", IOV_SDRXCHAIN, 0, IOVT_BOOL, 0},
+-	{"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0},
+-	{"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0},
+-	{"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0},
+-#ifdef DHD_DEBUG
+-	{"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
+-	,
+-	{"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(sdreg_t)}
+-	,
+-	{"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, DHD_IOCTL_MAXLEN}
+-	,
+-	{"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0}
+-	,
+-	{"txbound", IOV_TXBOUND, 0, IOVT_UINT32, 0}
+-	,
+-	{"rxbound", IOV_RXBOUND, 0, IOVT_UINT32, 0}
+-	,
+-	{"txminmax", IOV_TXMINMAX, 0, IOVT_UINT32, 0}
+-	,
+-	{"cpu", IOV_CPU, 0, IOVT_BOOL, 0}
+-	,
+-#ifdef DHD_DEBUG
+-	{"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0}
+-	,
+-#endif				/* DHD_DEBUG  */
+-#endif				/* DHD_DEBUG */
+-#ifdef SDTEST
+-	{"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0}
+-	,
+-	{"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(dhd_pktgen_t)}
+-	,
+-#endif				/* SDTEST */
+-
+-	{NULL, 0, 0, 0, 0}
+-};
+-
+-static void
+-dhd_dump_pct(struct bcmstrbuf *strbuf, char *desc, uint num, uint div)
+-{
+-	uint q1, q2;
+-
+-	if (!div) {
+-		bcm_bprintf(strbuf, "%s N/A", desc);
+-	} else {
+-		q1 = num / div;
+-		q2 = (100 * (num - (q1 * div))) / div;
+-		bcm_bprintf(strbuf, "%s %d.%02d", desc, q1, q2);
+-	}
+-}
+-
+-void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf)
+-{
+-	dhd_bus_t *bus = dhdp->bus;
+-
+-	bcm_bprintf(strbuf, "Bus SDIO structure:\n");
+-	bcm_bprintf(strbuf,
+-		    "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n",
+-		    bus->hostintmask, bus->intstatus, bus->sdpcm_ver);
+-	bcm_bprintf(strbuf,
+-		    "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n",
+-		    bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max,
+-		    bus->rxskip, bus->rxlen, bus->rx_seq);
+-	bcm_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n",
+-		    bus->intr, bus->intrcount, bus->lastintrs, bus->spurious);
+-	bcm_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n",
+-		    bus->pollrate, bus->pollcnt, bus->regfails);
+-
+-	bcm_bprintf(strbuf, "\nAdditional counters:\n");
+-	bcm_bprintf(strbuf,
+-		    "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n",
+-		    bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong,
+-		    bus->rxc_errors);
+-	bcm_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n",
+-		    bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq);
+-	bcm_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", bus->fc_rcvd,
+-		    bus->fc_xoff, bus->fc_xon);
+-	bcm_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n",
+-		    bus->rxglomfail, bus->rxglomframes, bus->rxglompkts);
+-	bcm_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs %d\n",
+-		    (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs,
+-		    bus->f2rxdata, bus->f2txdata, bus->f1regdata);
+-	{
+-		dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets,
+-			     (bus->f2rxhdrs + bus->f2rxdata));
+-		dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->rx_packets,
+-			     bus->f1regdata);
+-		dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->rx_packets,
+-			     (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata));
+-		dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets,
+-			     bus->intrcount);
+-		bcm_bprintf(strbuf, "\n");
+-
+-		dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts),
+-			     bus->dhd->rx_packets);
+-		dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts,
+-			     bus->rxglomframes);
+-		bcm_bprintf(strbuf, "\n");
+-
+-		dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets,
+-			     bus->f2txdata);
+-		dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->tx_packets,
+-			     bus->f1regdata);
+-		dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->tx_packets,
+-			     (bus->f2txdata + bus->f1regdata));
+-		dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets,
+-			     bus->intrcount);
+-		bcm_bprintf(strbuf, "\n");
+-
+-		dhd_dump_pct(strbuf, "Total: pkts/f2rw",
+-			     (bus->dhd->tx_packets + bus->dhd->rx_packets),
+-			     (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata));
+-		dhd_dump_pct(strbuf, ", pkts/f1sd",
+-			     (bus->dhd->tx_packets + bus->dhd->rx_packets),
+-			     bus->f1regdata);
+-		dhd_dump_pct(strbuf, ", pkts/sd",
+-			     (bus->dhd->tx_packets + bus->dhd->rx_packets),
+-			     (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata +
+-			      bus->f1regdata));
+-		dhd_dump_pct(strbuf, ", pkts/int",
+-			     (bus->dhd->tx_packets + bus->dhd->rx_packets),
+-			     bus->intrcount);
+-		bcm_bprintf(strbuf, "\n\n");
+-	}
+-
+-#ifdef SDTEST
+-	if (bus->pktgen_count) {
+-		bcm_bprintf(strbuf, "pktgen config and count:\n");
+-		bcm_bprintf(strbuf,
+-			    "freq %d count %d print %d total %d min %d len %d\n",
+-			    bus->pktgen_freq, bus->pktgen_count,
+-			    bus->pktgen_print, bus->pktgen_total,
+-			    bus->pktgen_minlen, bus->pktgen_maxlen);
+-		bcm_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n",
+-			    bus->pktgen_sent, bus->pktgen_rcvd,
+-			    bus->pktgen_fail);
+-	}
+-#endif				/* SDTEST */
+-#ifdef DHD_DEBUG
+-	bcm_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n",
+-		    bus->dpc_sched,
+-		    (bcmsdh_intr_pending(bus->sdh) ? " " : " not "));
+-	bcm_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize,
+-		    bus->roundup);
+-#endif				/* DHD_DEBUG */
+-	bcm_bprintf(strbuf,
+-		    "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n",
+-		    bus->clkstate, bus->activity, bus->idletime, bus->idlecount,
+-		    bus->sleeping);
+-}
+-
+-void dhd_bus_clearcounts(dhd_pub_t *dhdp)
+-{
+-	dhd_bus_t *bus = (dhd_bus_t *) dhdp->bus;
+-
+-	bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0;
+-	bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0;
+-	bus->rx_hdrfail = bus->rx_badhdr = bus->rx_badseq = 0;
+-	bus->tx_sderrs = bus->fc_rcvd = bus->fc_xoff = bus->fc_xon = 0;
+-	bus->rxglomfail = bus->rxglomframes = bus->rxglompkts = 0;
+-	bus->f2rxhdrs = bus->f2rxdata = bus->f2txdata = bus->f1regdata = 0;
+-}
+-
+-#ifdef SDTEST
+-static int dhdsdio_pktgen_get(dhd_bus_t *bus, u8 *arg)
+-{
+-	dhd_pktgen_t pktgen;
+-
+-	pktgen.version = DHD_PKTGEN_VERSION;
+-	pktgen.freq = bus->pktgen_freq;
+-	pktgen.count = bus->pktgen_count;
+-	pktgen.print = bus->pktgen_print;
+-	pktgen.total = bus->pktgen_total;
+-	pktgen.minlen = bus->pktgen_minlen;
+-	pktgen.maxlen = bus->pktgen_maxlen;
+-	pktgen.numsent = bus->pktgen_sent;
+-	pktgen.numrcvd = bus->pktgen_rcvd;
+-	pktgen.numfail = bus->pktgen_fail;
+-	pktgen.mode = bus->pktgen_mode;
+-	pktgen.stop = bus->pktgen_stop;
+-
+-	memcpy(arg, &pktgen, sizeof(pktgen));
+-
+-	return 0;
+-}
+-
+-static int dhdsdio_pktgen_set(dhd_bus_t *bus, u8 *arg)
+-{
+-	dhd_pktgen_t pktgen;
+-	uint oldcnt, oldmode;
+-
+-	memcpy(&pktgen, arg, sizeof(pktgen));
+-	if (pktgen.version != DHD_PKTGEN_VERSION)
+-		return -EINVAL;
+-
+-	oldcnt = bus->pktgen_count;
+-	oldmode = bus->pktgen_mode;
+-
+-	bus->pktgen_freq = pktgen.freq;
+-	bus->pktgen_count = pktgen.count;
+-	bus->pktgen_print = pktgen.print;
+-	bus->pktgen_total = pktgen.total;
+-	bus->pktgen_minlen = pktgen.minlen;
+-	bus->pktgen_maxlen = pktgen.maxlen;
+-	bus->pktgen_mode = pktgen.mode;
+-	bus->pktgen_stop = pktgen.stop;
+-
+-	bus->pktgen_tick = bus->pktgen_ptick = 0;
+-	bus->pktgen_len = max(bus->pktgen_len, bus->pktgen_minlen);
+-	bus->pktgen_len = min(bus->pktgen_len, bus->pktgen_maxlen);
+-
+-	/* Clear counts for a new pktgen (mode change, or was stopped) */
+-	if (bus->pktgen_count && (!oldcnt || oldmode != bus->pktgen_mode))
+-		bus->pktgen_sent = bus->pktgen_rcvd = bus->pktgen_fail = 0;
+-
+-	return 0;
+-}
+-#endif				/* SDTEST */
+-
+-static int
+-dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data,
+-		 uint size)
+-{
+-	int bcmerror = 0;
+-	u32 sdaddr;
+-	uint dsize;
+-
+-	/* Determine initial transfer parameters */
+-	sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
+-	if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
+-		dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
+-	else
+-		dsize = size;
+-
+-	/* Set the backplane window to include the start address */
+-	bcmerror = dhdsdio_set_siaddr_window(bus, address);
+-	if (bcmerror) {
+-		DHD_ERROR(("%s: window change failed\n", __func__));
+-		goto xfer_done;
+-	}
+-
+-	/* Do the transfer(s) */
+-	while (size) {
+-		DHD_INFO(("%s: %s %d bytes at offset 0x%08x in window 0x%08x\n",
+-			  __func__, (write ? "write" : "read"), dsize,
+-			  sdaddr, (address & SBSDIO_SBWINDOW_MASK)));
+-		bcmerror =
+-		     bcmsdh_rwdata(bus->sdh, write, sdaddr, data, dsize);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: membytes transfer failed\n", __func__));
+-			break;
+-		}
+-
+-		/* Adjust for next transfer (if any) */
+-		size -= dsize;
+-		if (size) {
+-			data += dsize;
+-			address += dsize;
+-			bcmerror = dhdsdio_set_siaddr_window(bus, address);
+-			if (bcmerror) {
+-				DHD_ERROR(("%s: window change failed\n",
+-					   __func__));
+-				break;
+-			}
+-			sdaddr = 0;
+-			dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
+-		}
+-	}
+-
+-xfer_done:
+-	/* Return the window to backplane enumeration space for core access */
+-	if (dhdsdio_set_siaddr_window(bus, bcmsdh_cur_sbwad(bus->sdh))) {
+-		DHD_ERROR(("%s: FAILED to set window back to 0x%x\n",
+-			   __func__, bcmsdh_cur_sbwad(bus->sdh)));
+-	}
+-
+-	return bcmerror;
+-}
+-
+-#ifdef DHD_DEBUG
+-static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh)
+-{
+-	u32 addr;
+-	int rv;
+-
+-	/* Read last word in memory to determine address of
+-			 sdpcm_shared structure */
+-	rv = dhdsdio_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr, 4);
+-	if (rv < 0)
+-		return rv;
+-
+-	addr = le32_to_cpu(addr);
+-
+-	DHD_INFO(("sdpcm_shared address 0x%08X\n", addr));
+-
+-	/*
+-	 * Check if addr is valid.
+-	 * NVRAM length at the end of memory should have been overwritten.
+-	 */
+-	if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) {
+-		DHD_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n",
+-			   __func__, addr));
+-		return -EBADE;
+-	}
+-
+-	/* Read hndrte_shared structure */
+-	rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh,
+-			      sizeof(sdpcm_shared_t));
+-	if (rv < 0)
+-		return rv;
+-
+-	/* Endianness */
+-	sh->flags = le32_to_cpu(sh->flags);
+-	sh->trap_addr = le32_to_cpu(sh->trap_addr);
+-	sh->assert_exp_addr = le32_to_cpu(sh->assert_exp_addr);
+-	sh->assert_file_addr = le32_to_cpu(sh->assert_file_addr);
+-	sh->assert_line = le32_to_cpu(sh->assert_line);
+-	sh->console_addr = le32_to_cpu(sh->console_addr);
+-	sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr);
+-
+-	if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) {
+-		DHD_ERROR(("%s: sdpcm_shared version %d in dhd "
+-			   "is different than sdpcm_shared version %d in dongle\n",
+-			   __func__, SDPCM_SHARED_VERSION,
+-			   sh->flags & SDPCM_SHARED_VERSION_MASK));
+-		return -EBADE;
+-	}
+-
+-	return 0;
+-}
+-
+-static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size)
+-{
+-	int bcmerror = 0;
+-	uint msize = 512;
+-	char *mbuffer = NULL;
+-	uint maxstrlen = 256;
+-	char *str = NULL;
+-	trap_t tr;
+-	sdpcm_shared_t sdpcm_shared;
+-	struct bcmstrbuf strbuf;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (data == NULL) {
+-		/*
+-		 * Called after a rx ctrl timeout. "data" is NULL.
+-		 * allocate memory to trace the trap or assert.
+-		 */
+-		size = msize;
+-		mbuffer = data = kmalloc(msize, GFP_ATOMIC);
+-		if (mbuffer == NULL) {
+-			DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__,
+-				   msize));
+-			bcmerror = -ENOMEM;
+-			goto done;
+-		}
+-	}
+-
+-	str = kmalloc(maxstrlen, GFP_ATOMIC);
+-	if (str == NULL) {
+-		DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen));
+-		bcmerror = -ENOMEM;
+-		goto done;
+-	}
+-
+-	bcmerror = dhdsdio_readshared(bus, &sdpcm_shared);
+-	if (bcmerror < 0)
+-		goto done;
+-
+-	bcm_binit(&strbuf, data, size);
+-
+-	bcm_bprintf(&strbuf,
+-		    "msgtrace address : 0x%08X\nconsole address  : 0x%08X\n",
+-		    sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr);
+-
+-	if ((sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
+-		/* NOTE: Misspelled assert is intentional - DO NOT FIX.
+-		 * (Avoids conflict with real asserts for programmatic
+-		 * parsing of output.)
+-		 */
+-		bcm_bprintf(&strbuf, "Assrt not built in dongle\n");
+-	}
+-
+-	if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) ==
+-	    0) {
+-		/* NOTE: Misspelled assert is intentional - DO NOT FIX.
+-		 * (Avoids conflict with real asserts for programmatic
+-		 * parsing of output.)
+-		 */
+-		bcm_bprintf(&strbuf, "No trap%s in dongle",
+-			    (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT)
+-			    ? "/assrt" : "");
+-	} else {
+-		if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) {
+-			/* Download assert */
+-			bcm_bprintf(&strbuf, "Dongle assert");
+-			if (sdpcm_shared.assert_exp_addr != 0) {
+-				str[0] = '\0';
+-				bcmerror = dhdsdio_membytes(bus, false,
+-						sdpcm_shared.assert_exp_addr,
+-						(u8 *) str, maxstrlen);
+-				if (bcmerror < 0)
+-					goto done;
+-
+-				str[maxstrlen - 1] = '\0';
+-				bcm_bprintf(&strbuf, " expr \"%s\"", str);
+-			}
+-
+-			if (sdpcm_shared.assert_file_addr != 0) {
+-				str[0] = '\0';
+-				bcmerror = dhdsdio_membytes(bus, false,
+-						sdpcm_shared.assert_file_addr,
+-						(u8 *) str, maxstrlen);
+-				if (bcmerror < 0)
+-					goto done;
+-
+-				str[maxstrlen - 1] = '\0';
+-				bcm_bprintf(&strbuf, " file \"%s\"", str);
+-			}
+-
+-			bcm_bprintf(&strbuf, " line %d ",
+-				    sdpcm_shared.assert_line);
+-		}
+-
+-		if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
+-			bcmerror = dhdsdio_membytes(bus, false,
+-					sdpcm_shared.trap_addr, (u8 *)&tr,
+-					sizeof(trap_t));
+-			if (bcmerror < 0)
+-				goto done;
+-
+-			bcm_bprintf(&strbuf,
+-				    "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x,"
+-				    "lp 0x%x, rpc 0x%x Trap offset 0x%x, "
+-				    "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n",
+-				    tr.type, tr.epc, tr.cpsr, tr.spsr, tr.r13,
+-				    tr.r14, tr.pc, sdpcm_shared.trap_addr,
+-				    tr.r0, tr.r1, tr.r2, tr.r3, tr.r4, tr.r5,
+-				    tr.r6, tr.r7);
+-		}
+-	}
+-
+-	if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP))
+-		DHD_ERROR(("%s: %s\n", __func__, strbuf.origbuf));
+-
+-#ifdef DHD_DEBUG
+-	if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) {
+-		/* Mem dump to a file on device */
+-		dhdsdio_mem_dump(bus);
+-	}
+-#endif				/* DHD_DEBUG */
+-
+-done:
+-	kfree(mbuffer);
+-	kfree(str);
+-
+-	return bcmerror;
+-}
+-
+-static int dhdsdio_mem_dump(dhd_bus_t *bus)
+-{
+-	int ret = 0;
+-	int size;		/* Full mem size */
+-	int start = 0;		/* Start address */
+-	int read_size = 0;	/* Read size of each iteration */
+-	u8 *buf = NULL, *databuf = NULL;
+-
+-	/* Get full mem size */
+-	size = bus->ramsize;
+-	buf = kmalloc(size, GFP_ATOMIC);
+-	if (!buf) {
+-		DHD_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size));
+-		return -1;
+-	}
+-
+-	/* Read mem content */
+-	printk(KERN_DEBUG "Dump dongle memory");
+-	databuf = buf;
+-	while (size) {
+-		read_size = min(MEMBLOCK, size);
+-		ret = dhdsdio_membytes(bus, false, start, databuf, read_size);
+-		if (ret) {
+-			DHD_ERROR(("%s: Error membytes %d\n", __func__, ret));
+-			kfree(buf);
+-			return -1;
+-		}
+-		printk(".");
+-
+-		/* Decrement size and increment start address */
+-		size -= read_size;
+-		start += read_size;
+-		databuf += read_size;
+-	}
+-	printk(KERN_DEBUG "Done\n");
+-
+-	/* free buf before return !!! */
+-	if (write_to_file(bus->dhd, buf, bus->ramsize)) {
+-		DHD_ERROR(("%s: Error writing to files\n", __func__));
+-		return -1;
+-	}
+-
+-	/* buf free handled in write_to_file, not here */
+-	return 0;
+-}
+-
+-#define CONSOLE_LINE_MAX	192
+-
+-static int dhdsdio_readconsole(dhd_bus_t *bus)
+-{
+-	dhd_console_t *c = &bus->console;
+-	u8 line[CONSOLE_LINE_MAX], ch;
+-	u32 n, idx, addr;
+-	int rv;
+-
+-	/* Don't do anything until FWREADY updates console address */
+-	if (bus->console_addr == 0)
+-		return 0;
+-
+-	/* Read console log struct */
+-	addr = bus->console_addr + offsetof(hndrte_cons_t, log);
+-	rv = dhdsdio_membytes(bus, false, addr, (u8 *)&c->log,
+-				sizeof(c->log));
+-	if (rv < 0)
+-		return rv;
+-
+-	/* Allocate console buffer (one time only) */
+-	if (c->buf == NULL) {
+-		c->bufsize = le32_to_cpu(c->log.buf_size);
+-		c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
+-		if (c->buf == NULL)
+-			return -ENOMEM;
+-	}
+-
+-	idx = le32_to_cpu(c->log.idx);
+-
+-	/* Protect against corrupt value */
+-	if (idx > c->bufsize)
+-		return -EBADE;
+-
+-	/* Skip reading the console buffer if the index pointer
+-	 has not moved */
+-	if (idx == c->last)
+-		return 0;
+-
+-	/* Read the console buffer */
+-	addr = le32_to_cpu(c->log.buf);
+-	rv = dhdsdio_membytes(bus, false, addr, c->buf, c->bufsize);
+-	if (rv < 0)
+-		return rv;
+-
+-	while (c->last != idx) {
+-		for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
+-			if (c->last == idx) {
+-				/* This would output a partial line.
+-				 * Instead, back up
+-				 * the buffer pointer and output this
+-				 * line next time around.
+-				 */
+-				if (c->last >= n)
+-					c->last -= n;
+-				else
+-					c->last = c->bufsize - n;
+-				goto break2;
+-			}
+-			ch = c->buf[c->last];
+-			c->last = (c->last + 1) % c->bufsize;
+-			if (ch == '\n')
+-				break;
+-			line[n] = ch;
+-		}
+-
+-		if (n > 0) {
+-			if (line[n - 1] == '\r')
+-				n--;
+-			line[n] = 0;
+-			printk(KERN_DEBUG "CONSOLE: %s\n", line);
+-		}
+-	}
+-break2:
+-
+-	return 0;
+-}
+-#endif				/* DHD_DEBUG */
+-
+-int dhdsdio_downloadvars(dhd_bus_t *bus, void *arg, int len)
+-{
+-	int bcmerror = 0;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Basic sanity checks */
+-	if (bus->dhd->up) {
+-		bcmerror = -EISCONN;
+-		goto err;
+-	}
+-	if (!len) {
+-		bcmerror = -EOVERFLOW;
+-		goto err;
+-	}
+-
+-	/* Free the old ones and replace with passed variables */
+-	kfree(bus->vars);
+-
+-	bus->vars = kmalloc(len, GFP_ATOMIC);
+-	bus->varsz = bus->vars ? len : 0;
+-	if (bus->vars == NULL) {
+-		bcmerror = -ENOMEM;
+-		goto err;
+-	}
+-
+-	/* Copy the passed variables, which should include the
+-		 terminating double-null */
+-	memcpy(bus->vars, arg, bus->varsz);
+-err:
+-	return bcmerror;
+-}
+-
+-static int
+-dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid,
+-		const char *name, void *params, int plen, void *arg, int len,
+-		int val_size)
+-{
+-	int bcmerror = 0;
+-	s32 int_val = 0;
+-	bool bool_val = 0;
+-
+-	DHD_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p "
+-		"len %d val_size %d\n",
+-		__func__, actionid, name, params, plen, arg, len, val_size));
+-
+-	bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid));
+-	if (bcmerror != 0)
+-		goto exit;
+-
+-	if (plen >= (int)sizeof(int_val))
+-		memcpy(&int_val, params, sizeof(int_val));
+-
+-	bool_val = (int_val != 0) ? true : false;
+-
+-	/* Some ioctls use the bus */
+-	dhd_os_sdlock(bus->dhd);
+-
+-	/* Check if dongle is in reset. If so, only allow DEVRESET iovars */
+-	if (bus->dhd->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) ||
+-					actionid == IOV_GVAL(IOV_DEVRESET))) {
+-		bcmerror = -EPERM;
+-		goto exit;
+-	}
+-
+-	/* Handle sleep stuff before any clock mucking */
+-	if (vi->varid == IOV_SLEEP) {
+-		if (IOV_ISSET(actionid)) {
+-			bcmerror = dhdsdio_bussleep(bus, bool_val);
+-		} else {
+-			int_val = (s32) bus->sleeping;
+-			memcpy(arg, &int_val, val_size);
+-		}
+-		goto exit;
+-	}
+-
+-	/* Request clock to allow SDIO accesses */
+-	if (!bus->dhd->dongle_reset) {
+-		BUS_WAKE(bus);
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-	}
+-
+-	switch (actionid) {
+-	case IOV_GVAL(IOV_INTR):
+-		int_val = (s32) bus->intr;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_INTR):
+-		bus->intr = bool_val;
+-		bus->intdis = false;
+-		if (bus->dhd->up) {
+-			if (bus->intr) {
+-				DHD_INTR(("%s: enable SDIO device interrupts\n",
+-					  __func__));
+-				bcmsdh_intr_enable(bus->sdh);
+-			} else {
+-				DHD_INTR(("%s: disable SDIO interrupts\n",
+-					  __func__));
+-				bcmsdh_intr_disable(bus->sdh);
+-			}
+-		}
+-		break;
+-
+-	case IOV_GVAL(IOV_POLLRATE):
+-		int_val = (s32) bus->pollrate;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_POLLRATE):
+-		bus->pollrate = (uint) int_val;
+-		bus->poll = (bus->pollrate != 0);
+-		break;
+-
+-	case IOV_GVAL(IOV_IDLETIME):
+-		int_val = bus->idletime;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_IDLETIME):
+-		if ((int_val < 0) && (int_val != DHD_IDLE_IMMEDIATE))
+-			bcmerror = -EINVAL;
+-		else
+-			bus->idletime = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_IDLECLOCK):
+-		int_val = (s32) bus->idleclock;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_IDLECLOCK):
+-		bus->idleclock = int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_SD1IDLE):
+-		int_val = (s32) sd1idle;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_SD1IDLE):
+-		sd1idle = bool_val;
+-		break;
+-
+-	case IOV_SVAL(IOV_MEMBYTES):
+-	case IOV_GVAL(IOV_MEMBYTES):
+-		{
+-			u32 address;
+-			uint size, dsize;
+-			u8 *data;
+-
+-			bool set = (actionid == IOV_SVAL(IOV_MEMBYTES));
+-
+-			ASSERT(plen >= 2 * sizeof(int));
+-
+-			address = (u32) int_val;
+-			memcpy(&int_val, (char *)params + sizeof(int_val),
+-			       sizeof(int_val));
+-			size = (uint) int_val;
+-
+-			/* Do some validation */
+-			dsize = set ? plen - (2 * sizeof(int)) : len;
+-			if (dsize < size) {
+-				DHD_ERROR(("%s: error on %s membytes, addr "
+-				"0x%08x size %d dsize %d\n",
+-				__func__, (set ? "set" : "get"),
+-				address, size, dsize));
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-
+-			DHD_INFO(("%s: Request to %s %d bytes at address "
+-			"0x%08x\n",
+-			__func__, (set ? "write" : "read"), size, address));
+-
+-			/* If we know about SOCRAM, check for a fit */
+-			if ((bus->orig_ramsize) &&
+-			    ((address > bus->orig_ramsize)
+-			     || (address + size > bus->orig_ramsize))) {
+-				DHD_ERROR(("%s: ramsize 0x%08x doesn't have %d "
+-				"bytes at 0x%08x\n",
+-				__func__, bus->orig_ramsize, size, address));
+-				bcmerror = -EINVAL;
+-				break;
+-			}
+-
+-			/* Generate the actual data pointer */
+-			data =
+-			    set ? (u8 *) params +
+-			    2 * sizeof(int) : (u8 *) arg;
+-
+-			/* Call to do the transfer */
+-			bcmerror =
+-			    dhdsdio_membytes(bus, set, address, data, size);
+-
+-			break;
+-		}
+-
+-	case IOV_GVAL(IOV_MEMSIZE):
+-		int_val = (s32) bus->ramsize;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_GVAL(IOV_SDIOD_DRIVE):
+-		int_val = (s32) dhd_sdiod_drive_strength;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_SDIOD_DRIVE):
+-		dhd_sdiod_drive_strength = int_val;
+-		dhdsdio_sdiod_drive_strength_init(bus,
+-					     dhd_sdiod_drive_strength);
+-		break;
+-
+-	case IOV_SVAL(IOV_DOWNLOAD):
+-		bcmerror = dhdsdio_download_state(bus, bool_val);
+-		break;
+-
+-	case IOV_SVAL(IOV_VARS):
+-		bcmerror = dhdsdio_downloadvars(bus, arg, len);
+-		break;
+-
+-	case IOV_GVAL(IOV_READAHEAD):
+-		int_val = (s32) dhd_readahead;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_READAHEAD):
+-		if (bool_val && !dhd_readahead)
+-			bus->nextlen = 0;
+-		dhd_readahead = bool_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_SDRXCHAIN):
+-		int_val = (s32) bus->use_rxchain;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_SDRXCHAIN):
+-		if (bool_val && !bus->sd_rxchain)
+-			bcmerror = -ENOTSUPP;
+-		else
+-			bus->use_rxchain = bool_val;
+-		break;
+-	case IOV_GVAL(IOV_ALIGNCTL):
+-		int_val = (s32) dhd_alignctl;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_ALIGNCTL):
+-		dhd_alignctl = bool_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_SDALIGN):
+-		int_val = DHD_SDALIGN;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-#ifdef DHD_DEBUG
+-	case IOV_GVAL(IOV_VARS):
+-		if (bus->varsz < (uint) len)
+-			memcpy(arg, bus->vars, bus->varsz);
+-		else
+-			bcmerror = -EOVERFLOW;
+-		break;
+-#endif				/* DHD_DEBUG */
+-
+-#ifdef DHD_DEBUG
+-	case IOV_GVAL(IOV_SDREG):
+-		{
+-			sdreg_t *sd_ptr;
+-			u32 addr, size;
+-
+-			sd_ptr = (sdreg_t *) params;
+-
+-			addr = (unsigned long)bus->regs + sd_ptr->offset;
+-			size = sd_ptr->func;
+-			int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size);
+-			if (bcmsdh_regfail(bus->sdh))
+-				bcmerror = -EIO;
+-			memcpy(arg, &int_val, sizeof(s32));
+-			break;
+-		}
+-
+-	case IOV_SVAL(IOV_SDREG):
+-		{
+-			sdreg_t *sd_ptr;
+-			u32 addr, size;
+-
+-			sd_ptr = (sdreg_t *) params;
+-
+-			addr = (unsigned long)bus->regs + sd_ptr->offset;
+-			size = sd_ptr->func;
+-			bcmsdh_reg_write(bus->sdh, addr, size, sd_ptr->value);
+-			if (bcmsdh_regfail(bus->sdh))
+-				bcmerror = -EIO;
+-			break;
+-		}
+-
+-		/* Same as above, but offset is not backplane
+-		 (not SDIO core) */
+-	case IOV_GVAL(IOV_SBREG):
+-		{
+-			sdreg_t sdreg;
+-			u32 addr, size;
+-
+-			memcpy(&sdreg, params, sizeof(sdreg));
+-
+-			addr = SI_ENUM_BASE + sdreg.offset;
+-			size = sdreg.func;
+-			int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size);
+-			if (bcmsdh_regfail(bus->sdh))
+-				bcmerror = -EIO;
+-			memcpy(arg, &int_val, sizeof(s32));
+-			break;
+-		}
+-
+-	case IOV_SVAL(IOV_SBREG):
+-		{
+-			sdreg_t sdreg;
+-			u32 addr, size;
+-
+-			memcpy(&sdreg, params, sizeof(sdreg));
+-
+-			addr = SI_ENUM_BASE + sdreg.offset;
+-			size = sdreg.func;
+-			bcmsdh_reg_write(bus->sdh, addr, size, sdreg.value);
+-			if (bcmsdh_regfail(bus->sdh))
+-				bcmerror = -EIO;
+-			break;
+-		}
+-
+-	case IOV_GVAL(IOV_SDCIS):
+-		{
+-			*(char *)arg = 0;
+-
+-			strcat(arg, "\nFunc 0\n");
+-			bcmsdh_cis_read(bus->sdh, 0x10,
+-					(u8 *) arg + strlen(arg),
+-					SBSDIO_CIS_SIZE_LIMIT);
+-			strcat(arg, "\nFunc 1\n");
+-			bcmsdh_cis_read(bus->sdh, 0x11,
+-					(u8 *) arg + strlen(arg),
+-					SBSDIO_CIS_SIZE_LIMIT);
+-			strcat(arg, "\nFunc 2\n");
+-			bcmsdh_cis_read(bus->sdh, 0x12,
+-					(u8 *) arg + strlen(arg),
+-					SBSDIO_CIS_SIZE_LIMIT);
+-			break;
+-		}
+-
+-	case IOV_GVAL(IOV_FORCEEVEN):
+-		int_val = (s32) forcealign;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_FORCEEVEN):
+-		forcealign = bool_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_TXBOUND):
+-		int_val = (s32) dhd_txbound;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_TXBOUND):
+-		dhd_txbound = (uint) int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_RXBOUND):
+-		int_val = (s32) dhd_rxbound;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_RXBOUND):
+-		dhd_rxbound = (uint) int_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_TXMINMAX):
+-		int_val = (s32) dhd_txminmax;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_TXMINMAX):
+-		dhd_txminmax = (uint) int_val;
+-		break;
+-#endif				/* DHD_DEBUG */
+-
+-#ifdef SDTEST
+-	case IOV_GVAL(IOV_EXTLOOP):
+-		int_val = (s32) bus->ext_loop;
+-		memcpy(arg, &int_val, val_size);
+-		break;
+-
+-	case IOV_SVAL(IOV_EXTLOOP):
+-		bus->ext_loop = bool_val;
+-		break;
+-
+-	case IOV_GVAL(IOV_PKTGEN):
+-		bcmerror = dhdsdio_pktgen_get(bus, arg);
+-		break;
+-
+-	case IOV_SVAL(IOV_PKTGEN):
+-		bcmerror = dhdsdio_pktgen_set(bus, arg);
+-		break;
+-#endif				/* SDTEST */
+-
+-	case IOV_SVAL(IOV_DEVRESET):
+-		DHD_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d "
+-			"busstate=%d\n",
+-			__func__, bool_val, bus->dhd->dongle_reset,
+-			bus->dhd->busstate));
+-
+-		dhd_bus_devreset(bus->dhd, (u8) bool_val);
+-
+-		break;
+-
+-	case IOV_GVAL(IOV_DEVRESET):
+-		DHD_TRACE(("%s: Called get IOV_DEVRESET\n", __func__));
+-
+-		/* Get its status */
+-		int_val = (bool) bus->dhd->dongle_reset;
+-		memcpy(arg, &int_val, val_size);
+-
+-		break;
+-
+-	default:
+-		bcmerror = -ENOTSUPP;
+-		break;
+-	}
+-
+-exit:
+-	if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
+-		bus->activity = false;
+-		dhdsdio_clkctl(bus, CLK_NONE, true);
+-	}
+-
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false)
+-		dhd_preinit_ioctls((dhd_pub_t *) bus->dhd);
+-
+-	return bcmerror;
+-}
+-
+-static int dhdsdio_write_vars(dhd_bus_t *bus)
+-{
+-	int bcmerror = 0;
+-	u32 varsize;
+-	u32 varaddr;
+-	u8 *vbuffer;
+-	u32 varsizew;
+-#ifdef DHD_DEBUG
+-	char *nvram_ularray;
+-#endif				/* DHD_DEBUG */
+-
+-	/* Even if there are no vars are to be written, we still
+-		 need to set the ramsize. */
+-	varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
+-	varaddr = (bus->ramsize - 4) - varsize;
+-
+-	if (bus->vars) {
+-		vbuffer = kzalloc(varsize, GFP_ATOMIC);
+-		if (!vbuffer)
+-			return -ENOMEM;
+-
+-		memcpy(vbuffer, bus->vars, bus->varsz);
+-
+-		/* Write the vars list */
+-		bcmerror =
+-		    dhdsdio_membytes(bus, true, varaddr, vbuffer, varsize);
+-#ifdef DHD_DEBUG
+-		/* Verify NVRAM bytes */
+-		DHD_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize));
+-		nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
+-		if (!nvram_ularray)
+-			return -ENOMEM;
+-
+-		/* Upload image to verify downloaded contents. */
+-		memset(nvram_ularray, 0xaa, varsize);
+-
+-		/* Read the vars list to temp buffer for comparison */
+-		bcmerror =
+-		    dhdsdio_membytes(bus, false, varaddr, nvram_ularray,
+-				     varsize);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: error %d on reading %d nvram bytes at "
+-			"0x%08x\n", __func__, bcmerror, varsize, varaddr));
+-		}
+-		/* Compare the org NVRAM with the one read from RAM */
+-		if (memcmp(vbuffer, nvram_ularray, varsize)) {
+-			DHD_ERROR(("%s: Downloaded NVRAM image is corrupted.\n",
+-				   __func__));
+-		} else
+-			DHD_ERROR(("%s: Download/Upload/Compare of NVRAM ok.\n",
+-				__func__));
+-
+-		kfree(nvram_ularray);
+-#endif				/* DHD_DEBUG */
+-
+-		kfree(vbuffer);
+-	}
+-
+-	/* adjust to the user specified RAM */
+-	DHD_INFO(("Physical memory size: %d, usable memory size: %d\n",
+-		  bus->orig_ramsize, bus->ramsize));
+-	DHD_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize));
+-	varsize = ((bus->orig_ramsize - 4) - varaddr);
+-
+-	/*
+-	 * Determine the length token:
+-	 * Varsize, converted to words, in lower 16-bits, checksum
+-	 * in upper 16-bits.
+-	 */
+-	if (bcmerror) {
+-		varsizew = 0;
+-	} else {
+-		varsizew = varsize / 4;
+-		varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
+-		varsizew = cpu_to_le32(varsizew);
+-	}
+-
+-	DHD_INFO(("New varsize is %d, length token=0x%08x\n", varsize,
+-		  varsizew));
+-
+-	/* Write the length token to the last word */
+-	bcmerror = dhdsdio_membytes(bus, true, (bus->orig_ramsize - 4),
+-				    (u8 *)&varsizew, 4);
+-
+-	return bcmerror;
+-}
+-
+-static int dhdsdio_download_state(dhd_bus_t *bus, bool enter)
+-{
+-	uint retries;
+-	u32 regdata;
+-	int bcmerror = 0;
+-
+-	/* To enter download state, disable ARM and reset SOCRAM.
+-	 * To exit download state, simply reset ARM (default is RAM boot).
+-	 */
+-	if (enter) {
+-		bus->alp_only = true;
+-
+-		dhdsdio_chip_disablecore(bus->sdh, bus->ci->armcorebase);
+-
+-		dhdsdio_chip_resetcore(bus->sdh, bus->ci->ramcorebase);
+-
+-		/* Clear the top bit of memory */
+-		if (bus->ramsize) {
+-			u32 zeros = 0;
+-			dhdsdio_membytes(bus, true, bus->ramsize - 4,
+-					 (u8 *)&zeros, 4);
+-		}
+-	} else {
+-		regdata = bcmsdh_reg_read(bus->sdh,
+-			CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4);
+-		regdata &= (SBTML_RESET | SBTML_REJ_MASK |
+-			(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+-		if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) {
+-			DHD_ERROR(("%s: SOCRAM core is down after reset?\n",
+-				   __func__));
+-			bcmerror = -EBADE;
+-			goto fail;
+-		}
+-
+-		bcmerror = dhdsdio_write_vars(bus);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: no vars written to RAM\n", __func__));
+-			bcmerror = 0;
+-		}
+-
+-		W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries);
+-
+-		dhdsdio_chip_resetcore(bus->sdh, bus->ci->armcorebase);
+-
+-		/* Allow HT Clock now that the ARM is running. */
+-		bus->alp_only = false;
+-
+-		bus->dhd->busstate = DHD_BUS_LOAD;
+-	}
+-fail:
+-	return bcmerror;
+-}
+-
+-int
+-dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name,
+-		 void *params, int plen, void *arg, int len, bool set)
+-{
+-	dhd_bus_t *bus = dhdp->bus;
+-	const bcm_iovar_t *vi = NULL;
+-	int bcmerror = 0;
+-	int val_size;
+-	u32 actionid;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ASSERT(name);
+-	ASSERT(len >= 0);
+-
+-	/* Get MUST have return space */
+-	ASSERT(set || (arg && len));
+-
+-	/* Set does NOT take qualifiers */
+-	ASSERT(!set || (!params && !plen));
+-
+-	/* Look up var locally; if not found pass to host driver */
+-	vi = bcm_iovar_lookup(dhdsdio_iovars, name);
+-	if (vi == NULL) {
+-		dhd_os_sdlock(bus->dhd);
+-
+-		BUS_WAKE(bus);
+-
+-		/* Turn on clock in case SD command needs backplane */
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-		bcmerror =
+-		    bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len,
+-				    set);
+-
+-		/* Check for bus configuration changes of interest */
+-
+-		/* If it was divisor change, read the new one */
+-		if (set && strcmp(name, "sd_divisor") == 0) {
+-			if (bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0,
+-					    &bus->sd_divisor, sizeof(s32),
+-					    false) != 0) {
+-				bus->sd_divisor = -1;
+-				DHD_ERROR(("%s: fail on %s get\n", __func__,
+-					   name));
+-			} else {
+-				DHD_INFO(("%s: noted %s update, value now %d\n",
+-					  __func__, name, bus->sd_divisor));
+-			}
+-		}
+-		/* If it was a mode change, read the new one */
+-		if (set && strcmp(name, "sd_mode") == 0) {
+-			if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0,
+-					    &bus->sd_mode, sizeof(s32),
+-					    false) != 0) {
+-				bus->sd_mode = -1;
+-				DHD_ERROR(("%s: fail on %s get\n", __func__,
+-					   name));
+-			} else {
+-				DHD_INFO(("%s: noted %s update, value now %d\n",
+-					  __func__, name, bus->sd_mode));
+-			}
+-		}
+-		/* Similar check for blocksize change */
+-		if (set && strcmp(name, "sd_blocksize") == 0) {
+-			s32 fnum = 2;
+-			if (bcmsdh_iovar_op
+-			    (bus->sdh, "sd_blocksize", &fnum, sizeof(s32),
+-			     &bus->blocksize, sizeof(s32),
+-			     false) != 0) {
+-				bus->blocksize = 0;
+-				DHD_ERROR(("%s: fail on %s get\n", __func__,
+-					   "sd_blocksize"));
+-			} else {
+-				DHD_INFO(("%s: noted %s update, value now %d\n",
+-					  __func__, "sd_blocksize",
+-					  bus->blocksize));
+-			}
+-		}
+-		bus->roundup = min(max_roundup, bus->blocksize);
+-
+-		if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
+-			bus->activity = false;
+-			dhdsdio_clkctl(bus, CLK_NONE, true);
+-		}
+-
+-		dhd_os_sdunlock(bus->dhd);
+-		goto exit;
+-	}
+-
+-	DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__,
+-		 name, (set ? "set" : "get"), len, plen));
+-
+-	/* set up 'params' pointer in case this is a set command so that
+-	 * the convenience int and bool code can be common to set and get
+-	 */
+-	if (params == NULL) {
+-		params = arg;
+-		plen = len;
+-	}
+-
+-	if (vi->type == IOVT_VOID)
+-		val_size = 0;
+-	else if (vi->type == IOVT_BUFFER)
+-		val_size = len;
+-	else
+-		/* all other types are integer sized */
+-		val_size = sizeof(int);
+-
+-	actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid);
+-	bcmerror =
+-	    dhdsdio_doiovar(bus, vi, actionid, name, params, plen, arg, len,
+-			    val_size);
+-
+-exit:
+-	return bcmerror;
+-}
+-
+-void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex)
+-{
+-	u32 local_hostintmask;
+-	u8 saveclk;
+-	uint retries;
+-	int err;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (enforce_mutex)
+-		dhd_os_sdlock(bus->dhd);
+-
+-	BUS_WAKE(bus);
+-
+-	/* Enable clock for device interrupts */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-	/* Disable and clear interrupts at the chip level also */
+-	W_SDREG(0, &bus->regs->hostintmask, retries);
+-	local_hostintmask = bus->hostintmask;
+-	bus->hostintmask = 0;
+-
+-	/* Change our idea of bus state */
+-	bus->dhd->busstate = DHD_BUS_DOWN;
+-
+-	/* Force clocks on backplane to be sure F2 interrupt propagates */
+-	saveclk =
+-	    bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-			    &err);
+-	if (!err) {
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 (saveclk | SBSDIO_FORCE_HT), &err);
+-	}
+-	if (err) {
+-		DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
+-			   __func__, err));
+-	}
+-
+-	/* Turn off the bus (F2), free any pending packets */
+-	DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
+-	bcmsdh_intr_disable(bus->sdh);
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN,
+-			 SDIO_FUNC_ENABLE_1, NULL);
+-
+-	/* Clear any pending interrupts now that F2 is disabled */
+-	W_SDREG(local_hostintmask, &bus->regs->intstatus, retries);
+-
+-	/* Turn off the backplane clock (only) */
+-	dhdsdio_clkctl(bus, CLK_SDONLY, false);
+-
+-	/* Clear the data packet queues */
+-	bcm_pktq_flush(&bus->txq, true, NULL, NULL);
+-
+-	/* Clear any held glomming stuff */
+-	if (bus->glomd)
+-		bcm_pkt_buf_free_skb(bus->glomd);
+-
+-	if (bus->glom)
+-		bcm_pkt_buf_free_skb(bus->glom);
+-
+-	bus->glom = bus->glomd = NULL;
+-
+-	/* Clear rx control and wake any waiters */
+-	bus->rxlen = 0;
+-	dhd_os_ioctl_resp_wake(bus->dhd);
+-
+-	/* Reset some F2 state stuff */
+-	bus->rxskip = false;
+-	bus->tx_seq = bus->rx_seq = 0;
+-
+-	if (enforce_mutex)
+-		dhd_os_sdunlock(bus->dhd);
+-}
+-
+-int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex)
+-{
+-	dhd_bus_t *bus = dhdp->bus;
+-	dhd_timeout_t tmo;
+-	uint retries = 0;
+-	u8 ready, enable;
+-	int err, ret = 0;
+-	u8 saveclk;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ASSERT(bus->dhd);
+-	if (!bus->dhd)
+-		return 0;
+-
+-	if (enforce_mutex)
+-		dhd_os_sdlock(bus->dhd);
+-
+-	/* Make sure backplane clock is on, needed to generate F2 interrupt */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-	if (bus->clkstate != CLK_AVAIL)
+-		goto exit;
+-
+-	/* Force clocks on backplane to be sure F2 interrupt propagates */
+-	saveclk =
+-	    bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-			    &err);
+-	if (!err) {
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 (saveclk | SBSDIO_FORCE_HT), &err);
+-	}
+-	if (err) {
+-		DHD_ERROR(("%s: Failed to force clock for F2: err %d\n",
+-			   __func__, err));
+-		goto exit;
+-	}
+-
+-	/* Enable function 2 (frame transfers) */
+-	W_SDREG((SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT),
+-		&bus->regs->tosbmailboxdata, retries);
+-	enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
+-
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL);
+-
+-	/* Give the dongle some time to do its thing and set IOR2 */
+-	dhd_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000);
+-
+-	ready = 0;
+-	while (ready != enable && !dhd_timeout_expired(&tmo))
+-		ready =
+-		    bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IORDY,
+-				    NULL);
+-
+-	DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n",
+-		  __func__, enable, ready, tmo.elapsed));
+-
+-	/* If F2 successfully enabled, set core and enable interrupts */
+-	if (ready == enable) {
+-		/* Set up the interrupt mask and enable interrupts */
+-		bus->hostintmask = HOSTINTMASK;
+-		W_SDREG(bus->hostintmask,
+-			(unsigned int *)CORE_BUS_REG(bus->ci->buscorebase,
+-			hostintmask), retries);
+-
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK,
+-				 (u8) watermark, &err);
+-
+-		/* Set bus state according to enable result */
+-		dhdp->busstate = DHD_BUS_DATA;
+-
+-		/* bcmsdh_intr_unmask(bus->sdh); */
+-
+-		bus->intdis = false;
+-		if (bus->intr) {
+-			DHD_INTR(("%s: enable SDIO device interrupts\n",
+-				  __func__));
+-			bcmsdh_intr_enable(bus->sdh);
+-		} else {
+-			DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
+-			bcmsdh_intr_disable(bus->sdh);
+-		}
+-
+-	}
+-
+-	else {
+-		/* Disable F2 again */
+-		enable = SDIO_FUNC_ENABLE_1;
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable,
+-				 NULL);
+-	}
+-
+-	/* Restore previous clock setting */
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-			 saveclk, &err);
+-
+-	/* If we didn't come up, turn off backplane clock */
+-	if (dhdp->busstate != DHD_BUS_DATA)
+-		dhdsdio_clkctl(bus, CLK_NONE, false);
+-
+-exit:
+-	if (enforce_mutex)
+-		dhd_os_sdunlock(bus->dhd);
+-
+-	return ret;
+-}
+-
+-static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx)
+-{
+-	bcmsdh_info_t *sdh = bus->sdh;
+-	sdpcmd_regs_t *regs = bus->regs;
+-	uint retries = 0;
+-	u16 lastrbc;
+-	u8 hi, lo;
+-	int err;
+-
+-	DHD_ERROR(("%s: %sterminate frame%s\n", __func__,
+-		   (abort ? "abort command, " : ""),
+-		   (rtx ? ", send NAK" : "")));
+-
+-	if (abort)
+-		bcmsdh_abort(sdh, SDIO_FUNC_2);
+-
+-	bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
+-			 &err);
+-	bus->f1regdata++;
+-
+-	/* Wait until the packet has been flushed (device/FIFO stable) */
+-	for (lastrbc = retries = 0xffff; retries > 0; retries--) {
+-		hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCHI,
+-				     NULL);
+-		lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCLO,
+-				     NULL);
+-		bus->f1regdata += 2;
+-
+-		if ((hi == 0) && (lo == 0))
+-			break;
+-
+-		if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
+-			DHD_ERROR(("%s: count growing: last 0x%04x now "
+-				"0x%04x\n",
+-				__func__, lastrbc, ((hi << 8) + lo)));
+-		}
+-		lastrbc = (hi << 8) + lo;
+-	}
+-
+-	if (!retries) {
+-		DHD_ERROR(("%s: count never zeroed: last 0x%04x\n",
+-			   __func__, lastrbc));
+-	} else {
+-		DHD_INFO(("%s: flush took %d iterations\n", __func__,
+-			  (0xffff - retries)));
+-	}
+-
+-	if (rtx) {
+-		bus->rxrtx++;
+-		W_SDREG(SMB_NAK, &regs->tosbmailbox, retries);
+-		bus->f1regdata++;
+-		if (retries <= retry_limit)
+-			bus->rxskip = true;
+-	}
+-
+-	/* Clear partial in any case */
+-	bus->nextlen = 0;
+-
+-	/* If we can't reach the device, signal failure */
+-	if (err || bcmsdh_regfail(sdh))
+-		bus->dhd->busstate = DHD_BUS_DOWN;
+-}
+-
+-static void
+-dhdsdio_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff)
+-{
+-	bcmsdh_info_t *sdh = bus->sdh;
+-	uint rdlen, pad;
+-
+-	int sdret;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Control data already received in aligned rxctl */
+-	if ((bus->bus == SPI_BUS) && (!bus->usebufpool))
+-		goto gotpkt;
+-
+-	ASSERT(bus->rxbuf);
+-	/* Set rxctl for frame (w/optional alignment) */
+-	bus->rxctl = bus->rxbuf;
+-	if (dhd_alignctl) {
+-		bus->rxctl += firstread;
+-		pad = ((unsigned long)bus->rxctl % DHD_SDALIGN);
+-		if (pad)
+-			bus->rxctl += (DHD_SDALIGN - pad);
+-		bus->rxctl -= firstread;
+-	}
+-	ASSERT(bus->rxctl >= bus->rxbuf);
+-
+-	/* Copy the already-read portion over */
+-	memcpy(bus->rxctl, hdr, firstread);
+-	if (len <= firstread)
+-		goto gotpkt;
+-
+-	/* Copy the full data pkt in gSPI case and process ioctl. */
+-	if (bus->bus == SPI_BUS) {
+-		memcpy(bus->rxctl, hdr, len);
+-		goto gotpkt;
+-	}
+-
+-	/* Raise rdlen to next SDIO block to avoid tail command */
+-	rdlen = len - firstread;
+-	if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
+-		pad = bus->blocksize - (rdlen % bus->blocksize);
+-		if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
+-		    ((len + pad) < bus->dhd->maxctl))
+-			rdlen += pad;
+-	} else if (rdlen % DHD_SDALIGN) {
+-		rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN);
+-	}
+-
+-	/* Satisfy length-alignment requirements */
+-	if (forcealign && (rdlen & (ALIGNMENT - 1)))
+-		rdlen = roundup(rdlen, ALIGNMENT);
+-
+-	/* Drop if the read is too big or it exceeds our maximum */
+-	if ((rdlen + firstread) > bus->dhd->maxctl) {
+-		DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n",
+-			   __func__, rdlen, bus->dhd->maxctl));
+-		bus->dhd->rx_errors++;
+-		dhdsdio_rxfail(bus, false, false);
+-		goto done;
+-	}
+-
+-	if ((len - doff) > bus->dhd->maxctl) {
+-		DHD_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds "
+-			"%d-byte limit\n",
+-			__func__, len, (len - doff), bus->dhd->maxctl));
+-		bus->dhd->rx_errors++;
+-		bus->rx_toolong++;
+-		dhdsdio_rxfail(bus, false, false);
+-		goto done;
+-	}
+-
+-	/* Read remainder of frame body into the rxctl buffer */
+-	sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
+-				F2SYNC, (bus->rxctl + firstread), rdlen,
+-				NULL, NULL, NULL);
+-	bus->f2rxdata++;
+-	ASSERT(sdret != -BCME_PENDING);
+-
+-	/* Control frame failures need retransmission */
+-	if (sdret < 0) {
+-		DHD_ERROR(("%s: read %d control bytes failed: %d\n",
+-			   __func__, rdlen, sdret));
+-		bus->rxc_errors++;	/* dhd.rx_ctlerrs is higher level */
+-		dhdsdio_rxfail(bus, true, true);
+-		goto done;
+-	}
+-
+-gotpkt:
+-
+-#ifdef DHD_DEBUG
+-	if (DHD_BYTES_ON() && DHD_CTL_ON()) {
+-		printk(KERN_DEBUG "RxCtrl:\n");
+-		print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len);
+-	}
+-#endif
+-
+-	/* Point to valid data and indicate its length */
+-	bus->rxctl += doff;
+-	bus->rxlen = len - doff;
+-
+-done:
+-	/* Awake any waiters */
+-	dhd_os_ioctl_resp_wake(bus->dhd);
+-}
+-
+-static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq)
+-{
+-	u16 dlen, totlen;
+-	u8 *dptr, num = 0;
+-
+-	u16 sublen, check;
+-	struct sk_buff *pfirst, *plast, *pnext, *save_pfirst;
+-
+-	int errcode;
+-	u8 chan, seq, doff, sfdoff;
+-	u8 txmax;
+-
+-	int ifidx = 0;
+-	bool usechain = bus->use_rxchain;
+-
+-	/* If packets, issue read(s) and send up packet chain */
+-	/* Return sequence numbers consumed? */
+-
+-	DHD_TRACE(("dhdsdio_rxglom: start: glomd %p glom %p\n", bus->glomd,
+-		   bus->glom));
+-
+-	/* If there's a descriptor, generate the packet chain */
+-	if (bus->glomd) {
+-		dhd_os_sdlock_rxq(bus->dhd);
+-
+-		pfirst = plast = pnext = NULL;
+-		dlen = (u16) (bus->glomd->len);
+-		dptr = bus->glomd->data;
+-		if (!dlen || (dlen & 1)) {
+-			DHD_ERROR(("%s: bad glomd len(%d), ignore descriptor\n",
+-			__func__, dlen));
+-			dlen = 0;
+-		}
+-
+-		for (totlen = num = 0; dlen; num++) {
+-			/* Get (and move past) next length */
+-			sublen = get_unaligned_le16(dptr);
+-			dlen -= sizeof(u16);
+-			dptr += sizeof(u16);
+-			if ((sublen < SDPCM_HDRLEN) ||
+-			    ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
+-				DHD_ERROR(("%s: descriptor len %d bad: %d\n",
+-					   __func__, num, sublen));
+-				pnext = NULL;
+-				break;
+-			}
+-			if (sublen % DHD_SDALIGN) {
+-				DHD_ERROR(("%s: sublen %d not multiple of %d\n",
+-				__func__, sublen, DHD_SDALIGN));
+-				usechain = false;
+-			}
+-			totlen += sublen;
+-
+-			/* For last frame, adjust read len so total
+-				 is a block multiple */
+-			if (!dlen) {
+-				sublen +=
+-				    (roundup(totlen, bus->blocksize) - totlen);
+-				totlen = roundup(totlen, bus->blocksize);
+-			}
+-
+-			/* Allocate/chain packet for next subframe */
+-			pnext = bcm_pkt_buf_get_skb(sublen + DHD_SDALIGN);
+-			if (pnext == NULL) {
+-				DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, "
+-					"num %d len %d\n", __func__,
+-					num, sublen));
+-				break;
+-			}
+-			ASSERT(!(pnext->prev));
+-			if (!pfirst) {
+-				ASSERT(!plast);
+-				pfirst = plast = pnext;
+-			} else {
+-				ASSERT(plast);
+-				plast->next = pnext;
+-				plast = pnext;
+-			}
+-
+-			/* Adhere to start alignment requirements */
+-			PKTALIGN(pnext, sublen, DHD_SDALIGN);
+-		}
+-
+-		/* If all allocations succeeded, save packet chain
+-			 in bus structure */
+-		if (pnext) {
+-			DHD_GLOM(("%s: allocated %d-byte packet chain for %d "
+-				"subframes\n", __func__, totlen, num));
+-			if (DHD_GLOM_ON() && bus->nextlen) {
+-				if (totlen != bus->nextlen) {
+-					DHD_GLOM(("%s: glomdesc mismatch: nextlen %d glomdesc %d " "rxseq %d\n",
+-						__func__, bus->nextlen,
+-						totlen, rxseq));
+-				}
+-			}
+-			bus->glom = pfirst;
+-			pfirst = pnext = NULL;
+-		} else {
+-			if (pfirst)
+-				bcm_pkt_buf_free_skb(pfirst);
+-			bus->glom = NULL;
+-			num = 0;
+-		}
+-
+-		/* Done with descriptor packet */
+-		bcm_pkt_buf_free_skb(bus->glomd);
+-		bus->glomd = NULL;
+-		bus->nextlen = 0;
+-
+-		dhd_os_sdunlock_rxq(bus->dhd);
+-	}
+-
+-	/* Ok -- either we just generated a packet chain,
+-		 or had one from before */
+-	if (bus->glom) {
+-		if (DHD_GLOM_ON()) {
+-			DHD_GLOM(("%s: try superframe read, packet chain:\n",
+-				__func__));
+-			for (pnext = bus->glom; pnext; pnext = pnext->next) {
+-				DHD_GLOM(("    %p: %p len 0x%04x (%d)\n",
+-					  pnext, (u8 *) (pnext->data),
+-					  pnext->len, pnext->len));
+-			}
+-		}
+-
+-		pfirst = bus->glom;
+-		dlen = (u16) bcm_pkttotlen(pfirst);
+-
+-		/* Do an SDIO read for the superframe.  Configurable iovar to
+-		 * read directly into the chained packet, or allocate a large
+-		 * packet and and copy into the chain.
+-		 */
+-		if (usechain) {
+-			errcode = bcmsdh_recv_buf(bus,
+-					bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2,
+-					F2SYNC, (u8 *) pfirst->data, dlen,
+-					pfirst, NULL, NULL);
+-		} else if (bus->dataptr) {
+-			errcode = bcmsdh_recv_buf(bus,
+-					bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2,
+-					F2SYNC, bus->dataptr, dlen,
+-					NULL, NULL, NULL);
+-			sublen = (u16) bcm_pktfrombuf(pfirst, 0, dlen,
+-						bus->dataptr);
+-			if (sublen != dlen) {
+-				DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n",
+-					__func__, dlen, sublen));
+-				errcode = -1;
+-			}
+-			pnext = NULL;
+-		} else {
+-			DHD_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
+-				dlen));
+-			errcode = -1;
+-		}
+-		bus->f2rxdata++;
+-		ASSERT(errcode != -BCME_PENDING);
+-
+-		/* On failure, kill the superframe, allow a couple retries */
+-		if (errcode < 0) {
+-			DHD_ERROR(("%s: glom read of %d bytes failed: %d\n",
+-				   __func__, dlen, errcode));
+-			bus->dhd->rx_errors++;
+-
+-			if (bus->glomerr++ < 3) {
+-				dhdsdio_rxfail(bus, true, true);
+-			} else {
+-				bus->glomerr = 0;
+-				dhdsdio_rxfail(bus, true, false);
+-				dhd_os_sdlock_rxq(bus->dhd);
+-				bcm_pkt_buf_free_skb(bus->glom);
+-				dhd_os_sdunlock_rxq(bus->dhd);
+-				bus->rxglomfail++;
+-				bus->glom = NULL;
+-			}
+-			return 0;
+-		}
+-#ifdef DHD_DEBUG
+-		if (DHD_GLOM_ON()) {
+-			printk(KERN_DEBUG "SUPERFRAME:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-				pfirst->data, min_t(int, pfirst->len, 48));
+-		}
+-#endif
+-
+-		/* Validate the superframe header */
+-		dptr = (u8 *) (pfirst->data);
+-		sublen = get_unaligned_le16(dptr);
+-		check = get_unaligned_le16(dptr + sizeof(u16));
+-
+-		chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
+-		seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
+-		bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
+-		if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
+-			DHD_INFO(("%s: nextlen too large (%d) seq %d\n",
+-				__func__, bus->nextlen, seq));
+-			bus->nextlen = 0;
+-		}
+-		doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
+-		txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
+-
+-		errcode = 0;
+-		if ((u16)~(sublen ^ check)) {
+-			DHD_ERROR(("%s (superframe): HW hdr error: len/check "
+-				"0x%04x/0x%04x\n", __func__, sublen, check));
+-			errcode = -1;
+-		} else if (roundup(sublen, bus->blocksize) != dlen) {
+-			DHD_ERROR(("%s (superframe): len 0x%04x, rounded "
+-				"0x%04x, expect 0x%04x\n",
+-				__func__, sublen,
+-				roundup(sublen, bus->blocksize), dlen));
+-			errcode = -1;
+-		} else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
+-			   SDPCM_GLOM_CHANNEL) {
+-			DHD_ERROR(("%s (superframe): bad channel %d\n",
+-				   __func__,
+-				   SDPCM_PACKET_CHANNEL(&dptr
+-							[SDPCM_FRAMETAG_LEN])));
+-			errcode = -1;
+-		} else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
+-			DHD_ERROR(("%s (superframe): got second descriptor?\n",
+-				   __func__));
+-			errcode = -1;
+-		} else if ((doff < SDPCM_HDRLEN) ||
+-			   (doff > (pfirst->len - SDPCM_HDRLEN))) {
+-			DHD_ERROR(("%s (superframe): Bad data offset %d: HW %d "
+-				"pkt %d min %d\n",
+-				__func__, doff, sublen,
+-				pfirst->len, SDPCM_HDRLEN));
+-			errcode = -1;
+-		}
+-
+-		/* Check sequence number of superframe SW header */
+-		if (rxseq != seq) {
+-			DHD_INFO(("%s: (superframe) rx_seq %d, expected %d\n",
+-				  __func__, seq, rxseq));
+-			bus->rx_badseq++;
+-			rxseq = seq;
+-		}
+-
+-		/* Check window for sanity */
+-		if ((u8) (txmax - bus->tx_seq) > 0x40) {
+-			DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
+-				__func__, txmax, bus->tx_seq));
+-			txmax = bus->tx_seq + 2;
+-		}
+-		bus->tx_max = txmax;
+-
+-		/* Remove superframe header, remember offset */
+-		skb_pull(pfirst, doff);
+-		sfdoff = doff;
+-
+-		/* Validate all the subframe headers */
+-		for (num = 0, pnext = pfirst; pnext && !errcode;
+-		     num++, pnext = pnext->next) {
+-			dptr = (u8 *) (pnext->data);
+-			dlen = (u16) (pnext->len);
+-			sublen = get_unaligned_le16(dptr);
+-			check = get_unaligned_le16(dptr + sizeof(u16));
+-			chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
+-			doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
+-#ifdef DHD_DEBUG
+-			if (DHD_GLOM_ON()) {
+-				printk(KERN_DEBUG "subframe:\n");
+-				print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-						     dptr, 32);
+-			}
+-#endif
+-
+-			if ((u16)~(sublen ^ check)) {
+-				DHD_ERROR(("%s (subframe %d): HW hdr error: "
+-					   "len/check 0x%04x/0x%04x\n",
+-					   __func__, num, sublen, check));
+-				errcode = -1;
+-			} else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
+-				DHD_ERROR(("%s (subframe %d): length mismatch: "
+-					   "len 0x%04x, expect 0x%04x\n",
+-					   __func__, num, sublen, dlen));
+-				errcode = -1;
+-			} else if ((chan != SDPCM_DATA_CHANNEL) &&
+-				   (chan != SDPCM_EVENT_CHANNEL)) {
+-				DHD_ERROR(("%s (subframe %d): bad channel %d\n",
+-					   __func__, num, chan));
+-				errcode = -1;
+-			} else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
+-				DHD_ERROR(("%s (subframe %d): Bad data offset %d: HW %d min %d\n",
+-					__func__, num, doff, sublen,
+-					SDPCM_HDRLEN));
+-				errcode = -1;
+-			}
+-		}
+-
+-		if (errcode) {
+-			/* Terminate frame on error, request
+-				 a couple retries */
+-			if (bus->glomerr++ < 3) {
+-				/* Restore superframe header space */
+-				skb_push(pfirst, sfdoff);
+-				dhdsdio_rxfail(bus, true, true);
+-			} else {
+-				bus->glomerr = 0;
+-				dhdsdio_rxfail(bus, true, false);
+-				dhd_os_sdlock_rxq(bus->dhd);
+-				bcm_pkt_buf_free_skb(bus->glom);
+-				dhd_os_sdunlock_rxq(bus->dhd);
+-				bus->rxglomfail++;
+-				bus->glom = NULL;
+-			}
+-			bus->nextlen = 0;
+-			return 0;
+-		}
+-
+-		/* Basic SD framing looks ok - process each packet (header) */
+-		save_pfirst = pfirst;
+-		bus->glom = NULL;
+-		plast = NULL;
+-
+-		dhd_os_sdlock_rxq(bus->dhd);
+-		for (num = 0; pfirst; rxseq++, pfirst = pnext) {
+-			pnext = pfirst->next;
+-			pfirst->next = NULL;
+-
+-			dptr = (u8 *) (pfirst->data);
+-			sublen = get_unaligned_le16(dptr);
+-			chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
+-			seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
+-			doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
+-
+-			DHD_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d "
+-				"chan %d seq %d\n",
+-				__func__, num, pfirst, pfirst->data,
+-				pfirst->len, sublen, chan, seq));
+-
+-			ASSERT((chan == SDPCM_DATA_CHANNEL)
+-			       || (chan == SDPCM_EVENT_CHANNEL));
+-
+-			if (rxseq != seq) {
+-				DHD_GLOM(("%s: rx_seq %d, expected %d\n",
+-					  __func__, seq, rxseq));
+-				bus->rx_badseq++;
+-				rxseq = seq;
+-			}
+-#ifdef DHD_DEBUG
+-			if (DHD_BYTES_ON() && DHD_DATA_ON()) {
+-				printk(KERN_DEBUG "Rx Subframe Data:\n");
+-				print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-						     dptr, dlen);
+-			}
+-#endif
+-
+-			__skb_trim(pfirst, sublen);
+-			skb_pull(pfirst, doff);
+-
+-			if (pfirst->len == 0) {
+-				bcm_pkt_buf_free_skb(pfirst);
+-				if (plast) {
+-					plast->next = pnext;
+-				} else {
+-					ASSERT(save_pfirst == pfirst);
+-					save_pfirst = pnext;
+-				}
+-				continue;
+-			} else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pfirst) !=
+-				   0) {
+-				DHD_ERROR(("%s: rx protocol error\n",
+-					   __func__));
+-				bus->dhd->rx_errors++;
+-				bcm_pkt_buf_free_skb(pfirst);
+-				if (plast) {
+-					plast->next = pnext;
+-				} else {
+-					ASSERT(save_pfirst == pfirst);
+-					save_pfirst = pnext;
+-				}
+-				continue;
+-			}
+-
+-			/* this packet will go up, link back into
+-				 chain and count it */
+-			pfirst->next = pnext;
+-			plast = pfirst;
+-			num++;
+-
+-#ifdef DHD_DEBUG
+-			if (DHD_GLOM_ON()) {
+-				DHD_GLOM(("%s subframe %d to stack, %p(%p/%d) "
+-				"nxt/lnk %p/%p\n",
+-				__func__, num, pfirst, pfirst->data,
+-				pfirst->len, pfirst->next,
+-				pfirst->prev));
+-				print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-						pfirst->data,
+-						min_t(int, pfirst->len, 32));
+-			}
+-#endif				/* DHD_DEBUG */
+-		}
+-		dhd_os_sdunlock_rxq(bus->dhd);
+-		if (num) {
+-			dhd_os_sdunlock(bus->dhd);
+-			dhd_rx_frame(bus->dhd, ifidx, save_pfirst, num);
+-			dhd_os_sdlock(bus->dhd);
+-		}
+-
+-		bus->rxglomframes++;
+-		bus->rxglompkts += num;
+-	}
+-	return num;
+-}
+-
+-/* Return true if there may be more frames to read */
+-static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished)
+-{
+-	bcmsdh_info_t *sdh = bus->sdh;
+-
+-	u16 len, check;	/* Extracted hardware header fields */
+-	u8 chan, seq, doff;	/* Extracted software header fields */
+-	u8 fcbits;		/* Extracted fcbits from software header */
+-
+-	struct sk_buff *pkt;		/* Packet for event or data frames */
+-	u16 pad;		/* Number of pad bytes to read */
+-	u16 rdlen;		/* Total number of bytes to read */
+-	u8 rxseq;		/* Next sequence number to expect */
+-	uint rxleft = 0;	/* Remaining number of frames allowed */
+-	int sdret;		/* Return code from bcmsdh calls */
+-	u8 txmax;		/* Maximum tx sequence offered */
+-	bool len_consistent;	/* Result of comparing readahead len and
+-					 len from hw-hdr */
+-	u8 *rxbuf;
+-	int ifidx = 0;
+-	uint rxcount = 0;	/* Total frames read */
+-
+-#if defined(DHD_DEBUG) || defined(SDTEST)
+-	bool sdtest = false;	/* To limit message spew from test mode */
+-#endif
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	ASSERT(maxframes);
+-
+-#ifdef SDTEST
+-	/* Allow pktgen to override maxframes */
+-	if (bus->pktgen_count && (bus->pktgen_mode == DHD_PKTGEN_RECV)) {
+-		maxframes = bus->pktgen_count;
+-		sdtest = true;
+-	}
+-#endif
+-
+-	/* Not finished unless we encounter no more frames indication */
+-	*finished = false;
+-
+-	for (rxseq = bus->rx_seq, rxleft = maxframes;
+-	     !bus->rxskip && rxleft && bus->dhd->busstate != DHD_BUS_DOWN;
+-	     rxseq++, rxleft--) {
+-
+-		/* Handle glomming separately */
+-		if (bus->glom || bus->glomd) {
+-			u8 cnt;
+-			DHD_GLOM(("%s: calling rxglom: glomd %p, glom %p\n",
+-				  __func__, bus->glomd, bus->glom));
+-			cnt = dhdsdio_rxglom(bus, rxseq);
+-			DHD_GLOM(("%s: rxglom returned %d\n", __func__, cnt));
+-			rxseq += cnt - 1;
+-			rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
+-			continue;
+-		}
+-
+-		/* Try doing single read if we can */
+-		if (dhd_readahead && bus->nextlen) {
+-			u16 nextlen = bus->nextlen;
+-			bus->nextlen = 0;
+-
+-			if (bus->bus == SPI_BUS) {
+-				rdlen = len = nextlen;
+-			} else {
+-				rdlen = len = nextlen << 4;
+-
+-				/* Pad read to blocksize for efficiency */
+-				if (bus->roundup && bus->blocksize
+-				    && (rdlen > bus->blocksize)) {
+-					pad =
+-					    bus->blocksize -
+-					    (rdlen % bus->blocksize);
+-					if ((pad <= bus->roundup)
+-					    && (pad < bus->blocksize)
+-					    && ((rdlen + pad + firstread) <
+-						MAX_RX_DATASZ))
+-						rdlen += pad;
+-				} else if (rdlen % DHD_SDALIGN) {
+-					rdlen +=
+-					    DHD_SDALIGN - (rdlen % DHD_SDALIGN);
+-				}
+-			}
+-
+-			/* We use bus->rxctl buffer in WinXP for initial
+-			 * control pkt receives.
+-			 * Later we use buffer-poll for data as well
+-			 * as control packets.
+-			 * This is required because dhd receives full
+-			 * frame in gSPI unlike SDIO.
+-			 * After the frame is received we have to
+-			 * distinguish whether it is data
+-			 * or non-data frame.
+-			 */
+-			/* Allocate a packet buffer */
+-			dhd_os_sdlock_rxq(bus->dhd);
+-			pkt = bcm_pkt_buf_get_skb(rdlen + DHD_SDALIGN);
+-			if (!pkt) {
+-				if (bus->bus == SPI_BUS) {
+-					bus->usebufpool = false;
+-					bus->rxctl = bus->rxbuf;
+-					if (dhd_alignctl) {
+-						bus->rxctl += firstread;
+-						pad = ((unsigned long)bus->rxctl %
+-						      DHD_SDALIGN);
+-						if (pad)
+-							bus->rxctl +=
+-							    (DHD_SDALIGN - pad);
+-						bus->rxctl -= firstread;
+-					}
+-					ASSERT(bus->rxctl >= bus->rxbuf);
+-					rxbuf = bus->rxctl;
+-					/* Read the entire frame */
+-					sdret = bcmsdh_recv_buf(bus,
+-						    bcmsdh_cur_sbwad(sdh),
+-						    SDIO_FUNC_2, F2SYNC,
+-						    rxbuf, rdlen,
+-						    NULL, NULL, NULL);
+-					bus->f2rxdata++;
+-					ASSERT(sdret != -BCME_PENDING);
+-
+-					/* Control frame failures need
+-					 retransmission */
+-					if (sdret < 0) {
+-						DHD_ERROR(("%s: read %d control bytes failed: %d\n",
+-							__func__,
+-							rdlen, sdret));
+-						/* dhd.rx_ctlerrs is higher */
+-						bus->rxc_errors++;
+-						dhd_os_sdunlock_rxq(bus->dhd);
+-						dhdsdio_rxfail(bus, true,
+-						       (bus->bus ==
+-							SPI_BUS) ? false
+-						       : true);
+-						continue;
+-					}
+-				} else {
+-					/* Give up on data,
+-					request rtx of events */
+-					DHD_ERROR(("%s (nextlen): "
+-						   "bcm_pkt_buf_get_skb failed:"
+-						   " len %d rdlen %d expected"
+-						   " rxseq %d\n", __func__,
+-						   len, rdlen, rxseq));
+-					/* Just go try again w/normal
+-					header read */
+-					dhd_os_sdunlock_rxq(bus->dhd);
+-					continue;
+-				}
+-			} else {
+-				if (bus->bus == SPI_BUS)
+-					bus->usebufpool = true;
+-
+-				ASSERT(!(pkt->prev));
+-				PKTALIGN(pkt, rdlen, DHD_SDALIGN);
+-				rxbuf = (u8 *) (pkt->data);
+-				/* Read the entire frame */
+-				sdret = bcmsdh_recv_buf(bus,
+-						bcmsdh_cur_sbwad(sdh),
+-						SDIO_FUNC_2, F2SYNC,
+-						rxbuf, rdlen,
+-						pkt, NULL, NULL);
+-				bus->f2rxdata++;
+-				ASSERT(sdret != -BCME_PENDING);
+-
+-				if (sdret < 0) {
+-					DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n",
+-						__func__, rdlen, sdret));
+-					bcm_pkt_buf_free_skb(pkt);
+-					bus->dhd->rx_errors++;
+-					dhd_os_sdunlock_rxq(bus->dhd);
+-					/* Force retry w/normal header read.
+-					 * Don't attempt NAK for
+-					 * gSPI
+-					 */
+-					dhdsdio_rxfail(bus, true,
+-						       (bus->bus ==
+-							SPI_BUS) ? false :
+-						       true);
+-					continue;
+-				}
+-			}
+-			dhd_os_sdunlock_rxq(bus->dhd);
+-
+-			/* Now check the header */
+-			memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
+-
+-			/* Extract hardware header fields */
+-			len = get_unaligned_le16(bus->rxhdr);
+-			check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
+-
+-			/* All zeros means readahead info was bad */
+-			if (!(len | check)) {
+-				DHD_INFO(("%s (nextlen): read zeros in HW "
+-					"header???\n", __func__));
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			/* Validate check bytes */
+-			if ((u16)~(len ^ check)) {
+-				DHD_ERROR(("%s (nextlen): HW hdr error:"
+-					" nextlen/len/check"
+-					" 0x%04x/0x%04x/0x%04x\n",
+-					__func__, nextlen, len, check));
+-				bus->rx_badhdr++;
+-				dhdsdio_rxfail(bus, false, false);
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			/* Validate frame length */
+-			if (len < SDPCM_HDRLEN) {
+-				DHD_ERROR(("%s (nextlen): HW hdr length "
+-					"invalid: %d\n", __func__, len));
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			/* Check for consistency withreadahead info */
+-			len_consistent = (nextlen != (roundup(len, 16) >> 4));
+-			if (len_consistent) {
+-				/* Mismatch, force retry w/normal
+-					header (may be >4K) */
+-				DHD_ERROR(("%s (nextlen): mismatch, "
+-					"nextlen %d len %d rnd %d; "
+-					"expected rxseq %d\n",
+-					__func__, nextlen,
+-					len, roundup(len, 16), rxseq));
+-				dhdsdio_rxfail(bus, true, (bus->bus != SPI_BUS));
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			/* Extract software header fields */
+-			chan = SDPCM_PACKET_CHANNEL(
+-					&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-			seq = SDPCM_PACKET_SEQUENCE(
+-					&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-			doff = SDPCM_DOFFSET_VALUE(
+-					&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-			txmax = SDPCM_WINDOW_VALUE(
+-					&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-
+-			bus->nextlen =
+-			    bus->rxhdr[SDPCM_FRAMETAG_LEN +
+-				       SDPCM_NEXTLEN_OFFSET];
+-			if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
+-				DHD_INFO(("%s (nextlen): got frame w/nextlen too large" " (%d), seq %d\n",
+-					__func__, bus->nextlen, seq));
+-				bus->nextlen = 0;
+-			}
+-
+-			bus->dhd->rx_readahead_cnt++;
+-
+-			/* Handle Flow Control */
+-			fcbits = SDPCM_FCMASK_VALUE(
+-					&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-
+-			if (bus->flowcontrol != fcbits) {
+-				if (~bus->flowcontrol & fcbits)
+-					bus->fc_xoff++;
+-
+-				if (bus->flowcontrol & ~fcbits)
+-					bus->fc_xon++;
+-
+-				bus->fc_rcvd++;
+-				bus->flowcontrol = fcbits;
+-			}
+-
+-			/* Check and update sequence number */
+-			if (rxseq != seq) {
+-				DHD_INFO(("%s (nextlen): rx_seq %d, expected "
+-					"%d\n", __func__, seq, rxseq));
+-				bus->rx_badseq++;
+-				rxseq = seq;
+-			}
+-
+-			/* Check window for sanity */
+-			if ((u8) (txmax - bus->tx_seq) > 0x40) {
+-				DHD_ERROR(("%s: got unlikely tx max %d with "
+-					"tx_seq %d\n",
+-					__func__, txmax, bus->tx_seq));
+-				txmax = bus->tx_seq + 2;
+-			}
+-			bus->tx_max = txmax;
+-
+-#ifdef DHD_DEBUG
+-			if (DHD_BYTES_ON() && DHD_DATA_ON()) {
+-				printk(KERN_DEBUG "Rx Data:\n");
+-				print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-						     rxbuf, len);
+-			} else if (DHD_HDRS_ON()) {
+-				printk(KERN_DEBUG "RxHdr:\n");
+-				print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-						     bus->rxhdr, SDPCM_HDRLEN);
+-			}
+-#endif
+-
+-			if (chan == SDPCM_CONTROL_CHANNEL) {
+-				if (bus->bus == SPI_BUS) {
+-					dhdsdio_read_control(bus, rxbuf, len,
+-							     doff);
+-				} else {
+-					DHD_ERROR(("%s (nextlen): readahead on control" " packet %d?\n",
+-						__func__, seq));
+-					/* Force retry w/normal header read */
+-					bus->nextlen = 0;
+-					dhdsdio_rxfail(bus, false, true);
+-				}
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			if ((bus->bus == SPI_BUS) && !bus->usebufpool) {
+-				DHD_ERROR(("Received %d bytes on %d channel. Running out of " "rx pktbuf's or not yet malloced.\n",
+-					len, chan));
+-				continue;
+-			}
+-
+-			/* Validate data offset */
+-			if ((doff < SDPCM_HDRLEN) || (doff > len)) {
+-				DHD_ERROR(("%s (nextlen): bad data offset %d: HW len %d min %d\n",
+-					__func__, doff, len, SDPCM_HDRLEN));
+-				dhdsdio_rxfail(bus, false, false);
+-				dhdsdio_pktfree2(bus, pkt);
+-				continue;
+-			}
+-
+-			/* All done with this one -- now deliver the packet */
+-			goto deliver;
+-		}
+-		/* gSPI frames should not be handled in fractions */
+-		if (bus->bus == SPI_BUS)
+-			break;
+-
+-		/* Read frame header (hardware and software) */
+-		sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh),
+-				SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread,
+-				NULL, NULL, NULL);
+-		bus->f2rxhdrs++;
+-		ASSERT(sdret != -BCME_PENDING);
+-
+-		if (sdret < 0) {
+-			DHD_ERROR(("%s: RXHEADER FAILED: %d\n", __func__,
+-				   sdret));
+-			bus->rx_hdrfail++;
+-			dhdsdio_rxfail(bus, true, true);
+-			continue;
+-		}
+-#ifdef DHD_DEBUG
+-		if (DHD_BYTES_ON() || DHD_HDRS_ON()) {
+-			printk(KERN_DEBUG "RxHdr:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-					     bus->rxhdr, SDPCM_HDRLEN);
+-		}
+-#endif
+-
+-		/* Extract hardware header fields */
+-		len = get_unaligned_le16(bus->rxhdr);
+-		check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
+-
+-		/* All zeros means no more frames */
+-		if (!(len | check)) {
+-			*finished = true;
+-			break;
+-		}
+-
+-		/* Validate check bytes */
+-		if ((u16) ~(len ^ check)) {
+-			DHD_ERROR(("%s: HW hdr err: len/check 0x%04x/0x%04x\n",
+-				__func__, len, check));
+-			bus->rx_badhdr++;
+-			dhdsdio_rxfail(bus, false, false);
+-			continue;
+-		}
+-
+-		/* Validate frame length */
+-		if (len < SDPCM_HDRLEN) {
+-			DHD_ERROR(("%s: HW hdr length invalid: %d\n",
+-				   __func__, len));
+-			continue;
+-		}
+-
+-		/* Extract software header fields */
+-		chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-		seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-		doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-		txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-
+-		/* Validate data offset */
+-		if ((doff < SDPCM_HDRLEN) || (doff > len)) {
+-			DHD_ERROR(("%s: Bad data offset %d: HW len %d, min %d "
+-				"seq %d\n",
+-				__func__, doff, len, SDPCM_HDRLEN, seq));
+-			bus->rx_badhdr++;
+-			ASSERT(0);
+-			dhdsdio_rxfail(bus, false, false);
+-			continue;
+-		}
+-
+-		/* Save the readahead length if there is one */
+-		bus->nextlen =
+-		    bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
+-		if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
+-			DHD_INFO(("%s (nextlen): got frame w/nextlen too large "
+-				"(%d), seq %d\n",
+-				__func__, bus->nextlen, seq));
+-			bus->nextlen = 0;
+-		}
+-
+-		/* Handle Flow Control */
+-		fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
+-
+-		if (bus->flowcontrol != fcbits) {
+-			if (~bus->flowcontrol & fcbits)
+-				bus->fc_xoff++;
+-
+-			if (bus->flowcontrol & ~fcbits)
+-				bus->fc_xon++;
+-
+-			bus->fc_rcvd++;
+-			bus->flowcontrol = fcbits;
+-		}
+-
+-		/* Check and update sequence number */
+-		if (rxseq != seq) {
+-			DHD_INFO(("%s: rx_seq %d, expected %d\n", __func__,
+-				  seq, rxseq));
+-			bus->rx_badseq++;
+-			rxseq = seq;
+-		}
+-
+-		/* Check window for sanity */
+-		if ((u8) (txmax - bus->tx_seq) > 0x40) {
+-			DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n",
+-				__func__, txmax, bus->tx_seq));
+-			txmax = bus->tx_seq + 2;
+-		}
+-		bus->tx_max = txmax;
+-
+-		/* Call a separate function for control frames */
+-		if (chan == SDPCM_CONTROL_CHANNEL) {
+-			dhdsdio_read_control(bus, bus->rxhdr, len, doff);
+-			continue;
+-		}
+-
+-		ASSERT((chan == SDPCM_DATA_CHANNEL)
+-		       || (chan == SDPCM_EVENT_CHANNEL)
+-		       || (chan == SDPCM_TEST_CHANNEL)
+-		       || (chan == SDPCM_GLOM_CHANNEL));
+-
+-		/* Length to read */
+-		rdlen = (len > firstread) ? (len - firstread) : 0;
+-
+-		/* May pad read to blocksize for efficiency */
+-		if (bus->roundup && bus->blocksize &&
+-			(rdlen > bus->blocksize)) {
+-			pad = bus->blocksize - (rdlen % bus->blocksize);
+-			if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
+-			    ((rdlen + pad + firstread) < MAX_RX_DATASZ))
+-				rdlen += pad;
+-		} else if (rdlen % DHD_SDALIGN) {
+-			rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN);
+-		}
+-
+-		/* Satisfy length-alignment requirements */
+-		if (forcealign && (rdlen & (ALIGNMENT - 1)))
+-			rdlen = roundup(rdlen, ALIGNMENT);
+-
+-		if ((rdlen + firstread) > MAX_RX_DATASZ) {
+-			/* Too long -- skip this frame */
+-			DHD_ERROR(("%s: too long: len %d rdlen %d\n",
+-				   __func__, len, rdlen));
+-			bus->dhd->rx_errors++;
+-			bus->rx_toolong++;
+-			dhdsdio_rxfail(bus, false, false);
+-			continue;
+-		}
+-
+-		dhd_os_sdlock_rxq(bus->dhd);
+-		pkt = bcm_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN);
+-		if (!pkt) {
+-			/* Give up on data, request rtx of events */
+-			DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed: rdlen %d "
+-				"chan %d\n", __func__, rdlen, chan));
+-			bus->dhd->rx_dropped++;
+-			dhd_os_sdunlock_rxq(bus->dhd);
+-			dhdsdio_rxfail(bus, false, RETRYCHAN(chan));
+-			continue;
+-		}
+-		dhd_os_sdunlock_rxq(bus->dhd);
+-
+-		ASSERT(!(pkt->prev));
+-
+-		/* Leave room for what we already read, and align remainder */
+-		ASSERT(firstread < pkt->len);
+-		skb_pull(pkt, firstread);
+-		PKTALIGN(pkt, rdlen, DHD_SDALIGN);
+-
+-		/* Read the remaining frame data */
+-		sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
+-					F2SYNC, ((u8 *) (pkt->data)), rdlen,
+-					pkt, NULL, NULL);
+-		bus->f2rxdata++;
+-		ASSERT(sdret != -BCME_PENDING);
+-
+-		if (sdret < 0) {
+-			DHD_ERROR(("%s: read %d %s bytes failed: %d\n",
+-				   __func__, rdlen,
+-				   ((chan ==
+-				     SDPCM_EVENT_CHANNEL) ? "event" : ((chan ==
+-					SDPCM_DATA_CHANNEL)
+-				       ? "data" : "test")),
+-				   sdret));
+-			dhd_os_sdlock_rxq(bus->dhd);
+-			bcm_pkt_buf_free_skb(pkt);
+-			dhd_os_sdunlock_rxq(bus->dhd);
+-			bus->dhd->rx_errors++;
+-			dhdsdio_rxfail(bus, true, RETRYCHAN(chan));
+-			continue;
+-		}
+-
+-		/* Copy the already-read portion */
+-		skb_push(pkt, firstread);
+-		memcpy(pkt->data, bus->rxhdr, firstread);
+-
+-#ifdef DHD_DEBUG
+-		if (DHD_BYTES_ON() && DHD_DATA_ON()) {
+-			printk(KERN_DEBUG "Rx Data:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
+-					     pkt->data, len);
+-		}
+-#endif
+-
+-deliver:
+-		/* Save superframe descriptor and allocate packet frame */
+-		if (chan == SDPCM_GLOM_CHANNEL) {
+-			if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
+-				DHD_GLOM(("%s: glom descriptor, %d bytes:\n",
+-					__func__, len));
+-#ifdef DHD_DEBUG
+-				if (DHD_GLOM_ON()) {
+-					printk(KERN_DEBUG "Glom Data:\n");
+-					print_hex_dump_bytes("",
+-							     DUMP_PREFIX_OFFSET,
+-							     pkt->data, len);
+-				}
+-#endif
+-				__skb_trim(pkt, len);
+-				ASSERT(doff == SDPCM_HDRLEN);
+-				skb_pull(pkt, SDPCM_HDRLEN);
+-				bus->glomd = pkt;
+-			} else {
+-				DHD_ERROR(("%s: glom superframe w/o "
+-					"descriptor!\n", __func__));
+-				dhdsdio_rxfail(bus, false, false);
+-			}
+-			continue;
+-		}
+-
+-		/* Fill in packet len and prio, deliver upward */
+-		__skb_trim(pkt, len);
+-		skb_pull(pkt, doff);
+-
+-#ifdef SDTEST
+-		/* Test channel packets are processed separately */
+-		if (chan == SDPCM_TEST_CHANNEL) {
+-			dhdsdio_testrcv(bus, pkt, seq);
+-			continue;
+-		}
+-#endif				/* SDTEST */
+-
+-		if (pkt->len == 0) {
+-			dhd_os_sdlock_rxq(bus->dhd);
+-			bcm_pkt_buf_free_skb(pkt);
+-			dhd_os_sdunlock_rxq(bus->dhd);
+-			continue;
+-		} else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pkt) != 0) {
+-			DHD_ERROR(("%s: rx protocol error\n", __func__));
+-			dhd_os_sdlock_rxq(bus->dhd);
+-			bcm_pkt_buf_free_skb(pkt);
+-			dhd_os_sdunlock_rxq(bus->dhd);
+-			bus->dhd->rx_errors++;
+-			continue;
+-		}
+-
+-		/* Unlock during rx call */
+-		dhd_os_sdunlock(bus->dhd);
+-		dhd_rx_frame(bus->dhd, ifidx, pkt, 1);
+-		dhd_os_sdlock(bus->dhd);
+-	}
+-	rxcount = maxframes - rxleft;
+-#ifdef DHD_DEBUG
+-	/* Message if we hit the limit */
+-	if (!rxleft && !sdtest)
+-		DHD_DATA(("%s: hit rx limit of %d frames\n", __func__,
+-			  maxframes));
+-	else
+-#endif				/* DHD_DEBUG */
+-		DHD_DATA(("%s: processed %d frames\n", __func__, rxcount));
+-	/* Back off rxseq if awaiting rtx, update rx_seq */
+-	if (bus->rxskip)
+-		rxseq--;
+-	bus->rx_seq = rxseq;
+-
+-	return rxcount;
+-}
+-
+-static u32 dhdsdio_hostmail(dhd_bus_t *bus)
+-{
+-	sdpcmd_regs_t *regs = bus->regs;
+-	u32 intstatus = 0;
+-	u32 hmb_data;
+-	u8 fcbits;
+-	uint retries = 0;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Read mailbox data and ack that we did so */
+-	R_SDREG(hmb_data, &regs->tohostmailboxdata, retries);
+-	if (retries <= retry_limit)
+-		W_SDREG(SMB_INT_ACK, &regs->tosbmailbox, retries);
+-	bus->f1regdata += 2;
+-
+-	/* Dongle recomposed rx frames, accept them again */
+-	if (hmb_data & HMB_DATA_NAKHANDLED) {
+-		DHD_INFO(("Dongle reports NAK handled, expect rtx of %d\n",
+-			  bus->rx_seq));
+-		if (!bus->rxskip)
+-			DHD_ERROR(("%s: unexpected NAKHANDLED!\n", __func__));
+-
+-		bus->rxskip = false;
+-		intstatus |= I_HMB_FRAME_IND;
+-	}
+-
+-	/*
+-	 * DEVREADY does not occur with gSPI.
+-	 */
+-	if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
+-		bus->sdpcm_ver =
+-		    (hmb_data & HMB_DATA_VERSION_MASK) >>
+-		    HMB_DATA_VERSION_SHIFT;
+-		if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
+-			DHD_ERROR(("Version mismatch, dongle reports %d, "
+-				"expecting %d\n",
+-				bus->sdpcm_ver, SDPCM_PROT_VERSION));
+-		else
+-			DHD_INFO(("Dongle ready, protocol version %d\n",
+-				  bus->sdpcm_ver));
+-	}
+-
+-	/*
+-	 * Flow Control has been moved into the RX headers and this out of band
+-	 * method isn't used any more.
+-	 * remaining backward compatible with older dongles.
+-	 */
+-	if (hmb_data & HMB_DATA_FC) {
+-		fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
+-							HMB_DATA_FCDATA_SHIFT;
+-
+-		if (fcbits & ~bus->flowcontrol)
+-			bus->fc_xoff++;
+-
+-		if (bus->flowcontrol & ~fcbits)
+-			bus->fc_xon++;
+-
+-		bus->fc_rcvd++;
+-		bus->flowcontrol = fcbits;
+-	}
+-
+-	/* Shouldn't be any others */
+-	if (hmb_data & ~(HMB_DATA_DEVREADY |
+-			 HMB_DATA_NAKHANDLED |
+-			 HMB_DATA_FC |
+-			 HMB_DATA_FWREADY |
+-			 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) {
+-		DHD_ERROR(("Unknown mailbox data content: 0x%02x\n", hmb_data));
+-	}
+-
+-	return intstatus;
+-}
+-
+-bool dhdsdio_dpc(dhd_bus_t *bus)
+-{
+-	bcmsdh_info_t *sdh = bus->sdh;
+-	sdpcmd_regs_t *regs = bus->regs;
+-	u32 intstatus, newstatus = 0;
+-	uint retries = 0;
+-	uint rxlimit = dhd_rxbound;	/* Rx frames to read before resched */
+-	uint txlimit = dhd_txbound;	/* Tx frames to send before resched */
+-	uint framecnt = 0;	/* Temporary counter of tx/rx frames */
+-	bool rxdone = true;	/* Flag for no more read data */
+-	bool resched = false;	/* Flag indicating resched wanted */
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* Start with leftover status bits */
+-	intstatus = bus->intstatus;
+-
+-	dhd_os_sdlock(bus->dhd);
+-
+-	/* If waiting for HTAVAIL, check status */
+-	if (bus->clkstate == CLK_PENDING) {
+-		int err;
+-		u8 clkctl, devctl = 0;
+-
+-#ifdef DHD_DEBUG
+-		/* Check for inconsistent device control */
+-		devctl =
+-		    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, &err);
+-		if (err) {
+-			DHD_ERROR(("%s: error reading DEVCTL: %d\n",
+-				   __func__, err));
+-			bus->dhd->busstate = DHD_BUS_DOWN;
+-		} else {
+-			ASSERT(devctl & SBSDIO_DEVCTL_CA_INT_ONLY);
+-		}
+-#endif				/* DHD_DEBUG */
+-
+-		/* Read CSR, if clock on switch to AVAIL, else ignore */
+-		clkctl =
+-		    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				    &err);
+-		if (err) {
+-			DHD_ERROR(("%s: error reading CSR: %d\n", __func__,
+-				   err));
+-			bus->dhd->busstate = DHD_BUS_DOWN;
+-		}
+-
+-		DHD_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", devctl,
+-			  clkctl));
+-
+-		if (SBSDIO_HTAV(clkctl)) {
+-			devctl =
+-			    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					    &err);
+-			if (err) {
+-				DHD_ERROR(("%s: error reading DEVCTL: %d\n",
+-					   __func__, err));
+-				bus->dhd->busstate = DHD_BUS_DOWN;
+-			}
+-			devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL,
+-					 devctl, &err);
+-			if (err) {
+-				DHD_ERROR(("%s: error writing DEVCTL: %d\n",
+-					   __func__, err));
+-				bus->dhd->busstate = DHD_BUS_DOWN;
+-			}
+-			bus->clkstate = CLK_AVAIL;
+-		} else {
+-			goto clkwait;
+-		}
+-	}
+-
+-	BUS_WAKE(bus);
+-
+-	/* Make sure backplane clock is on */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, true);
+-	if (bus->clkstate == CLK_PENDING)
+-		goto clkwait;
+-
+-	/* Pending interrupt indicates new device status */
+-	if (bus->ipend) {
+-		bus->ipend = false;
+-		R_SDREG(newstatus, &regs->intstatus, retries);
+-		bus->f1regdata++;
+-		if (bcmsdh_regfail(bus->sdh))
+-			newstatus = 0;
+-		newstatus &= bus->hostintmask;
+-		bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
+-		if (newstatus) {
+-			W_SDREG(newstatus, &regs->intstatus, retries);
+-			bus->f1regdata++;
+-		}
+-	}
+-
+-	/* Merge new bits with previous */
+-	intstatus |= newstatus;
+-	bus->intstatus = 0;
+-
+-	/* Handle flow-control change: read new state in case our ack
+-	 * crossed another change interrupt.  If change still set, assume
+-	 * FC ON for safety, let next loop through do the debounce.
+-	 */
+-	if (intstatus & I_HMB_FC_CHANGE) {
+-		intstatus &= ~I_HMB_FC_CHANGE;
+-		W_SDREG(I_HMB_FC_CHANGE, &regs->intstatus, retries);
+-		R_SDREG(newstatus, &regs->intstatus, retries);
+-		bus->f1regdata += 2;
+-		bus->fcstate =
+-		    !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
+-		intstatus |= (newstatus & bus->hostintmask);
+-	}
+-
+-	/* Handle host mailbox indication */
+-	if (intstatus & I_HMB_HOST_INT) {
+-		intstatus &= ~I_HMB_HOST_INT;
+-		intstatus |= dhdsdio_hostmail(bus);
+-	}
+-
+-	/* Generally don't ask for these, can get CRC errors... */
+-	if (intstatus & I_WR_OOSYNC) {
+-		DHD_ERROR(("Dongle reports WR_OOSYNC\n"));
+-		intstatus &= ~I_WR_OOSYNC;
+-	}
+-
+-	if (intstatus & I_RD_OOSYNC) {
+-		DHD_ERROR(("Dongle reports RD_OOSYNC\n"));
+-		intstatus &= ~I_RD_OOSYNC;
+-	}
+-
+-	if (intstatus & I_SBINT) {
+-		DHD_ERROR(("Dongle reports SBINT\n"));
+-		intstatus &= ~I_SBINT;
+-	}
+-
+-	/* Would be active due to wake-wlan in gSPI */
+-	if (intstatus & I_CHIPACTIVE) {
+-		DHD_INFO(("Dongle reports CHIPACTIVE\n"));
+-		intstatus &= ~I_CHIPACTIVE;
+-	}
+-
+-	/* Ignore frame indications if rxskip is set */
+-	if (bus->rxskip)
+-		intstatus &= ~I_HMB_FRAME_IND;
+-
+-	/* On frame indication, read available frames */
+-	if (PKT_AVAILABLE()) {
+-		framecnt = dhdsdio_readframes(bus, rxlimit, &rxdone);
+-		if (rxdone || bus->rxskip)
+-			intstatus &= ~I_HMB_FRAME_IND;
+-		rxlimit -= min(framecnt, rxlimit);
+-	}
+-
+-	/* Keep still-pending events for next scheduling */
+-	bus->intstatus = intstatus;
+-
+-clkwait:
+-#if defined(OOB_INTR_ONLY)
+-	bcmsdh_oob_intr_set(1);
+-#endif				/* (OOB_INTR_ONLY) */
+-	/* Re-enable interrupts to detect new device events (mailbox, rx frame)
+-	 * or clock availability.  (Allows tx loop to check ipend if desired.)
+-	 * (Unless register access seems hosed, as we may not be able to ACK...)
+-	 */
+-	if (bus->intr && bus->intdis && !bcmsdh_regfail(sdh)) {
+-		DHD_INTR(("%s: enable SDIO interrupts, rxdone %d framecnt %d\n",
+-			  __func__, rxdone, framecnt));
+-		bus->intdis = false;
+-		bcmsdh_intr_enable(sdh);
+-	}
+-
+-	if (DATAOK(bus) && bus->ctrl_frame_stat &&
+-		(bus->clkstate == CLK_AVAIL)) {
+-		int ret, i;
+-
+-		ret =
+-		    dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2,
+-					F2SYNC, (u8 *) bus->ctrl_frame_buf,
+-					(u32) bus->ctrl_frame_len, NULL,
+-					NULL, NULL);
+-		ASSERT(ret != -BCME_PENDING);
+-
+-		if (ret < 0) {
+-			/* On failure, abort the command and
+-				terminate the frame */
+-			DHD_INFO(("%s: sdio error %d, abort command and "
+-				"terminate frame.\n", __func__, ret));
+-			bus->tx_sderrs++;
+-
+-			bcmsdh_abort(sdh, SDIO_FUNC_2);
+-
+-			bcmsdh_cfg_write(sdh, SDIO_FUNC_1,
+-					 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
+-					 NULL);
+-			bus->f1regdata++;
+-
+-			for (i = 0; i < 3; i++) {
+-				u8 hi, lo;
+-				hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						     SBSDIO_FUNC1_WFRAMEBCHI,
+-						     NULL);
+-				lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						     SBSDIO_FUNC1_WFRAMEBCLO,
+-						     NULL);
+-				bus->f1regdata += 2;
+-				if ((hi == 0) && (lo == 0))
+-					break;
+-			}
+-
+-		}
+-		if (ret == 0)
+-			bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
+-
+-		DHD_INFO(("Return_dpc value is : %d\n", ret));
+-		bus->ctrl_frame_stat = false;
+-		dhd_wait_event_wakeup(bus->dhd);
+-	}
+-	/* Send queued frames (limit 1 if rx may still be pending) */
+-	else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
+-		 bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
+-		 && DATAOK(bus)) {
+-		framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax);
+-		framecnt = dhdsdio_sendfromq(bus, framecnt);
+-		txlimit -= framecnt;
+-	}
+-
+-	/* Resched if events or tx frames are pending,
+-		 else await next interrupt */
+-	/* On failed register access, all bets are off:
+-		 no resched or interrupts */
+-	if ((bus->dhd->busstate == DHD_BUS_DOWN) || bcmsdh_regfail(sdh)) {
+-		DHD_ERROR(("%s: failed backplane access over SDIO, halting "
+-			"operation %d\n", __func__, bcmsdh_regfail(sdh)));
+-		bus->dhd->busstate = DHD_BUS_DOWN;
+-		bus->intstatus = 0;
+-	} else if (bus->clkstate == CLK_PENDING) {
+-		DHD_INFO(("%s: rescheduled due to CLK_PENDING awaiting "
+-			"I_CHIPACTIVE interrupt\n", __func__));
+-		resched = true;
+-	} else if (bus->intstatus || bus->ipend ||
+-		(!bus->fcstate && bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
+-			DATAOK(bus)) || PKT_AVAILABLE()) {
+-		resched = true;
+-	}
+-
+-	bus->dpc_sched = resched;
+-
+-	/* If we're done for now, turn off clock request. */
+-	if ((bus->clkstate != CLK_PENDING)
+-	    && bus->idletime == DHD_IDLE_IMMEDIATE) {
+-		bus->activity = false;
+-		dhdsdio_clkctl(bus, CLK_NONE, false);
+-	}
+-
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	return resched;
+-}
+-
+-bool dhd_bus_dpc(struct dhd_bus *bus)
+-{
+-	bool resched;
+-
+-	/* Call the DPC directly. */
+-	DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__));
+-	resched = dhdsdio_dpc(bus);
+-
+-	return resched;
+-}
+-
+-void dhdsdio_isr(void *arg)
+-{
+-	dhd_bus_t *bus = (dhd_bus_t *) arg;
+-	bcmsdh_info_t *sdh;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (!bus) {
+-		DHD_ERROR(("%s : bus is null pointer , exit\n", __func__));
+-		return;
+-	}
+-	sdh = bus->sdh;
+-
+-	if (bus->dhd->busstate == DHD_BUS_DOWN) {
+-		DHD_ERROR(("%s : bus is down. we have nothing to do\n",
+-			   __func__));
+-		return;
+-	}
+-	/* Count the interrupt call */
+-	bus->intrcount++;
+-	bus->ipend = true;
+-
+-	/* Shouldn't get this interrupt if we're sleeping? */
+-	if (bus->sleeping) {
+-		DHD_ERROR(("INTERRUPT WHILE SLEEPING??\n"));
+-		return;
+-	}
+-
+-	/* Disable additional interrupts (is this needed now)? */
+-	if (bus->intr)
+-		DHD_INTR(("%s: disable SDIO interrupts\n", __func__));
+-	else
+-		DHD_ERROR(("dhdsdio_isr() w/o interrupt configured!\n"));
+-
+-	bcmsdh_intr_disable(sdh);
+-	bus->intdis = true;
+-
+-#if defined(SDIO_ISR_THREAD)
+-	DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__));
+-	while (dhdsdio_dpc(bus))
+-		;
+-#else
+-	bus->dpc_sched = true;
+-	dhd_sched_dpc(bus->dhd);
+-#endif
+-
+-}
+-
+-#ifdef SDTEST
+-static void dhdsdio_pktgen_init(dhd_bus_t *bus)
+-{
+-	/* Default to specified length, or full range */
+-	if (dhd_pktgen_len) {
+-		bus->pktgen_maxlen = min(dhd_pktgen_len, MAX_PKTGEN_LEN);
+-		bus->pktgen_minlen = bus->pktgen_maxlen;
+-	} else {
+-		bus->pktgen_maxlen = MAX_PKTGEN_LEN;
+-		bus->pktgen_minlen = 0;
+-	}
+-	bus->pktgen_len = (u16) bus->pktgen_minlen;
+-
+-	/* Default to per-watchdog burst with 10s print time */
+-	bus->pktgen_freq = 1;
+-	bus->pktgen_print = 10000 / dhd_watchdog_ms;
+-	bus->pktgen_count = (dhd_pktgen * dhd_watchdog_ms + 999) / 1000;
+-
+-	/* Default to echo mode */
+-	bus->pktgen_mode = DHD_PKTGEN_ECHO;
+-	bus->pktgen_stop = 1;
+-}
+-
+-static void dhdsdio_pktgen(dhd_bus_t *bus)
+-{
+-	struct sk_buff *pkt;
+-	u8 *data;
+-	uint pktcount;
+-	uint fillbyte;
+-	u16 len;
+-
+-	/* Display current count if appropriate */
+-	if (bus->pktgen_print && (++bus->pktgen_ptick >= bus->pktgen_print)) {
+-		bus->pktgen_ptick = 0;
+-		printk(KERN_DEBUG "%s: send attempts %d rcvd %d\n",
+-		       __func__, bus->pktgen_sent, bus->pktgen_rcvd);
+-	}
+-
+-	/* For recv mode, just make sure dongle has started sending */
+-	if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
+-		if (!bus->pktgen_rcvd)
+-			dhdsdio_sdtest_set(bus, true);
+-		return;
+-	}
+-
+-	/* Otherwise, generate or request the specified number of packets */
+-	for (pktcount = 0; pktcount < bus->pktgen_count; pktcount++) {
+-		/* Stop if total has been reached */
+-		if (bus->pktgen_total
+-		    && (bus->pktgen_sent >= bus->pktgen_total)) {
+-			bus->pktgen_count = 0;
+-			break;
+-		}
+-
+-		/* Allocate an appropriate-sized packet */
+-		len = bus->pktgen_len;
+-		pkt = bcm_pkt_buf_get_skb(
+-			(len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN),
+-			true);
+-		if (!pkt) {
+-			DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n",
+-				__func__));
+-			break;
+-		}
+-		PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN),
+-			 DHD_SDALIGN);
+-		data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
+-
+-		/* Write test header cmd and extra based on mode */
+-		switch (bus->pktgen_mode) {
+-		case DHD_PKTGEN_ECHO:
+-			*data++ = SDPCM_TEST_ECHOREQ;
+-			*data++ = (u8) bus->pktgen_sent;
+-			break;
+-
+-		case DHD_PKTGEN_SEND:
+-			*data++ = SDPCM_TEST_DISCARD;
+-			*data++ = (u8) bus->pktgen_sent;
+-			break;
+-
+-		case DHD_PKTGEN_RXBURST:
+-			*data++ = SDPCM_TEST_BURST;
+-			*data++ = (u8) bus->pktgen_count;
+-			break;
+-
+-		default:
+-			DHD_ERROR(("Unrecognized pktgen mode %d\n",
+-				   bus->pktgen_mode));
+-			bcm_pkt_buf_free_skb(pkt, true);
+-			bus->pktgen_count = 0;
+-			return;
+-		}
+-
+-		/* Write test header length field */
+-		*data++ = (len >> 0);
+-		*data++ = (len >> 8);
+-
+-		/* Then fill in the remainder -- N/A for burst,
+-			 but who cares... */
+-		for (fillbyte = 0; fillbyte < len; fillbyte++)
+-			*data++ =
+-			    SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent);
+-
+-#ifdef DHD_DEBUG
+-		if (DHD_BYTES_ON() && DHD_DATA_ON()) {
+-			data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
+-			printk(KERN_DEBUG "dhdsdio_pktgen: Tx Data:\n");
+-			print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data,
+-					     pkt->len - SDPCM_HDRLEN);
+-		}
+-#endif
+-
+-		/* Send it */
+-		if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) {
+-			bus->pktgen_fail++;
+-			if (bus->pktgen_stop
+-			    && bus->pktgen_stop == bus->pktgen_fail)
+-				bus->pktgen_count = 0;
+-		}
+-		bus->pktgen_sent++;
+-
+-		/* Bump length if not fixed, wrap at max */
+-		if (++bus->pktgen_len > bus->pktgen_maxlen)
+-			bus->pktgen_len = (u16) bus->pktgen_minlen;
+-
+-		/* Special case for burst mode: just send one request! */
+-		if (bus->pktgen_mode == DHD_PKTGEN_RXBURST)
+-			break;
+-	}
+-}
+-
+-static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start)
+-{
+-	struct sk_buff *pkt;
+-	u8 *data;
+-
+-	/* Allocate the packet */
+-	pkt = bcm_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN +
+-		DHD_SDALIGN, true);
+-	if (!pkt) {
+-		DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", __func__));
+-		return;
+-	}
+-	PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), DHD_SDALIGN);
+-	data = (u8 *) (pkt->data) + SDPCM_HDRLEN;
+-
+-	/* Fill in the test header */
+-	*data++ = SDPCM_TEST_SEND;
+-	*data++ = start;
+-	*data++ = (bus->pktgen_maxlen >> 0);
+-	*data++ = (bus->pktgen_maxlen >> 8);
+-
+-	/* Send it */
+-	if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true))
+-		bus->pktgen_fail++;
+-}
+-
+-static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq)
+-{
+-	u8 *data;
+-	uint pktlen;
+-
+-	u8 cmd;
+-	u8 extra;
+-	u16 len;
+-	u16 offset;
+-
+-	/* Check for min length */
+-	pktlen = pkt->len;
+-	if (pktlen < SDPCM_TEST_HDRLEN) {
+-		DHD_ERROR(("dhdsdio_restrcv: toss runt frame, pktlen %d\n",
+-			   pktlen));
+-		bcm_pkt_buf_free_skb(pkt, false);
+-		return;
+-	}
+-
+-	/* Extract header fields */
+-	data = pkt->data;
+-	cmd = *data++;
+-	extra = *data++;
+-	len = *data++;
+-	len += *data++ << 8;
+-
+-	/* Check length for relevant commands */
+-	if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ
+-	    || cmd == SDPCM_TEST_ECHORSP) {
+-		if (pktlen != len + SDPCM_TEST_HDRLEN) {
+-			DHD_ERROR(("dhdsdio_testrcv: frame length mismatch, "
+-				"pktlen %d seq %d" " cmd %d extra %d len %d\n",
+-				pktlen, seq, cmd, extra, len));
+-			bcm_pkt_buf_free_skb(pkt, false);
+-			return;
+-		}
+-	}
+-
+-	/* Process as per command */
+-	switch (cmd) {
+-	case SDPCM_TEST_ECHOREQ:
+-		/* Rx->Tx turnaround ok (even on NDIS w/current
+-			 implementation) */
+-		*(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP;
+-		if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0) {
+-			bus->pktgen_sent++;
+-		} else {
+-			bus->pktgen_fail++;
+-			bcm_pkt_buf_free_skb(pkt, false);
+-		}
+-		bus->pktgen_rcvd++;
+-		break;
+-
+-	case SDPCM_TEST_ECHORSP:
+-		if (bus->ext_loop) {
+-			bcm_pkt_buf_free_skb(pkt, false);
+-			bus->pktgen_rcvd++;
+-			break;
+-		}
+-
+-		for (offset = 0; offset < len; offset++, data++) {
+-			if (*data != SDPCM_TEST_FILL(offset, extra)) {
+-				DHD_ERROR(("dhdsdio_testrcv: echo data mismatch: " "offset %d (len %d) expect 0x%02x rcvd 0x%02x\n",
+-					offset, len,
+-					SDPCM_TEST_FILL(offset, extra), *data));
+-				break;
+-			}
+-		}
+-		bcm_pkt_buf_free_skb(pkt, false);
+-		bus->pktgen_rcvd++;
+-		break;
+-
+-	case SDPCM_TEST_DISCARD:
+-		bcm_pkt_buf_free_skb(pkt, false);
+-		bus->pktgen_rcvd++;
+-		break;
+-
+-	case SDPCM_TEST_BURST:
+-	case SDPCM_TEST_SEND:
+-	default:
+-		DHD_INFO(("dhdsdio_testrcv: unsupported or unknown command, "
+-			"pktlen %d seq %d" " cmd %d extra %d len %d\n",
+-			pktlen, seq, cmd, extra, len));
+-		bcm_pkt_buf_free_skb(pkt, false);
+-		break;
+-	}
+-
+-	/* For recv mode, stop at limie (and tell dongle to stop sending) */
+-	if (bus->pktgen_mode == DHD_PKTGEN_RECV) {
+-		if (bus->pktgen_total
+-		    && (bus->pktgen_rcvd >= bus->pktgen_total)) {
+-			bus->pktgen_count = 0;
+-			dhdsdio_sdtest_set(bus, false);
+-		}
+-	}
+-}
+-#endif				/* SDTEST */
+-
+-extern bool dhd_bus_watchdog(dhd_pub_t *dhdp)
+-{
+-	dhd_bus_t *bus;
+-
+-	DHD_TIMER(("%s: Enter\n", __func__));
+-
+-	bus = dhdp->bus;
+-
+-	if (bus->dhd->dongle_reset)
+-		return false;
+-
+-	/* Ignore the timer if simulating bus down */
+-	if (bus->sleeping)
+-		return false;
+-
+-	dhd_os_sdlock(bus->dhd);
+-
+-	/* Poll period: check device if appropriate. */
+-	if (bus->poll && (++bus->polltick >= bus->pollrate)) {
+-		u32 intstatus = 0;
+-
+-		/* Reset poll tick */
+-		bus->polltick = 0;
+-
+-		/* Check device if no interrupts */
+-		if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
+-
+-			if (!bus->dpc_sched) {
+-				u8 devpend;
+-				devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0,
+-							  SDIOD_CCCR_INTPEND,
+-							  NULL);
+-				intstatus =
+-				    devpend & (INTR_STATUS_FUNC1 |
+-					       INTR_STATUS_FUNC2);
+-			}
+-
+-			/* If there is something, make like the ISR and
+-				 schedule the DPC */
+-			if (intstatus) {
+-				bus->pollcnt++;
+-				bus->ipend = true;
+-				if (bus->intr)
+-					bcmsdh_intr_disable(bus->sdh);
+-
+-				bus->dpc_sched = true;
+-				dhd_sched_dpc(bus->dhd);
+-
+-			}
+-		}
+-
+-		/* Update interrupt tracking */
+-		bus->lastintrs = bus->intrcount;
+-	}
+-#ifdef DHD_DEBUG
+-	/* Poll for console output periodically */
+-	if (dhdp->busstate == DHD_BUS_DATA && dhd_console_ms != 0) {
+-		bus->console.count += dhd_watchdog_ms;
+-		if (bus->console.count >= dhd_console_ms) {
+-			bus->console.count -= dhd_console_ms;
+-			/* Make sure backplane clock is on */
+-			dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-			if (dhdsdio_readconsole(bus) < 0)
+-				dhd_console_ms = 0;	/* On error,
+-							 stop trying */
+-		}
+-	}
+-#endif				/* DHD_DEBUG */
+-
+-#ifdef SDTEST
+-	/* Generate packets if configured */
+-	if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) {
+-		/* Make sure backplane clock is on */
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-		bus->pktgen_tick = 0;
+-		dhdsdio_pktgen(bus);
+-	}
+-#endif
+-
+-	/* On idle timeout clear activity flag and/or turn off clock */
+-	if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
+-		if (++bus->idlecount >= bus->idletime) {
+-			bus->idlecount = 0;
+-			if (bus->activity) {
+-				bus->activity = false;
+-				dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms);
+-			} else {
+-				dhdsdio_clkctl(bus, CLK_NONE, false);
+-			}
+-		}
+-	}
+-
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	return bus->ipend;
+-}
+-
+-#ifdef DHD_DEBUG
+-extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen)
+-{
+-	dhd_bus_t *bus = dhdp->bus;
+-	u32 addr, val;
+-	int rv;
+-	struct sk_buff *pkt;
+-
+-	/* Address could be zero if CONSOLE := 0 in dongle Makefile */
+-	if (bus->console_addr == 0)
+-		return -ENOTSUPP;
+-
+-	/* Exclusive bus access */
+-	dhd_os_sdlock(bus->dhd);
+-
+-	/* Don't allow input if dongle is in reset */
+-	if (bus->dhd->dongle_reset) {
+-		dhd_os_sdunlock(bus->dhd);
+-		return -EPERM;
+-	}
+-
+-	/* Request clock to allow SDIO accesses */
+-	BUS_WAKE(bus);
+-	/* No pend allowed since txpkt is called later, ht clk has to be on */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-	/* Zero cbuf_index */
+-	addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf_idx);
+-	val = cpu_to_le32(0);
+-	rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
+-	if (rv < 0)
+-		goto done;
+-
+-	/* Write message into cbuf */
+-	addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf);
+-	rv = dhdsdio_membytes(bus, true, addr, (u8 *)msg, msglen);
+-	if (rv < 0)
+-		goto done;
+-
+-	/* Write length into vcons_in */
+-	addr = bus->console_addr + offsetof(hndrte_cons_t, vcons_in);
+-	val = cpu_to_le32(msglen);
+-	rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val));
+-	if (rv < 0)
+-		goto done;
+-
+-	/* Bump dongle by sending an empty event pkt.
+-	 * sdpcm_sendup (RX) checks for virtual console input.
+-	 */
+-	pkt = bcm_pkt_buf_get_skb(4 + SDPCM_RESERVE);
+-	if ((pkt != NULL) && bus->clkstate == CLK_AVAIL)
+-		dhdsdio_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true);
+-
+-done:
+-	if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) {
+-		bus->activity = false;
+-		dhdsdio_clkctl(bus, CLK_NONE, true);
+-	}
+-
+-	dhd_os_sdunlock(bus->dhd);
+-
+-	return rv;
+-}
+-#endif				/* DHD_DEBUG */
+-
+-#ifdef DHD_DEBUG
+-static void dhd_dump_cis(uint fn, u8 *cis)
+-{
+-	uint byte, tag, tdata;
+-	DHD_INFO(("Function %d CIS:\n", fn));
+-
+-	for (tdata = byte = 0; byte < SBSDIO_CIS_SIZE_LIMIT; byte++) {
+-		if ((byte % 16) == 0)
+-			DHD_INFO(("    "));
+-		DHD_INFO(("%02x ", cis[byte]));
+-		if ((byte % 16) == 15)
+-			DHD_INFO(("\n"));
+-		if (!tdata--) {
+-			tag = cis[byte];
+-			if (tag == 0xff)
+-				break;
+-			else if (!tag)
+-				tdata = 0;
+-			else if ((byte + 1) < SBSDIO_CIS_SIZE_LIMIT)
+-				tdata = cis[byte + 1] + 1;
+-			else
+-				DHD_INFO(("]"));
+-		}
+-	}
+-	if ((byte % 16) != 15)
+-		DHD_INFO(("\n"));
+-}
+-#endif				/* DHD_DEBUG */
+-
+-static bool dhdsdio_chipmatch(u16 chipid)
+-{
+-	if (chipid == BCM4325_CHIP_ID)
+-		return true;
+-	if (chipid == BCM4329_CHIP_ID)
+-		return true;
+-	if (chipid == BCM4319_CHIP_ID)
+-		return true;
+-	return false;
+-}
+-
+-static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no,
+-			   u16 slot, u16 func, uint bustype, void *regsva,
+-			   void *sdh)
+-{
+-	int ret;
+-	dhd_bus_t *bus;
+-
+-	/* Init global variables at run-time, not as part of the declaration.
+-	 * This is required to support init/de-init of the driver.
+-	 * Initialization
+-	 * of globals as part of the declaration results in non-deterministic
+-	 * behavior since the value of the globals may be different on the
+-	 * first time that the driver is initialized vs subsequent
+-	 * initializations.
+-	 */
+-	dhd_txbound = DHD_TXBOUND;
+-	dhd_rxbound = DHD_RXBOUND;
+-	dhd_alignctl = true;
+-	sd1idle = true;
+-	dhd_readahead = true;
+-	retrydata = false;
+-	dhd_dongle_memsize = 0;
+-	dhd_txminmax = DHD_TXMINMAX;
+-
+-	forcealign = true;
+-
+-	dhd_common_init();
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-	DHD_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__, venid, devid));
+-
+-	/* We make assumptions about address window mappings */
+-	ASSERT((unsigned long)regsva == SI_ENUM_BASE);
+-
+-	/* BCMSDH passes venid and devid based on CIS parsing -- but
+-	 * low-power start
+-	 * means early parse could fail, so here we should get either an ID
+-	 * we recognize OR (-1) indicating we must request power first.
+-	 */
+-	/* Check the Vendor ID */
+-	switch (venid) {
+-	case 0x0000:
+-	case PCI_VENDOR_ID_BROADCOM:
+-		break;
+-	default:
+-		DHD_ERROR(("%s: unknown vendor: 0x%04x\n", __func__, venid));
+-		return NULL;
+-	}
+-
+-	/* Check the Device ID and make sure it's one that we support */
+-	switch (devid) {
+-	case BCM4325_D11DUAL_ID:	/* 4325 802.11a/g id */
+-	case BCM4325_D11G_ID:	/* 4325 802.11g 2.4Ghz band id */
+-	case BCM4325_D11A_ID:	/* 4325 802.11a 5Ghz band id */
+-		DHD_INFO(("%s: found 4325 Dongle\n", __func__));
+-		break;
+-	case BCM4329_D11NDUAL_ID:	/* 4329 802.11n dualband device */
+-	case BCM4329_D11N2G_ID:	/* 4329 802.11n 2.4G device */
+-	case BCM4329_D11N5G_ID:	/* 4329 802.11n 5G device */
+-	case 0x4329:
+-		DHD_INFO(("%s: found 4329 Dongle\n", __func__));
+-		break;
+-	case BCM4319_D11N_ID:	/* 4319 802.11n id */
+-	case BCM4319_D11N2G_ID:	/* 4319 802.11n2g id */
+-	case BCM4319_D11N5G_ID:	/* 4319 802.11n5g id */
+-		DHD_INFO(("%s: found 4319 Dongle\n", __func__));
+-		break;
+-	case 0:
+-		DHD_INFO(("%s: allow device id 0, will check chip internals\n",
+-			  __func__));
+-		break;
+-
+-	default:
+-		DHD_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n",
+-			   __func__, venid, devid));
+-		return NULL;
+-	}
+-
+-	/* Allocate private bus interface state */
+-	bus = kzalloc(sizeof(dhd_bus_t), GFP_ATOMIC);
+-	if (!bus) {
+-		DHD_ERROR(("%s: kmalloc of dhd_bus_t failed\n", __func__));
+-		goto fail;
+-	}
+-	bus->sdh = sdh;
+-	bus->cl_devid = (u16) devid;
+-	bus->bus = DHD_BUS;
+-	bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
+-	bus->usebufpool = false;	/* Use bufpool if allocated,
+-					 else use locally malloced rxbuf */
+-
+-	/* attempt to attach to the dongle */
+-	if (!(dhdsdio_probe_attach(bus, sdh, regsva, devid))) {
+-		DHD_ERROR(("%s: dhdsdio_probe_attach failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* Attach to the dhd/OS/network interface */
+-	bus->dhd = dhd_attach(bus, SDPCM_RESERVE);
+-	if (!bus->dhd) {
+-		DHD_ERROR(("%s: dhd_attach failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* Allocate buffers */
+-	if (!(dhdsdio_probe_malloc(bus, sdh))) {
+-		DHD_ERROR(("%s: dhdsdio_probe_malloc failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	if (!(dhdsdio_probe_init(bus, sdh))) {
+-		DHD_ERROR(("%s: dhdsdio_probe_init failed\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* Register interrupt callback, but mask it (not operational yet). */
+-	DHD_INTR(("%s: disable SDIO interrupts (not interested yet)\n",
+-		  __func__));
+-	bcmsdh_intr_disable(sdh);
+-	ret = bcmsdh_intr_reg(sdh, dhdsdio_isr, bus);
+-	if (ret != 0) {
+-		DHD_ERROR(("%s: FAILED: bcmsdh_intr_reg returned %d\n",
+-			   __func__, ret));
+-		goto fail;
+-	}
+-	DHD_INTR(("%s: registered SDIO interrupt function ok\n", __func__));
+-
+-	DHD_INFO(("%s: completed!!\n", __func__));
+-
+-	/* if firmware path present try to download and bring up bus */
+-	ret = dhd_bus_start(bus->dhd);
+-	if (ret != 0) {
+-		if (ret == -ENOLINK) {
+-			DHD_ERROR(("%s: dongle is not responding\n", __func__));
+-			goto fail;
+-		}
+-	}
+-	/* Ok, have the per-port tell the stack we're open for business */
+-	if (dhd_net_attach(bus->dhd, 0) != 0) {
+-		DHD_ERROR(("%s: Net attach failed!!\n", __func__));
+-		goto fail;
+-	}
+-
+-	return bus;
+-
+-fail:
+-	dhdsdio_release(bus);
+-	return NULL;
+-}
+-
+-static bool
+-dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid)
+-{
+-	u8 clkctl = 0;
+-	int err = 0;
+-
+-	bus->alp_only = true;
+-
+-	/* Return the window to backplane enumeration space for core access */
+-	if (dhdsdio_set_siaddr_window(bus, SI_ENUM_BASE))
+-		DHD_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", __func__));
+-
+-#ifdef DHD_DEBUG
+-	printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n",
+-	       bcmsdh_reg_read(bus->sdh, SI_ENUM_BASE, 4));
+-
+-#endif				/* DHD_DEBUG */
+-
+-	/*
+-	 * Force PLL off until dhdsdio_chip_attach()
+-	 * programs PLL control regs
+-	 */
+-
+-	bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-			 DHD_INIT_CLKCTL1, &err);
+-	if (!err)
+-		clkctl =
+-		    bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				    &err);
+-
+-	if (err || ((clkctl & ~SBSDIO_AVBITS) != DHD_INIT_CLKCTL1)) {
+-		DHD_ERROR(("dhdsdio_probe: ChipClkCSR access: err %d wrote "
+-			"0x%02x read 0x%02x\n",
+-			err, DHD_INIT_CLKCTL1, clkctl));
+-		goto fail;
+-	}
+-#ifdef DHD_DEBUG
+-	if (DHD_INFO_ON()) {
+-		uint fn, numfn;
+-		u8 *cis[SDIOD_MAX_IOFUNCS];
+-		int err = 0;
+-
+-		numfn = bcmsdh_query_iofnum(sdh);
+-		ASSERT(numfn <= SDIOD_MAX_IOFUNCS);
+-
+-		/* Make sure ALP is available before trying to read CIS */
+-		SPINWAIT(((clkctl = bcmsdh_cfg_read(sdh, SDIO_FUNC_1,
+-						    SBSDIO_FUNC1_CHIPCLKCSR,
+-						    NULL)),
+-			  !SBSDIO_ALPAV(clkctl)), PMU_MAX_TRANSITION_DLY);
+-
+-		/* Now request ALP be put on the bus */
+-		bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-				 DHD_INIT_CLKCTL2, &err);
+-		udelay(65);
+-
+-		for (fn = 0; fn <= numfn; fn++) {
+-			cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC);
+-			if (!cis[fn]) {
+-				DHD_INFO(("dhdsdio_probe: fn %d cis malloc "
+-					"failed\n", fn));
+-				break;
+-			}
+-
+-			err = bcmsdh_cis_read(sdh, fn, cis[fn],
+-						SBSDIO_CIS_SIZE_LIMIT);
+-			if (err) {
+-				DHD_INFO(("dhdsdio_probe: fn %d cis read "
+-					"err %d\n", fn, err));
+-				kfree(cis[fn]);
+-				break;
+-			}
+-			dhd_dump_cis(fn, cis[fn]);
+-		}
+-
+-		while (fn-- > 0) {
+-			ASSERT(cis[fn]);
+-			kfree(cis[fn]);
+-		}
+-
+-		if (err) {
+-			DHD_ERROR(("dhdsdio_probe: error read/parsing CIS\n"));
+-			goto fail;
+-		}
+-	}
+-#endif				/* DHD_DEBUG */
+-
+-	if (dhdsdio_chip_attach(bus, regsva)) {
+-		DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__));
+-		goto fail;
+-	}
+-
+-	bcmsdh_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev);
+-
+-	if (!dhdsdio_chipmatch((u16) bus->ci->chip)) {
+-		DHD_ERROR(("%s: unsupported chip: 0x%04x\n",
+-			   __func__, bus->ci->chip));
+-		goto fail;
+-	}
+-
+-	dhdsdio_sdiod_drive_strength_init(bus, dhd_sdiod_drive_strength);
+-
+-	/* Get info on the ARM and SOCRAM cores... */
+-	if (!DHD_NOPMU(bus)) {
+-		bus->armrev = SBCOREREV(bcmsdh_reg_read(bus->sdh,
+-			CORE_SB(bus->ci->armcorebase, sbidhigh), 4));
+-		bus->orig_ramsize = bus->ci->ramsize;
+-		if (!(bus->orig_ramsize)) {
+-			DHD_ERROR(("%s: failed to find SOCRAM memory!\n",
+-				   __func__));
+-			goto fail;
+-		}
+-		bus->ramsize = bus->orig_ramsize;
+-		if (dhd_dongle_memsize)
+-			dhd_dongle_setmemsize(bus, dhd_dongle_memsize);
+-
+-		DHD_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n",
+-			   bus->ramsize, bus->orig_ramsize));
+-	}
+-
+-	bus->regs = (void *)bus->ci->buscorebase;
+-
+-	/* Set core control so an SDIO reset does a backplane reset */
+-	OR_REG(&bus->regs->corecontrol, CC_BPRESEN);
+-
+-	bcm_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
+-
+-	/* Locate an appropriately-aligned portion of hdrbuf */
+-	bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], DHD_SDALIGN);
+-
+-	/* Set the poll and/or interrupt flags */
+-	bus->intr = (bool) dhd_intr;
+-	bus->poll = (bool) dhd_poll;
+-	if (bus->poll)
+-		bus->pollrate = 1;
+-
+-	return true;
+-
+-fail:
+-	return false;
+-}
+-
+-static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus->dhd->maxctl) {
+-		bus->rxblen =
+-		    roundup((bus->dhd->maxctl + SDPCM_HDRLEN),
+-			    ALIGNMENT) + DHD_SDALIGN;
+-		bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
+-		if (!(bus->rxbuf)) {
+-			DHD_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n",
+-				   __func__, bus->rxblen));
+-			goto fail;
+-		}
+-	}
+-
+-	/* Allocate buffer to receive glomed packet */
+-	bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
+-	if (!(bus->databuf)) {
+-		DHD_ERROR(("%s: kmalloc of %d-byte databuf failed\n",
+-			   __func__, MAX_DATA_BUF));
+-		/* release rxbuf which was already located as above */
+-		if (!bus->rxblen)
+-			kfree(bus->rxbuf);
+-		goto fail;
+-	}
+-
+-	/* Align the buffer */
+-	if ((unsigned long)bus->databuf % DHD_SDALIGN)
+-		bus->dataptr =
+-		    bus->databuf + (DHD_SDALIGN -
+-				    ((unsigned long)bus->databuf % DHD_SDALIGN));
+-	else
+-		bus->dataptr = bus->databuf;
+-
+-	return true;
+-
+-fail:
+-	return false;
+-}
+-
+-static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh)
+-{
+-	s32 fnum;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-#ifdef SDTEST
+-	dhdsdio_pktgen_init(bus);
+-#endif				/* SDTEST */
+-
+-	/* Disable F2 to clear any intermediate frame state on the dongle */
+-	bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, SDIO_FUNC_ENABLE_1,
+-			 NULL);
+-
+-	bus->dhd->busstate = DHD_BUS_DOWN;
+-	bus->sleeping = false;
+-	bus->rxflow = false;
+-	bus->prev_rxlim_hit = 0;
+-
+-	/* Done with backplane-dependent accesses, can drop clock... */
+-	bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
+-
+-	/* ...and initialize clock/power states */
+-	bus->clkstate = CLK_SDONLY;
+-	bus->idletime = (s32) dhd_idletime;
+-	bus->idleclock = DHD_IDLE_ACTIVE;
+-
+-	/* Query the SD clock speed */
+-	if (bcmsdh_iovar_op(sdh, "sd_divisor", NULL, 0,
+-			    &bus->sd_divisor, sizeof(s32),
+-			    false) != 0) {
+-		DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_divisor"));
+-		bus->sd_divisor = -1;
+-	} else {
+-		DHD_INFO(("%s: Initial value for %s is %d\n",
+-			  __func__, "sd_divisor", bus->sd_divisor));
+-	}
+-
+-	/* Query the SD bus mode */
+-	if (bcmsdh_iovar_op(sdh, "sd_mode", NULL, 0,
+-			    &bus->sd_mode, sizeof(s32), false) != 0) {
+-		DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_mode"));
+-		bus->sd_mode = -1;
+-	} else {
+-		DHD_INFO(("%s: Initial value for %s is %d\n",
+-			  __func__, "sd_mode", bus->sd_mode));
+-	}
+-
+-	/* Query the F2 block size, set roundup accordingly */
+-	fnum = 2;
+-	if (bcmsdh_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32),
+-			    &bus->blocksize, sizeof(s32), false) != 0) {
+-		bus->blocksize = 0;
+-		DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize"));
+-	} else {
+-		DHD_INFO(("%s: Initial value for %s is %d\n",
+-			  __func__, "sd_blocksize", bus->blocksize));
+-	}
+-	bus->roundup = min(max_roundup, bus->blocksize);
+-
+-	/* Query if bus module supports packet chaining,
+-		 default to use if supported */
+-	if (bcmsdh_iovar_op(sdh, "sd_rxchain", NULL, 0,
+-			    &bus->sd_rxchain, sizeof(s32),
+-			    false) != 0) {
+-		bus->sd_rxchain = false;
+-	} else {
+-		DHD_INFO(("%s: bus module (through bcmsdh API) %s chaining\n",
+-			  __func__,
+-			  (bus->sd_rxchain ? "supports" : "does not support")));
+-	}
+-	bus->use_rxchain = (bool) bus->sd_rxchain;
+-
+-	return true;
+-}
+-
+-bool
+-dhd_bus_download_firmware(struct dhd_bus *bus, char *fw_path, char *nv_path)
+-{
+-	bool ret;
+-	bus->fw_path = fw_path;
+-	bus->nv_path = nv_path;
+-
+-	ret = dhdsdio_download_firmware(bus, bus->sdh);
+-
+-	return ret;
+-}
+-
+-static bool
+-dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh)
+-{
+-	bool ret;
+-
+-	/* Download the firmware */
+-	dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-
+-	ret = _dhdsdio_download_firmware(bus) == 0;
+-
+-	dhdsdio_clkctl(bus, CLK_SDONLY, false);
+-
+-	return ret;
+-}
+-
+-/* Detach and free everything */
+-static void dhdsdio_release(dhd_bus_t *bus)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus) {
+-		/* De-register interrupt handler */
+-		bcmsdh_intr_disable(bus->sdh);
+-		bcmsdh_intr_dereg(bus->sdh);
+-
+-		if (bus->dhd) {
+-			dhd_detach(bus->dhd);
+-			dhdsdio_release_dongle(bus);
+-			bus->dhd = NULL;
+-		}
+-
+-		dhdsdio_release_malloc(bus);
+-
+-		kfree(bus);
+-	}
+-
+-	DHD_TRACE(("%s: Disconnected\n", __func__));
+-}
+-
+-static void dhdsdio_release_malloc(dhd_bus_t *bus)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus->dhd && bus->dhd->dongle_reset)
+-		return;
+-
+-	if (bus->rxbuf) {
+-		kfree(bus->rxbuf);
+-		bus->rxctl = bus->rxbuf = NULL;
+-		bus->rxlen = 0;
+-	}
+-
+-	kfree(bus->databuf);
+-	bus->databuf = NULL;
+-}
+-
+-static void dhdsdio_release_dongle(dhd_bus_t *bus)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus->dhd && bus->dhd->dongle_reset)
+-		return;
+-
+-	if (bus->ci) {
+-		dhdsdio_clkctl(bus, CLK_AVAIL, false);
+-		dhdsdio_clkctl(bus, CLK_NONE, false);
+-		dhdsdio_chip_detach(bus);
+-		if (bus->vars && bus->varsz)
+-			kfree(bus->vars);
+-		bus->vars = NULL;
+-	}
+-
+-	DHD_TRACE(("%s: Disconnected\n", __func__));
+-}
+-
+-static void dhdsdio_disconnect(void *ptr)
+-{
+-	dhd_bus_t *bus = (dhd_bus_t *)ptr;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	if (bus) {
+-		ASSERT(bus->dhd);
+-		dhdsdio_release(bus);
+-	}
+-
+-	DHD_TRACE(("%s: Disconnected\n", __func__));
+-}
+-
+-/* Register/Unregister functions are called by the main DHD entry
+- * point (e.g. module insertion) to link with the bus driver, in
+- * order to look for or await the device.
+- */
+-
+-static bcmsdh_driver_t dhd_sdio = {
+-	dhdsdio_probe,
+-	dhdsdio_disconnect
+-};
+-
+-int dhd_bus_register(void)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	return bcmsdh_register(&dhd_sdio);
+-}
+-
+-void dhd_bus_unregister(void)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	bcmsdh_unregister();
+-}
+-
+-#ifdef BCMEMBEDIMAGE
+-static int dhdsdio_download_code_array(struct dhd_bus *bus)
+-{
+-	int bcmerror = -1;
+-	int offset = 0;
+-
+-	DHD_INFO(("%s: download embedded firmware...\n", __func__));
+-
+-	/* Download image */
+-	while ((offset + MEMBLOCK) < sizeof(dlarray)) {
+-		bcmerror =
+-		    dhdsdio_membytes(bus, true, offset, dlarray + offset,
+-				     MEMBLOCK);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: error %d on writing %d membytes at "
+-				"0x%08x\n",
+-				__func__, bcmerror, MEMBLOCK, offset));
+-			goto err;
+-		}
+-
+-		offset += MEMBLOCK;
+-	}
+-
+-	if (offset < sizeof(dlarray)) {
+-		bcmerror = dhdsdio_membytes(bus, true, offset,
+-					    dlarray + offset,
+-					    sizeof(dlarray) - offset);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: error %d on writing %d membytes at "
+-				"0x%08x\n", __func__, bcmerror,
+-				sizeof(dlarray) - offset, offset));
+-			goto err;
+-		}
+-	}
+-#ifdef DHD_DEBUG
+-	/* Upload and compare the downloaded code */
+-	{
+-		unsigned char *ularray;
+-
+-		ularray = kmalloc(bus->ramsize, GFP_ATOMIC);
+-		if (!ularray) {
+-			bcmerror = -ENOMEM;
+-			goto err;
+-		}
+-		/* Upload image to verify downloaded contents. */
+-		offset = 0;
+-		memset(ularray, 0xaa, bus->ramsize);
+-		while ((offset + MEMBLOCK) < sizeof(dlarray)) {
+-			bcmerror =
+-			    dhdsdio_membytes(bus, false, offset,
+-					     ularray + offset, MEMBLOCK);
+-			if (bcmerror) {
+-				DHD_ERROR(("%s: error %d on reading %d membytes"
+-					" at 0x%08x\n",
+-					__func__, bcmerror, MEMBLOCK, offset));
+-				goto free;
+-			}
+-
+-			offset += MEMBLOCK;
+-		}
+-
+-		if (offset < sizeof(dlarray)) {
+-			bcmerror = dhdsdio_membytes(bus, false, offset,
+-						    ularray + offset,
+-						    sizeof(dlarray) - offset);
+-			if (bcmerror) {
+-				DHD_ERROR(("%s: error %d on reading %d membytes at 0x%08x\n",
+-				__func__, bcmerror,
+-				sizeof(dlarray) - offset, offset));
+-				goto free;
+-			}
+-		}
+-
+-		if (memcmp(dlarray, ularray, sizeof(dlarray))) {
+-			DHD_ERROR(("%s: Downloaded image is corrupted.\n",
+-				   __func__));
+-			ASSERT(0);
+-			goto free;
+-		} else
+-			DHD_ERROR(("%s: Download/Upload/Compare succeeded.\n",
+-				__func__));
+-free:
+-		kfree(ularray);
+-	}
+-#endif				/* DHD_DEBUG */
+-
+-err:
+-	return bcmerror;
+-}
+-#endif				/* BCMEMBEDIMAGE */
+-
+-static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path)
+-{
+-	int bcmerror = -1;
+-	int offset = 0;
+-	uint len;
+-	void *image = NULL;
+-	u8 *memblock = NULL, *memptr;
+-
+-	DHD_INFO(("%s: download firmware %s\n", __func__, fw_path));
+-
+-	image = dhd_os_open_image(fw_path);
+-	if (image == NULL)
+-		goto err;
+-
+-	memptr = memblock = kmalloc(MEMBLOCK + DHD_SDALIGN, GFP_ATOMIC);
+-	if (memblock == NULL) {
+-		DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
+-			   __func__, MEMBLOCK));
+-		goto err;
+-	}
+-	if ((u32)(unsigned long)memblock % DHD_SDALIGN)
+-		memptr +=
+-		    (DHD_SDALIGN - ((u32)(unsigned long)memblock % DHD_SDALIGN));
+-
+-	/* Download image */
+-	while ((len =
+-		dhd_os_get_image_block((char *)memptr, MEMBLOCK, image))) {
+-		bcmerror = dhdsdio_membytes(bus, true, offset, memptr, len);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: error %d on writing %d membytes at "
+-			"0x%08x\n", __func__, bcmerror, MEMBLOCK, offset));
+-			goto err;
+-		}
+-
+-		offset += MEMBLOCK;
+-	}
+-
+-err:
+-	kfree(memblock);
+-
+-	if (image)
+-		dhd_os_close_image(image);
+-
+-	return bcmerror;
+-}
+-
+-/*
+- * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
+- * and ending in a NUL.
+- * Removes carriage returns, empty lines, comment lines, and converts
+- * newlines to NULs.
+- * Shortens buffer as needed and pads with NULs.  End of buffer is marked
+- * by two NULs.
+-*/
+-
+-static uint process_nvram_vars(char *varbuf, uint len)
+-{
+-	char *dp;
+-	bool findNewline;
+-	int column;
+-	uint buf_len, n;
+-
+-	dp = varbuf;
+-
+-	findNewline = false;
+-	column = 0;
+-
+-	for (n = 0; n < len; n++) {
+-		if (varbuf[n] == 0)
+-			break;
+-		if (varbuf[n] == '\r')
+-			continue;
+-		if (findNewline && varbuf[n] != '\n')
+-			continue;
+-		findNewline = false;
+-		if (varbuf[n] == '#') {
+-			findNewline = true;
+-			continue;
+-		}
+-		if (varbuf[n] == '\n') {
+-			if (column == 0)
+-				continue;
+-			*dp++ = 0;
+-			column = 0;
+-			continue;
+-		}
+-		*dp++ = varbuf[n];
+-		column++;
+-	}
+-	buf_len = dp - varbuf;
+-
+-	while (dp < varbuf + n)
+-		*dp++ = 0;
+-
+-	return buf_len;
+-}
+-
+-/*
+-	EXAMPLE: nvram_array
+-	nvram_arry format:
+-	name=value
+-	Use carriage return at the end of each assignment,
+-	 and an empty string with
+-	carriage return at the end of array.
+-
+-	For example:
+-	unsigned char  nvram_array[] = {"name1=value1\n",
+-	"name2=value2\n", "\n"};
+-	Hex values start with 0x, and mac addr format: xx:xx:xx:xx:xx:xx.
+-
+-	Search "EXAMPLE: nvram_array" to see how the array is activated.
+-*/
+-
+-void dhd_bus_set_nvram_params(struct dhd_bus *bus, const char *nvram_params)
+-{
+-	bus->nvram_params = nvram_params;
+-}
+-
+-static int dhdsdio_download_nvram(struct dhd_bus *bus)
+-{
+-	int bcmerror = -1;
+-	uint len;
+-	void *image = NULL;
+-	char *memblock = NULL;
+-	char *bufp;
+-	char *nv_path;
+-	bool nvram_file_exists;
+-
+-	nv_path = bus->nv_path;
+-
+-	nvram_file_exists = ((nv_path != NULL) && (nv_path[0] != '\0'));
+-	if (!nvram_file_exists && (bus->nvram_params == NULL))
+-		return 0;
+-
+-	if (nvram_file_exists) {
+-		image = dhd_os_open_image(nv_path);
+-		if (image == NULL)
+-			goto err;
+-	}
+-
+-	memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
+-	if (memblock == NULL) {
+-		DHD_ERROR(("%s: Failed to allocate memory %d bytes\n",
+-			   __func__, MEMBLOCK));
+-		goto err;
+-	}
+-
+-	/* Download variables */
+-	if (nvram_file_exists) {
+-		len = dhd_os_get_image_block(memblock, MEMBLOCK, image);
+-	} else {
+-		len = strlen(bus->nvram_params);
+-		ASSERT(len <= MEMBLOCK);
+-		if (len > MEMBLOCK)
+-			len = MEMBLOCK;
+-		memcpy(memblock, bus->nvram_params, len);
+-	}
+-
+-	if (len > 0 && len < MEMBLOCK) {
+-		bufp = (char *)memblock;
+-		bufp[len] = 0;
+-		len = process_nvram_vars(bufp, len);
+-		bufp += len;
+-		*bufp++ = 0;
+-		if (len)
+-			bcmerror = dhdsdio_downloadvars(bus, memblock, len + 1);
+-		if (bcmerror) {
+-			DHD_ERROR(("%s: error downloading vars: %d\n",
+-				   __func__, bcmerror));
+-		}
+-	} else {
+-		DHD_ERROR(("%s: error reading nvram file: %d\n",
+-			   __func__, len));
+-		bcmerror = -EIO;
+-	}
+-
+-err:
+-	kfree(memblock);
+-
+-	if (image)
+-		dhd_os_close_image(image);
+-
+-	return bcmerror;
+-}
+-
+-static int _dhdsdio_download_firmware(struct dhd_bus *bus)
+-{
+-	int bcmerror = -1;
+-
+-	bool embed = false;	/* download embedded firmware */
+-	bool dlok = false;	/* download firmware succeeded */
+-
+-	/* Out immediately if no image to download */
+-	if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) {
+-#ifdef BCMEMBEDIMAGE
+-		embed = true;
+-#else
+-		return bcmerror;
+-#endif
+-	}
+-
+-	/* Keep arm in reset */
+-	if (dhdsdio_download_state(bus, true)) {
+-		DHD_ERROR(("%s: error placing ARM core in reset\n", __func__));
+-		goto err;
+-	}
+-
+-	/* External image takes precedence if specified */
+-	if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) {
+-		if (dhdsdio_download_code_file(bus, bus->fw_path)) {
+-			DHD_ERROR(("%s: dongle image file download failed\n",
+-				   __func__));
+-#ifdef BCMEMBEDIMAGE
+-			embed = true;
+-#else
+-			goto err;
+-#endif
+-		} else {
+-			embed = false;
+-			dlok = true;
+-		}
+-	}
+-#ifdef BCMEMBEDIMAGE
+-	if (embed) {
+-		if (dhdsdio_download_code_array(bus)) {
+-			DHD_ERROR(("%s: dongle image array download failed\n",
+-				   __func__));
+-			goto err;
+-		} else {
+-			dlok = true;
+-		}
+-	}
+-#endif
+-	if (!dlok) {
+-		DHD_ERROR(("%s: dongle image download failed\n", __func__));
+-		goto err;
+-	}
+-
+-	/* EXAMPLE: nvram_array */
+-	/* If a valid nvram_arry is specified as above, it can be passed
+-		 down to dongle */
+-	/* dhd_bus_set_nvram_params(bus, (char *)&nvram_array); */
+-
+-	/* External nvram takes precedence if specified */
+-	if (dhdsdio_download_nvram(bus)) {
+-		DHD_ERROR(("%s: dongle nvram file download failed\n",
+-			   __func__));
+-	}
+-
+-	/* Take arm out of reset */
+-	if (dhdsdio_download_state(bus, false)) {
+-		DHD_ERROR(("%s: error getting out of ARM core reset\n",
+-			   __func__));
+-		goto err;
+-	}
+-
+-	bcmerror = 0;
+-
+-err:
+-	return bcmerror;
+-}
+-
+-
+-static int
+-dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags,
+-		    u8 *buf, uint nbytes, struct sk_buff *pkt,
+-		    bcmsdh_cmplt_fn_t complete, void *handle)
+-{
+-	return bcmsdh_send_buf
+-		(bus->sdh, addr, fn, flags, buf, nbytes, pkt, complete,
+-		 handle);
+-}
+-
+-uint dhd_bus_chip(struct dhd_bus *bus)
+-{
+-	ASSERT(bus->ci != NULL);
+-	return bus->ci->chip;
+-}
+-
+-void *dhd_bus_pub(struct dhd_bus *bus)
+-{
+-	return bus->dhd;
+-}
+-
+-void *dhd_bus_txq(struct dhd_bus *bus)
+-{
+-	return &bus->txq;
+-}
+-
+-uint dhd_bus_hdrlen(struct dhd_bus *bus)
+-{
+-	return SDPCM_HDRLEN;
+-}
+-
+-int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag)
+-{
+-	int bcmerror = 0;
+-	dhd_bus_t *bus;
+-
+-	bus = dhdp->bus;
+-
+-	if (flag == true) {
+-		if (!bus->dhd->dongle_reset) {
+-			/* Expect app to have torn down any
+-			 connection before calling */
+-			/* Stop the bus, disable F2 */
+-			dhd_bus_stop(bus, false);
+-
+-			/* Clean tx/rx buffer pointers,
+-			 detach from the dongle */
+-			dhdsdio_release_dongle(bus);
+-
+-			bus->dhd->dongle_reset = true;
+-			bus->dhd->up = false;
+-
+-			DHD_TRACE(("%s:  WLAN OFF DONE\n", __func__));
+-			/* App can now remove power from device */
+-		} else
+-			bcmerror = -EIO;
+-	} else {
+-		/* App must have restored power to device before calling */
+-
+-		DHD_TRACE(("\n\n%s: == WLAN ON ==\n", __func__));
+-
+-		if (bus->dhd->dongle_reset) {
+-			/* Turn on WLAN */
+-			/* Reset SD client */
+-			bcmsdh_reset(bus->sdh);
+-
+-			/* Attempt to re-attach & download */
+-			if (dhdsdio_probe_attach(bus, bus->sdh,
+-						 (u32 *) SI_ENUM_BASE,
+-						 bus->cl_devid)) {
+-				/* Attempt to download binary to the dongle */
+-				if (dhdsdio_probe_init
+-				    (bus, bus->sdh)
+-				    && dhdsdio_download_firmware(bus,
+-								 bus->sdh)) {
+-
+-					/* Re-init bus, enable F2 transfer */
+-					dhd_bus_init((dhd_pub_t *) bus->dhd,
+-						     false);
+-
+-#if defined(OOB_INTR_ONLY)
+-					dhd_enable_oob_intr(bus, true);
+-#endif				/* defined(OOB_INTR_ONLY) */
+-
+-					bus->dhd->dongle_reset = false;
+-					bus->dhd->up = true;
+-
+-					DHD_TRACE(("%s: WLAN ON DONE\n",
+-						   __func__));
+-				} else
+-					bcmerror = -EIO;
+-			} else
+-				bcmerror = -EIO;
+-		} else {
+-			bcmerror = -EISCONN;
+-			DHD_ERROR(("%s: Set DEVRESET=false invoked when device "
+-				"is on\n", __func__));
+-			bcmerror = -EIO;
+-		}
+-	}
+-	return bcmerror;
+-}
+-
+-static int
+-dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs)
+-{
+-	u32 regdata;
+-
+-	/*
+-	 * Get CC core rev
+-	 * Chipid is assume to be at offset 0 from regs arg
+-	 * For different chiptypes or old sdio hosts w/o chipcommon,
+-	 * other ways of recognition should be added here.
+-	 */
+-	ci->cccorebase = (u32)regs;
+-	regdata = bcmsdh_reg_read(sdh, CORE_CC_REG(ci->cccorebase, chipid), 4);
+-	ci->chip = regdata & CID_ID_MASK;
+-	ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
+-
+-	DHD_INFO(("%s: chipid=0x%x chiprev=%d\n",
+-		__func__, ci->chip, ci->chiprev));
+-
+-	/* Address of cores for new chips should be added here */
+-	switch (ci->chip) {
+-	case BCM4329_CHIP_ID:
+-		ci->buscorebase = BCM4329_CORE_BUS_BASE;
+-		ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
+-		ci->armcorebase	= BCM4329_CORE_ARM_BASE;
+-		ci->ramsize = BCM4329_RAMSIZE;
+-		break;
+-	default:
+-		DHD_ERROR(("%s: chipid 0x%x is not supported\n",
+-			__func__, ci->chip));
+-		return -ENODEV;
+-	}
+-
+-	regdata = bcmsdh_reg_read(sdh,
+-		CORE_SB(ci->cccorebase, sbidhigh), 4);
+-	ci->ccrev = SBCOREREV(regdata);
+-
+-	regdata = bcmsdh_reg_read(sdh,
+-		CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
+-	ci->pmurev = regdata & PCAP_REV_MASK;
+-
+-	regdata = bcmsdh_reg_read(sdh, CORE_SB(ci->buscorebase, sbidhigh), 4);
+-	ci->buscorerev = SBCOREREV(regdata);
+-	ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
+-
+-	DHD_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
+-		__func__, ci->ccrev, ci->pmurev,
+-		ci->buscorerev, ci->buscoretype));
+-
+-	/* get chipcommon capabilites */
+-	ci->cccaps = bcmsdh_reg_read(sdh,
+-		CORE_CC_REG(ci->cccorebase, capabilities), 4);
+-
+-	return 0;
+-}
+-
+-static void
+-dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase)
+-{
+-	u32 regdata;
+-
+-	regdata = bcmsdh_reg_read(sdh,
+-		CORE_SB(corebase, sbtmstatelow), 4);
+-	if (regdata & SBTML_RESET)
+-		return;
+-
+-	regdata = bcmsdh_reg_read(sdh,
+-		CORE_SB(corebase, sbtmstatelow), 4);
+-	if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) {
+-		/*
+-		 * set target reject and spin until busy is clear
+-		 * (preserve core-specific bits)
+-		 */
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbtmstatelow), 4);
+-		bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+-			regdata | SBTML_REJ);
+-
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbtmstatelow), 4);
+-		udelay(1);
+-		SPINWAIT((bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbtmstatehigh), 4) &
+-			SBTMH_BUSY), 100000);
+-
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbtmstatehigh), 4);
+-		if (regdata & SBTMH_BUSY)
+-			DHD_ERROR(("%s: ARM core still busy\n", __func__));
+-
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbidlow), 4);
+-		if (regdata & SBIDL_INIT) {
+-			regdata = bcmsdh_reg_read(sdh,
+-				CORE_SB(corebase, sbimstate), 4) |
+-				SBIM_RJ;
+-			bcmsdh_reg_write(sdh,
+-				CORE_SB(corebase, sbimstate), 4,
+-				regdata);
+-			regdata = bcmsdh_reg_read(sdh,
+-				CORE_SB(corebase, sbimstate), 4);
+-			udelay(1);
+-			SPINWAIT((bcmsdh_reg_read(sdh,
+-				CORE_SB(corebase, sbimstate), 4) &
+-				SBIM_BY), 100000);
+-		}
+-
+-		/* set reset and reject while enabling the clocks */
+-		bcmsdh_reg_write(sdh,
+-			CORE_SB(corebase, sbtmstatelow), 4,
+-			(((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
+-			SBTML_REJ | SBTML_RESET));
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbtmstatelow), 4);
+-		udelay(10);
+-
+-		/* clear the initiator reject bit */
+-		regdata = bcmsdh_reg_read(sdh,
+-			CORE_SB(corebase, sbidlow), 4);
+-		if (regdata & SBIDL_INIT) {
+-			regdata = bcmsdh_reg_read(sdh,
+-				CORE_SB(corebase, sbimstate), 4) &
+-				~SBIM_RJ;
+-			bcmsdh_reg_write(sdh,
+-				CORE_SB(corebase, sbimstate), 4,
+-				regdata);
+-		}
+-	}
+-
+-	/* leave reset and reject asserted */
+-	bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+-		(SBTML_REJ | SBTML_RESET));
+-	udelay(1);
+-}
+-
+-static int
+-dhdsdio_chip_attach(struct dhd_bus *bus, void *regs)
+-{
+-	struct chip_info *ci;
+-	int err;
+-	u8 clkval, clkset;
+-
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	/* alloc chip_info_t */
+-	ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC);
+-	if (NULL == ci) {
+-		DHD_ERROR(("%s: malloc failed!\n", __func__));
+-		return -ENOMEM;
+-	}
+-
+-	memset((unsigned char *)ci, 0, sizeof(struct chip_info));
+-
+-	/* bus/core/clk setup for register access */
+-	/* Try forcing SDIO core to do ALPAvail request only */
+-	clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR,
+-			clkset, &err);
+-	if (err) {
+-		DHD_ERROR(("%s: error writing for HT off\n", __func__));
+-		goto fail;
+-	}
+-
+-	/* If register supported, wait for ALPAvail and then force ALP */
+-	/* This may take up to 15 milliseconds */
+-	clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+-			SBSDIO_FUNC1_CHIPCLKCSR, NULL);
+-	if ((clkval & ~SBSDIO_AVBITS) == clkset) {
+-		SPINWAIT(((clkval =
+-				bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+-						SBSDIO_FUNC1_CHIPCLKCSR,
+-						NULL)),
+-				!SBSDIO_ALPAV(clkval)),
+-				PMU_MAX_TRANSITION_DLY);
+-		if (!SBSDIO_ALPAV(clkval)) {
+-			DHD_ERROR(("%s: timeout on ALPAV wait, clkval 0x%02x\n",
+-				__func__, clkval));
+-			err = -EBUSY;
+-			goto fail;
+-		}
+-		clkset = SBSDIO_FORCE_HW_CLKREQ_OFF |
+-				SBSDIO_FORCE_ALP;
+-		bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1,
+-				SBSDIO_FUNC1_CHIPCLKCSR,
+-				clkset, &err);
+-		udelay(65);
+-	} else {
+-		DHD_ERROR(("%s: ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
+-			__func__, clkset, clkval));
+-		err = -EACCES;
+-		goto fail;
+-	}
+-
+-	/* Also, disable the extra SDIO pull-ups */
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP, 0,
+-			 NULL);
+-
+-	err = dhdsdio_chip_recognition(bus->sdh, ci, regs);
+-	if (err)
+-		goto fail;
+-
+-	/*
+-	 * Make sure any on-chip ARM is off (in case strapping is wrong),
+-	 * or downloaded code was already running.
+-	 */
+-	dhdsdio_chip_disablecore(bus->sdh, ci->armcorebase);
+-
+-	bcmsdh_reg_write(bus->sdh,
+-		CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0);
+-	bcmsdh_reg_write(bus->sdh,
+-		CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0);
+-
+-	/* Disable F2 to clear any intermediate frame state on the dongle */
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN,
+-		SDIO_FUNC_ENABLE_1, NULL);
+-
+-	/* WAR: cmd52 backplane read so core HW will drop ALPReq */
+-	clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1,
+-			0, NULL);
+-
+-	/* Done with backplane-dependent accesses, can drop clock... */
+-	bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
+-			 NULL);
+-
+-	bus->ci = ci;
+-	return 0;
+-fail:
+-	bus->ci = NULL;
+-	kfree(ci);
+-	return err;
+-}
+-
+-static void
+-dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase)
+-{
+-	u32 regdata;
+-
+-	/*
+-	 * Must do the disable sequence first to work for
+-	 * arbitrary current core state.
+-	 */
+-	dhdsdio_chip_disablecore(sdh, corebase);
+-
+-	/*
+-	 * Now do the initialization sequence.
+-	 * set reset while enabling the clock and
+-	 * forcing them on throughout the core
+-	 */
+-	bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+-		((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) |
+-		SBTML_RESET);
+-	udelay(1);
+-
+-	regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh), 4);
+-	if (regdata & SBTMH_SERR)
+-		bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh), 4, 0);
+-
+-	regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbimstate), 4);
+-	if (regdata & (SBIM_IBE | SBIM_TO))
+-		bcmsdh_reg_write(sdh, CORE_SB(corebase, sbimstate), 4,
+-			regdata & ~(SBIM_IBE | SBIM_TO));
+-
+-	/* clear reset and allow it to propagate throughout the core */
+-	bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+-		(SICF_FGC << SBTML_SICF_SHIFT) |
+-		(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+-	udelay(1);
+-
+-	/* leave clock enabled */
+-	bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4,
+-		(SICF_CLOCK_EN << SBTML_SICF_SHIFT));
+-	udelay(1);
+-}
+-
+-/* SDIO Pad drive strength to select value mappings */
+-struct sdiod_drive_str {
+-	u8 strength;	/* Pad Drive Strength in mA */
+-	u8 sel;		/* Chip-specific select value */
+-};
+-
+-/* SDIO Drive Strength to sel value table for PMU Rev 1 */
+-static const struct sdiod_drive_str sdiod_drive_strength_tab1[] = {
+-	{
+-	4, 0x2}, {
+-	2, 0x3}, {
+-	1, 0x0}, {
+-	0, 0x0}
+-	};
+-
+-/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
+-static const struct sdiod_drive_str sdiod_drive_strength_tab2[] = {
+-	{
+-	12, 0x7}, {
+-	10, 0x6}, {
+-	8, 0x5}, {
+-	6, 0x4}, {
+-	4, 0x2}, {
+-	2, 0x1}, {
+-	0, 0x0}
+-	};
+-
+-/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
+-static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = {
+-	{
+-	32, 0x7}, {
+-	26, 0x6}, {
+-	22, 0x5}, {
+-	16, 0x4}, {
+-	12, 0x3}, {
+-	8, 0x2}, {
+-	4, 0x1}, {
+-	0, 0x0}
+-	};
+-
+-#define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
+-
+-static void
+-dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) {
+-	struct sdiod_drive_str *str_tab = NULL;
+-	u32 str_mask = 0;
+-	u32 str_shift = 0;
+-	char chn[8];
+-
+-	if (!(bus->ci->cccaps & CC_CAP_PMU))
+-		return;
+-
+-	switch (SDIOD_DRVSTR_KEY(bus->ci->chip, bus->ci->pmurev)) {
+-	case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
+-		str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab1;
+-		str_mask = 0x30000000;
+-		str_shift = 28;
+-		break;
+-	case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
+-	case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
+-		str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab2;
+-		str_mask = 0x00003800;
+-		str_shift = 11;
+-		break;
+-	case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
+-		str_tab = (struct sdiod_drive_str *)&sdiod_drive_strength_tab3;
+-		str_mask = 0x00003800;
+-		str_shift = 11;
+-		break;
+-	default:
+-		DHD_ERROR(("No SDIO Drive strength init"
+-			"done for chip %s rev %d pmurev %d\n",
+-			bcm_chipname(bus->ci->chip, chn, 8),
+-			bus->ci->chiprev, bus->ci->pmurev));
+-		break;
+-	}
+-
+-	if (str_tab != NULL) {
+-		u32 drivestrength_sel = 0;
+-		u32 cc_data_temp;
+-		int i;
+-
+-		for (i = 0; str_tab[i].strength != 0; i++) {
+-			if (drivestrength >= str_tab[i].strength) {
+-				drivestrength_sel = str_tab[i].sel;
+-				break;
+-			}
+-		}
+-
+-		bcmsdh_reg_write(bus->sdh,
+-			CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
+-			4, 1);
+-		cc_data_temp = bcmsdh_reg_read(bus->sdh,
+-			CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4);
+-		cc_data_temp &= ~str_mask;
+-		drivestrength_sel <<= str_shift;
+-		cc_data_temp |= drivestrength_sel;
+-		bcmsdh_reg_write(bus->sdh,
+-			CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr),
+-			4, cc_data_temp);
+-
+-		DHD_INFO(("SDIO: %dmA drive strength selected, set to 0x%08x\n",
+-			drivestrength, cc_data_temp));
+-	}
+-}
+-
+-static void
+-dhdsdio_chip_detach(struct dhd_bus *bus)
+-{
+-	DHD_TRACE(("%s: Enter\n", __func__));
+-
+-	kfree(bus->ci);
+-	bus->ci = NULL;
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h
+deleted file mode 100644
+index f0ba535..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h
++++ /dev/null
+@@ -1,100 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _dhdioctl_h_
+-#define	_dhdioctl_h_
+-
+-/* Linux network driver ioctl encoding */
+-typedef struct dhd_ioctl {
+-	uint cmd;		/* common ioctl definition */
+-	void *buf;		/* pointer to user buffer */
+-	uint len;		/* length of user buffer */
+-	bool set;		/* get or set request (optional) */
+-	uint used;		/* bytes read or written (optional) */
+-	uint needed;		/* bytes needed (optional) */
+-	uint driver;		/* to identify target driver */
+-} dhd_ioctl_t;
+-
+-/* per-driver magic numbers */
+-#define DHD_IOCTL_MAGIC		0x00444944
+-
+-/* bump this number if you change the ioctl interface */
+-#define DHD_IOCTL_VERSION	1
+-
+-#define	DHD_IOCTL_MAXLEN	8192	/* max length ioctl buffer required */
+-#define	DHD_IOCTL_SMLEN	256	/* "small" length ioctl buffer required */
+-
+-/* common ioctl definitions */
+-#define DHD_GET_MAGIC				0
+-#define DHD_GET_VERSION				1
+-#define DHD_GET_VAR				2
+-#define DHD_SET_VAR				3
+-
+-/* message levels */
+-#define DHD_ERROR_VAL	0x0001
+-#define DHD_TRACE_VAL	0x0002
+-#define DHD_INFO_VAL	0x0004
+-#define DHD_DATA_VAL	0x0008
+-#define DHD_CTL_VAL	0x0010
+-#define DHD_TIMER_VAL	0x0020
+-#define DHD_HDRS_VAL	0x0040
+-#define DHD_BYTES_VAL	0x0080
+-#define DHD_INTR_VAL	0x0100
+-#define DHD_LOG_VAL	0x0200
+-#define DHD_GLOM_VAL	0x0400
+-#define DHD_EVENT_VAL	0x0800
+-#define DHD_BTA_VAL	0x1000
+-#define DHD_ISCAN_VAL 0x2000
+-
+-#ifdef SDTEST
+-/* For pktgen iovar */
+-typedef struct dhd_pktgen {
+-	uint version;		/* To allow structure change tracking */
+-	uint freq;		/* Max ticks between tx/rx attempts */
+-	uint count;		/* Test packets to send/rcv each attempt */
+-	uint print;		/* Print counts every <print> attempts */
+-	uint total;		/* Total packets (or bursts) */
+-	uint minlen;		/* Minimum length of packets to send */
+-	uint maxlen;		/* Maximum length of packets to send */
+-	uint numsent;		/* Count of test packets sent */
+-	uint numrcvd;		/* Count of test packets received */
+-	uint numfail;		/* Count of test send failures */
+-	uint mode;		/* Test mode (type of test packets) */
+-	uint stop;		/* Stop after this many tx failures */
+-} dhd_pktgen_t;
+-
+-/* Version in case structure changes */
+-#define DHD_PKTGEN_VERSION 2
+-
+-/* Type of test packets to use */
+-#define DHD_PKTGEN_ECHO		1	/* Send echo requests */
+-#define DHD_PKTGEN_SEND		2	/* Send discard packets */
+-#define DHD_PKTGEN_RXBURST	3	/* Request dongle send N packets */
+-#define DHD_PKTGEN_RECV		4	/* Continuous rx from continuous
+-					 tx dongle */
+-#endif				/* SDTEST */
+-
+-/* Enter idle immediately (no timeout) */
+-#define DHD_IDLE_IMMEDIATE	(-1)
+-
+-/* Values for idleclock iovar: other values are the sd_divisor to use
+-	 when idle */
+-#define DHD_IDLE_ACTIVE	0	/* Do not request any SD clock change
+-				 when idle */
+-#define DHD_IDLE_STOP   (-1)	/* Request SD clock be stopped
+-				 (and use SD1 mode) */
+-
+-#endif				/* _dhdioctl_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/dngl_stats.h b/drivers/staging/brcm80211/brcmfmac/dngl_stats.h
+deleted file mode 100644
+index 699cbff..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/dngl_stats.h
++++ /dev/null
+@@ -1,32 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _dngl_stats_h_
+-#define _dngl_stats_h_
+-
+-typedef struct {
+-	unsigned long rx_packets;	/* total packets received */
+-	unsigned long tx_packets;	/* total packets transmitted */
+-	unsigned long rx_bytes;	/* total bytes received */
+-	unsigned long tx_bytes;	/* total bytes transmitted */
+-	unsigned long rx_errors;	/* bad packets received */
+-	unsigned long tx_errors;	/* packet transmit problems */
+-	unsigned long rx_dropped;	/* packets dropped by dongle */
+-	unsigned long tx_dropped;	/* packets dropped by dongle */
+-	unsigned long multicast;	/* multicast packets received */
+-} dngl_stats_t;
+-
+-#endif				/* _dngl_stats_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h
+deleted file mode 100644
+index 28f092c..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h
++++ /dev/null
+@@ -1,75 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_hndrte_armtrap_h
+-#define	_hndrte_armtrap_h
+-
+-/* ARM trap handling */
+-
+-/* Trap types defined by ARM (see arminc.h) */
+-
+-/* Trap locations in lo memory */
+-#define	TRAP_STRIDE	4
+-#define FIRST_TRAP	TR_RST
+-#define LAST_TRAP	(TR_FIQ * TRAP_STRIDE)
+-
+-#if defined(__ARM_ARCH_4T__)
+-#define	MAX_TRAP_TYPE	(TR_FIQ + 1)
+-#elif defined(__ARM_ARCH_7M__)
+-#define	MAX_TRAP_TYPE	(TR_ISR + ARMCM3_NUMINTS)
+-#endif				/* __ARM_ARCH_7M__ */
+-
+-/* The trap structure is defined here as offsets for assembly */
+-#define	TR_TYPE		0x00
+-#define	TR_EPC		0x04
+-#define	TR_CPSR		0x08
+-#define	TR_SPSR		0x0c
+-#define	TR_REGS		0x10
+-#define	TR_REG(n)	(TR_REGS + (n) * 4)
+-#define	TR_SP		TR_REG(13)
+-#define	TR_LR		TR_REG(14)
+-#define	TR_PC		TR_REG(15)
+-
+-#define	TRAP_T_SIZE	80
+-
+-#ifndef	_LANGUAGE_ASSEMBLY
+-
+-typedef struct _trap_struct {
+-	u32 type;
+-	u32 epc;
+-	u32 cpsr;
+-	u32 spsr;
+-	u32 r0;
+-	u32 r1;
+-	u32 r2;
+-	u32 r3;
+-	u32 r4;
+-	u32 r5;
+-	u32 r6;
+-	u32 r7;
+-	u32 r8;
+-	u32 r9;
+-	u32 r10;
+-	u32 r11;
+-	u32 r12;
+-	u32 r13;
+-	u32 r14;
+-	u32 pc;
+-} trap_t;
+-
+-#endif				/* !_LANGUAGE_ASSEMBLY */
+-
+-#endif				/* _hndrte_armtrap_h */
+diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h b/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h
+deleted file mode 100644
+index 4df3eec..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h
++++ /dev/null
+@@ -1,62 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#ifndef _hndrte_cons_h
+-#define _hndrte_cons_h
+-
+-#define CBUF_LEN	(128)
+-
+-#define LOG_BUF_LEN	1024
+-
+-typedef struct {
+-	u32 buf;		/* Can't be pointer on (64-bit) hosts */
+-	uint buf_size;
+-	uint idx;
+-	char *_buf_compat;	/* Redundant pointer for backward compat. */
+-} hndrte_log_t;
+-
+-typedef struct {
+-	/* Virtual UART
+-	 * When there is no UART (e.g. Quickturn),
+-	 * the host should write a complete
+-	 * input line directly into cbuf and then write
+-	 * the length into vcons_in.
+-	 * This may also be used when there is a real UART
+-	 * (at risk of conflicting with
+-	 * the real UART).  vcons_out is currently unused.
+-	 */
+-	volatile uint vcons_in;
+-	volatile uint vcons_out;
+-
+-	/* Output (logging) buffer
+-	 * Console output is written to a ring buffer log_buf at index log_idx.
+-	 * The host may read the output when it sees log_idx advance.
+-	 * Output will be lost if the output wraps around faster than the host
+-	 * polls.
+-	 */
+-	hndrte_log_t log;
+-
+-	/* Console input line buffer
+-	 * Characters are read one at a time into cbuf
+-	 * until <CR> is received, then
+-	 * the buffer is processed as a command line.
+-	 * Also used for virtual UART.
+-	 */
+-	uint cbuf_idx;
+-	char cbuf[CBUF_LEN];
+-} hndrte_cons_t;
+-
+-#endif /* _hndrte_cons_h */
+-
+diff --git a/drivers/staging/brcm80211/brcmfmac/msgtrace.h b/drivers/staging/brcm80211/brcmfmac/msgtrace.h
+deleted file mode 100644
+index d654671..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/msgtrace.h
++++ /dev/null
+@@ -1,61 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_MSGTRACE_H
+-#define	_MSGTRACE_H
+-
+-#define MSGTRACE_VERSION 1
+-
+-/* Message trace header */
+-typedef struct msgtrace_hdr {
+-	u8 version;
+-	u8 spare;
+-	u16 len;		/* Len of the trace */
+-	u32 seqnum;		/* Sequence number of message. Useful
+-				 * if the messsage has been lost
+-				 * because of DMA error or a bus reset
+-				 * (ex: SDIO Func2)
+-				 */
+-	u32 discarded_bytes;	/* Number of discarded bytes because of
+-				 trace overflow  */
+-	u32 discarded_printf;	/* Number of discarded printf
+-				 because of trace overflow */
+-} __attribute__((packed)) msgtrace_hdr_t;
+-
+-#define MSGTRACE_HDRLEN		sizeof(msgtrace_hdr_t)
+-
+-/* The hbus driver generates traces when sending a trace message.
+- * This causes endless traces.
+- * This flag must be set to true in any hbus traces.
+- * The flag is reset in the function msgtrace_put.
+- * This prevents endless traces but generates hasardous
+- * lost of traces only in bus device code.
+- * It is recommendat to set this flag in macro SD_TRACE
+- * but not in SD_ERROR for avoiding missing
+- * hbus error traces. hbus error trace should not generates endless traces.
+- */
+-extern bool msgtrace_hbus_trace;
+-
+-typedef void (*msgtrace_func_send_t) (void *hdl1, void *hdl2, u8 *hdr,
+-				      u16 hdrlen, u8 *buf,
+-				      u16 buflen);
+-
+-extern void msgtrace_sent(void);
+-extern void msgtrace_put(char *buf, int count);
+-extern void msgtrace_init(void *hdl1, void *hdl2,
+-			  msgtrace_func_send_t func_send);
+-
+-#endif				/* _MSGTRACE_H */
+diff --git a/drivers/staging/brcm80211/brcmfmac/sdioh.h b/drivers/staging/brcm80211/brcmfmac/sdioh.h
+deleted file mode 100644
+index f96aaf9..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/sdioh.h
++++ /dev/null
+@@ -1,63 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_SDIOH_H
+-#define	_SDIOH_H
+-
+-#define SD_SysAddr			0x000
+-#define SD_BlockSize			0x004
+-#define SD_BlockCount 			0x006
+-#define SD_Arg0				0x008
+-#define SD_Arg1 			0x00A
+-#define SD_TransferMode			0x00C
+-#define SD_Command 			0x00E
+-#define SD_Response0			0x010
+-#define SD_Response1 			0x012
+-#define SD_Response2			0x014
+-#define SD_Response3 			0x016
+-#define SD_Response4			0x018
+-#define SD_Response5 			0x01A
+-#define SD_Response6			0x01C
+-#define SD_Response7 			0x01E
+-#define SD_BufferDataPort0		0x020
+-#define SD_BufferDataPort1 		0x022
+-#define SD_PresentState			0x024
+-#define SD_HostCntrl			0x028
+-#define SD_PwrCntrl			0x029
+-#define SD_BlockGapCntrl 		0x02A
+-#define SD_WakeupCntrl 			0x02B
+-#define SD_ClockCntrl			0x02C
+-#define SD_TimeoutCntrl 		0x02E
+-#define SD_SoftwareReset		0x02F
+-#define SD_IntrStatus			0x030
+-#define SD_ErrorIntrStatus 		0x032
+-#define SD_IntrStatusEnable		0x034
+-#define SD_ErrorIntrStatusEnable 	0x036
+-#define SD_IntrSignalEnable		0x038
+-#define SD_ErrorIntrSignalEnable 	0x03A
+-#define SD_CMD12ErrorStatus		0x03C
+-#define SD_Capabilities			0x040
+-#define SD_Capabilities_Reserved	0x044
+-#define SD_MaxCurCap			0x048
+-#define SD_MaxCurCap_Reserved		0x04C
+-#define SD_ADMA_SysAddr			0x58
+-#define SD_SlotInterruptStatus		0x0FC
+-#define SD_HostControllerVersion 	0x0FE
+-
+-/* SD specific registers in PCI config space */
+-#define SD_SlotInfo	0x40
+-
+-#endif				/* _SDIOH_H */
+diff --git a/drivers/staging/brcm80211/brcmfmac/sdiovar.h b/drivers/staging/brcm80211/brcmfmac/sdiovar.h
+deleted file mode 100644
+index d1cfa5f..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/sdiovar.h
++++ /dev/null
+@@ -1,38 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _sdiovar_h_
+-#define _sdiovar_h_
+-
+-typedef struct sdreg {
+-	int func;
+-	int offset;
+-	int value;
+-} sdreg_t;
+-
+-/* Common msglevel constants */
+-#define SDH_ERROR_VAL		0x0001	/* Error */
+-#define SDH_TRACE_VAL		0x0002	/* Trace */
+-#define SDH_INFO_VAL		0x0004	/* Info */
+-#define SDH_DEBUG_VAL		0x0008	/* Debug */
+-#define SDH_DATA_VAL		0x0010	/* Data */
+-#define SDH_CTRL_VAL		0x0020	/* Control Regs */
+-#define SDH_LOG_VAL		0x0040	/* Enable bcmlog */
+-#define SDH_DMA_VAL		0x0080	/* DMA */
+-
+-#define NUM_PREV_TRANSACTIONS	16
+-
+-#endif				/* _sdiovar_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
+deleted file mode 100644
+index 1827b0b..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c
++++ /dev/null
+@@ -1,4428 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/kernel.h>
+-#include <linux/if_arp.h>
+-
+-#include <bcmutils.h>
+-
+-#include <asm/uaccess.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhdioctl.h>
+-#include <wlioctl.h>
+-
+-#include <linux/kthread.h>
+-#include <linux/netdevice.h>
+-#include <linux/sched.h>
+-#include <linux/etherdevice.h>
+-#include <linux/wireless.h>
+-#include <linux/ieee80211.h>
+-#include <net/cfg80211.h>
+-
+-#include <net/rtnetlink.h>
+-#include <linux/mmc/sdio_func.h>
+-#include <linux/firmware.h>
+-#include <wl_cfg80211.h>
+-
+-void sdioh_sdio_set_host_pm_flags(int flag);
+-
+-static struct sdio_func *cfg80211_sdio_func;
+-static struct wl_dev *wl_cfg80211_dev;
+-static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
+-
+-u32 wl_dbg_level = WL_DBG_ERR;
+-
+-#define WL_4329_FW_FILE "brcm/bcm4329-fullmac-4.bin"
+-#define WL_4329_NVRAM_FILE "brcm/bcm4329-fullmac-4.txt"
+-
+-/*
+-** cfg80211_ops api/callback list
+-*/
+-static s32 wl_cfg80211_change_iface(struct wiphy *wiphy,
+-				      struct net_device *ndev,
+-				      enum nl80211_iftype type, u32 *flags,
+-				      struct vif_params *params);
+-static s32 __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
+-				struct cfg80211_scan_request *request,
+-				struct cfg80211_ssid *this_ssid);
+-static s32 wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
+-			      struct cfg80211_scan_request *request);
+-static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed);
+-static s32 wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev,
+-				   struct cfg80211_ibss_params *params);
+-static s32 wl_cfg80211_leave_ibss(struct wiphy *wiphy,
+-				    struct net_device *dev);
+-static s32 wl_cfg80211_get_station(struct wiphy *wiphy,
+-				     struct net_device *dev, u8 *mac,
+-				     struct station_info *sinfo);
+-static s32 wl_cfg80211_set_power_mgmt(struct wiphy *wiphy,
+-					struct net_device *dev, bool enabled,
+-					s32 timeout);
+-static s32 wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy,
+-					  struct net_device *dev,
+-					  const u8 *addr,
+-					  const struct cfg80211_bitrate_mask
+-					  *mask);
+-static int wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
+-			       struct cfg80211_connect_params *sme);
+-static s32 wl_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev,
+-				    u16 reason_code);
+-static s32 wl_cfg80211_set_tx_power(struct wiphy *wiphy,
+-				      enum nl80211_tx_power_setting type,
+-				      s32 dbm);
+-static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm);
+-static s32 wl_cfg80211_config_default_key(struct wiphy *wiphy,
+-					  struct net_device *dev, u8 key_idx,
+-					  bool unicast, bool multicast);
+-static s32 wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev,
+-				 u8 key_idx, bool pairwise, const u8 *mac_addr,
+-				 struct key_params *params);
+-static s32 wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev,
+-				 u8 key_idx, bool pairwise, const u8 *mac_addr);
+-static s32 wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev,
+-				 u8 key_idx, bool pairwise, const u8 *mac_addr,
+-				 void *cookie, void (*callback) (void *cookie,
+-								 struct
+-								 key_params *
+-								 params));
+-static s32 wl_cfg80211_config_default_mgmt_key(struct wiphy *wiphy,
+-						 struct net_device *dev,
+-						 u8 key_idx);
+-static s32 wl_cfg80211_resume(struct wiphy *wiphy);
+-static s32 wl_cfg80211_suspend(struct wiphy *wiphy);
+-static s32 wl_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev,
+-				   struct cfg80211_pmksa *pmksa);
+-static s32 wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev,
+-				   struct cfg80211_pmksa *pmksa);
+-static s32 wl_cfg80211_flush_pmksa(struct wiphy *wiphy,
+-				     struct net_device *dev);
+-/*
+-** event & event Q handlers for cfg80211 interfaces
+-*/
+-static s32 wl_create_event_handler(struct wl_priv *wl);
+-static void wl_destroy_event_handler(struct wl_priv *wl);
+-static s32 wl_event_handler(void *data);
+-static void wl_init_eq(struct wl_priv *wl);
+-static void wl_flush_eq(struct wl_priv *wl);
+-static void wl_lock_eq(struct wl_priv *wl);
+-static void wl_unlock_eq(struct wl_priv *wl);
+-static void wl_init_eq_lock(struct wl_priv *wl);
+-static void wl_init_eloop_handler(struct wl_event_loop *el);
+-static struct wl_event_q *wl_deq_event(struct wl_priv *wl);
+-static s32 wl_enq_event(struct wl_priv *wl, u32 type,
+-			  const wl_event_msg_t *msg, void *data);
+-static void wl_put_event(struct wl_event_q *e);
+-static void wl_wakeup_event(struct wl_priv *wl);
+-static s32 wl_notify_connect_status(struct wl_priv *wl,
+-				      struct net_device *ndev,
+-				      const wl_event_msg_t *e, void *data);
+-static s32 wl_notify_roaming_status(struct wl_priv *wl,
+-				      struct net_device *ndev,
+-				      const wl_event_msg_t *e, void *data);
+-static s32 wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev,
+-				   const wl_event_msg_t *e, void *data);
+-static s32 wl_bss_connect_done(struct wl_priv *wl, struct net_device *ndev,
+-				 const wl_event_msg_t *e, void *data,
+-				bool completed);
+-static s32 wl_bss_roaming_done(struct wl_priv *wl, struct net_device *ndev,
+-				 const wl_event_msg_t *e, void *data);
+-static s32 wl_notify_mic_status(struct wl_priv *wl, struct net_device *ndev,
+-				  const wl_event_msg_t *e, void *data);
+-
+-/*
+-** register/deregister sdio function
+-*/
+-struct sdio_func *wl_cfg80211_get_sdio_func(void);
+-static void wl_clear_sdio_func(void);
+-
+-/*
+-** ioctl utilites
+-*/
+-static s32 wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf,
+-			       s32 buf_len);
+-static __used s32 wl_dev_bufvar_set(struct net_device *dev, s8 *name,
+-				      s8 *buf, s32 len);
+-static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val);
+-static s32 wl_dev_intvar_get(struct net_device *dev, s8 *name,
+-			       s32 *retval);
+-static s32 wl_dev_ioctl(struct net_device *dev, u32 cmd, void *arg,
+-			  u32 len);
+-
+-/*
+-** cfg80211 set_wiphy_params utilities
+-*/
+-static s32 wl_set_frag(struct net_device *dev, u32 frag_threshold);
+-static s32 wl_set_rts(struct net_device *dev, u32 frag_threshold);
+-static s32 wl_set_retry(struct net_device *dev, u32 retry, bool l);
+-
+-/*
+-** wl profile utilities
+-*/
+-static s32 wl_update_prof(struct wl_priv *wl, const wl_event_msg_t *e,
+-			    void *data, s32 item);
+-static void *wl_read_prof(struct wl_priv *wl, s32 item);
+-static void wl_init_prof(struct wl_profile *prof);
+-
+-/*
+-** cfg80211 connect utilites
+-*/
+-static s32 wl_set_wpa_version(struct net_device *dev,
+-			struct cfg80211_connect_params *sme);
+-static s32 wl_set_auth_type(struct net_device *dev,
+-			struct cfg80211_connect_params *sme);
+-static s32 wl_set_set_cipher(struct net_device *dev,
+-			struct cfg80211_connect_params *sme);
+-static s32 wl_set_key_mgmt(struct net_device *dev,
+-			struct cfg80211_connect_params *sme);
+-static s32 wl_set_set_sharedkey(struct net_device *dev,
+-			struct cfg80211_connect_params *sme);
+-static s32 wl_get_assoc_ies(struct wl_priv *wl);
+-static void wl_clear_assoc_ies(struct wl_priv *wl);
+-static void wl_ch_to_chanspec(int ch,
+-	struct wl_join_params *join_params, size_t *join_params_size);
+-
+-/*
+-** information element utilities
+-*/
+-static __used s32 wl_add_ie(struct wl_priv *wl, u8 t, u8 l, u8 *v);
+-static s32 wl_mode_to_nl80211_iftype(s32 mode);
+-static struct wireless_dev *wl_alloc_wdev(s32 sizeof_iface,
+-			struct device *dev);
+-static void wl_free_wdev(struct wl_priv *wl);
+-static s32 wl_inform_bss(struct wl_priv *wl);
+-static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi);
+-static s32 wl_update_bss_info(struct wl_priv *wl);
+-static s32 wl_add_keyext(struct wiphy *wiphy, struct net_device *dev,
+-			u8 key_idx, const u8 *mac_addr,
+-			struct key_params *params);
+-
+-/*
+-** key indianess swap utilities
+-*/
+-static void swap_key_from_BE(struct wl_wsec_key *key);
+-static void swap_key_to_BE(struct wl_wsec_key *key);
+-
+-/*
+-** wl_priv memory init/deinit utilities
+-*/
+-static s32 wl_init_priv_mem(struct wl_priv *wl);
+-static void wl_deinit_priv_mem(struct wl_priv *wl);
+-
+-static void wl_delay(u32 ms);
+-
+-/*
+-** store/restore cfg80211 instance data
+-*/
+-static void wl_set_drvdata(struct wl_dev *dev, void *data);
+-static void *wl_get_drvdata(struct wl_dev *dev);
+-
+-/*
+-** ibss mode utilities
+-*/
+-static bool wl_is_ibssmode(struct wl_priv *wl);
+-
+-/*
+-** dongle up/down , default configuration utilities
+-*/
+-static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e);
+-static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e);
+-static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e);
+-static void wl_link_down(struct wl_priv *wl);
+-static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype);
+-static s32 __wl_cfg80211_up(struct wl_priv *wl);
+-static s32 __wl_cfg80211_down(struct wl_priv *wl);
+-static s32 wl_dongle_probecap(struct wl_priv *wl);
+-static void wl_init_conf(struct wl_conf *conf);
+-
+-/*
+-** dongle configuration utilities
+-*/
+-#ifndef EMBEDDED_PLATFORM
+-static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype);
+-static s32 wl_dongle_country(struct net_device *ndev, u8 ccode);
+-static s32 wl_dongle_up(struct net_device *ndev, u32 up);
+-static s32 wl_dongle_power(struct net_device *ndev, u32 power_mode);
+-static s32 wl_dongle_glom(struct net_device *ndev, u32 glom,
+-			    u32 dongle_align);
+-static s32 wl_dongle_offload(struct net_device *ndev, s32 arpoe,
+-			       s32 arp_ol);
+-static s32 wl_pattern_atoh(s8 *src, s8 *dst);
+-static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode);
+-static s32 wl_update_wiphybands(struct wl_priv *wl);
+-#endif				/* !EMBEDDED_PLATFORM */
+-
+-static s32 wl_dongle_eventmsg(struct net_device *ndev);
+-static s32 wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time,
+-				s32 scan_unassoc_time, s32 scan_passive_time);
+-static s32 wl_config_dongle(struct wl_priv *wl, bool need_lock);
+-static s32 wl_dongle_roam(struct net_device *ndev, u32 roamvar,
+-			    u32 bcn_timeout);
+-
+-/*
+-** iscan handler
+-*/
+-static void wl_iscan_timer(unsigned long data);
+-static void wl_term_iscan(struct wl_priv *wl);
+-static s32 wl_init_iscan(struct wl_priv *wl);
+-static s32 wl_iscan_thread(void *data);
+-static s32 wl_dev_iovar_setbuf(struct net_device *dev, s8 *iovar,
+-				 void *param, s32 paramlen, void *bufptr,
+-				 s32 buflen);
+-static s32 wl_dev_iovar_getbuf(struct net_device *dev, s8 *iovar,
+-				 void *param, s32 paramlen, void *bufptr,
+-				 s32 buflen);
+-static s32 wl_run_iscan(struct wl_iscan_ctrl *iscan, struct wlc_ssid *ssid,
+-			  u16 action);
+-static s32 wl_do_iscan(struct wl_priv *wl);
+-static s32 wl_wakeup_iscan(struct wl_iscan_ctrl *iscan);
+-static s32 wl_invoke_iscan(struct wl_priv *wl);
+-static s32 wl_get_iscan_results(struct wl_iscan_ctrl *iscan, u32 *status,
+-				  struct wl_scan_results **bss_list);
+-static void wl_notify_iscan_complete(struct wl_iscan_ctrl *iscan, bool aborted);
+-static void wl_init_iscan_eloop(struct wl_iscan_eloop *el);
+-static s32 wl_iscan_done(struct wl_priv *wl);
+-static s32 wl_iscan_pending(struct wl_priv *wl);
+-static s32 wl_iscan_inprogress(struct wl_priv *wl);
+-static s32 wl_iscan_aborted(struct wl_priv *wl);
+-
+-/*
+-** fw/nvram downloading handler
+-*/
+-static void wl_init_fw(struct wl_fw_ctrl *fw);
+-
+-/*
+-* find most significant bit set
+-*/
+-static __used u32 wl_find_msb(u16 bit16);
+-
+-/*
+-* update pmklist to dongle
+-*/
+-static __used s32 wl_update_pmklist(struct net_device *dev,
+-				      struct wl_pmk_list *pmk_list, s32 err);
+-
+-static void wl_set_mpc(struct net_device *ndev, int mpc);
+-
+-/*
+-* debufs support
+-*/
+-static int wl_debugfs_add_netdev_params(struct wl_priv *wl);
+-static void wl_debugfs_remove_netdev(struct wl_priv *wl);
+-
+-#define WL_PRIV_GET() 							\
+-	({								\
+-	struct wl_iface *ci;						\
+-	if (unlikely(!(wl_cfg80211_dev && 				\
+-		(ci = wl_get_drvdata(wl_cfg80211_dev))))) {		\
+-		WL_ERR("wl_cfg80211_dev is unavailable\n");		\
+-		BUG();							\
+-	} 								\
+-	ci_to_wl(ci);							\
+-})
+-
+-#define CHECK_SYS_UP()							\
+-do {									\
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);			\
+-	if (unlikely(!test_bit(WL_STATUS_READY, &wl->status))) {	\
+-		WL_INFO("device is not ready : status (%d)\n",		\
+-			(int)wl->status);				\
+-		return -EIO;						\
+-	}								\
+-} while (0)
+-
+-extern int dhd_wait_pend8021x(struct net_device *dev);
+-#define CHAN2G(_channel, _freq, _flags) {			\
+-	.band			= IEEE80211_BAND_2GHZ,		\
+-	.center_freq		= (_freq),			\
+-	.hw_value		= (_channel),			\
+-	.flags			= (_flags),			\
+-	.max_antenna_gain	= 0,				\
+-	.max_power		= 30,				\
+-}
+-
+-#define CHAN5G(_channel, _flags) {				\
+-	.band			= IEEE80211_BAND_5GHZ,		\
+-	.center_freq		= 5000 + (5 * (_channel)),	\
+-	.hw_value		= (_channel),			\
+-	.flags			= (_flags),			\
+-	.max_antenna_gain	= 0,				\
+-	.max_power		= 30,				\
+-}
+-
+-#define RATE_TO_BASE100KBPS(rate)   (((rate) * 10) / 2)
+-#define RATETAB_ENT(_rateid, _flags) \
+-	{                                                               \
+-		.bitrate        = RATE_TO_BASE100KBPS(_rateid),     \
+-		.hw_value       = (_rateid),                            \
+-		.flags          = (_flags),                             \
+-	}
+-
+-static struct ieee80211_rate __wl_rates[] = {
+-	RATETAB_ENT(WLC_RATE_1M, 0),
+-	RATETAB_ENT(WLC_RATE_2M, IEEE80211_RATE_SHORT_PREAMBLE),
+-	RATETAB_ENT(WLC_RATE_5M5, IEEE80211_RATE_SHORT_PREAMBLE),
+-	RATETAB_ENT(WLC_RATE_11M, IEEE80211_RATE_SHORT_PREAMBLE),
+-	RATETAB_ENT(WLC_RATE_6M, 0),
+-	RATETAB_ENT(WLC_RATE_9M, 0),
+-	RATETAB_ENT(WLC_RATE_12M, 0),
+-	RATETAB_ENT(WLC_RATE_18M, 0),
+-	RATETAB_ENT(WLC_RATE_24M, 0),
+-	RATETAB_ENT(WLC_RATE_36M, 0),
+-	RATETAB_ENT(WLC_RATE_48M, 0),
+-	RATETAB_ENT(WLC_RATE_54M, 0),
+-};
+-
+-#define wl_a_rates		(__wl_rates + 4)
+-#define wl_a_rates_size	8
+-#define wl_g_rates		(__wl_rates + 0)
+-#define wl_g_rates_size	12
+-
+-static struct ieee80211_channel __wl_2ghz_channels[] = {
+-	CHAN2G(1, 2412, 0),
+-	CHAN2G(2, 2417, 0),
+-	CHAN2G(3, 2422, 0),
+-	CHAN2G(4, 2427, 0),
+-	CHAN2G(5, 2432, 0),
+-	CHAN2G(6, 2437, 0),
+-	CHAN2G(7, 2442, 0),
+-	CHAN2G(8, 2447, 0),
+-	CHAN2G(9, 2452, 0),
+-	CHAN2G(10, 2457, 0),
+-	CHAN2G(11, 2462, 0),
+-	CHAN2G(12, 2467, 0),
+-	CHAN2G(13, 2472, 0),
+-	CHAN2G(14, 2484, 0),
+-};
+-
+-static struct ieee80211_channel __wl_5ghz_a_channels[] = {
+-	CHAN5G(34, 0), CHAN5G(36, 0),
+-	CHAN5G(38, 0), CHAN5G(40, 0),
+-	CHAN5G(42, 0), CHAN5G(44, 0),
+-	CHAN5G(46, 0), CHAN5G(48, 0),
+-	CHAN5G(52, 0), CHAN5G(56, 0),
+-	CHAN5G(60, 0), CHAN5G(64, 0),
+-	CHAN5G(100, 0), CHAN5G(104, 0),
+-	CHAN5G(108, 0), CHAN5G(112, 0),
+-	CHAN5G(116, 0), CHAN5G(120, 0),
+-	CHAN5G(124, 0), CHAN5G(128, 0),
+-	CHAN5G(132, 0), CHAN5G(136, 0),
+-	CHAN5G(140, 0), CHAN5G(149, 0),
+-	CHAN5G(153, 0), CHAN5G(157, 0),
+-	CHAN5G(161, 0), CHAN5G(165, 0),
+-	CHAN5G(184, 0), CHAN5G(188, 0),
+-	CHAN5G(192, 0), CHAN5G(196, 0),
+-	CHAN5G(200, 0), CHAN5G(204, 0),
+-	CHAN5G(208, 0), CHAN5G(212, 0),
+-	CHAN5G(216, 0),
+-};
+-
+-static struct ieee80211_channel __wl_5ghz_n_channels[] = {
+-	CHAN5G(32, 0), CHAN5G(34, 0),
+-	CHAN5G(36, 0), CHAN5G(38, 0),
+-	CHAN5G(40, 0), CHAN5G(42, 0),
+-	CHAN5G(44, 0), CHAN5G(46, 0),
+-	CHAN5G(48, 0), CHAN5G(50, 0),
+-	CHAN5G(52, 0), CHAN5G(54, 0),
+-	CHAN5G(56, 0), CHAN5G(58, 0),
+-	CHAN5G(60, 0), CHAN5G(62, 0),
+-	CHAN5G(64, 0), CHAN5G(66, 0),
+-	CHAN5G(68, 0), CHAN5G(70, 0),
+-	CHAN5G(72, 0), CHAN5G(74, 0),
+-	CHAN5G(76, 0), CHAN5G(78, 0),
+-	CHAN5G(80, 0), CHAN5G(82, 0),
+-	CHAN5G(84, 0), CHAN5G(86, 0),
+-	CHAN5G(88, 0), CHAN5G(90, 0),
+-	CHAN5G(92, 0), CHAN5G(94, 0),
+-	CHAN5G(96, 0), CHAN5G(98, 0),
+-	CHAN5G(100, 0), CHAN5G(102, 0),
+-	CHAN5G(104, 0), CHAN5G(106, 0),
+-	CHAN5G(108, 0), CHAN5G(110, 0),
+-	CHAN5G(112, 0), CHAN5G(114, 0),
+-	CHAN5G(116, 0), CHAN5G(118, 0),
+-	CHAN5G(120, 0), CHAN5G(122, 0),
+-	CHAN5G(124, 0), CHAN5G(126, 0),
+-	CHAN5G(128, 0), CHAN5G(130, 0),
+-	CHAN5G(132, 0), CHAN5G(134, 0),
+-	CHAN5G(136, 0), CHAN5G(138, 0),
+-	CHAN5G(140, 0), CHAN5G(142, 0),
+-	CHAN5G(144, 0), CHAN5G(145, 0),
+-	CHAN5G(146, 0), CHAN5G(147, 0),
+-	CHAN5G(148, 0), CHAN5G(149, 0),
+-	CHAN5G(150, 0), CHAN5G(151, 0),
+-	CHAN5G(152, 0), CHAN5G(153, 0),
+-	CHAN5G(154, 0), CHAN5G(155, 0),
+-	CHAN5G(156, 0), CHAN5G(157, 0),
+-	CHAN5G(158, 0), CHAN5G(159, 0),
+-	CHAN5G(160, 0), CHAN5G(161, 0),
+-	CHAN5G(162, 0), CHAN5G(163, 0),
+-	CHAN5G(164, 0), CHAN5G(165, 0),
+-	CHAN5G(166, 0), CHAN5G(168, 0),
+-	CHAN5G(170, 0), CHAN5G(172, 0),
+-	CHAN5G(174, 0), CHAN5G(176, 0),
+-	CHAN5G(178, 0), CHAN5G(180, 0),
+-	CHAN5G(182, 0), CHAN5G(184, 0),
+-	CHAN5G(186, 0), CHAN5G(188, 0),
+-	CHAN5G(190, 0), CHAN5G(192, 0),
+-	CHAN5G(194, 0), CHAN5G(196, 0),
+-	CHAN5G(198, 0), CHAN5G(200, 0),
+-	CHAN5G(202, 0), CHAN5G(204, 0),
+-	CHAN5G(206, 0), CHAN5G(208, 0),
+-	CHAN5G(210, 0), CHAN5G(212, 0),
+-	CHAN5G(214, 0), CHAN5G(216, 0),
+-	CHAN5G(218, 0), CHAN5G(220, 0),
+-	CHAN5G(222, 0), CHAN5G(224, 0),
+-	CHAN5G(226, 0), CHAN5G(228, 0),
+-};
+-
+-static struct ieee80211_supported_band __wl_band_2ghz = {
+-	.band = IEEE80211_BAND_2GHZ,
+-	.channels = __wl_2ghz_channels,
+-	.n_channels = ARRAY_SIZE(__wl_2ghz_channels),
+-	.bitrates = wl_g_rates,
+-	.n_bitrates = wl_g_rates_size,
+-};
+-
+-static struct ieee80211_supported_band __wl_band_5ghz_a = {
+-	.band = IEEE80211_BAND_5GHZ,
+-	.channels = __wl_5ghz_a_channels,
+-	.n_channels = ARRAY_SIZE(__wl_5ghz_a_channels),
+-	.bitrates = wl_a_rates,
+-	.n_bitrates = wl_a_rates_size,
+-};
+-
+-static struct ieee80211_supported_band __wl_band_5ghz_n = {
+-	.band = IEEE80211_BAND_5GHZ,
+-	.channels = __wl_5ghz_n_channels,
+-	.n_channels = ARRAY_SIZE(__wl_5ghz_n_channels),
+-	.bitrates = wl_a_rates,
+-	.n_bitrates = wl_a_rates_size,
+-};
+-
+-static const u32 __wl_cipher_suites[] = {
+-	WLAN_CIPHER_SUITE_WEP40,
+-	WLAN_CIPHER_SUITE_WEP104,
+-	WLAN_CIPHER_SUITE_TKIP,
+-	WLAN_CIPHER_SUITE_CCMP,
+-	WLAN_CIPHER_SUITE_AES_CMAC,
+-};
+-
+-static void swap_key_from_BE(struct wl_wsec_key *key)
+-{
+-	key->index = cpu_to_le32(key->index);
+-	key->len = cpu_to_le32(key->len);
+-	key->algo = cpu_to_le32(key->algo);
+-	key->flags = cpu_to_le32(key->flags);
+-	key->rxiv.hi = cpu_to_le32(key->rxiv.hi);
+-	key->rxiv.lo = cpu_to_le16(key->rxiv.lo);
+-	key->iv_initialized = cpu_to_le32(key->iv_initialized);
+-}
+-
+-static void swap_key_to_BE(struct wl_wsec_key *key)
+-{
+-	key->index = le32_to_cpu(key->index);
+-	key->len = le32_to_cpu(key->len);
+-	key->algo = le32_to_cpu(key->algo);
+-	key->flags = le32_to_cpu(key->flags);
+-	key->rxiv.hi = le32_to_cpu(key->rxiv.hi);
+-	key->rxiv.lo = le16_to_cpu(key->rxiv.lo);
+-	key->iv_initialized = le32_to_cpu(key->iv_initialized);
+-}
+-
+-static s32
+-wl_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, u32 len)
+-{
+-	struct ifreq ifr;
+-	struct wl_ioctl ioc;
+-	mm_segment_t fs;
+-	s32 err = 0;
+-
+-	memset(&ioc, 0, sizeof(ioc));
+-	ioc.cmd = cmd;
+-	ioc.buf = arg;
+-	ioc.len = len;
+-	strcpy(ifr.ifr_name, dev->name);
+-	ifr.ifr_data = (caddr_t)&ioc;
+-
+-	fs = get_fs();
+-	set_fs(get_ds());
+-	err = dev->netdev_ops->ndo_do_ioctl(dev, &ifr, SIOCDEVPRIVATE);
+-	set_fs(fs);
+-
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev,
+-			 enum nl80211_iftype type, u32 *flags,
+-			 struct vif_params *params)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct wireless_dev *wdev;
+-	s32 infra = 0;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	switch (type) {
+-	case NL80211_IFTYPE_MONITOR:
+-	case NL80211_IFTYPE_WDS:
+-		WL_ERR("type (%d) : currently we do not support this type\n",
+-		       type);
+-		return -EOPNOTSUPP;
+-	case NL80211_IFTYPE_ADHOC:
+-		wl->conf->mode = WL_MODE_IBSS;
+-		infra = 0;
+-		break;
+-	case NL80211_IFTYPE_STATION:
+-		wl->conf->mode = WL_MODE_BSS;
+-		infra = 1;
+-		break;
+-	default:
+-		err = -EINVAL;
+-		goto done;
+-	}
+-
+-	infra = cpu_to_le32(infra);
+-	err = wl_dev_ioctl(ndev, WLC_SET_INFRA, &infra, sizeof(infra));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_INFRA error (%d)\n", err);
+-		err = -EAGAIN;
+-	} else {
+-		wdev = ndev->ieee80211_ptr;
+-		wdev->iftype = type;
+-	}
+-
+-	WL_INFO("IF Type = %s\n",
+-		(wl->conf->mode == WL_MODE_IBSS) ? "Adhoc" : "Infra");
+-
+-done:
+-	WL_TRACE("Exit\n");
+-
+-	return err;
+-}
+-
+-static void wl_iscan_prep(struct wl_scan_params *params, struct wlc_ssid *ssid)
+-{
+-	memcpy(params->bssid, ether_bcast, ETH_ALEN);
+-	params->bss_type = DOT11_BSSTYPE_ANY;
+-	params->scan_type = 0;
+-	params->nprobes = -1;
+-	params->active_time = -1;
+-	params->passive_time = -1;
+-	params->home_time = -1;
+-	params->channel_num = 0;
+-
+-	params->nprobes = cpu_to_le32(params->nprobes);
+-	params->active_time = cpu_to_le32(params->active_time);
+-	params->passive_time = cpu_to_le32(params->passive_time);
+-	params->home_time = cpu_to_le32(params->home_time);
+-	if (ssid && ssid->SSID_len)
+-		memcpy(&params->ssid, ssid, sizeof(wlc_ssid_t));
+-
+-}
+-
+-static s32
+-wl_dev_iovar_setbuf(struct net_device *dev, s8 * iovar, void *param,
+-		    s32 paramlen, void *bufptr, s32 buflen)
+-{
+-	s32 iolen;
+-
+-	iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+-	BUG_ON(!iolen);
+-
+-	return wl_dev_ioctl(dev, WLC_SET_VAR, bufptr, iolen);
+-}
+-
+-static s32
+-wl_dev_iovar_getbuf(struct net_device *dev, s8 * iovar, void *param,
+-		    s32 paramlen, void *bufptr, s32 buflen)
+-{
+-	s32 iolen;
+-
+-	iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+-	BUG_ON(!iolen);
+-
+-	return wl_dev_ioctl(dev, WLC_GET_VAR, bufptr, buflen);
+-}
+-
+-static s32
+-wl_run_iscan(struct wl_iscan_ctrl *iscan, struct wlc_ssid *ssid, u16 action)
+-{
+-	s32 params_size =
+-	    (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params));
+-	struct wl_iscan_params *params;
+-	s32 err = 0;
+-
+-	if (ssid && ssid->SSID_len)
+-		params_size += sizeof(struct wlc_ssid);
+-	params = kzalloc(params_size, GFP_KERNEL);
+-	if (unlikely(!params))
+-		return -ENOMEM;
+-	BUG_ON(params_size >= WLC_IOCTL_SMLEN);
+-
+-	wl_iscan_prep(&params->params, ssid);
+-
+-	params->version = cpu_to_le32(ISCAN_REQ_VERSION);
+-	params->action = cpu_to_le16(action);
+-	params->scan_duration = cpu_to_le16(0);
+-
+-	/* params_size += offsetof(wl_iscan_params_t, params); */
+-	err = wl_dev_iovar_setbuf(iscan->dev, "iscan", params, params_size,
+-				iscan->ioctl_buf, WLC_IOCTL_SMLEN);
+-	if (unlikely(err)) {
+-		if (err == -EBUSY) {
+-			WL_INFO("system busy : iscan canceled\n");
+-		} else {
+-			WL_ERR("error (%d)\n", err);
+-		}
+-	}
+-	kfree(params);
+-	return err;
+-}
+-
+-static s32 wl_do_iscan(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl_to_iscan(wl);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-	struct wlc_ssid ssid;
+-	s32 passive_scan;
+-	s32 err = 0;
+-
+-	/* Broadcast scan by default */
+-	memset(&ssid, 0, sizeof(ssid));
+-
+-	iscan->state = WL_ISCAN_STATE_SCANING;
+-
+-	passive_scan = wl->active_scan ? 0 : 1;
+-	err = wl_dev_ioctl(wl_to_ndev(wl), WLC_SET_PASSIVE_SCAN,
+-			&passive_scan, sizeof(passive_scan));
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-	wl_set_mpc(ndev, 0);
+-	wl->iscan_kickstart = true;
+-	wl_run_iscan(iscan, &ssid, WL_SCAN_ACTION_START);
+-	mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000);
+-	iscan->timer_on = 1;
+-
+-	return err;
+-}
+-
+-static s32
+-__wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
+-		   struct cfg80211_scan_request *request,
+-		   struct cfg80211_ssid *this_ssid)
+-{
+-	struct wl_priv *wl = ndev_to_wl(ndev);
+-	struct cfg80211_ssid *ssids;
+-	struct wl_scan_req *sr = wl_to_sr(wl);
+-	s32 passive_scan;
+-	bool iscan_req;
+-	bool spec_scan;
+-	s32 err = 0;
+-
+-	if (unlikely(test_bit(WL_STATUS_SCANNING, &wl->status))) {
+-		WL_ERR("Scanning already : status (%d)\n", (int)wl->status);
+-		return -EAGAIN;
+-	}
+-	if (unlikely(test_bit(WL_STATUS_SCAN_ABORTING, &wl->status))) {
+-		WL_ERR("Scanning being aborted : status (%d)\n",
+-		       (int)wl->status);
+-		return -EAGAIN;
+-	}
+-	if (test_bit(WL_STATUS_CONNECTING, &wl->status)) {
+-		WL_ERR("Connecting : status (%d)\n",
+-		       (int)wl->status);
+-		return -EAGAIN;
+-	}
+-
+-	iscan_req = false;
+-	spec_scan = false;
+-	if (request) {
+-		/* scan bss */
+-		ssids = request->ssids;
+-		if (wl->iscan_on && (!ssids || !ssids->ssid_len))
+-			iscan_req = true;
+-	} else {
+-		/* scan in ibss */
+-		/* we don't do iscan in ibss */
+-		ssids = this_ssid;
+-	}
+-
+-	wl->scan_request = request;
+-	set_bit(WL_STATUS_SCANNING, &wl->status);
+-	if (iscan_req) {
+-		err = wl_do_iscan(wl);
+-		if (likely(!err))
+-			return err;
+-		else
+-			goto scan_out;
+-	} else {
+-		WL_SCAN("ssid \"%s\", ssid_len (%d)\n",
+-		       ssids->ssid, ssids->ssid_len);
+-		memset(&sr->ssid, 0, sizeof(sr->ssid));
+-		sr->ssid.SSID_len =
+-			    min_t(u8, sizeof(sr->ssid.SSID), ssids->ssid_len);
+-		if (sr->ssid.SSID_len) {
+-			memcpy(sr->ssid.SSID, ssids->ssid, sr->ssid.SSID_len);
+-			sr->ssid.SSID_len = cpu_to_le32(sr->ssid.SSID_len);
+-			spec_scan = true;
+-		} else {
+-			WL_SCAN("Broadcast scan\n");
+-		}
+-
+-		passive_scan = wl->active_scan ? 0 : 1;
+-		err = wl_dev_ioctl(ndev, WLC_SET_PASSIVE_SCAN,
+-				&passive_scan, sizeof(passive_scan));
+-		if (unlikely(err)) {
+-			WL_ERR("WLC_SET_PASSIVE_SCAN error (%d)\n", err);
+-			goto scan_out;
+-		}
+-		wl_set_mpc(ndev, 0);
+-		err = wl_dev_ioctl(ndev, WLC_SCAN, &sr->ssid,
+-				sizeof(sr->ssid));
+-		if (err) {
+-			if (err == -EBUSY) {
+-				WL_INFO("system busy : scan for \"%s\" canceled\n",
+-					sr->ssid.SSID);
+-			} else {
+-				WL_ERR("WLC_SCAN error (%d)\n", err);
+-			}
+-			wl_set_mpc(ndev, 1);
+-			goto scan_out;
+-		}
+-	}
+-
+-	return 0;
+-
+-scan_out:
+-	clear_bit(WL_STATUS_SCANNING, &wl->status);
+-	wl->scan_request = NULL;
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev,
+-		 struct cfg80211_scan_request *request)
+-{
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-
+-	CHECK_SYS_UP();
+-
+-	err = __wl_cfg80211_scan(wiphy, ndev, request, NULL);
+-	if (unlikely(err))
+-		WL_ERR("scan error (%d)\n", err);
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val)
+-{
+-	s8 buf[WLC_IOCTL_SMLEN];
+-	u32 len;
+-	s32 err = 0;
+-
+-	val = cpu_to_le32(val);
+-	len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf));
+-	BUG_ON(!len);
+-
+-	err = wl_dev_ioctl(dev, WLC_SET_VAR, buf, len);
+-	if (unlikely(err))
+-		WL_ERR("error (%d)\n", err);
+-
+-	return err;
+-}
+-
+-static s32
+-wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval)
+-{
+-	union {
+-		s8 buf[WLC_IOCTL_SMLEN];
+-		s32 val;
+-	} var;
+-	u32 len;
+-	u32 data_null;
+-	s32 err = 0;
+-
+-	len =
+-	    bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
+-			sizeof(var.buf));
+-	BUG_ON(!len);
+-	err = wl_dev_ioctl(dev, WLC_GET_VAR, &var, len);
+-	if (unlikely(err))
+-		WL_ERR("error (%d)\n", err);
+-
+-	*retval = le32_to_cpu(var.val);
+-
+-	return err;
+-}
+-
+-static s32 wl_set_rts(struct net_device *dev, u32 rts_threshold)
+-{
+-	s32 err = 0;
+-
+-	err = wl_dev_intvar_set(dev, "rtsthresh", rts_threshold);
+-	if (unlikely(err))
+-		WL_ERR("Error (%d)\n", err);
+-
+-	return err;
+-}
+-
+-static s32 wl_set_frag(struct net_device *dev, u32 frag_threshold)
+-{
+-	s32 err = 0;
+-
+-	err = wl_dev_intvar_set(dev, "fragthresh", frag_threshold);
+-	if (unlikely(err))
+-		WL_ERR("Error (%d)\n", err);
+-
+-	return err;
+-}
+-
+-static s32 wl_set_retry(struct net_device *dev, u32 retry, bool l)
+-{
+-	s32 err = 0;
+-	u32 cmd = (l ? WLC_SET_LRL : WLC_SET_SRL);
+-
+-	retry = cpu_to_le32(retry);
+-	err = wl_dev_ioctl(dev, cmd, &retry, sizeof(retry));
+-	if (unlikely(err)) {
+-		WL_ERR("cmd (%d) , error (%d)\n", cmd, err);
+-		return err;
+-	}
+-	return err;
+-}
+-
+-static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	if (changed & WIPHY_PARAM_RTS_THRESHOLD &&
+-	    (wl->conf->rts_threshold != wiphy->rts_threshold)) {
+-		wl->conf->rts_threshold = wiphy->rts_threshold;
+-		err = wl_set_rts(ndev, wl->conf->rts_threshold);
+-		if (!err)
+-			goto done;
+-	}
+-	if (changed & WIPHY_PARAM_FRAG_THRESHOLD &&
+-	    (wl->conf->frag_threshold != wiphy->frag_threshold)) {
+-		wl->conf->frag_threshold = wiphy->frag_threshold;
+-		err = wl_set_frag(ndev, wl->conf->frag_threshold);
+-		if (!err)
+-			goto done;
+-	}
+-	if (changed & WIPHY_PARAM_RETRY_LONG
+-	    && (wl->conf->retry_long != wiphy->retry_long)) {
+-		wl->conf->retry_long = wiphy->retry_long;
+-		err = wl_set_retry(ndev, wl->conf->retry_long, true);
+-		if (!err)
+-			goto done;
+-	}
+-	if (changed & WIPHY_PARAM_RETRY_SHORT
+-	    && (wl->conf->retry_short != wiphy->retry_short)) {
+-		wl->conf->retry_short = wiphy->retry_short;
+-		err = wl_set_retry(ndev, wl->conf->retry_short, false);
+-		if (!err)
+-			goto done;
+-	}
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev,
+-		      struct cfg80211_ibss_params *params)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct wl_join_params join_params;
+-	size_t join_params_size = 0;
+-	s32 err = 0;
+-	s32 wsec = 0;
+-	s32 bcnprd;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	if (params->ssid)
+-		WL_CONN("SSID: %s\n", params->ssid);
+-	else {
+-		WL_CONN("SSID: NULL, Not supported\n");
+-		return -EOPNOTSUPP;
+-	}
+-
+-	if (params->bssid)
+-		WL_CONN("BSSID: %02X %02X %02X %02X %02X %02X\n",
+-		params->bssid[0], params->bssid[1], params->bssid[2],
+-		params->bssid[3], params->bssid[4], params->bssid[5]);
+-	else
+-		WL_CONN("No BSSID specified\n");
+-
+-	if (params->channel)
+-		WL_CONN("channel: %d\n", params->channel->center_freq);
+-	else
+-		WL_CONN("no channel specified\n");
+-
+-	if (params->channel_fixed)
+-		WL_CONN("fixed channel required\n");
+-	else
+-		WL_CONN("no fixed channel required\n");
+-
+-	if (params->ie && params->ie_len)
+-		WL_CONN("ie len: %d\n", params->ie_len);
+-	else
+-		WL_CONN("no ie specified\n");
+-
+-	if (params->beacon_interval)
+-		WL_CONN("beacon interval: %d\n", params->beacon_interval);
+-	else
+-		WL_CONN("no beacon interval specified\n");
+-
+-	if (params->basic_rates)
+-		WL_CONN("basic rates: %08X\n", params->basic_rates);
+-	else
+-		WL_CONN("no basic rates specified\n");
+-
+-	if (params->privacy)
+-		WL_CONN("privacy required\n");
+-	else
+-		WL_CONN("no privacy required\n");
+-
+-	/* Configure Privacy for starter */
+-	if (params->privacy)
+-		wsec |= WEP_ENABLED;
+-
+-	err = wl_dev_intvar_set(dev, "wsec", wsec);
+-	if (unlikely(err)) {
+-		WL_ERR("wsec failed (%d)\n", err);
+-		goto done;
+-	}
+-
+-	/* Configure Beacon Interval for starter */
+-	if (params->beacon_interval)
+-		bcnprd = cpu_to_le32(params->beacon_interval);
+-	else
+-		bcnprd = cpu_to_le32(100);
+-
+-	err = wl_dev_ioctl(dev, WLC_SET_BCNPRD, &bcnprd, sizeof(bcnprd));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_BCNPRD failed (%d)\n", err);
+-		goto done;
+-	}
+-
+-	/* Configure required join parameter */
+-	memset(&join_params, 0, sizeof(wl_join_params_t));
+-
+-	/* SSID */
+-	join_params.ssid.SSID_len =
+-			(params->ssid_len > 32) ? 32 : params->ssid_len;
+-	memcpy(join_params.ssid.SSID, params->ssid, join_params.ssid.SSID_len);
+-	join_params.ssid.SSID_len = cpu_to_le32(join_params.ssid.SSID_len);
+-	join_params_size = sizeof(join_params.ssid);
+-	wl_update_prof(wl, NULL, &join_params.ssid, WL_PROF_SSID);
+-
+-	/* BSSID */
+-	if (params->bssid) {
+-		memcpy(join_params.params.bssid, params->bssid, ETH_ALEN);
+-		join_params_size =
+-			sizeof(join_params.ssid) + WL_ASSOC_PARAMS_FIXED_SIZE;
+-	} else {
+-		memcpy(join_params.params.bssid, ether_bcast, ETH_ALEN);
+-	}
+-	wl_update_prof(wl, NULL, &join_params.params.bssid, WL_PROF_BSSID);
+-
+-	/* Channel */
+-	if (params->channel) {
+-		u32 target_channel;
+-
+-		wl->channel =
+-			ieee80211_frequency_to_channel(
+-				params->channel->center_freq);
+-		if (params->channel_fixed) {
+-			/* adding chanspec */
+-			wl_ch_to_chanspec(wl->channel,
+-				&join_params, &join_params_size);
+-		}
+-
+-		/* set channel for starter */
+-		target_channel = cpu_to_le32(wl->channel);
+-		err = wl_dev_ioctl(dev, WLC_SET_CHANNEL,
+-			&target_channel, sizeof(target_channel));
+-		if (unlikely(err)) {
+-			WL_ERR("WLC_SET_CHANNEL failed (%d)\n", err);
+-			goto done;
+-		}
+-	} else
+-		wl->channel = 0;
+-
+-	wl->ibss_starter = false;
+-
+-
+-	err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size);
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_SSID failed (%d)\n", err);
+-		goto done;
+-	}
+-
+-	set_bit(WL_STATUS_CONNECTING, &wl->status);
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32 wl_cfg80211_leave_ibss(struct wiphy *wiphy, struct net_device *dev)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	wl_link_down(wl);
+-
+-	WL_TRACE("Exit\n");
+-
+-	return err;
+-}
+-
+-static s32
+-wl_set_wpa_version(struct net_device *dev, struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	struct wl_security *sec;
+-	s32 val = 0;
+-	s32 err = 0;
+-
+-	if (sme->crypto.wpa_versions & NL80211_WPA_VERSION_1)
+-		val = WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED;
+-	else if (sme->crypto.wpa_versions & NL80211_WPA_VERSION_2)
+-		val = WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED;
+-	else
+-		val = WPA_AUTH_DISABLED;
+-	WL_CONN("setting wpa_auth to 0x%0x\n", val);
+-	err = wl_dev_intvar_set(dev, "wpa_auth", val);
+-	if (unlikely(err)) {
+-		WL_ERR("set wpa_auth failed (%d)\n", err);
+-		return err;
+-	}
+-	sec = wl_read_prof(wl, WL_PROF_SEC);
+-	sec->wpa_versions = sme->crypto.wpa_versions;
+-	return err;
+-}
+-
+-static s32
+-wl_set_auth_type(struct net_device *dev, struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	struct wl_security *sec;
+-	s32 val = 0;
+-	s32 err = 0;
+-
+-	switch (sme->auth_type) {
+-	case NL80211_AUTHTYPE_OPEN_SYSTEM:
+-		val = 0;
+-		WL_CONN("open system\n");
+-		break;
+-	case NL80211_AUTHTYPE_SHARED_KEY:
+-		val = 1;
+-		WL_CONN("shared key\n");
+-		break;
+-	case NL80211_AUTHTYPE_AUTOMATIC:
+-		val = 2;
+-		WL_CONN("automatic\n");
+-		break;
+-	case NL80211_AUTHTYPE_NETWORK_EAP:
+-		WL_CONN("network eap\n");
+-	default:
+-		val = 2;
+-		WL_ERR("invalid auth type (%d)\n", sme->auth_type);
+-		break;
+-	}
+-
+-	err = wl_dev_intvar_set(dev, "auth", val);
+-	if (unlikely(err)) {
+-		WL_ERR("set auth failed (%d)\n", err);
+-		return err;
+-	}
+-	sec = wl_read_prof(wl, WL_PROF_SEC);
+-	sec->auth_type = sme->auth_type;
+-	return err;
+-}
+-
+-static s32
+-wl_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	struct wl_security *sec;
+-	s32 pval = 0;
+-	s32 gval = 0;
+-	s32 err = 0;
+-
+-	if (sme->crypto.n_ciphers_pairwise) {
+-		switch (sme->crypto.ciphers_pairwise[0]) {
+-		case WLAN_CIPHER_SUITE_WEP40:
+-		case WLAN_CIPHER_SUITE_WEP104:
+-			pval = WEP_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_TKIP:
+-			pval = TKIP_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_CCMP:
+-			pval = AES_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_AES_CMAC:
+-			pval = AES_ENABLED;
+-			break;
+-		default:
+-			WL_ERR("invalid cipher pairwise (%d)\n",
+-			       sme->crypto.ciphers_pairwise[0]);
+-			return -EINVAL;
+-		}
+-	}
+-	if (sme->crypto.cipher_group) {
+-		switch (sme->crypto.cipher_group) {
+-		case WLAN_CIPHER_SUITE_WEP40:
+-		case WLAN_CIPHER_SUITE_WEP104:
+-			gval = WEP_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_TKIP:
+-			gval = TKIP_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_CCMP:
+-			gval = AES_ENABLED;
+-			break;
+-		case WLAN_CIPHER_SUITE_AES_CMAC:
+-			gval = AES_ENABLED;
+-			break;
+-		default:
+-			WL_ERR("invalid cipher group (%d)\n",
+-			       sme->crypto.cipher_group);
+-			return -EINVAL;
+-		}
+-	}
+-
+-	WL_CONN("pval (%d) gval (%d)\n", pval, gval);
+-	err = wl_dev_intvar_set(dev, "wsec", pval | gval);
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-
+-	sec = wl_read_prof(wl, WL_PROF_SEC);
+-	sec->cipher_pairwise = sme->crypto.ciphers_pairwise[0];
+-	sec->cipher_group = sme->crypto.cipher_group;
+-
+-	return err;
+-}
+-
+-static s32
+-wl_set_key_mgmt(struct net_device *dev, struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	struct wl_security *sec;
+-	s32 val = 0;
+-	s32 err = 0;
+-
+-	if (sme->crypto.n_akm_suites) {
+-		err = wl_dev_intvar_get(dev, "wpa_auth", &val);
+-		if (unlikely(err)) {
+-			WL_ERR("could not get wpa_auth (%d)\n", err);
+-			return err;
+-		}
+-		if (val & (WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED)) {
+-			switch (sme->crypto.akm_suites[0]) {
+-			case WLAN_AKM_SUITE_8021X:
+-				val = WPA_AUTH_UNSPECIFIED;
+-				break;
+-			case WLAN_AKM_SUITE_PSK:
+-				val = WPA_AUTH_PSK;
+-				break;
+-			default:
+-				WL_ERR("invalid cipher group (%d)\n",
+-				       sme->crypto.cipher_group);
+-				return -EINVAL;
+-			}
+-		} else if (val & (WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED)) {
+-			switch (sme->crypto.akm_suites[0]) {
+-			case WLAN_AKM_SUITE_8021X:
+-				val = WPA2_AUTH_UNSPECIFIED;
+-				break;
+-			case WLAN_AKM_SUITE_PSK:
+-				val = WPA2_AUTH_PSK;
+-				break;
+-			default:
+-				WL_ERR("invalid cipher group (%d)\n",
+-				       sme->crypto.cipher_group);
+-				return -EINVAL;
+-			}
+-		}
+-
+-		WL_CONN("setting wpa_auth to %d\n", val);
+-		err = wl_dev_intvar_set(dev, "wpa_auth", val);
+-		if (unlikely(err)) {
+-			WL_ERR("could not set wpa_auth (%d)\n", err);
+-			return err;
+-		}
+-	}
+-	sec = wl_read_prof(wl, WL_PROF_SEC);
+-	sec->wpa_auth = sme->crypto.akm_suites[0];
+-
+-	return err;
+-}
+-
+-static s32
+-wl_set_set_sharedkey(struct net_device *dev,
+-		     struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	struct wl_security *sec;
+-	struct wl_wsec_key key;
+-	s32 val;
+-	s32 err = 0;
+-
+-	WL_CONN("key len (%d)\n", sme->key_len);
+-	if (sme->key_len) {
+-		sec = wl_read_prof(wl, WL_PROF_SEC);
+-		WL_CONN("wpa_versions 0x%x cipher_pairwise 0x%x\n",
+-		       sec->wpa_versions, sec->cipher_pairwise);
+-		if (!
+-		    (sec->wpa_versions & (NL80211_WPA_VERSION_1 |
+-					  NL80211_WPA_VERSION_2))
+-&& (sec->cipher_pairwise & (WLAN_CIPHER_SUITE_WEP40 |
+-			    WLAN_CIPHER_SUITE_WEP104))) {
+-			memset(&key, 0, sizeof(key));
+-			key.len = (u32) sme->key_len;
+-			key.index = (u32) sme->key_idx;
+-			if (unlikely(key.len > sizeof(key.data))) {
+-				WL_ERR("Too long key length (%u)\n", key.len);
+-				return -EINVAL;
+-			}
+-			memcpy(key.data, sme->key, key.len);
+-			key.flags = WL_PRIMARY_KEY;
+-			switch (sec->cipher_pairwise) {
+-			case WLAN_CIPHER_SUITE_WEP40:
+-				key.algo = CRYPTO_ALGO_WEP1;
+-				break;
+-			case WLAN_CIPHER_SUITE_WEP104:
+-				key.algo = CRYPTO_ALGO_WEP128;
+-				break;
+-			default:
+-				WL_ERR("Invalid algorithm (%d)\n",
+-				       sme->crypto.ciphers_pairwise[0]);
+-				return -EINVAL;
+-			}
+-			/* Set the new key/index */
+-			WL_CONN("key length (%d) key index (%d) algo (%d)\n",
+-			       key.len, key.index, key.algo);
+-			WL_CONN("key \"%s\"\n", key.data);
+-			swap_key_from_BE(&key);
+-			err = wl_dev_ioctl(dev, WLC_SET_KEY, &key,
+-					sizeof(key));
+-			if (unlikely(err)) {
+-				WL_ERR("WLC_SET_KEY error (%d)\n", err);
+-				return err;
+-			}
+-			if (sec->auth_type == NL80211_AUTHTYPE_OPEN_SYSTEM) {
+-				WL_CONN("set auth_type to shared key\n");
+-				val = 1;	/* shared key */
+-				err = wl_dev_intvar_set(dev, "auth", val);
+-				if (unlikely(err)) {
+-					WL_ERR("set auth failed (%d)\n", err);
+-					return err;
+-				}
+-			}
+-		}
+-	}
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
+-		    struct cfg80211_connect_params *sme)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct ieee80211_channel *chan = sme->channel;
+-	struct wl_join_params join_params;
+-	size_t join_params_size;
+-
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	if (unlikely(!sme->ssid)) {
+-		WL_ERR("Invalid ssid\n");
+-		return -EOPNOTSUPP;
+-	}
+-
+-	if (chan) {
+-		wl->channel =
+-			ieee80211_frequency_to_channel(chan->center_freq);
+-		WL_CONN("channel (%d), center_req (%d)\n",
+-			wl->channel, chan->center_freq);
+-	} else
+-		wl->channel = 0;
+-
+-	WL_INFO("ie (%p), ie_len (%zd)\n", sme->ie, sme->ie_len);
+-
+-	err = wl_set_wpa_version(dev, sme);
+-	if (unlikely(err))
+-		return err;
+-
+-	err = wl_set_auth_type(dev, sme);
+-	if (unlikely(err))
+-		return err;
+-
+-	err = wl_set_set_cipher(dev, sme);
+-	if (unlikely(err))
+-		return err;
+-
+-	err = wl_set_key_mgmt(dev, sme);
+-	if (unlikely(err))
+-		return err;
+-
+-	err = wl_set_set_sharedkey(dev, sme);
+-	if (unlikely(err))
+-		return err;
+-
+-	wl_update_prof(wl, NULL, sme->bssid, WL_PROF_BSSID);
+-	/*
+-	 **  Join with specific BSSID and cached SSID
+-	 **  If SSID is zero join based on BSSID only
+-	 */
+-	memset(&join_params, 0, sizeof(join_params));
+-	join_params_size = sizeof(join_params.ssid);
+-
+-	join_params.ssid.SSID_len = min(sizeof(join_params.ssid.SSID), sme->ssid_len);
+-	memcpy(&join_params.ssid.SSID, sme->ssid, join_params.ssid.SSID_len);
+-	join_params.ssid.SSID_len = cpu_to_le32(join_params.ssid.SSID_len);
+-	wl_update_prof(wl, NULL, &join_params.ssid, WL_PROF_SSID);
+-
+-	if (sme->bssid)
+-		memcpy(join_params.params.bssid, sme->bssid, ETH_ALEN);
+-	else
+-		memcpy(join_params.params.bssid, ether_bcast, ETH_ALEN);
+-
+-	if (join_params.ssid.SSID_len < IEEE80211_MAX_SSID_LEN) {
+-		WL_CONN("ssid \"%s\", len (%d)\n",
+-		       join_params.ssid.SSID, join_params.ssid.SSID_len);
+-	}
+-
+-	wl_ch_to_chanspec(wl->channel, &join_params, &join_params_size);
+-	err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size);
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-	set_bit(WL_STATUS_CONNECTING, &wl->status);
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev,
+-		       u16 reason_code)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	scb_val_t scbval;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter. Reason code = %d\n", reason_code);
+-	CHECK_SYS_UP();
+-
+-	clear_bit(WL_STATUS_CONNECTED, &wl->status);
+-
+-	scbval.val = reason_code;
+-	memcpy(&scbval.ea, wl_read_prof(wl, WL_PROF_BSSID), ETH_ALEN);
+-	scbval.val = cpu_to_le32(scbval.val);
+-	err = wl_dev_ioctl(dev, WLC_DISASSOC, &scbval,
+-			sizeof(scb_val_t));
+-	if (unlikely(err))
+-		WL_ERR("error (%d)\n", err);
+-
+-	wl->link_up = false;
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_set_tx_power(struct wiphy *wiphy,
+-			 enum nl80211_tx_power_setting type, s32 dbm)
+-{
+-
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-	u16 txpwrmw;
+-	s32 err = 0;
+-	s32 disable = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	switch (type) {
+-	case NL80211_TX_POWER_AUTOMATIC:
+-		break;
+-	case NL80211_TX_POWER_LIMITED:
+-		if (dbm < 0) {
+-			WL_ERR("TX_POWER_LIMITED - dbm is negative\n");
+-			err = -EINVAL;
+-			goto done;
+-		}
+-		break;
+-	case NL80211_TX_POWER_FIXED:
+-		if (dbm < 0) {
+-			WL_ERR("TX_POWER_FIXED - dbm is negative\n");
+-			err = -EINVAL;
+-			goto done;
+-		}
+-		break;
+-	}
+-	/* Make sure radio is off or on as far as software is concerned */
+-	disable = WL_RADIO_SW_DISABLE << 16;
+-	disable = cpu_to_le32(disable);
+-	err = wl_dev_ioctl(ndev, WLC_SET_RADIO, &disable, sizeof(disable));
+-	if (unlikely(err))
+-		WL_ERR("WLC_SET_RADIO error (%d)\n", err);
+-
+-	if (dbm > 0xffff)
+-		txpwrmw = 0xffff;
+-	else
+-		txpwrmw = (u16) dbm;
+-	err = wl_dev_intvar_set(ndev, "qtxpower",
+-			(s32) (bcm_mw_to_qdbm(txpwrmw)));
+-	if (unlikely(err))
+-		WL_ERR("qtxpower error (%d)\n", err);
+-	wl->conf->tx_power = dbm;
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-	s32 txpwrdbm;
+-	u8 result;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	err = wl_dev_intvar_get(ndev, "qtxpower", &txpwrdbm);
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		goto done;
+-	}
+-
+-	result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE);
+-	*dbm = (s32) bcm_qdbm_to_mw(result);
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev,
+-			       u8 key_idx, bool unicast, bool multicast)
+-{
+-	u32 index;
+-	s32 wsec;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	WL_CONN("key index (%d)\n", key_idx);
+-	CHECK_SYS_UP();
+-
+-	err = wl_dev_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_GET_WSEC error (%d)\n", err);
+-		goto done;
+-	}
+-
+-	wsec = le32_to_cpu(wsec);
+-	if (wsec & WEP_ENABLED) {
+-		/* Just select a new current key */
+-		index = (u32) key_idx;
+-		index = cpu_to_le32(index);
+-		err = wl_dev_ioctl(dev, WLC_SET_KEY_PRIMARY, &index,
+-				sizeof(index));
+-		if (unlikely(err))
+-			WL_ERR("error (%d)\n", err);
+-	}
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_add_keyext(struct wiphy *wiphy, struct net_device *dev,
+-	      u8 key_idx, const u8 *mac_addr, struct key_params *params)
+-{
+-	struct wl_wsec_key key;
+-	s32 err = 0;
+-
+-	memset(&key, 0, sizeof(key));
+-	key.index = (u32) key_idx;
+-	/* Instead of bcast for ea address for default wep keys,
+-		 driver needs it to be Null */
+-	if (!is_multicast_ether_addr(mac_addr))
+-		memcpy((char *)&key.ea, (void *)mac_addr, ETH_ALEN);
+-	key.len = (u32) params->key_len;
+-	/* check for key index change */
+-	if (key.len == 0) {
+-		/* key delete */
+-		swap_key_from_BE(&key);
+-		err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-		if (unlikely(err)) {
+-			WL_ERR("key delete error (%d)\n", err);
+-			return err;
+-		}
+-	} else {
+-		if (key.len > sizeof(key.data)) {
+-			WL_ERR("Invalid key length (%d)\n", key.len);
+-			return -EINVAL;
+-		}
+-
+-		WL_CONN("Setting the key index %d\n", key.index);
+-		memcpy(key.data, params->key, key.len);
+-
+-		if (params->cipher == WLAN_CIPHER_SUITE_TKIP) {
+-			u8 keybuf[8];
+-			memcpy(keybuf, &key.data[24], sizeof(keybuf));
+-			memcpy(&key.data[24], &key.data[16], sizeof(keybuf));
+-			memcpy(&key.data[16], keybuf, sizeof(keybuf));
+-		}
+-
+-		/* if IW_ENCODE_EXT_RX_SEQ_VALID set */
+-		if (params->seq && params->seq_len == 6) {
+-			/* rx iv */
+-			u8 *ivptr;
+-			ivptr = (u8 *) params->seq;
+-			key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) |
+-			    (ivptr[3] << 8) | ivptr[2];
+-			key.rxiv.lo = (ivptr[1] << 8) | ivptr[0];
+-			key.iv_initialized = true;
+-		}
+-
+-		switch (params->cipher) {
+-		case WLAN_CIPHER_SUITE_WEP40:
+-			key.algo = CRYPTO_ALGO_WEP1;
+-			WL_CONN("WLAN_CIPHER_SUITE_WEP40\n");
+-			break;
+-		case WLAN_CIPHER_SUITE_WEP104:
+-			key.algo = CRYPTO_ALGO_WEP128;
+-			WL_CONN("WLAN_CIPHER_SUITE_WEP104\n");
+-			break;
+-		case WLAN_CIPHER_SUITE_TKIP:
+-			key.algo = CRYPTO_ALGO_TKIP;
+-			WL_CONN("WLAN_CIPHER_SUITE_TKIP\n");
+-			break;
+-		case WLAN_CIPHER_SUITE_AES_CMAC:
+-			key.algo = CRYPTO_ALGO_AES_CCM;
+-			WL_CONN("WLAN_CIPHER_SUITE_AES_CMAC\n");
+-			break;
+-		case WLAN_CIPHER_SUITE_CCMP:
+-			key.algo = CRYPTO_ALGO_AES_CCM;
+-			WL_CONN("WLAN_CIPHER_SUITE_CCMP\n");
+-			break;
+-		default:
+-			WL_ERR("Invalid cipher (0x%x)\n", params->cipher);
+-			return -EINVAL;
+-		}
+-		swap_key_from_BE(&key);
+-
+-		dhd_wait_pend8021x(dev);
+-		err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-		if (unlikely(err)) {
+-			WL_ERR("WLC_SET_KEY error (%d)\n", err);
+-			return err;
+-		}
+-	}
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev,
+-		    u8 key_idx, bool pairwise, const u8 *mac_addr,
+-		    struct key_params *params)
+-{
+-	struct wl_wsec_key key;
+-	s32 val;
+-	s32 wsec;
+-	s32 err = 0;
+-	u8 keybuf[8];
+-
+-	WL_TRACE("Enter\n");
+-	WL_CONN("key index (%d)\n", key_idx);
+-	CHECK_SYS_UP();
+-
+-	if (mac_addr) {
+-		WL_TRACE("Exit");
+-		return wl_add_keyext(wiphy, dev, key_idx, mac_addr, params);
+-	}
+-	memset(&key, 0, sizeof(key));
+-
+-	key.len = (u32) params->key_len;
+-	key.index = (u32) key_idx;
+-
+-	if (unlikely(key.len > sizeof(key.data))) {
+-		WL_ERR("Too long key length (%u)\n", key.len);
+-		err = -EINVAL;
+-		goto done;
+-	}
+-	memcpy(key.data, params->key, key.len);
+-
+-	key.flags = WL_PRIMARY_KEY;
+-	switch (params->cipher) {
+-	case WLAN_CIPHER_SUITE_WEP40:
+-		key.algo = CRYPTO_ALGO_WEP1;
+-		WL_CONN("WLAN_CIPHER_SUITE_WEP40\n");
+-		break;
+-	case WLAN_CIPHER_SUITE_WEP104:
+-		key.algo = CRYPTO_ALGO_WEP128;
+-		WL_CONN("WLAN_CIPHER_SUITE_WEP104\n");
+-		break;
+-	case WLAN_CIPHER_SUITE_TKIP:
+-		memcpy(keybuf, &key.data[24], sizeof(keybuf));
+-		memcpy(&key.data[24], &key.data[16], sizeof(keybuf));
+-		memcpy(&key.data[16], keybuf, sizeof(keybuf));
+-		key.algo = CRYPTO_ALGO_TKIP;
+-		WL_CONN("WLAN_CIPHER_SUITE_TKIP\n");
+-		break;
+-	case WLAN_CIPHER_SUITE_AES_CMAC:
+-		key.algo = CRYPTO_ALGO_AES_CCM;
+-		WL_CONN("WLAN_CIPHER_SUITE_AES_CMAC\n");
+-		break;
+-	case WLAN_CIPHER_SUITE_CCMP:
+-		key.algo = CRYPTO_ALGO_AES_CCM;
+-		WL_CONN("WLAN_CIPHER_SUITE_CCMP\n");
+-		break;
+-	default:
+-		WL_ERR("Invalid cipher (0x%x)\n", params->cipher);
+-		err = -EINVAL;
+-		goto done;
+-	}
+-
+-	/* Set the new key/index */
+-	swap_key_from_BE(&key);
+-	err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_KEY error (%d)\n", err);
+-		goto done;
+-	}
+-
+-	val = WEP_ENABLED;
+-	err = wl_dev_intvar_get(dev, "wsec", &wsec);
+-	if (unlikely(err)) {
+-		WL_ERR("get wsec error (%d)\n", err);
+-		goto done;
+-	}
+-	wsec &= ~(WEP_ENABLED);
+-	wsec |= val;
+-	err = wl_dev_intvar_set(dev, "wsec", wsec);
+-	if (unlikely(err)) {
+-		WL_ERR("set wsec error (%d)\n", err);
+-		goto done;
+-	}
+-
+-	val = 1;		/* assume shared key. otherwise 0 */
+-	val = cpu_to_le32(val);
+-	err = wl_dev_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val));
+-	if (unlikely(err))
+-		WL_ERR("WLC_SET_AUTH error (%d)\n", err);
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev,
+-		    u8 key_idx, bool pairwise, const u8 *mac_addr)
+-{
+-	struct wl_wsec_key key;
+-	s32 err = 0;
+-	s32 val;
+-	s32 wsec;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-	memset(&key, 0, sizeof(key));
+-
+-	key.index = (u32) key_idx;
+-	key.flags = WL_PRIMARY_KEY;
+-	key.algo = CRYPTO_ALGO_OFF;
+-
+-	WL_CONN("key index (%d)\n", key_idx);
+-	/* Set the new key/index */
+-	swap_key_from_BE(&key);
+-	err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-	if (unlikely(err)) {
+-		if (err == -EINVAL) {
+-			if (key.index >= DOT11_MAX_DEFAULT_KEYS)
+-				/* we ignore this key index in this case */
+-				WL_ERR("invalid key index (%d)\n", key_idx);
+-		} else
+-			WL_ERR("WLC_SET_KEY error (%d)\n", err);
+-
+-		/* Ignore this error, may happen during DISASSOC */
+-		err = -EAGAIN;
+-		goto done;
+-	}
+-
+-	val = 0;
+-	err = wl_dev_intvar_get(dev, "wsec", &wsec);
+-	if (unlikely(err)) {
+-		WL_ERR("get wsec error (%d)\n", err);
+-		/* Ignore this error, may happen during DISASSOC */
+-		err = -EAGAIN;
+-		goto done;
+-	}
+-	wsec &= ~(WEP_ENABLED);
+-	wsec |= val;
+-	err = wl_dev_intvar_set(dev, "wsec", wsec);
+-	if (unlikely(err)) {
+-		WL_ERR("set wsec error (%d)\n", err);
+-		/* Ignore this error, may happen during DISASSOC */
+-		err = -EAGAIN;
+-		goto done;
+-	}
+-
+-	val = 0;		/* assume open key. otherwise 1 */
+-	val = cpu_to_le32(val);
+-	err = wl_dev_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_AUTH error (%d)\n", err);
+-		/* Ignore this error, may happen during DISASSOC */
+-		err = -EAGAIN;
+-	}
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev,
+-		    u8 key_idx, bool pairwise, const u8 *mac_addr, void *cookie,
+-		    void (*callback) (void *cookie, struct key_params * params))
+-{
+-	struct key_params params;
+-	struct wl_wsec_key key;
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct wl_security *sec;
+-	s32 wsec;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	WL_CONN("key index (%d)\n", key_idx);
+-	CHECK_SYS_UP();
+-
+-	memset(&key, 0, sizeof(key));
+-	key.index = key_idx;
+-	swap_key_to_BE(&key);
+-	memset(&params, 0, sizeof(params));
+-	params.key_len = (u8) min_t(u8, WLAN_MAX_KEY_LEN, key.len);
+-	memcpy(params.key, key.data, params.key_len);
+-
+-	err = wl_dev_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_GET_WSEC error (%d)\n", err);
+-		/* Ignore this error, may happen during DISASSOC */
+-		err = -EAGAIN;
+-		goto done;
+-	}
+-	wsec = le32_to_cpu(wsec);
+-	switch (wsec) {
+-	case WEP_ENABLED:
+-		sec = wl_read_prof(wl, WL_PROF_SEC);
+-		if (sec->cipher_pairwise & WLAN_CIPHER_SUITE_WEP40) {
+-			params.cipher = WLAN_CIPHER_SUITE_WEP40;
+-			WL_CONN("WLAN_CIPHER_SUITE_WEP40\n");
+-		} else if (sec->cipher_pairwise & WLAN_CIPHER_SUITE_WEP104) {
+-			params.cipher = WLAN_CIPHER_SUITE_WEP104;
+-			WL_CONN("WLAN_CIPHER_SUITE_WEP104\n");
+-		}
+-		break;
+-	case TKIP_ENABLED:
+-		params.cipher = WLAN_CIPHER_SUITE_TKIP;
+-		WL_CONN("WLAN_CIPHER_SUITE_TKIP\n");
+-		break;
+-	case AES_ENABLED:
+-		params.cipher = WLAN_CIPHER_SUITE_AES_CMAC;
+-		WL_CONN("WLAN_CIPHER_SUITE_AES_CMAC\n");
+-		break;
+-	default:
+-		WL_ERR("Invalid algo (0x%x)\n", wsec);
+-		err = -EINVAL;
+-		goto done;
+-	}
+-	callback(cookie, &params);
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_config_default_mgmt_key(struct wiphy *wiphy,
+-				    struct net_device *dev, u8 key_idx)
+-{
+-	WL_INFO("Not supported\n");
+-
+-	CHECK_SYS_UP();
+-	return -EOPNOTSUPP;
+-}
+-
+-static s32
+-wl_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev,
+-			u8 *mac, struct station_info *sinfo)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	scb_val_t scb_val;
+-	int rssi;
+-	s32 rate;
+-	s32 err = 0;
+-	u8 *bssid = wl_read_prof(wl, WL_PROF_BSSID);
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	if (unlikely
+-	    (memcmp(mac, bssid, ETH_ALEN))) {
+-		WL_ERR("Wrong Mac address cfg_mac-%X:%X:%X:%X:%X:%X"
+-			"wl_bssid-%X:%X:%X:%X:%X:%X\n",
+-			mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
+-			bssid[0], bssid[1], bssid[2], bssid[3],
+-			bssid[4], bssid[5]);
+-		err = -ENOENT;
+-		goto done;
+-	}
+-
+-	/* Report the current tx rate */
+-	err = wl_dev_ioctl(dev, WLC_GET_RATE, &rate, sizeof(rate));
+-	if (err) {
+-		WL_ERR("Could not get rate (%d)\n", err);
+-	} else {
+-		rate = le32_to_cpu(rate);
+-		sinfo->filled |= STATION_INFO_TX_BITRATE;
+-		sinfo->txrate.legacy = rate * 5;
+-		WL_CONN("Rate %d Mbps\n", rate / 2);
+-	}
+-
+-	if (test_bit(WL_STATUS_CONNECTED, &wl->status)) {
+-		scb_val.val = 0;
+-		err = wl_dev_ioctl(dev, WLC_GET_RSSI, &scb_val,
+-				sizeof(scb_val_t));
+-		if (unlikely(err)) {
+-			WL_ERR("Could not get rssi (%d)\n", err);
+-		}
+-		rssi = le32_to_cpu(scb_val.val);
+-		sinfo->filled |= STATION_INFO_SIGNAL;
+-		sinfo->signal = rssi;
+-		WL_CONN("RSSI %d dBm\n", rssi);
+-	}
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev,
+-			   bool enabled, s32 timeout)
+-{
+-	s32 pm;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	pm = enabled ? PM_FAST : PM_OFF;
+-	pm = cpu_to_le32(pm);
+-	WL_INFO("power save %s\n", (pm ? "enabled" : "disabled"));
+-
+-	err = wl_dev_ioctl(dev, WLC_SET_PM, &pm, sizeof(pm));
+-	if (unlikely(err)) {
+-		if (err == -ENODEV)
+-			WL_ERR("net_device is not ready yet\n");
+-		else
+-			WL_ERR("error (%d)\n", err);
+-	}
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static __used u32 wl_find_msb(u16 bit16)
+-{
+-	u32 ret = 0;
+-
+-	if (bit16 & 0xff00) {
+-		ret += 8;
+-		bit16 >>= 8;
+-	}
+-
+-	if (bit16 & 0xf0) {
+-		ret += 4;
+-		bit16 >>= 4;
+-	}
+-
+-	if (bit16 & 0xc) {
+-		ret += 2;
+-		bit16 >>= 2;
+-	}
+-
+-	if (bit16 & 2)
+-		ret += bit16 & 2;
+-	else if (bit16)
+-		ret += bit16;
+-
+-	return ret;
+-}
+-
+-static s32
+-wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev,
+-			     const u8 *addr,
+-			     const struct cfg80211_bitrate_mask *mask)
+-{
+-	struct wl_rateset rateset;
+-	s32 rate;
+-	s32 val;
+-	s32 err_bg;
+-	s32 err_a;
+-	u32 legacy;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	/* addr param is always NULL. ignore it */
+-	/* Get current rateset */
+-	err = wl_dev_ioctl(dev, WLC_GET_CURR_RATESET, &rateset,
+-			sizeof(rateset));
+-	if (unlikely(err)) {
+-		WL_ERR("could not get current rateset (%d)\n", err);
+-		goto done;
+-	}
+-
+-	rateset.count = le32_to_cpu(rateset.count);
+-
+-	legacy = wl_find_msb(mask->control[IEEE80211_BAND_2GHZ].legacy);
+-	if (!legacy)
+-		legacy = wl_find_msb(mask->control[IEEE80211_BAND_5GHZ].legacy);
+-
+-	val = wl_g_rates[legacy - 1].bitrate * 100000;
+-
+-	if (val < rateset.count)
+-		/* Select rate by rateset index */
+-		rate = rateset.rates[val] & 0x7f;
+-	else
+-		/* Specified rate in bps */
+-		rate = val / 500000;
+-
+-	WL_CONN("rate %d mbps\n", rate / 2);
+-
+-	/*
+-	 *
+-	 *      Set rate override,
+-	 *      Since the is a/b/g-blind, both a/bg_rate are enforced.
+-	 */
+-	err_bg = wl_dev_intvar_set(dev, "bg_rate", rate);
+-	err_a = wl_dev_intvar_set(dev, "a_rate", rate);
+-	if (unlikely(err_bg && err_a)) {
+-		WL_ERR("could not set fixed rate (%d) (%d)\n", err_bg, err_a);
+-		err = err_bg | err_a;
+-	}
+-
+-done:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32 wl_cfg80211_resume(struct wiphy *wiphy)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-
+-	/*
+-	 * Check for WL_STATUS_READY before any function call which
+-	 * could result is bus access. Don't block the resume for
+-	 * any driver error conditions
+-	 */
+-	WL_TRACE("Enter\n");
+-
+-#if defined(CONFIG_PM_SLEEP)
+-	atomic_set(&dhd_mmc_suspend, false);
+-#endif	/*  defined(CONFIG_PM_SLEEP) */
+-
+-	if (test_bit(WL_STATUS_READY, &wl->status)) {
+-		/* Turn on Watchdog timer */
+-		wl_os_wd_timer(ndev, dhd_watchdog_ms);
+-		wl_invoke_iscan(wiphy_to_wl(wiphy));
+-	}
+-
+-	WL_TRACE("Exit\n");
+-	return 0;
+-}
+-
+-static s32 wl_cfg80211_suspend(struct wiphy *wiphy)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-
+-	WL_TRACE("Enter\n");
+-
+-	/*
+-	 * Check for WL_STATUS_READY before any function call which
+-	 * could result is bus access. Don't block the suspend for
+-	 * any driver error conditions
+-	 */
+-
+-	/*
+-	 * While going to suspend if associated with AP disassociate
+-	 * from AP to save power while system is in suspended state
+-	 */
+-	if (test_bit(WL_STATUS_CONNECTED, &wl->status) &&
+-		test_bit(WL_STATUS_READY, &wl->status)) {
+-		WL_INFO("Disassociating from AP"
+-			" while entering suspend state\n");
+-		wl_link_down(wl);
+-
+-		/*
+-		 * Make sure WPA_Supplicant receives all the event
+-		 * generated due to DISASSOC call to the fw to keep
+-		 * the state fw and WPA_Supplicant state consistent
+-		 */
+-		rtnl_unlock();
+-		wl_delay(500);
+-		rtnl_lock();
+-	}
+-
+-	set_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
+-	if (test_bit(WL_STATUS_READY, &wl->status))
+-		wl_term_iscan(wl);
+-
+-	if (wl->scan_request) {
+-		/* Indidate scan abort to cfg80211 layer */
+-		WL_INFO("Terminating scan in progress\n");
+-		cfg80211_scan_done(wl->scan_request, true);
+-		wl->scan_request = NULL;
+-	}
+-	clear_bit(WL_STATUS_SCANNING, &wl->status);
+-	clear_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
+-	clear_bit(WL_STATUS_CONNECTING, &wl->status);
+-	clear_bit(WL_STATUS_CONNECTED, &wl->status);
+-
+-	/* Inform SDIO stack not to switch off power to the chip */
+-	sdioh_sdio_set_host_pm_flags(MMC_PM_KEEP_POWER);
+-
+-	/* Turn off watchdog timer */
+-	if (test_bit(WL_STATUS_READY, &wl->status)) {
+-		WL_INFO("Terminate watchdog timer and enable MPC\n");
+-		wl_set_mpc(ndev, 1);
+-		wl_os_wd_timer(ndev, 0);
+-	}
+-
+-#if defined(CONFIG_PM_SLEEP)
+-	atomic_set(&dhd_mmc_suspend, true);
+-#endif	/*  defined(CONFIG_PM_SLEEP) */
+-
+-	WL_TRACE("Exit\n");
+-
+-	return 0;
+-}
+-
+-static __used s32
+-wl_update_pmklist(struct net_device *dev, struct wl_pmk_list *pmk_list,
+-		  s32 err)
+-{
+-	int i, j;
+-
+-	WL_CONN("No of elements %d\n", pmk_list->pmkids.npmkid);
+-	for (i = 0; i < pmk_list->pmkids.npmkid; i++) {
+-		WL_CONN("PMKID[%d]: %pM =\n", i,
+-			&pmk_list->pmkids.pmkid[i].BSSID);
+-		for (j = 0; j < WLAN_PMKID_LEN; j++)
+-			WL_CONN("%02x\n", pmk_list->pmkids.pmkid[i].PMKID[j]);
+-	}
+-
+-	if (likely(!err))
+-		wl_dev_bufvar_set(dev, "pmkid_info", (char *)pmk_list,
+-					sizeof(*pmk_list));
+-
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev,
+-		      struct cfg80211_pmksa *pmksa)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	s32 err = 0;
+-	int i;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	for (i = 0; i < wl->pmk_list->pmkids.npmkid; i++)
+-		if (!memcmp(pmksa->bssid, &wl->pmk_list->pmkids.pmkid[i].BSSID,
+-			    ETH_ALEN))
+-			break;
+-	if (i < WL_NUM_PMKIDS_MAX) {
+-		memcpy(&wl->pmk_list->pmkids.pmkid[i].BSSID, pmksa->bssid,
+-		       ETH_ALEN);
+-		memcpy(&wl->pmk_list->pmkids.pmkid[i].PMKID, pmksa->pmkid,
+-		       WLAN_PMKID_LEN);
+-		if (i == wl->pmk_list->pmkids.npmkid)
+-			wl->pmk_list->pmkids.npmkid++;
+-	} else
+-		err = -EINVAL;
+-
+-	WL_CONN("set_pmksa,IW_PMKSA_ADD - PMKID: %pM =\n",
+-	       &wl->pmk_list->pmkids.pmkid[wl->pmk_list->pmkids.npmkid].BSSID);
+-	for (i = 0; i < WLAN_PMKID_LEN; i++)
+-		WL_CONN("%02x\n",
+-		       wl->pmk_list->pmkids.pmkid[wl->pmk_list->pmkids.npmkid].
+-		       PMKID[i]);
+-
+-	err = wl_update_pmklist(dev, wl->pmk_list, err);
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev,
+-		      struct cfg80211_pmksa *pmksa)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	struct _pmkid_list pmkid;
+-	s32 err = 0;
+-	int i;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-	memcpy(&pmkid.pmkid[0].BSSID, pmksa->bssid, ETH_ALEN);
+-	memcpy(&pmkid.pmkid[0].PMKID, pmksa->pmkid, WLAN_PMKID_LEN);
+-
+-	WL_CONN("del_pmksa,IW_PMKSA_REMOVE - PMKID: %pM =\n",
+-	       &pmkid.pmkid[0].BSSID);
+-	for (i = 0; i < WLAN_PMKID_LEN; i++)
+-		WL_CONN("%02x\n", pmkid.pmkid[0].PMKID[i]);
+-
+-	for (i = 0; i < wl->pmk_list->pmkids.npmkid; i++)
+-		if (!memcmp
+-		    (pmksa->bssid, &wl->pmk_list->pmkids.pmkid[i].BSSID,
+-		     ETH_ALEN))
+-			break;
+-
+-	if ((wl->pmk_list->pmkids.npmkid > 0)
+-	    && (i < wl->pmk_list->pmkids.npmkid)) {
+-		memset(&wl->pmk_list->pmkids.pmkid[i], 0, sizeof(pmkid_t));
+-		for (; i < (wl->pmk_list->pmkids.npmkid - 1); i++) {
+-			memcpy(&wl->pmk_list->pmkids.pmkid[i].BSSID,
+-			       &wl->pmk_list->pmkids.pmkid[i + 1].BSSID,
+-			       ETH_ALEN);
+-			memcpy(&wl->pmk_list->pmkids.pmkid[i].PMKID,
+-			       &wl->pmk_list->pmkids.pmkid[i + 1].PMKID,
+-			       WLAN_PMKID_LEN);
+-		}
+-		wl->pmk_list->pmkids.npmkid--;
+-	} else
+-		err = -EINVAL;
+-
+-	err = wl_update_pmklist(dev, wl->pmk_list, err);
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-
+-}
+-
+-static s32
+-wl_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *dev)
+-{
+-	struct wl_priv *wl = wiphy_to_wl(wiphy);
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	CHECK_SYS_UP();
+-
+-	memset(wl->pmk_list, 0, sizeof(*wl->pmk_list));
+-	err = wl_update_pmklist(dev, wl->pmk_list, err);
+-
+-	WL_TRACE("Exit\n");
+-	return err;
+-
+-}
+-
+-static struct cfg80211_ops wl_cfg80211_ops = {
+-	.change_virtual_intf = wl_cfg80211_change_iface,
+-	.scan = wl_cfg80211_scan,
+-	.set_wiphy_params = wl_cfg80211_set_wiphy_params,
+-	.join_ibss = wl_cfg80211_join_ibss,
+-	.leave_ibss = wl_cfg80211_leave_ibss,
+-	.get_station = wl_cfg80211_get_station,
+-	.set_tx_power = wl_cfg80211_set_tx_power,
+-	.get_tx_power = wl_cfg80211_get_tx_power,
+-	.add_key = wl_cfg80211_add_key,
+-	.del_key = wl_cfg80211_del_key,
+-	.get_key = wl_cfg80211_get_key,
+-	.set_default_key = wl_cfg80211_config_default_key,
+-	.set_default_mgmt_key = wl_cfg80211_config_default_mgmt_key,
+-	.set_power_mgmt = wl_cfg80211_set_power_mgmt,
+-	.set_bitrate_mask = wl_cfg80211_set_bitrate_mask,
+-	.connect = wl_cfg80211_connect,
+-	.disconnect = wl_cfg80211_disconnect,
+-	.suspend = wl_cfg80211_suspend,
+-	.resume = wl_cfg80211_resume,
+-	.set_pmksa = wl_cfg80211_set_pmksa,
+-	.del_pmksa = wl_cfg80211_del_pmksa,
+-	.flush_pmksa = wl_cfg80211_flush_pmksa
+-};
+-
+-static s32 wl_mode_to_nl80211_iftype(s32 mode)
+-{
+-	s32 err = 0;
+-
+-	switch (mode) {
+-	case WL_MODE_BSS:
+-		return NL80211_IFTYPE_STATION;
+-	case WL_MODE_IBSS:
+-		return NL80211_IFTYPE_ADHOC;
+-	default:
+-		return NL80211_IFTYPE_UNSPECIFIED;
+-	}
+-
+-	return err;
+-}
+-
+-static struct wireless_dev *wl_alloc_wdev(s32 sizeof_iface,
+-					  struct device *dev)
+-{
+-	struct wireless_dev *wdev;
+-	s32 err = 0;
+-
+-	wdev = kzalloc(sizeof(*wdev), GFP_KERNEL);
+-	if (unlikely(!wdev)) {
+-		WL_ERR("Could not allocate wireless device\n");
+-		return ERR_PTR(-ENOMEM);
+-	}
+-	wdev->wiphy =
+-	    wiphy_new(&wl_cfg80211_ops, sizeof(struct wl_priv) + sizeof_iface);
+-	if (unlikely(!wdev->wiphy)) {
+-		WL_ERR("Couldn not allocate wiphy device\n");
+-		err = -ENOMEM;
+-		goto wiphy_new_out;
+-	}
+-	set_wiphy_dev(wdev->wiphy, dev);
+-	wdev->wiphy->max_scan_ssids = WL_NUM_SCAN_MAX;
+-	wdev->wiphy->max_num_pmkids = WL_NUM_PMKIDS_MAX;
+-	wdev->wiphy->interface_modes =
+-	    BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
+-	wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &__wl_band_2ghz;
+-	wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = &__wl_band_5ghz_a;	/* Set
+-						* it as 11a by default.
+-						* This will be updated with
+-						* 11n phy tables in
+-						* "ifconfig up"
+-						* if phy has 11n capability
+-						*/
+-	wdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
+-	wdev->wiphy->cipher_suites = __wl_cipher_suites;
+-	wdev->wiphy->n_cipher_suites = ARRAY_SIZE(__wl_cipher_suites);
+-#ifndef WL_POWERSAVE_DISABLED
+-	wdev->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;	/* enable power
+-								 * save mode
+-								 * by default
+-								 */
+-#else
+-	wdev->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
+-#endif				/* !WL_POWERSAVE_DISABLED */
+-	err = wiphy_register(wdev->wiphy);
+-	if (unlikely(err < 0)) {
+-		WL_ERR("Couldn not register wiphy device (%d)\n", err);
+-		goto wiphy_register_out;
+-	}
+-	return wdev;
+-
+-wiphy_register_out:
+-	wiphy_free(wdev->wiphy);
+-
+-wiphy_new_out:
+-	kfree(wdev);
+-
+-	return ERR_PTR(err);
+-}
+-
+-static void wl_free_wdev(struct wl_priv *wl)
+-{
+-	struct wireless_dev *wdev = wl_to_wdev(wl);
+-
+-	if (unlikely(!wdev)) {
+-		WL_ERR("wdev is invalid\n");
+-		return;
+-	}
+-	wiphy_unregister(wdev->wiphy);
+-	wiphy_free(wdev->wiphy);
+-	kfree(wdev);
+-	wl_to_wdev(wl) = NULL;
+-}
+-
+-static s32 wl_inform_bss(struct wl_priv *wl)
+-{
+-	struct wl_scan_results *bss_list;
+-	struct wl_bss_info *bi = NULL;	/* must be initialized */
+-	s32 err = 0;
+-	int i;
+-
+-	bss_list = wl->bss_list;
+-	if (unlikely(bss_list->version != WL_BSS_INFO_VERSION)) {
+-		WL_ERR("Version %d != WL_BSS_INFO_VERSION\n",
+-		       bss_list->version);
+-		return -EOPNOTSUPP;
+-	}
+-	WL_SCAN("scanned AP count (%d)\n", bss_list->count);
+-	bi = next_bss(bss_list, bi);
+-	for_each_bss(bss_list, bi, i) {
+-		err = wl_inform_single_bss(wl, bi);
+-		if (unlikely(err))
+-			break;
+-	}
+-	return err;
+-}
+-
+-
+-static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi)
+-{
+-	struct wiphy *wiphy = wl_to_wiphy(wl);
+-	struct ieee80211_channel *notify_channel;
+-	struct cfg80211_bss *bss;
+-	struct ieee80211_supported_band *band;
+-	s32 err = 0;
+-	u16 channel;
+-	u32 freq;
+-	u64 notify_timestamp;
+-	u16 notify_capability;
+-	u16 notify_interval;
+-	u8 *notify_ie;
+-	size_t notify_ielen;
+-	s32 notify_signal;
+-
+-	if (unlikely(le32_to_cpu(bi->length) > WL_BSS_INFO_MAX)) {
+-		WL_ERR("Bss info is larger than buffer. Discarding\n");
+-		return 0;
+-	}
+-
+-	channel = bi->ctl_ch ? bi->ctl_ch :
+-				CHSPEC_CHANNEL(le16_to_cpu(bi->chanspec));
+-
+-	if (channel <= CH_MAX_2G_CHANNEL)
+-		band = wiphy->bands[IEEE80211_BAND_2GHZ];
+-	else
+-		band = wiphy->bands[IEEE80211_BAND_5GHZ];
+-
+-	freq = ieee80211_channel_to_frequency(channel, band->band);
+-	notify_channel = ieee80211_get_channel(wiphy, freq);
+-
+-	notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */
+-	notify_capability = le16_to_cpu(bi->capability);
+-	notify_interval = le16_to_cpu(bi->beacon_period);
+-	notify_ie = (u8 *)bi + le16_to_cpu(bi->ie_offset);
+-	notify_ielen = le16_to_cpu(bi->ie_length);
+-	notify_signal = (s16)le16_to_cpu(bi->RSSI) * 100;
+-
+-	WL_CONN("bssid: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
+-			bi->BSSID[0], bi->BSSID[1], bi->BSSID[2],
+-			bi->BSSID[3], bi->BSSID[4], bi->BSSID[5]);
+-	WL_CONN("Channel: %d(%d)\n", channel, freq);
+-	WL_CONN("Capability: %X\n", notify_capability);
+-	WL_CONN("Beacon interval: %d\n", notify_interval);
+-	WL_CONN("Signal: %d\n", notify_signal);
+-	WL_CONN("notify_timestamp: %#018llx\n", notify_timestamp);
+-
+-	bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)bi->BSSID,
+-		notify_timestamp, notify_capability, notify_interval, notify_ie,
+-		notify_ielen, notify_signal, GFP_KERNEL);
+-
+-	if (unlikely(!bss)) {
+-		WL_ERR("cfg80211_inform_bss_frame error\n");
+-		return -EINVAL;
+-	}
+-
+-	return err;
+-}
+-
+-static s32
+-wl_inform_ibss(struct wl_priv *wl, struct net_device *dev, const u8 *bssid)
+-{
+-	struct wiphy *wiphy = wl_to_wiphy(wl);
+-	struct ieee80211_channel *notify_channel;
+-	struct wl_bss_info *bi = NULL;
+-	struct ieee80211_supported_band *band;
+-	u8 *buf = NULL;
+-	s32 err = 0;
+-	u16 channel;
+-	u32 freq;
+-	u64 notify_timestamp;
+-	u16 notify_capability;
+-	u16 notify_interval;
+-	u8 *notify_ie;
+-	size_t notify_ielen;
+-	s32 notify_signal;
+-
+-	WL_TRACE("Enter\n");
+-
+-	buf = kzalloc(WL_BSS_INFO_MAX, GFP_KERNEL);
+-	if (buf == NULL) {
+-		WL_ERR("kzalloc() failed\n");
+-		err = -ENOMEM;
+-		goto CleanUp;
+-	}
+-
+-	*(u32 *)buf = cpu_to_le32(WL_BSS_INFO_MAX);
+-
+-	err = wl_dev_ioctl(dev, WLC_GET_BSS_INFO, buf, WL_BSS_INFO_MAX);
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_GET_BSS_INFO failed: %d\n", err);
+-		goto CleanUp;
+-	}
+-
+-	bi = (wl_bss_info_t *)(buf + 4);
+-
+-	channel = bi->ctl_ch ? bi->ctl_ch :
+-				CHSPEC_CHANNEL(le16_to_cpu(bi->chanspec));
+-
+-	if (channel <= CH_MAX_2G_CHANNEL)
+-		band = wiphy->bands[IEEE80211_BAND_2GHZ];
+-	else
+-		band = wiphy->bands[IEEE80211_BAND_5GHZ];
+-
+-	freq = ieee80211_channel_to_frequency(channel, band->band);
+-	notify_channel = ieee80211_get_channel(wiphy, freq);
+-
+-	notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */
+-	notify_capability = le16_to_cpu(bi->capability);
+-	notify_interval = le16_to_cpu(bi->beacon_period);
+-	notify_ie = (u8 *)bi + le16_to_cpu(bi->ie_offset);
+-	notify_ielen = le16_to_cpu(bi->ie_length);
+-	notify_signal = (s16)le16_to_cpu(bi->RSSI) * 100;
+-
+-	WL_CONN("channel: %d(%d)\n", channel, freq);
+-	WL_CONN("capability: %X\n", notify_capability);
+-	WL_CONN("beacon interval: %d\n", notify_interval);
+-	WL_CONN("signal: %d\n", notify_signal);
+-	WL_CONN("notify_timestamp: %#018llx\n", notify_timestamp);
+-
+-	cfg80211_inform_bss(wiphy, notify_channel, bssid,
+-		notify_timestamp, notify_capability, notify_interval,
+-		notify_ie, notify_ielen, notify_signal, GFP_KERNEL);
+-
+-CleanUp:
+-
+-	kfree(buf);
+-
+-	WL_TRACE("Exit\n");
+-
+-	return err;
+-}
+-
+-static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e)
+-{
+-	u32 event = be32_to_cpu(e->event_type);
+-	u32 status = be32_to_cpu(e->status);
+-
+-	if (event == WLC_E_SET_SSID && status == WLC_E_STATUS_SUCCESS) {
+-		WL_CONN("Processing set ssid\n");
+-		wl->link_up = true;
+-		return true;
+-	}
+-
+-	return false;
+-}
+-
+-static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e)
+-{
+-	u32 event = be32_to_cpu(e->event_type);
+-	u16 flags = be16_to_cpu(e->flags);
+-
+-	if (event == WLC_E_LINK && (!(flags & WLC_EVENT_MSG_LINK))) {
+-		WL_CONN("Processing link down\n");
+-		return true;
+-	}
+-	return false;
+-}
+-
+-static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e)
+-{
+-	u32 event = be32_to_cpu(e->event_type);
+-	u32 status = be32_to_cpu(e->status);
+-	u16 flags = be16_to_cpu(e->flags);
+-
+-	if (event == WLC_E_LINK && status == WLC_E_STATUS_NO_NETWORKS) {
+-		WL_CONN("Processing Link %s & no network found\n",
+-				flags & WLC_EVENT_MSG_LINK ? "up" : "down");
+-		return true;
+-	}
+-
+-	if (event == WLC_E_SET_SSID && status != WLC_E_STATUS_SUCCESS) {
+-		WL_CONN("Processing connecting & no network found\n");
+-		return true;
+-	}
+-
+-	return false;
+-}
+-
+-static s32
+-wl_notify_connect_status(struct wl_priv *wl, struct net_device *ndev,
+-			 const wl_event_msg_t *e, void *data)
+-{
+-	s32 err = 0;
+-
+-	if (wl_is_linkup(wl, e)) {
+-		WL_CONN("Linkup\n");
+-		if (wl_is_ibssmode(wl)) {
+-			wl_update_prof(wl, NULL, (void *)e->addr,
+-				WL_PROF_BSSID);
+-			wl_inform_ibss(wl, ndev, e->addr);
+-			cfg80211_ibss_joined(ndev, e->addr, GFP_KERNEL);
+-			clear_bit(WL_STATUS_CONNECTING, &wl->status);
+-			set_bit(WL_STATUS_CONNECTED, &wl->status);
+-		} else
+-			wl_bss_connect_done(wl, ndev, e, data, true);
+-	} else if (wl_is_linkdown(wl, e)) {
+-		WL_CONN("Linkdown\n");
+-		if (wl_is_ibssmode(wl)) {
+-			if (test_and_clear_bit(WL_STATUS_CONNECTED,
+-				&wl->status))
+-				wl_link_down(wl);
+-		} else {
+-			if (test_and_clear_bit(WL_STATUS_CONNECTED,
+-				&wl->status)) {
+-				cfg80211_disconnected(ndev, 0, NULL, 0,
+-					GFP_KERNEL);
+-				wl_link_down(wl);
+-			}
+-		}
+-		wl_init_prof(wl->profile);
+-	} else if (wl_is_nonetwork(wl, e)) {
+-		if (wl_is_ibssmode(wl))
+-			clear_bit(WL_STATUS_CONNECTING, &wl->status);
+-		else
+-			wl_bss_connect_done(wl, ndev, e, data, false);
+-	}
+-
+-	return err;
+-}
+-
+-static s32
+-wl_notify_roaming_status(struct wl_priv *wl, struct net_device *ndev,
+-			 const wl_event_msg_t *e, void *data)
+-{
+-	s32 err = 0;
+-	u32 event = be32_to_cpu(e->event_type);
+-	u32 status = be32_to_cpu(e->status);
+-
+-	if (event == WLC_E_ROAM && status == WLC_E_STATUS_SUCCESS) {
+-		if (test_bit(WL_STATUS_CONNECTED, &wl->status))
+-			wl_bss_roaming_done(wl, ndev, e, data);
+-		else
+-			wl_bss_connect_done(wl, ndev, e, data, true);
+-	}
+-
+-	return err;
+-}
+-
+-static __used s32
+-wl_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	u32 buflen;
+-
+-	buflen = bcm_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
+-	BUG_ON(!buflen);
+-
+-	return wl_dev_ioctl(dev, WLC_SET_VAR, wl->ioctl_buf, buflen);
+-}
+-
+-static s32
+-wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf,
+-		  s32 buf_len)
+-{
+-	struct wl_priv *wl = ndev_to_wl(dev);
+-	u32 len;
+-	s32 err = 0;
+-
+-	len = bcm_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX);
+-	BUG_ON(!len);
+-	err = wl_dev_ioctl(dev, WLC_GET_VAR, (void *)wl->ioctl_buf,
+-			WL_IOCTL_LEN_MAX);
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-	memcpy(buf, wl->ioctl_buf, buf_len);
+-
+-	return err;
+-}
+-
+-static s32 wl_get_assoc_ies(struct wl_priv *wl)
+-{
+-	struct net_device *ndev = wl_to_ndev(wl);
+-	struct wl_assoc_ielen *assoc_info;
+-	struct wl_connect_info *conn_info = wl_to_conn(wl);
+-	u32 req_len;
+-	u32 resp_len;
+-	s32 err = 0;
+-
+-	wl_clear_assoc_ies(wl);
+-
+-	err = wl_dev_bufvar_get(ndev, "assoc_info", wl->extra_buf,
+-				WL_ASSOC_INFO_MAX);
+-	if (unlikely(err)) {
+-		WL_ERR("could not get assoc info (%d)\n", err);
+-		return err;
+-	}
+-	assoc_info = (struct wl_assoc_ielen *)wl->extra_buf;
+-	req_len = assoc_info->req_len;
+-	resp_len = assoc_info->resp_len;
+-	if (req_len) {
+-		err = wl_dev_bufvar_get(ndev, "assoc_req_ies", wl->extra_buf,
+-					WL_ASSOC_INFO_MAX);
+-		if (unlikely(err)) {
+-			WL_ERR("could not get assoc req (%d)\n", err);
+-			return err;
+-		}
+-		conn_info->req_ie_len = req_len;
+-		conn_info->req_ie =
+-		    kmemdup(wl->extra_buf, conn_info->req_ie_len, GFP_KERNEL);
+-	} else {
+-		conn_info->req_ie_len = 0;
+-		conn_info->req_ie = NULL;
+-	}
+-	if (resp_len) {
+-		err = wl_dev_bufvar_get(ndev, "assoc_resp_ies", wl->extra_buf,
+-					WL_ASSOC_INFO_MAX);
+-		if (unlikely(err)) {
+-			WL_ERR("could not get assoc resp (%d)\n", err);
+-			return err;
+-		}
+-		conn_info->resp_ie_len = resp_len;
+-		conn_info->resp_ie =
+-		    kmemdup(wl->extra_buf, conn_info->resp_ie_len, GFP_KERNEL);
+-	} else {
+-		conn_info->resp_ie_len = 0;
+-		conn_info->resp_ie = NULL;
+-	}
+-	WL_CONN("req len (%d) resp len (%d)\n",
+-	       conn_info->req_ie_len, conn_info->resp_ie_len);
+-
+-	return err;
+-}
+-
+-static void wl_clear_assoc_ies(struct wl_priv *wl)
+-{
+-	struct wl_connect_info *conn_info = wl_to_conn(wl);
+-
+-	kfree(conn_info->req_ie);
+-	conn_info->req_ie = NULL;
+-	conn_info->req_ie_len = 0;
+-	kfree(conn_info->resp_ie);
+-	conn_info->resp_ie = NULL;
+-	conn_info->resp_ie_len = 0;
+-}
+-
+-
+-static void wl_ch_to_chanspec(int ch, struct wl_join_params *join_params,
+-	size_t *join_params_size)
+-{
+-	chanspec_t chanspec = 0;
+-
+-	if (ch != 0) {
+-		join_params->params.chanspec_num = 1;
+-		join_params->params.chanspec_list[0] = ch;
+-
+-		if (join_params->params.chanspec_list[0] <= CH_MAX_2G_CHANNEL)
+-			chanspec |= WL_CHANSPEC_BAND_2G;
+-		else
+-			chanspec |= WL_CHANSPEC_BAND_5G;
+-
+-		chanspec |= WL_CHANSPEC_BW_20;
+-		chanspec |= WL_CHANSPEC_CTL_SB_NONE;
+-
+-		*join_params_size += WL_ASSOC_PARAMS_FIXED_SIZE +
+-			join_params->params.chanspec_num * sizeof(chanspec_t);
+-
+-		join_params->params.chanspec_list[0] &= WL_CHANSPEC_CHAN_MASK;
+-		join_params->params.chanspec_list[0] |= chanspec;
+-		join_params->params.chanspec_list[0] =
+-		cpu_to_le16(join_params->params.chanspec_list[0]);
+-
+-		join_params->params.chanspec_num =
+-			cpu_to_le32(join_params->params.chanspec_num);
+-
+-		WL_CONN("join_params->params.chanspec_list[0]= %#X,"
+-			"channel %d, chanspec %#X\n",
+-		       join_params->params.chanspec_list[0], ch, chanspec);
+-	}
+-}
+-
+-static s32 wl_update_bss_info(struct wl_priv *wl)
+-{
+-	struct wl_bss_info *bi;
+-	struct wlc_ssid *ssid;
+-	struct bcm_tlv *tim;
+-	u16 beacon_interval;
+-	u8 dtim_period;
+-	size_t ie_len;
+-	u8 *ie;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	if (wl_is_ibssmode(wl))
+-		return err;
+-
+-	ssid = (struct wlc_ssid *)wl_read_prof(wl, WL_PROF_SSID);
+-
+-	*(u32 *)wl->extra_buf = cpu_to_le32(WL_EXTRA_BUF_MAX);
+-	err = wl_dev_ioctl(wl_to_ndev(wl), WLC_GET_BSS_INFO,
+-			wl->extra_buf, WL_EXTRA_BUF_MAX);
+-	if (unlikely(err)) {
+-		WL_ERR("Could not get bss info %d\n", err);
+-		goto update_bss_info_out;
+-	}
+-
+-	bi = (struct wl_bss_info *)(wl->extra_buf + 4);
+-	err = wl_inform_single_bss(wl, bi);
+-	if (unlikely(err))
+-		goto update_bss_info_out;
+-
+-	ie = ((u8 *)bi) + bi->ie_offset;
+-	ie_len = bi->ie_length;
+-	beacon_interval = cpu_to_le16(bi->beacon_period);
+-
+-	tim = bcm_parse_tlvs(ie, ie_len, WLAN_EID_TIM);
+-	if (tim)
+-		dtim_period = tim->data[1];
+-	else {
+-		/*
+-		* active scan was done so we could not get dtim
+-		* information out of probe response.
+-		* so we speficially query dtim information to dongle.
+-		*/
+-		u32 var;
+-		err = wl_dev_intvar_get(wl_to_ndev(wl), "dtim_assoc", &var);
+-		if (unlikely(err)) {
+-			WL_ERR("wl dtim_assoc failed (%d)\n", err);
+-			goto update_bss_info_out;
+-		}
+-		dtim_period = (u8)var;
+-	}
+-
+-	wl_update_prof(wl, NULL, &beacon_interval, WL_PROF_BEACONINT);
+-	wl_update_prof(wl, NULL, &dtim_period, WL_PROF_DTIMPERIOD);
+-
+-update_bss_info_out:
+-	WL_TRACE("Exit");
+-	return err;
+-}
+-
+-static s32
+-wl_bss_roaming_done(struct wl_priv *wl, struct net_device *ndev,
+-		    const wl_event_msg_t *e, void *data)
+-{
+-	struct wl_connect_info *conn_info = wl_to_conn(wl);
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-
+-	wl_get_assoc_ies(wl);
+-	wl_update_prof(wl, NULL, &e->addr, WL_PROF_BSSID);
+-	wl_update_bss_info(wl);
+-
+-	cfg80211_roamed(ndev, NULL,
+-			(u8 *)wl_read_prof(wl, WL_PROF_BSSID),
+-			conn_info->req_ie, conn_info->req_ie_len,
+-			conn_info->resp_ie, conn_info->resp_ie_len, GFP_KERNEL);
+-	WL_CONN("Report roaming result\n");
+-
+-	set_bit(WL_STATUS_CONNECTED, &wl->status);
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_bss_connect_done(struct wl_priv *wl, struct net_device *ndev,
+-		    const wl_event_msg_t *e, void *data, bool completed)
+-{
+-	struct wl_connect_info *conn_info = wl_to_conn(wl);
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-
+-	if (test_and_clear_bit(WL_STATUS_CONNECTING, &wl->status)) {
+-		if (completed) {
+-			wl_get_assoc_ies(wl);
+-			wl_update_prof(wl, NULL, &e->addr, WL_PROF_BSSID);
+-			wl_update_bss_info(wl);
+-		}
+-		cfg80211_connect_result(ndev,
+-					(u8 *)wl_read_prof(wl, WL_PROF_BSSID),
+-					conn_info->req_ie,
+-					conn_info->req_ie_len,
+-					conn_info->resp_ie,
+-					conn_info->resp_ie_len,
+-					completed ? WLAN_STATUS_SUCCESS : WLAN_STATUS_AUTH_TIMEOUT,
+-					GFP_KERNEL);
+-		if (completed)
+-			set_bit(WL_STATUS_CONNECTED, &wl->status);
+-		WL_CONN("Report connect result - connection %s\n",
+-				completed ? "succeeded" : "failed");
+-	}
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_notify_mic_status(struct wl_priv *wl, struct net_device *ndev,
+-		     const wl_event_msg_t *e, void *data)
+-{
+-	u16 flags = be16_to_cpu(e->flags);
+-	enum nl80211_key_type key_type;
+-
+-	rtnl_lock();
+-	if (flags & WLC_EVENT_MSG_GROUP)
+-		key_type = NL80211_KEYTYPE_GROUP;
+-	else
+-		key_type = NL80211_KEYTYPE_PAIRWISE;
+-
+-	cfg80211_michael_mic_failure(ndev, (u8 *)&e->addr, key_type, -1,
+-				     NULL, GFP_KERNEL);
+-	rtnl_unlock();
+-
+-	return 0;
+-}
+-
+-static s32
+-wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev,
+-		      const wl_event_msg_t *e, void *data)
+-{
+-	struct channel_info channel_inform;
+-	struct wl_scan_results *bss_list;
+-	u32 len = WL_SCAN_BUF_MAX;
+-	s32 err = 0;
+-	bool scan_abort = false;
+-
+-	WL_TRACE("Enter\n");
+-
+-	if (wl->iscan_on && wl->iscan_kickstart) {
+-		WL_TRACE("Exit\n");
+-		return wl_wakeup_iscan(wl_to_iscan(wl));
+-	}
+-
+-	if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, &wl->status))) {
+-		WL_ERR("Scan complete while device not scanning\n");
+-		scan_abort = true;
+-		err = -EINVAL;
+-		goto scan_done_out;
+-	}
+-
+-	err = wl_dev_ioctl(ndev, WLC_GET_CHANNEL, &channel_inform,
+-			sizeof(channel_inform));
+-	if (unlikely(err)) {
+-		WL_ERR("scan busy (%d)\n", err);
+-		scan_abort = true;
+-		goto scan_done_out;
+-	}
+-	channel_inform.scan_channel = le32_to_cpu(channel_inform.scan_channel);
+-	if (unlikely(channel_inform.scan_channel)) {
+-
+-		WL_CONN("channel_inform.scan_channel (%d)\n",
+-		       channel_inform.scan_channel);
+-	}
+-	wl->bss_list = wl->scan_results;
+-	bss_list = wl->bss_list;
+-	memset(bss_list, 0, len);
+-	bss_list->buflen = cpu_to_le32(len);
+-
+-	err = wl_dev_ioctl(ndev, WLC_SCAN_RESULTS, bss_list, len);
+-	if (unlikely(err)) {
+-		WL_ERR("%s Scan_results error (%d)\n", ndev->name, err);
+-		err = -EINVAL;
+-		scan_abort = true;
+-		goto scan_done_out;
+-	}
+-	bss_list->buflen = le32_to_cpu(bss_list->buflen);
+-	bss_list->version = le32_to_cpu(bss_list->version);
+-	bss_list->count = le32_to_cpu(bss_list->count);
+-
+-	err = wl_inform_bss(wl);
+-	if (err) {
+-		scan_abort = true;
+-		goto scan_done_out;
+-	}
+-
+-scan_done_out:
+-	if (wl->scan_request) {
+-		WL_SCAN("calling cfg80211_scan_done\n");
+-		cfg80211_scan_done(wl->scan_request, scan_abort);
+-		wl_set_mpc(ndev, 1);
+-		wl->scan_request = NULL;
+-	}
+-
+-	WL_TRACE("Exit\n");
+-
+-	return err;
+-}
+-
+-static void wl_init_conf(struct wl_conf *conf)
+-{
+-	conf->mode = (u32)-1;
+-	conf->frag_threshold = (u32)-1;
+-	conf->rts_threshold = (u32)-1;
+-	conf->retry_short = (u32)-1;
+-	conf->retry_long = (u32)-1;
+-	conf->tx_power = -1;
+-}
+-
+-static void wl_init_prof(struct wl_profile *prof)
+-{
+-	memset(prof, 0, sizeof(*prof));
+-}
+-
+-static void wl_init_eloop_handler(struct wl_event_loop *el)
+-{
+-	memset(el, 0, sizeof(*el));
+-	el->handler[WLC_E_SCAN_COMPLETE] = wl_notify_scan_status;
+-	el->handler[WLC_E_LINK] = wl_notify_connect_status;
+-	el->handler[WLC_E_ROAM] = wl_notify_roaming_status;
+-	el->handler[WLC_E_MIC_ERROR] = wl_notify_mic_status;
+-	el->handler[WLC_E_SET_SSID] = wl_notify_connect_status;
+-}
+-
+-static s32 wl_init_priv_mem(struct wl_priv *wl)
+-{
+-	wl->scan_results = kzalloc(WL_SCAN_BUF_MAX, GFP_KERNEL);
+-	if (unlikely(!wl->scan_results)) {
+-		WL_ERR("Scan results alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->conf = kzalloc(sizeof(*wl->conf), GFP_KERNEL);
+-	if (unlikely(!wl->conf)) {
+-		WL_ERR("wl_conf alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->profile = kzalloc(sizeof(*wl->profile), GFP_KERNEL);
+-	if (unlikely(!wl->profile)) {
+-		WL_ERR("wl_profile alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->bss_info = kzalloc(WL_BSS_INFO_MAX, GFP_KERNEL);
+-	if (unlikely(!wl->bss_info)) {
+-		WL_ERR("Bss information alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->scan_req_int = kzalloc(sizeof(*wl->scan_req_int), GFP_KERNEL);
+-	if (unlikely(!wl->scan_req_int)) {
+-		WL_ERR("Scan req alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->ioctl_buf = kzalloc(WL_IOCTL_LEN_MAX, GFP_KERNEL);
+-	if (unlikely(!wl->ioctl_buf)) {
+-		WL_ERR("Ioctl buf alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->extra_buf = kzalloc(WL_EXTRA_BUF_MAX, GFP_KERNEL);
+-	if (unlikely(!wl->extra_buf)) {
+-		WL_ERR("Extra buf alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->iscan = kzalloc(sizeof(*wl->iscan), GFP_KERNEL);
+-	if (unlikely(!wl->iscan)) {
+-		WL_ERR("Iscan buf alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->fw = kzalloc(sizeof(*wl->fw), GFP_KERNEL);
+-	if (unlikely(!wl->fw)) {
+-		WL_ERR("fw object alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-	wl->pmk_list = kzalloc(sizeof(*wl->pmk_list), GFP_KERNEL);
+-	if (unlikely(!wl->pmk_list)) {
+-		WL_ERR("pmk list alloc failed\n");
+-		goto init_priv_mem_out;
+-	}
+-
+-	return 0;
+-
+-init_priv_mem_out:
+-	wl_deinit_priv_mem(wl);
+-
+-	return -ENOMEM;
+-}
+-
+-static void wl_deinit_priv_mem(struct wl_priv *wl)
+-{
+-	kfree(wl->scan_results);
+-	wl->scan_results = NULL;
+-	kfree(wl->bss_info);
+-	wl->bss_info = NULL;
+-	kfree(wl->conf);
+-	wl->conf = NULL;
+-	kfree(wl->profile);
+-	wl->profile = NULL;
+-	kfree(wl->scan_req_int);
+-	wl->scan_req_int = NULL;
+-	kfree(wl->ioctl_buf);
+-	wl->ioctl_buf = NULL;
+-	kfree(wl->extra_buf);
+-	wl->extra_buf = NULL;
+-	kfree(wl->iscan);
+-	wl->iscan = NULL;
+-	kfree(wl->fw);
+-	wl->fw = NULL;
+-	kfree(wl->pmk_list);
+-	wl->pmk_list = NULL;
+-}
+-
+-static s32 wl_create_event_handler(struct wl_priv *wl)
+-{
+-	sema_init(&wl->event_sync, 0);
+-	wl->event_tsk = kthread_run(wl_event_handler, wl, "wl_event_handler");
+-	if (IS_ERR(wl->event_tsk)) {
+-		wl->event_tsk = NULL;
+-		WL_ERR("failed to create event thread\n");
+-		return -ENOMEM;
+-	}
+-	return 0;
+-}
+-
+-static void wl_destroy_event_handler(struct wl_priv *wl)
+-{
+-	if (wl->event_tsk) {
+-		send_sig(SIGTERM, wl->event_tsk, 1);
+-		kthread_stop(wl->event_tsk);
+-		wl->event_tsk = NULL;
+-	}
+-}
+-
+-static void wl_term_iscan(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl_to_iscan(wl);
+-
+-	if (wl->iscan_on && iscan->tsk) {
+-		iscan->state = WL_ISCAN_STATE_IDLE;
+-		send_sig(SIGTERM, iscan->tsk, 1);
+-		kthread_stop(iscan->tsk);
+-		iscan->tsk = NULL;
+-	}
+-}
+-
+-static void wl_notify_iscan_complete(struct wl_iscan_ctrl *iscan, bool aborted)
+-{
+-	struct wl_priv *wl = iscan_to_wl(iscan);
+-	struct net_device *ndev = wl_to_ndev(wl);
+-
+-	if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, &wl->status))) {
+-		WL_ERR("Scan complete while device not scanning\n");
+-		return;
+-	}
+-	if (likely(wl->scan_request)) {
+-		WL_SCAN("ISCAN Completed scan: %s\n",
+-				aborted ? "Aborted" : "Done");
+-		cfg80211_scan_done(wl->scan_request, aborted);
+-		wl_set_mpc(ndev, 1);
+-		wl->scan_request = NULL;
+-	}
+-	wl->iscan_kickstart = false;
+-}
+-
+-static s32 wl_wakeup_iscan(struct wl_iscan_ctrl *iscan)
+-{
+-	if (likely(iscan->state != WL_ISCAN_STATE_IDLE)) {
+-		WL_SCAN("wake up iscan\n");
+-		up(&iscan->sync);
+-		return 0;
+-	}
+-
+-	return -EIO;
+-}
+-
+-static s32
+-wl_get_iscan_results(struct wl_iscan_ctrl *iscan, u32 *status,
+-		     struct wl_scan_results **bss_list)
+-{
+-	struct wl_iscan_results list;
+-	struct wl_scan_results *results;
+-	struct wl_iscan_results *list_buf;
+-	s32 err = 0;
+-
+-	memset(iscan->scan_buf, 0, WL_ISCAN_BUF_MAX);
+-	list_buf = (struct wl_iscan_results *)iscan->scan_buf;
+-	results = &list_buf->results;
+-	results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE;
+-	results->version = 0;
+-	results->count = 0;
+-
+-	memset(&list, 0, sizeof(list));
+-	list.results.buflen = cpu_to_le32(WL_ISCAN_BUF_MAX);
+-	err = wl_dev_iovar_getbuf(iscan->dev, "iscanresults", &list,
+-				WL_ISCAN_RESULTS_FIXED_SIZE, iscan->scan_buf,
+-				WL_ISCAN_BUF_MAX);
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-	results->buflen = le32_to_cpu(results->buflen);
+-	results->version = le32_to_cpu(results->version);
+-	results->count = le32_to_cpu(results->count);
+-	WL_SCAN("results->count = %d\n", results->count);
+-	WL_SCAN("results->buflen = %d\n", results->buflen);
+-	*status = le32_to_cpu(list_buf->status);
+-	*bss_list = results;
+-
+-	return err;
+-}
+-
+-static s32 wl_iscan_done(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl->iscan;
+-	s32 err = 0;
+-
+-	iscan->state = WL_ISCAN_STATE_IDLE;
+-	rtnl_lock();
+-	wl_inform_bss(wl);
+-	wl_notify_iscan_complete(iscan, false);
+-	rtnl_unlock();
+-
+-	return err;
+-}
+-
+-static s32 wl_iscan_pending(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl->iscan;
+-	s32 err = 0;
+-
+-	/* Reschedule the timer */
+-	mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000);
+-	iscan->timer_on = 1;
+-
+-	return err;
+-}
+-
+-static s32 wl_iscan_inprogress(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl->iscan;
+-	s32 err = 0;
+-
+-	rtnl_lock();
+-	wl_inform_bss(wl);
+-	wl_run_iscan(iscan, NULL, WL_SCAN_ACTION_CONTINUE);
+-	rtnl_unlock();
+-	/* Reschedule the timer */
+-	mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000);
+-	iscan->timer_on = 1;
+-
+-	return err;
+-}
+-
+-static s32 wl_iscan_aborted(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl->iscan;
+-	s32 err = 0;
+-
+-	iscan->state = WL_ISCAN_STATE_IDLE;
+-	rtnl_lock();
+-	wl_notify_iscan_complete(iscan, true);
+-	rtnl_unlock();
+-
+-	return err;
+-}
+-
+-static s32 wl_iscan_thread(void *data)
+-{
+-	struct sched_param param = {.sched_priority = MAX_RT_PRIO - 1 };
+-	struct wl_iscan_ctrl *iscan = (struct wl_iscan_ctrl *)data;
+-	struct wl_priv *wl = iscan_to_wl(iscan);
+-	struct wl_iscan_eloop *el = &iscan->el;
+-	u32 status;
+-	int err = 0;
+-
+-	sched_setscheduler(current, SCHED_FIFO, &param);
+-	allow_signal(SIGTERM);
+-	status = WL_SCAN_RESULTS_PARTIAL;
+-	while (likely(!down_interruptible(&iscan->sync))) {
+-		if (kthread_should_stop())
+-			break;
+-		if (iscan->timer_on) {
+-			del_timer_sync(&iscan->timer);
+-			iscan->timer_on = 0;
+-		}
+-		rtnl_lock();
+-		err = wl_get_iscan_results(iscan, &status, &wl->bss_list);
+-		if (unlikely(err)) {
+-			status = WL_SCAN_RESULTS_ABORTED;
+-			WL_ERR("Abort iscan\n");
+-		}
+-		rtnl_unlock();
+-		el->handler[status] (wl);
+-	}
+-	if (iscan->timer_on) {
+-		del_timer_sync(&iscan->timer);
+-		iscan->timer_on = 0;
+-	}
+-	WL_SCAN("ISCAN thread terminated\n");
+-
+-	return 0;
+-}
+-
+-static void wl_iscan_timer(unsigned long data)
+-{
+-	struct wl_iscan_ctrl *iscan = (struct wl_iscan_ctrl *)data;
+-
+-	if (iscan) {
+-		iscan->timer_on = 0;
+-		WL_SCAN("timer expired\n");
+-		wl_wakeup_iscan(iscan);
+-	}
+-}
+-
+-static s32 wl_invoke_iscan(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl_to_iscan(wl);
+-	int err = 0;
+-
+-	if (wl->iscan_on && !iscan->tsk) {
+-		iscan->state = WL_ISCAN_STATE_IDLE;
+-		sema_init(&iscan->sync, 0);
+-		iscan->tsk = kthread_run(wl_iscan_thread, iscan, "wl_iscan");
+-		if (IS_ERR(iscan->tsk)) {
+-			WL_ERR("Could not create iscan thread\n");
+-			iscan->tsk = NULL;
+-			return -ENOMEM;
+-		}
+-	}
+-
+-	return err;
+-}
+-
+-static void wl_init_iscan_eloop(struct wl_iscan_eloop *el)
+-{
+-	memset(el, 0, sizeof(*el));
+-	el->handler[WL_SCAN_RESULTS_SUCCESS] = wl_iscan_done;
+-	el->handler[WL_SCAN_RESULTS_PARTIAL] = wl_iscan_inprogress;
+-	el->handler[WL_SCAN_RESULTS_PENDING] = wl_iscan_pending;
+-	el->handler[WL_SCAN_RESULTS_ABORTED] = wl_iscan_aborted;
+-	el->handler[WL_SCAN_RESULTS_NO_MEM] = wl_iscan_aborted;
+-}
+-
+-static s32 wl_init_iscan(struct wl_priv *wl)
+-{
+-	struct wl_iscan_ctrl *iscan = wl_to_iscan(wl);
+-	int err = 0;
+-
+-	if (wl->iscan_on) {
+-		iscan->dev = wl_to_ndev(wl);
+-		iscan->state = WL_ISCAN_STATE_IDLE;
+-		wl_init_iscan_eloop(&iscan->el);
+-		iscan->timer_ms = WL_ISCAN_TIMER_INTERVAL_MS;
+-		init_timer(&iscan->timer);
+-		iscan->timer.data = (unsigned long) iscan;
+-		iscan->timer.function = wl_iscan_timer;
+-		sema_init(&iscan->sync, 0);
+-		iscan->tsk = kthread_run(wl_iscan_thread, iscan, "wl_iscan");
+-		if (IS_ERR(iscan->tsk)) {
+-			WL_ERR("Could not create iscan thread\n");
+-			iscan->tsk = NULL;
+-			return -ENOMEM;
+-		}
+-		iscan->data = wl;
+-	}
+-
+-	return err;
+-}
+-
+-static void wl_init_fw(struct wl_fw_ctrl *fw)
+-{
+-	fw->status = 0;		/* init fw loading status.
+-				 0 means nothing was loaded yet */
+-}
+-
+-static s32 wl_init_priv(struct wl_priv *wl)
+-{
+-	struct wiphy *wiphy = wl_to_wiphy(wl);
+-	s32 err = 0;
+-
+-	wl->scan_request = NULL;
+-	wl->pwr_save = !!(wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT);
+-	wl->iscan_on = true;	/* iscan on & off switch.
+-				 we enable iscan per default */
+-	wl->roam_on = false;	/* roam on & off switch.
+-				 we enable roam per default */
+-
+-	wl->iscan_kickstart = false;
+-	wl->active_scan = true;	/* we do active scan for
+-				 specific scan per default */
+-	wl->dongle_up = false;	/* dongle is not up yet */
+-	wl_init_eq(wl);
+-	err = wl_init_priv_mem(wl);
+-	if (unlikely(err))
+-		return err;
+-	if (unlikely(wl_create_event_handler(wl)))
+-		return -ENOMEM;
+-	wl_init_eloop_handler(&wl->el);
+-	mutex_init(&wl->usr_sync);
+-	err = wl_init_iscan(wl);
+-	if (unlikely(err))
+-		return err;
+-	wl_init_fw(wl->fw);
+-	wl_init_conf(wl->conf);
+-	wl_init_prof(wl->profile);
+-	wl_link_down(wl);
+-
+-	return err;
+-}
+-
+-static void wl_deinit_priv(struct wl_priv *wl)
+-{
+-	wl_destroy_event_handler(wl);
+-	wl->dongle_up = false;	/* dongle down */
+-	wl_flush_eq(wl);
+-	wl_link_down(wl);
+-	wl_term_iscan(wl);
+-	wl_deinit_priv_mem(wl);
+-}
+-
+-s32 wl_cfg80211_attach(struct net_device *ndev, void *data)
+-{
+-	struct wireless_dev *wdev;
+-	struct wl_priv *wl;
+-	struct wl_iface *ci;
+-	s32 err = 0;
+-
+-	if (unlikely(!ndev)) {
+-		WL_ERR("ndev is invalid\n");
+-		return -ENODEV;
+-	}
+-	wl_cfg80211_dev = kzalloc(sizeof(struct wl_dev), GFP_KERNEL);
+-	if (unlikely(!wl_cfg80211_dev)) {
+-		WL_ERR("wl_cfg80211_dev is invalid\n");
+-		return -ENOMEM;
+-	}
+-	WL_INFO("func %p\n", wl_cfg80211_get_sdio_func());
+-	wdev = wl_alloc_wdev(sizeof(struct wl_iface), &wl_cfg80211_get_sdio_func()->dev);
+-	if (IS_ERR(wdev))
+-		return -ENOMEM;
+-
+-	wdev->iftype = wl_mode_to_nl80211_iftype(WL_MODE_BSS);
+-	wl = wdev_to_wl(wdev);
+-	wl->wdev = wdev;
+-	wl->pub = data;
+-	ci = (struct wl_iface *)wl_to_ci(wl);
+-	ci->wl = wl;
+-	ndev->ieee80211_ptr = wdev;
+-	SET_NETDEV_DEV(ndev, wiphy_dev(wdev->wiphy));
+-	wdev->netdev = ndev;
+-	err = wl_init_priv(wl);
+-	if (unlikely(err)) {
+-		WL_ERR("Failed to init iwm_priv (%d)\n", err);
+-		goto cfg80211_attach_out;
+-	}
+-	wl_set_drvdata(wl_cfg80211_dev, ci);
+-
+-	return err;
+-
+-cfg80211_attach_out:
+-	wl_free_wdev(wl);
+-	return err;
+-}
+-
+-void wl_cfg80211_detach(void)
+-{
+-	struct wl_priv *wl;
+-
+-	wl = WL_PRIV_GET();
+-
+-	wl_deinit_priv(wl);
+-	wl_free_wdev(wl);
+-	wl_set_drvdata(wl_cfg80211_dev, NULL);
+-	kfree(wl_cfg80211_dev);
+-	wl_cfg80211_dev = NULL;
+-	wl_clear_sdio_func();
+-}
+-
+-static void wl_wakeup_event(struct wl_priv *wl)
+-{
+-	up(&wl->event_sync);
+-}
+-
+-static s32 wl_event_handler(void *data)
+-{
+-	struct wl_priv *wl = (struct wl_priv *)data;
+-	struct sched_param param = {.sched_priority = MAX_RT_PRIO - 1 };
+-	struct wl_event_q *e;
+-
+-	sched_setscheduler(current, SCHED_FIFO, &param);
+-	allow_signal(SIGTERM);
+-	while (likely(!down_interruptible(&wl->event_sync))) {
+-		if (kthread_should_stop())
+-			break;
+-		e = wl_deq_event(wl);
+-		if (unlikely(!e)) {
+-			WL_ERR("event queue empty...\n");
+-			BUG();
+-		}
+-		WL_INFO("event type (%d)\n", e->etype);
+-		if (wl->el.handler[e->etype]) {
+-			wl->el.handler[e->etype] (wl, wl_to_ndev(wl), &e->emsg,
+-						  e->edata);
+-		} else {
+-			WL_INFO("Unknown Event (%d): ignoring\n", e->etype);
+-		}
+-		wl_put_event(e);
+-	}
+-	WL_INFO("was terminated\n");
+-	return 0;
+-}
+-
+-void
+-wl_cfg80211_event(struct net_device *ndev, const wl_event_msg_t * e, void *data)
+-{
+-	u32 event_type = be32_to_cpu(e->event_type);
+-	struct wl_priv *wl = ndev_to_wl(ndev);
+-
+-	if (likely(!wl_enq_event(wl, event_type, e, data)))
+-		wl_wakeup_event(wl);
+-}
+-
+-static void wl_init_eq(struct wl_priv *wl)
+-{
+-	wl_init_eq_lock(wl);
+-	INIT_LIST_HEAD(&wl->eq_list);
+-}
+-
+-static void wl_flush_eq(struct wl_priv *wl)
+-{
+-	struct wl_event_q *e;
+-
+-	wl_lock_eq(wl);
+-	while (!list_empty(&wl->eq_list)) {
+-		e = list_first_entry(&wl->eq_list, struct wl_event_q, eq_list);
+-		list_del(&e->eq_list);
+-		kfree(e);
+-	}
+-	wl_unlock_eq(wl);
+-}
+-
+-/*
+-* retrieve first queued event from head
+-*/
+-
+-static struct wl_event_q *wl_deq_event(struct wl_priv *wl)
+-{
+-	struct wl_event_q *e = NULL;
+-
+-	wl_lock_eq(wl);
+-	if (likely(!list_empty(&wl->eq_list))) {
+-		e = list_first_entry(&wl->eq_list, struct wl_event_q, eq_list);
+-		list_del(&e->eq_list);
+-	}
+-	wl_unlock_eq(wl);
+-
+-	return e;
+-}
+-
+-/*
+-** push event to tail of the queue
+-*/
+-
+-static s32
+-wl_enq_event(struct wl_priv *wl, u32 event, const wl_event_msg_t *msg,
+-	     void *data)
+-{
+-	struct wl_event_q *e;
+-	s32 err = 0;
+-
+-	e = kzalloc(sizeof(struct wl_event_q), GFP_KERNEL);
+-	if (unlikely(!e)) {
+-		WL_ERR("event alloc failed\n");
+-		return -ENOMEM;
+-	}
+-
+-	e->etype = event;
+-	memcpy(&e->emsg, msg, sizeof(wl_event_msg_t));
+-	if (data) {
+-	}
+-	wl_lock_eq(wl);
+-	list_add_tail(&e->eq_list, &wl->eq_list);
+-	wl_unlock_eq(wl);
+-
+-	return err;
+-}
+-
+-static void wl_put_event(struct wl_event_q *e)
+-{
+-	kfree(e);
+-}
+-
+-void wl_cfg80211_sdio_func(void *func)
+-{
+-	cfg80211_sdio_func = (struct sdio_func *)func;
+-}
+-
+-static void wl_clear_sdio_func(void)
+-{
+-	cfg80211_sdio_func = NULL;
+-}
+-
+-struct sdio_func *wl_cfg80211_get_sdio_func(void)
+-{
+-	return cfg80211_sdio_func;
+-}
+-
+-static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype)
+-{
+-	s32 infra = 0;
+-	s32 err = 0;
+-
+-	switch (iftype) {
+-	case NL80211_IFTYPE_MONITOR:
+-	case NL80211_IFTYPE_WDS:
+-		WL_ERR("type (%d) : currently we do not support this mode\n",
+-		       iftype);
+-		err = -EINVAL;
+-		return err;
+-	case NL80211_IFTYPE_ADHOC:
+-		infra = 0;
+-		break;
+-	case NL80211_IFTYPE_STATION:
+-		infra = 1;
+-		break;
+-	default:
+-		err = -EINVAL;
+-		WL_ERR("invalid type (%d)\n", iftype);
+-		return err;
+-	}
+-	infra = cpu_to_le32(infra);
+-	err = wl_dev_ioctl(ndev, WLC_SET_INFRA, &infra, sizeof(infra));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_INFRA error (%d)\n", err);
+-		return err;
+-	}
+-
+-	return 0;
+-}
+-
+-#ifndef EMBEDDED_PLATFORM
+-static s32 wl_dongle_country(struct net_device *ndev, u8 ccode)
+-{
+-
+-	s32 err = 0;
+-
+-	return err;
+-}
+-
+-static s32 wl_dongle_up(struct net_device *ndev, u32 up)
+-{
+-	s32 err = 0;
+-
+-	err = wl_dev_ioctl(ndev, WLC_UP, &up, sizeof(up));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_UP error (%d)\n", err);
+-	}
+-	return err;
+-}
+-
+-static s32 wl_dongle_power(struct net_device *ndev, u32 power_mode)
+-{
+-	s32 err = 0;
+-
+-	err = wl_dev_ioctl(ndev, WLC_SET_PM, &power_mode, sizeof(power_mode));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_PM error (%d)\n", err);
+-	}
+-	return err;
+-}
+-
+-static s32
+-wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align)
+-{
+-	s8 iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for "event_msgs" +
+-						 '\0' + bitvec  */
+-	s32 err = 0;
+-
+-	/* Match Host and Dongle rx alignment */
+-	bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf,
+-		    sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (unlikely(err)) {
+-		WL_ERR("txglomalign error (%d)\n", err);
+-		goto dongle_glom_out;
+-	}
+-	/* disable glom option per default */
+-	bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (unlikely(err)) {
+-		WL_ERR("txglom error (%d)\n", err);
+-		goto dongle_glom_out;
+-	}
+-dongle_glom_out:
+-	return err;
+-}
+-
+-static s32
+-wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol)
+-{
+-	s8 iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for "event_msgs" +
+-							 '\0' + bitvec  */
+-	s32 err = 0;
+-
+-	/* Set ARP offload */
+-	bcm_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (err) {
+-		if (err == -EOPNOTSUPP)
+-			WL_INFO("arpoe is not supported\n");
+-		else
+-			WL_ERR("arpoe error (%d)\n", err);
+-
+-		goto dongle_offload_out;
+-	}
+-	bcm_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (err) {
+-		if (err == -EOPNOTSUPP)
+-			WL_INFO("arp_ol is not supported\n");
+-		else
+-			WL_ERR("arp_ol error (%d)\n", err);
+-
+-		goto dongle_offload_out;
+-	}
+-
+-dongle_offload_out:
+-	return err;
+-}
+-
+-static s32 wl_pattern_atoh(s8 *src, s8 *dst)
+-{
+-	int i;
+-	if (strncmp(src, "0x", 2) != 0 && strncmp(src, "0X", 2) != 0) {
+-		WL_ERR("Mask invalid format. Needs to start with 0x\n");
+-		return -1;
+-	}
+-	src = src + 2;		/* Skip past 0x */
+-	if (strlen(src) % 2 != 0) {
+-		WL_ERR("Mask invalid format. Needs to be of even length\n");
+-		return -1;
+-	}
+-	for (i = 0; *src != '\0'; i++) {
+-		char num[3];
+-		strncpy(num, src, 2);
+-		num[2] = '\0';
+-		dst[i] = (u8) simple_strtoul(num, NULL, 16);
+-		src += 2;
+-	}
+-	return i;
+-}
+-
+-static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode)
+-{
+-	s8 iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for "event_msgs" +
+-							 '\0' + bitvec  */
+-	const s8 *str;
+-	struct wl_pkt_filter pkt_filter;
+-	struct wl_pkt_filter *pkt_filterp;
+-	s32 buf_len;
+-	s32 str_len;
+-	u32 mask_size;
+-	u32 pattern_size;
+-	s8 buf[256];
+-	s32 err = 0;
+-
+-/* add a default packet filter pattern */
+-	str = "pkt_filter_add";
+-	str_len = strlen(str);
+-	strncpy(buf, str, str_len);
+-	buf[str_len] = '\0';
+-	buf_len = str_len + 1;
+-
+-	pkt_filterp = (struct wl_pkt_filter *)(buf + str_len + 1);
+-
+-	/* Parse packet filter id. */
+-	pkt_filter.id = cpu_to_le32(100);
+-
+-	/* Parse filter polarity. */
+-	pkt_filter.negate_match = cpu_to_le32(0);
+-
+-	/* Parse filter type. */
+-	pkt_filter.type = cpu_to_le32(0);
+-
+-	/* Parse pattern filter offset. */
+-	pkt_filter.u.pattern.offset = cpu_to_le32(0);
+-
+-	/* Parse pattern filter mask. */
+-	mask_size = cpu_to_le32(wl_pattern_atoh("0xff",
+-						(char *)pkt_filterp->u.pattern.
+-						mask_and_pattern));
+-
+-	/* Parse pattern filter pattern. */
+-	pattern_size = cpu_to_le32(wl_pattern_atoh("0x00",
+-						   (char *)&pkt_filterp->u.
+-						   pattern.
+-						   mask_and_pattern
+-						   [mask_size]));
+-
+-	if (mask_size != pattern_size) {
+-		WL_ERR("Mask and pattern not the same size\n");
+-		err = -EINVAL;
+-		goto dongle_filter_out;
+-	}
+-
+-	pkt_filter.u.pattern.size_bytes = mask_size;
+-	buf_len += WL_PKT_FILTER_FIXED_LEN;
+-	buf_len += (WL_PKT_FILTER_PATTERN_FIXED_LEN + 2 * mask_size);
+-
+-	/* Keep-alive attributes are set in local
+-	 * variable (keep_alive_pkt), and
+-	 * then memcpy'ed into buffer (keep_alive_pktp) since there is no
+-	 * guarantee that the buffer is properly aligned.
+-	 */
+-	memcpy((char *)pkt_filterp, &pkt_filter,
+-	       WL_PKT_FILTER_FIXED_LEN + WL_PKT_FILTER_PATTERN_FIXED_LEN);
+-
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, buf, buf_len);
+-	if (err) {
+-		if (err == -EOPNOTSUPP) {
+-			WL_INFO("filter not supported\n");
+-		} else {
+-			WL_ERR("filter (%d)\n", err);
+-		}
+-		goto dongle_filter_out;
+-	}
+-
+-	/* set mode to allow pattern */
+-	bcm_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf,
+-		    sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (err) {
+-		if (err == -EOPNOTSUPP) {
+-			WL_INFO("filter_mode not supported\n");
+-		} else {
+-			WL_ERR("filter_mode (%d)\n", err);
+-		}
+-		goto dongle_filter_out;
+-	}
+-
+-dongle_filter_out:
+-	return err;
+-}
+-#endif				/* !EMBEDDED_PLATFORM */
+-
+-static s32 wl_dongle_eventmsg(struct net_device *ndev)
+-{
+-	s8 iovbuf[WL_EVENTING_MASK_LEN + 12];	/*  Room for "event_msgs" +
+-						 '\0' + bitvec  */
+-	s8 eventmask[WL_EVENTING_MASK_LEN];
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-
+-	/* Setup event_msgs */
+-	bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+-		    sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_GET_VAR, iovbuf, sizeof(iovbuf));
+-	if (unlikely(err)) {
+-		WL_ERR("Get event_msgs error (%d)\n", err);
+-		goto dongle_eventmsg_out;
+-	}
+-	memcpy(eventmask, iovbuf, WL_EVENTING_MASK_LEN);
+-
+-	setbit(eventmask, WLC_E_SET_SSID);
+-	setbit(eventmask, WLC_E_ROAM);
+-	setbit(eventmask, WLC_E_PRUNE);
+-	setbit(eventmask, WLC_E_AUTH);
+-	setbit(eventmask, WLC_E_REASSOC);
+-	setbit(eventmask, WLC_E_REASSOC_IND);
+-	setbit(eventmask, WLC_E_DEAUTH_IND);
+-	setbit(eventmask, WLC_E_DISASSOC_IND);
+-	setbit(eventmask, WLC_E_DISASSOC);
+-	setbit(eventmask, WLC_E_JOIN);
+-	setbit(eventmask, WLC_E_ASSOC_IND);
+-	setbit(eventmask, WLC_E_PSK_SUP);
+-	setbit(eventmask, WLC_E_LINK);
+-	setbit(eventmask, WLC_E_NDIS_LINK);
+-	setbit(eventmask, WLC_E_MIC_ERROR);
+-	setbit(eventmask, WLC_E_PMKID_CACHE);
+-	setbit(eventmask, WLC_E_TXFAIL);
+-	setbit(eventmask, WLC_E_JOIN_START);
+-	setbit(eventmask, WLC_E_SCAN_COMPLETE);
+-
+-	bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf,
+-		    sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (unlikely(err)) {
+-		WL_ERR("Set event_msgs error (%d)\n", err);
+-		goto dongle_eventmsg_out;
+-	}
+-
+-dongle_eventmsg_out:
+-	WL_TRACE("Exit\n");
+-	return err;
+-}
+-
+-static s32
+-wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout)
+-{
+-	s8 iovbuf[32];
+-	s32 roamtrigger[2];
+-	s32 roam_delta[2];
+-	s32 err = 0;
+-
+-	/*
+-	 * Setup timeout if Beacons are lost and roam is
+-	 * off to report link down
+-	 */
+-	if (roamvar) {
+-		bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout,
+-			sizeof(bcn_timeout), iovbuf, sizeof(iovbuf));
+-		err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-		if (unlikely(err)) {
+-			WL_ERR("bcn_timeout error (%d)\n", err);
+-			goto dongle_rom_out;
+-		}
+-	}
+-
+-	/*
+-	 * Enable/Disable built-in roaming to allow supplicant
+-	 * to take care of roaming
+-	 */
+-	WL_INFO("Internal Roaming = %s\n", roamvar ? "Off" : "On");
+-	bcm_mkiovar("roam_off", (char *)&roamvar,
+-				sizeof(roamvar), iovbuf, sizeof(iovbuf));
+-	err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf));
+-	if (unlikely(err)) {
+-		WL_ERR("roam_off error (%d)\n", err);
+-		goto dongle_rom_out;
+-	}
+-
+-	roamtrigger[0] = WL_ROAM_TRIGGER_LEVEL;
+-	roamtrigger[1] = WLC_BAND_ALL;
+-	err = wl_dev_ioctl(ndev, WLC_SET_ROAM_TRIGGER,
+-			(void *)roamtrigger, sizeof(roamtrigger));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_ROAM_TRIGGER error (%d)\n", err);
+-		goto dongle_rom_out;
+-	}
+-
+-	roam_delta[0] = WL_ROAM_DELTA;
+-	roam_delta[1] = WLC_BAND_ALL;
+-	err = wl_dev_ioctl(ndev, WLC_SET_ROAM_DELTA,
+-				(void *)roam_delta, sizeof(roam_delta));
+-	if (unlikely(err)) {
+-		WL_ERR("WLC_SET_ROAM_DELTA error (%d)\n", err);
+-		goto dongle_rom_out;
+-	}
+-
+-dongle_rom_out:
+-	return err;
+-}
+-
+-static s32
+-wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time,
+-		s32 scan_unassoc_time, s32 scan_passive_time)
+-{
+-	s32 err = 0;
+-
+-	err = wl_dev_ioctl(ndev, WLC_SET_SCAN_CHANNEL_TIME, &scan_assoc_time,
+-			sizeof(scan_assoc_time));
+-	if (err) {
+-		if (err == -EOPNOTSUPP)
+-			WL_INFO("Scan assoc time is not supported\n");
+-		else
+-			WL_ERR("Scan assoc time error (%d)\n", err);
+-		goto dongle_scantime_out;
+-	}
+-	err = wl_dev_ioctl(ndev, WLC_SET_SCAN_UNASSOC_TIME, &scan_unassoc_time,
+-			sizeof(scan_unassoc_time));
+-	if (err) {
+-		if (err == -EOPNOTSUPP)
+-			WL_INFO("Scan unassoc time is not supported\n");
+-		else
+-			WL_ERR("Scan unassoc time error (%d)\n", err);
+-		goto dongle_scantime_out;
+-	}
+-
+-	err = wl_dev_ioctl(ndev, WLC_SET_SCAN_PASSIVE_TIME, &scan_passive_time,
+-			sizeof(scan_passive_time));
+-	if (err) {
+-		if (err == -EOPNOTSUPP)
+-			WL_INFO("Scan passive time is not supported\n");
+-		else
+-			WL_ERR("Scan passive time error (%d)\n", err);
+-		goto dongle_scantime_out;
+-	}
+-
+-dongle_scantime_out:
+-	return err;
+-}
+-
+-s32 wl_config_dongle(struct wl_priv *wl, bool need_lock)
+-{
+-#ifndef DHD_SDALIGN
+-#define DHD_SDALIGN	32
+-#endif
+-	struct net_device *ndev;
+-	struct wireless_dev *wdev;
+-	s32 err = 0;
+-
+-	if (wl->dongle_up)
+-		return err;
+-
+-	ndev = wl_to_ndev(wl);
+-	wdev = ndev->ieee80211_ptr;
+-	if (need_lock)
+-		rtnl_lock();
+-
+-#ifndef EMBEDDED_PLATFORM
+-	err = wl_dongle_up(ndev, 0);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-	err = wl_dongle_country(ndev, 0);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-	err = wl_dongle_power(ndev, PM_FAST);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-	err = wl_dongle_glom(ndev, 0, DHD_SDALIGN);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-
+-	wl_dongle_offload(ndev, 1, 0xf);
+-	wl_dongle_filter(ndev, 1);
+-#endif /* !EMBEDDED_PLATFORM */
+-
+-	wl_dongle_scantime(ndev, WL_SCAN_CHANNEL_TIME,
+-			WL_SCAN_UNASSOC_TIME, WL_SCAN_PASSIVE_TIME);
+-
+-	err = wl_dongle_eventmsg(ndev);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-	err = wl_dongle_roam(ndev, (wl->roam_on ? 0 : 1), WL_BEACON_TIMEOUT);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-	err = wl_dongle_mode(ndev, wdev->iftype);
+-	if (unlikely(err && err != -EINPROGRESS))
+-		goto default_conf_out;
+-	err = wl_dongle_probecap(wl);
+-	if (unlikely(err))
+-		goto default_conf_out;
+-
+-	/* -EINPROGRESS: Call commit handler */
+-
+-default_conf_out:
+-	if (need_lock)
+-		rtnl_unlock();
+-
+-	wl->dongle_up = true;
+-
+-	return err;
+-
+-}
+-
+-static s32 wl_update_wiphybands(struct wl_priv *wl)
+-{
+-	struct wiphy *wiphy;
+-	s32 phy_list;
+-	s8 phy;
+-	s32 err = 0;
+-
+-	err = wl_dev_ioctl(wl_to_ndev(wl), WLC_GET_PHYLIST, &phy_list,
+-			sizeof(phy_list));
+-	if (unlikely(err)) {
+-		WL_ERR("error (%d)\n", err);
+-		return err;
+-	}
+-
+-	phy = ((char *)&phy_list)[1];
+-	WL_INFO("%c phy\n", phy);
+-	if (phy == 'n' || phy == 'a') {
+-		wiphy = wl_to_wiphy(wl);
+-		wiphy->bands[IEEE80211_BAND_5GHZ] = &__wl_band_5ghz_n;
+-	}
+-
+-	return err;
+-}
+-
+-static s32 __wl_cfg80211_up(struct wl_priv *wl)
+-{
+-	s32 err = 0;
+-
+-	set_bit(WL_STATUS_READY, &wl->status);
+-
+-	wl_debugfs_add_netdev_params(wl);
+-
+-	err = wl_config_dongle(wl, false);
+-	if (unlikely(err))
+-		return err;
+-
+-	wl_invoke_iscan(wl);
+-
+-	return err;
+-}
+-
+-static s32 __wl_cfg80211_down(struct wl_priv *wl)
+-{
+-	set_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
+-	wl_term_iscan(wl);
+-	if (wl->scan_request) {
+-		cfg80211_scan_done(wl->scan_request, true);
+-		/* May need to perform this to cover rmmod */
+-		/* wl_set_mpc(wl_to_ndev(wl), 1); */
+-		wl->scan_request = NULL;
+-	}
+-	clear_bit(WL_STATUS_READY, &wl->status);
+-	clear_bit(WL_STATUS_SCANNING, &wl->status);
+-	clear_bit(WL_STATUS_SCAN_ABORTING, &wl->status);
+-	clear_bit(WL_STATUS_CONNECTING, &wl->status);
+-	clear_bit(WL_STATUS_CONNECTED, &wl->status);
+-
+-	wl_debugfs_remove_netdev(wl);
+-
+-	return 0;
+-}
+-
+-s32 wl_cfg80211_up(void)
+-{
+-	struct wl_priv *wl;
+-	s32 err = 0;
+-
+-	wl = WL_PRIV_GET();
+-	mutex_lock(&wl->usr_sync);
+-	err = __wl_cfg80211_up(wl);
+-	mutex_unlock(&wl->usr_sync);
+-
+-	return err;
+-}
+-
+-s32 wl_cfg80211_down(void)
+-{
+-	struct wl_priv *wl;
+-	s32 err = 0;
+-
+-	wl = WL_PRIV_GET();
+-	mutex_lock(&wl->usr_sync);
+-	err = __wl_cfg80211_down(wl);
+-	mutex_unlock(&wl->usr_sync);
+-
+-	return err;
+-}
+-
+-static s32 wl_dongle_probecap(struct wl_priv *wl)
+-{
+-	s32 err = 0;
+-
+-	err = wl_update_wiphybands(wl);
+-	if (unlikely(err))
+-		return err;
+-
+-	return err;
+-}
+-
+-static void *wl_read_prof(struct wl_priv *wl, s32 item)
+-{
+-	switch (item) {
+-	case WL_PROF_SEC:
+-		return &wl->profile->sec;
+-	case WL_PROF_BSSID:
+-		return &wl->profile->bssid;
+-	case WL_PROF_SSID:
+-		return &wl->profile->ssid;
+-	}
+-	WL_ERR("invalid item (%d)\n", item);
+-	return NULL;
+-}
+-
+-static s32
+-wl_update_prof(struct wl_priv *wl, const wl_event_msg_t *e, void *data,
+-	       s32 item)
+-{
+-	s32 err = 0;
+-	struct wlc_ssid *ssid;
+-
+-	switch (item) {
+-	case WL_PROF_SSID:
+-		ssid = (wlc_ssid_t *) data;
+-		memset(wl->profile->ssid.SSID, 0,
+-		       sizeof(wl->profile->ssid.SSID));
+-		memcpy(wl->profile->ssid.SSID, ssid->SSID, ssid->SSID_len);
+-		wl->profile->ssid.SSID_len = ssid->SSID_len;
+-		break;
+-	case WL_PROF_BSSID:
+-		if (data)
+-			memcpy(wl->profile->bssid, data, ETH_ALEN);
+-		else
+-			memset(wl->profile->bssid, 0, ETH_ALEN);
+-		break;
+-	case WL_PROF_SEC:
+-		memcpy(&wl->profile->sec, data, sizeof(wl->profile->sec));
+-		break;
+-	case WL_PROF_BEACONINT:
+-		wl->profile->beacon_interval = *(u16 *)data;
+-		break;
+-	case WL_PROF_DTIMPERIOD:
+-		wl->profile->dtim_period = *(u8 *)data;
+-		break;
+-	default:
+-		WL_ERR("unsupported item (%d)\n", item);
+-		err = -EOPNOTSUPP;
+-		break;
+-	}
+-
+-	return err;
+-}
+-
+-static bool wl_is_ibssmode(struct wl_priv *wl)
+-{
+-	return wl->conf->mode == WL_MODE_IBSS;
+-}
+-
+-static __used s32 wl_add_ie(struct wl_priv *wl, u8 t, u8 l, u8 *v)
+-{
+-	struct wl_ie *ie = wl_to_ie(wl);
+-	s32 err = 0;
+-
+-	if (unlikely(ie->offset + l + 2 > WL_TLV_INFO_MAX)) {
+-		WL_ERR("ei crosses buffer boundary\n");
+-		return -ENOSPC;
+-	}
+-	ie->buf[ie->offset] = t;
+-	ie->buf[ie->offset + 1] = l;
+-	memcpy(&ie->buf[ie->offset + 2], v, l);
+-	ie->offset += l + 2;
+-
+-	return err;
+-}
+-
+-
+-static void wl_link_down(struct wl_priv *wl)
+-{
+-	struct net_device *dev = NULL;
+-	s32 err = 0;
+-
+-	WL_TRACE("Enter\n");
+-	clear_bit(WL_STATUS_CONNECTED, &wl->status);
+-
+-	if (wl->link_up) {
+-		dev = wl_to_ndev(wl);
+-		WL_INFO("Call WLC_DISASSOC to stop excess roaming\n ");
+-		err = wl_dev_ioctl(dev, WLC_DISASSOC, NULL, 0);
+-		if (unlikely(err))
+-			WL_ERR("WLC_DISASSOC failed (%d)\n", err);
+-		wl->link_up = false;
+-	}
+-	WL_TRACE("Exit\n");
+-}
+-
+-static void wl_lock_eq(struct wl_priv *wl)
+-{
+-	spin_lock_irq(&wl->eq_lock);
+-}
+-
+-static void wl_unlock_eq(struct wl_priv *wl)
+-{
+-	spin_unlock_irq(&wl->eq_lock);
+-}
+-
+-static void wl_init_eq_lock(struct wl_priv *wl)
+-{
+-	spin_lock_init(&wl->eq_lock);
+-}
+-
+-static void wl_delay(u32 ms)
+-{
+-	if (ms < 1000 / HZ) {
+-		cond_resched();
+-		mdelay(ms);
+-	} else {
+-		msleep(ms);
+-	}
+-}
+-
+-static void wl_set_drvdata(struct wl_dev *dev, void *data)
+-{
+-	dev->driver_data = data;
+-}
+-
+-static void *wl_get_drvdata(struct wl_dev *dev)
+-{
+-	return dev->driver_data;
+-}
+-
+-s32 wl_cfg80211_read_fw(s8 *buf, u32 size)
+-{
+-	const struct firmware *fw_entry;
+-	struct wl_priv *wl;
+-
+-	wl = WL_PRIV_GET();
+-
+-	fw_entry = wl->fw->fw_entry;
+-
+-	if (fw_entry->size < wl->fw->ptr + size)
+-		size = fw_entry->size - wl->fw->ptr;
+-
+-	memcpy(buf, &fw_entry->data[wl->fw->ptr], size);
+-	wl->fw->ptr += size;
+-	return size;
+-}
+-
+-void wl_cfg80211_release_fw(void)
+-{
+-	struct wl_priv *wl;
+-
+-	wl = WL_PRIV_GET();
+-	release_firmware(wl->fw->fw_entry);
+-	wl->fw->ptr = 0;
+-}
+-
+-void *wl_cfg80211_request_fw(s8 *file_name)
+-{
+-	struct wl_priv *wl;
+-	const struct firmware *fw_entry = NULL;
+-	s32 err = 0;
+-
+-	WL_INFO("file name : \"%s\"\n", file_name);
+-	wl = WL_PRIV_GET();
+-
+-	if (!test_bit(WL_FW_LOADING_DONE, &wl->fw->status)) {
+-		err = request_firmware(&wl->fw->fw_entry, file_name,
+-				&wl_cfg80211_get_sdio_func()->dev);
+-		if (unlikely(err)) {
+-			WL_ERR("Could not download fw (%d)\n", err);
+-			goto req_fw_out;
+-		}
+-		set_bit(WL_FW_LOADING_DONE, &wl->fw->status);
+-		fw_entry = wl->fw->fw_entry;
+-		if (fw_entry) {
+-			WL_INFO("fw size (%zd), data (%p)\n",
+-			       fw_entry->size, fw_entry->data);
+-		}
+-	} else if (!test_bit(WL_NVRAM_LOADING_DONE, &wl->fw->status)) {
+-		err = request_firmware(&wl->fw->fw_entry, file_name,
+-				&wl_cfg80211_get_sdio_func()->dev);
+-		if (unlikely(err)) {
+-			WL_ERR("Could not download nvram (%d)\n", err);
+-			goto req_fw_out;
+-		}
+-		set_bit(WL_NVRAM_LOADING_DONE, &wl->fw->status);
+-		fw_entry = wl->fw->fw_entry;
+-		if (fw_entry) {
+-			WL_INFO("nvram size (%zd), data (%p)\n",
+-			       fw_entry->size, fw_entry->data);
+-		}
+-	} else {
+-		WL_INFO("Downloading already done. Nothing to do more\n");
+-		err = -EPERM;
+-	}
+-
+-req_fw_out:
+-	if (unlikely(err)) {
+-		return NULL;
+-	}
+-	wl->fw->ptr = 0;
+-	return (void *)fw_entry->data;
+-}
+-
+-s8 *wl_cfg80211_get_fwname(void)
+-{
+-	struct wl_priv *wl;
+-
+-	wl = WL_PRIV_GET();
+-	strcpy(wl->fw->fw_name, WL_4329_FW_FILE);
+-	return wl->fw->fw_name;
+-}
+-
+-s8 *wl_cfg80211_get_nvramname(void)
+-{
+-	struct wl_priv *wl;
+-
+-	wl = WL_PRIV_GET();
+-	strcpy(wl->fw->nvram_name, WL_4329_NVRAM_FILE);
+-	return wl->fw->nvram_name;
+-}
+-
+-static void wl_set_mpc(struct net_device *ndev, int mpc)
+-{
+-	s32 err = 0;
+-	struct wl_priv *wl = ndev_to_wl(ndev);
+-
+-	if (test_bit(WL_STATUS_READY, &wl->status)) {
+-		err = wl_dev_intvar_set(ndev, "mpc", mpc);
+-		if (unlikely(err)) {
+-			WL_ERR("fail to set mpc\n");
+-			return;
+-		}
+-		WL_INFO("MPC : %d\n", mpc);
+-	}
+-}
+-
+-static int wl_debugfs_add_netdev_params(struct wl_priv *wl)
+-{
+-	char buf[10+IFNAMSIZ];
+-	struct dentry *fd;
+-	s32 err = 0;
+-
+-	sprintf(buf, "netdev:%s", wl_to_ndev(wl)->name);
+-	wl->debugfsdir = debugfs_create_dir(buf, wl_to_wiphy(wl)->debugfsdir);
+-
+-	fd = debugfs_create_u16("beacon_int", S_IRUGO, wl->debugfsdir,
+-		(u16 *)&wl->profile->beacon_interval);
+-	if (!fd) {
+-		err = -ENOMEM;
+-		goto err_out;
+-	}
+-
+-	fd = debugfs_create_u8("dtim_period", S_IRUGO, wl->debugfsdir,
+-		(u8 *)&wl->profile->dtim_period);
+-	if (!fd) {
+-		err = -ENOMEM;
+-		goto err_out;
+-	}
+-
+-err_out:
+-	return err;
+-}
+-
+-static void wl_debugfs_remove_netdev(struct wl_priv *wl)
+-{
+-	debugfs_remove_recursive(wl->debugfsdir);
+-	wl->debugfsdir = NULL;
+-}
+diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
+deleted file mode 100644
+index 996033c..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h
++++ /dev/null
+@@ -1,414 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _wl_cfg80211_h_
+-#define _wl_cfg80211_h_
+-
+-#include <linux/wireless.h>
+-#include <linux/wireless.h>
+-#include <net/cfg80211.h>
+-#include <wlioctl.h>
+-
+-struct wl_conf;
+-struct wl_iface;
+-struct wl_priv;
+-struct wl_security;
+-struct wl_ibss;
+-
+-#define WL_DBG_NONE		0
+-#define WL_DBG_CONN		(1 << 5)
+-#define WL_DBG_SCAN		(1 << 4)
+-#define WL_DBG_TRACE		(1 << 3)
+-#define WL_DBG_INFO		(1 << 1)
+-#define WL_DBG_ERR		(1 << 0)
+-#define WL_DBG_MASK		((WL_DBG_INFO | WL_DBG_ERR | WL_DBG_TRACE) | \
+-				(WL_DBG_SCAN) | (WL_DBG_CONN))
+-
+-#define	WL_ERR(fmt, args...)					\
+-do {								\
+-	if (wl_dbg_level & WL_DBG_ERR) {			\
+-		if (net_ratelimit()) {				\
+-			printk(KERN_ERR "ERROR @%s : " fmt,	\
+-				__func__, ##args);		\
+-		}						\
+-	}							\
+-} while (0)
+-
+-#if (defined BCMDBG)
+-#define	WL_INFO(fmt, args...)					\
+-do {								\
+-	if (wl_dbg_level & WL_DBG_INFO) {			\
+-		if (net_ratelimit()) {				\
+-			printk(KERN_ERR "INFO @%s : " fmt,	\
+-				__func__, ##args);		\
+-		}						\
+-	}							\
+-} while (0)
+-
+-#define	WL_TRACE(fmt, args...)					\
+-do {								\
+-	if (wl_dbg_level & WL_DBG_TRACE) {			\
+-		if (net_ratelimit()) {				\
+-			printk(KERN_ERR "TRACE @%s : " fmt,	\
+-				__func__, ##args);		\
+-		}						\
+-	}							\
+-} while (0)
+-
+-#define	WL_SCAN(fmt, args...)					\
+-do {								\
+-	if (wl_dbg_level & WL_DBG_SCAN) {			\
+-		if (net_ratelimit()) {				\
+-			printk(KERN_ERR "SCAN @%s : " fmt,	\
+-				__func__, ##args);		\
+-		}						\
+-	}							\
+-} while (0)
+-
+-#define	WL_CONN(fmt, args...)					\
+-do {								\
+-	if (wl_dbg_level & WL_DBG_CONN) {			\
+-		if (net_ratelimit()) {				\
+-			printk(KERN_ERR "CONN @%s : " fmt,	\
+-				__func__, ##args);		\
+-		}						\
+-	}							\
+-} while (0)
+-
+-#else /* (defined BCMDBG) */
+-#define	WL_INFO(fmt, args...)
+-#define	WL_TRACE(fmt, args...)
+-#define	WL_SCAN(fmt, args...)
+-#define	WL_CONN(fmt, args...)
+-#endif /* (defined BCMDBG) */
+-
+-
+-#define WL_SCAN_RETRY_MAX	3	/* used for ibss scan */
+-#define WL_NUM_SCAN_MAX		1
+-#define WL_NUM_PMKIDS_MAX	MAXPMKID	/* will be used
+-						 * for 2.6.33 kernel
+-						 * or later
+-						 */
+-#define WL_SCAN_BUF_MAX 		(1024 * 8)
+-#define WL_TLV_INFO_MAX 		1024
+-#define WL_BSS_INFO_MAX			2048
+-#define WL_ASSOC_INFO_MAX	512	/*
+-				 * needs to grab assoc info from dongle to
+-				 * report it to cfg80211 through "connect"
+-				 * event
+-				 */
+-#define WL_IOCTL_LEN_MAX	1024
+-#define WL_EXTRA_BUF_MAX	2048
+-#define WL_ISCAN_BUF_MAX	2048	/*
+-				 * the buf lengh can be WLC_IOCTL_MAXLEN (8K)
+-				 * to reduce iteration
+-				 */
+-#define WL_ISCAN_TIMER_INTERVAL_MS	3000
+-#define WL_SCAN_ERSULTS_LAST 	(WL_SCAN_RESULTS_NO_MEM+1)
+-#define WL_AP_MAX	256	/* virtually unlimitted as long
+-				 * as kernel memory allows
+-				 */
+-#define WL_FILE_NAME_MAX		256
+-
+-#define WL_ROAM_TRIGGER_LEVEL		-75
+-#define WL_ROAM_DELTA			20
+-#define WL_BEACON_TIMEOUT		3
+-
+-#define WL_SCAN_CHANNEL_TIME		40
+-#define WL_SCAN_UNASSOC_TIME		40
+-#define WL_SCAN_PASSIVE_TIME		120
+-
+-/* dongle status */
+-enum wl_status {
+-	WL_STATUS_READY,
+-	WL_STATUS_SCANNING,
+-	WL_STATUS_SCAN_ABORTING,
+-	WL_STATUS_CONNECTING,
+-	WL_STATUS_CONNECTED
+-};
+-
+-/* wi-fi mode */
+-enum wl_mode {
+-	WL_MODE_BSS,
+-	WL_MODE_IBSS,
+-	WL_MODE_AP
+-};
+-
+-/* dongle profile list */
+-enum wl_prof_list {
+-	WL_PROF_MODE,
+-	WL_PROF_SSID,
+-	WL_PROF_SEC,
+-	WL_PROF_IBSS,
+-	WL_PROF_BAND,
+-	WL_PROF_BSSID,
+-	WL_PROF_ACT,
+-	WL_PROF_BEACONINT,
+-	WL_PROF_DTIMPERIOD
+-};
+-
+-/* dongle iscan state */
+-enum wl_iscan_state {
+-	WL_ISCAN_STATE_IDLE,
+-	WL_ISCAN_STATE_SCANING
+-};
+-
+-/* fw downloading status */
+-enum wl_fw_status {
+-	WL_FW_LOADING_DONE,
+-	WL_NVRAM_LOADING_DONE
+-};
+-
+-/* beacon / probe_response */
+-struct beacon_proberesp {
+-	__le64 timestamp;
+-	__le16 beacon_int;
+-	__le16 capab_info;
+-	u8 variable[0];
+-} __attribute__ ((packed));
+-
+-/* dongle configuration */
+-struct wl_conf {
+-	u32 mode;		/* adhoc , infrastructure or ap */
+-	u32 frag_threshold;
+-	u32 rts_threshold;
+-	u32 retry_short;
+-	u32 retry_long;
+-	s32 tx_power;
+-	struct ieee80211_channel channel;
+-};
+-
+-/* cfg80211 main event loop */
+-struct wl_event_loop {
+-	s32(*handler[WLC_E_LAST]) (struct wl_priv *wl,
+-				     struct net_device *ndev,
+-				     const wl_event_msg_t *e, void *data);
+-};
+-
+-/* representing interface of cfg80211 plane */
+-struct wl_iface {
+-	struct wl_priv *wl;
+-};
+-
+-struct wl_dev {
+-	void *driver_data;	/* to store cfg80211 object information */
+-};
+-
+-/* bss inform structure for cfg80211 interface */
+-struct wl_cfg80211_bss_info {
+-	u16 band;
+-	u16 channel;
+-	s16 rssi;
+-	u16 frame_len;
+-	u8 frame_buf[1];
+-};
+-
+-/* basic structure of scan request */
+-struct wl_scan_req {
+-	struct wlc_ssid ssid;
+-};
+-
+-/* basic structure of information element */
+-struct wl_ie {
+-	u16 offset;
+-	u8 buf[WL_TLV_INFO_MAX];
+-};
+-
+-/* event queue for cfg80211 main event */
+-struct wl_event_q {
+-	struct list_head eq_list;
+-	u32 etype;
+-	wl_event_msg_t emsg;
+-	s8 edata[1];
+-};
+-
+-/* security information with currently associated ap */
+-struct wl_security {
+-	u32 wpa_versions;
+-	u32 auth_type;
+-	u32 cipher_pairwise;
+-	u32 cipher_group;
+-	u32 wpa_auth;
+-};
+-
+-/* ibss information for currently joined ibss network */
+-struct wl_ibss {
+-	u8 beacon_interval;	/* in millisecond */
+-	u8 atim;		/* in millisecond */
+-	s8 join_only;
+-	u8 band;
+-	u8 channel;
+-};
+-
+-/* dongle profile */
+-struct wl_profile {
+-	u32 mode;
+-	struct wlc_ssid ssid;
+-	u8 bssid[ETH_ALEN];
+-	u16 beacon_interval;
+-	u8 dtim_period;
+-	struct wl_security sec;
+-	struct wl_ibss ibss;
+-	s32 band;
+-};
+-
+-/* dongle iscan event loop */
+-struct wl_iscan_eloop {
+-	s32(*handler[WL_SCAN_ERSULTS_LAST]) (struct wl_priv *wl);
+-};
+-
+-/* dongle iscan controller */
+-struct wl_iscan_ctrl {
+-	struct net_device *dev;
+-	struct timer_list timer;
+-	u32 timer_ms;
+-	u32 timer_on;
+-	s32 state;
+-	struct task_struct *tsk;
+-	struct semaphore sync;
+-	struct wl_iscan_eloop el;
+-	void *data;
+-	s8 ioctl_buf[WLC_IOCTL_SMLEN];
+-	s8 scan_buf[WL_ISCAN_BUF_MAX];
+-};
+-
+-/* association inform */
+-struct wl_connect_info {
+-	u8 *req_ie;
+-	s32 req_ie_len;
+-	u8 *resp_ie;
+-	s32 resp_ie_len;
+-};
+-
+-/* firmware /nvram downloading controller */
+-struct wl_fw_ctrl {
+-	const struct firmware *fw_entry;
+-	unsigned long status;
+-	u32 ptr;
+-	s8 fw_name[WL_FILE_NAME_MAX];
+-	s8 nvram_name[WL_FILE_NAME_MAX];
+-};
+-
+-/* assoc ie length */
+-struct wl_assoc_ielen {
+-	u32 req_len;
+-	u32 resp_len;
+-};
+-
+-/* wpa2 pmk list */
+-struct wl_pmk_list {
+-	pmkid_list_t pmkids;
+-	pmkid_t foo[MAXPMKID - 1];
+-};
+-
+-/* dongle private data of cfg80211 interface */
+-struct wl_priv {
+-	struct wireless_dev *wdev;	/* representing wl cfg80211 device */
+-	struct wl_conf *conf;	/* dongle configuration */
+-	struct cfg80211_scan_request *scan_request;	/* scan request
+-							 object */
+-	struct wl_event_loop el;	/* main event loop */
+-	struct list_head eq_list;	/* used for event queue */
+-	spinlock_t eq_lock;	/* for event queue synchronization */
+-	struct mutex usr_sync;	/* maily for dongle up/down synchronization */
+-	struct wl_scan_results *bss_list;	/* bss_list holding scanned
+-						 ap information */
+-	struct wl_scan_results *scan_results;
+-	struct wl_scan_req *scan_req_int;	/* scan request object for
+-						 internal purpose */
+-	struct wl_cfg80211_bss_info *bss_info;	/* bss information for
+-						 cfg80211 layer */
+-	struct wl_ie ie;	/* information element object for
+-					 internal purpose */
+-	struct semaphore event_sync;	/* for synchronization of main event
+-					 thread */
+-	struct wl_profile *profile;	/* holding dongle profile */
+-	struct wl_iscan_ctrl *iscan;	/* iscan controller */
+-	struct wl_connect_info conn_info;	/* association information
+-						 container */
+-	struct wl_fw_ctrl *fw;	/* control firwmare / nvram paramter
+-				 downloading */
+-	struct wl_pmk_list *pmk_list;	/* wpa2 pmk list */
+-	struct task_struct *event_tsk;	/* task of main event handler thread */
+-	unsigned long status;		/* current dongle status */
+-	void *pub;
+-	u32 channel;		/* current channel */
+-	bool iscan_on;		/* iscan on/off switch */
+-	bool iscan_kickstart;	/* indicate iscan already started */
+-	bool active_scan;	/* current scan mode */
+-	bool ibss_starter;	/* indicates this sta is ibss starter */
+-	bool link_up;		/* link/connection up flag */
+-	bool pwr_save;		/* indicate whether dongle to support
+-					 power save mode */
+-	bool dongle_up;		/* indicate whether dongle up or not */
+-	bool roam_on;		/* on/off switch for dongle self-roaming */
+-	bool scan_tried;	/* indicates if first scan attempted */
+-	u8 *ioctl_buf;	/* ioctl buffer */
+-	u8 *extra_buf;	/* maily to grab assoc information */
+-	struct dentry *debugfsdir;
+-	u8 ci[0] __attribute__ ((__aligned__(NETDEV_ALIGN)));
+-};
+-
+-#define wl_to_dev(w) (wiphy_dev(wl->wdev->wiphy))
+-#define wl_to_wiphy(w) (w->wdev->wiphy)
+-#define wiphy_to_wl(w) ((struct wl_priv *)(wiphy_priv(w)))
+-#define wl_to_wdev(w) (w->wdev)
+-#define wdev_to_wl(w) ((struct wl_priv *)(wdev_priv(w)))
+-#define wl_to_ndev(w) (w->wdev->netdev)
+-#define ndev_to_wl(n) (wdev_to_wl(n->ieee80211_ptr))
+-#define ci_to_wl(c) (ci->wl)
+-#define wl_to_ci(w) (&w->ci)
+-#define wl_to_sr(w) (w->scan_req_int)
+-#define wl_to_ie(w) (&w->ie)
+-#define iscan_to_wl(i) ((struct wl_priv *)(i->data))
+-#define wl_to_iscan(w) (w->iscan)
+-#define wl_to_conn(w) (&w->conn_info)
+-
+-static inline struct wl_bss_info *next_bss(struct wl_scan_results *list,
+-					   struct wl_bss_info *bss)
+-{
+-	return bss = bss ?
+-		(struct wl_bss_info *)((unsigned long)bss +
+-				       le32_to_cpu(bss->length)) :
+-		list->bss_info;
+-}
+-
+-#define for_each_bss(list, bss, __i)	\
+-	for (__i = 0; __i < list->count && __i < WL_AP_MAX; __i++, bss = next_bss(list, bss))
+-
+-extern s32 wl_cfg80211_attach(struct net_device *ndev, void *data);
+-extern void wl_cfg80211_detach(void);
+-/* event handler from dongle */
+-extern void wl_cfg80211_event(struct net_device *ndev, const wl_event_msg_t *e,
+-			      void *data);
+-extern void wl_cfg80211_sdio_func(void *func);	/* set sdio function info */
+-extern struct sdio_func *wl_cfg80211_get_sdio_func(void);	/* set sdio function info */
+-extern s32 wl_cfg80211_up(void);	/* dongle up */
+-extern s32 wl_cfg80211_down(void);	/* dongle down */
+-extern void wl_cfg80211_dbg_level(u32 level);	/* set dongle
+-							 debugging level */
+-extern void *wl_cfg80211_request_fw(s8 *file_name);	/* request fw /nvram
+-							 downloading */
+-extern s32 wl_cfg80211_read_fw(s8 *buf, u32 size);	/* read fw
+-								 image */
+-extern void wl_cfg80211_release_fw(void);	/* release fw */
+-extern s8 *wl_cfg80211_get_fwname(void);	/* get firmware name for
+-						 the dongle */
+-extern s8 *wl_cfg80211_get_nvramname(void);	/* get nvram name for
+-						 the dongle */
+-extern void wl_os_wd_timer(struct net_device *ndev, uint wdtick);
+-
+-#endif				/* _wl_cfg80211_h_ */
+diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c
+deleted file mode 100644
+index 15e1b05..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c
++++ /dev/null
+@@ -1,3693 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/kthread.h>
+-#include <linux/semaphore.h>
+-#include <bcmdefs.h>
+-#include <linux/netdevice.h>
+-#include <wlioctl.h>
+-
+-#include <bcmutils.h>
+-
+-#include <linux/if_arp.h>
+-#include <asm/uaccess.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-#include <dhdioctl.h>
+-#include <linux/ieee80211.h>
+-typedef const struct si_pub si_t;
+-#include <wlioctl.h>
+-
+-#include <dngl_stats.h>
+-#include <dhd.h>
+-
+-#define WL_ERROR(fmt, args...)	printk(fmt, ##args)
+-#define WL_TRACE(fmt, args...)	no_printk(fmt, ##args)
+-#define WL_INFORM(fmt, args...)	no_printk(fmt, ##args)
+-#define WL_WSEC(fmt, args...)	no_printk(fmt, ##args)
+-#define WL_SCAN(fmt, args...)	no_printk(fmt, ##args)
+-
+-#include <wl_iw.h>
+-
+-#define IW_WSEC_ENABLED(wsec)	((wsec) & (WEP_ENABLED |	\
+-					 TKIP_ENABLED | AES_ENABLED))
+-
+-#include <linux/rtnetlink.h>
+-
+-#define WL_IW_USE_ISCAN  1
+-#define ENABLE_ACTIVE_PASSIVE_SCAN_SUPPRESS  1
+-
+-bool g_set_essid_before_scan = true;
+-
+-#define WL_IW_IOCTL_CALL(func_call) \
+-	do {				\
+-		func_call;		\
+-	} while (0)
+-
+-static int g_onoff = G_WLAN_SET_ON;
+-wl_iw_extra_params_t g_wl_iw_params;
+-
+-extern bool wl_iw_conn_status_str(u32 event_type, u32 status,
+-				  u32 reason, char *stringBuf, uint buflen);
+-
+-#define MAX_WLIW_IOCTL_LEN 1024
+-
+-#ifdef CONFIG_WIRELESS_EXT
+-extern int dhd_wait_pend8021x(struct net_device *dev);
+-#endif
+-
+-#if WIRELESS_EXT < 19
+-#define IW_IOCTL_IDX(cmd)	((cmd) - SIOCIWFIRST)
+-#define IW_EVENT_IDX(cmd)	((cmd) - IWEVFIRST)
+-#endif
+-
+-static void *g_scan;
+-static volatile uint g_scan_specified_ssid;
+-static wlc_ssid_t g_specific_ssid;
+-
+-static wlc_ssid_t g_ssid;
+-
+-#if defined(WL_IW_USE_ISCAN)
+-#define ISCAN_STATE_IDLE   0
+-#define ISCAN_STATE_SCANING 1
+-
+-#define WLC_IW_ISCAN_MAXLEN   2048
+-typedef struct iscan_buf {
+-	struct iscan_buf *next;
+-	char iscan_buf[WLC_IW_ISCAN_MAXLEN];
+-} iscan_buf_t;
+-
+-typedef struct iscan_info {
+-	struct net_device *dev;
+-	struct timer_list timer;
+-	u32 timer_ms;
+-	u32 timer_on;
+-	int iscan_state;
+-	iscan_buf_t *list_hdr;
+-	iscan_buf_t *list_cur;
+-
+-	struct task_struct *sysioc_tsk;
+-	struct semaphore sysioc_sem;
+-
+-#if defined CSCAN
+-	char ioctlbuf[WLC_IOCTL_MEDLEN];
+-#else
+-	char ioctlbuf[WLC_IOCTL_SMLEN];
+-#endif
+-	wl_iscan_params_t *iscan_ex_params_p;
+-	int iscan_ex_param_size;
+-} iscan_info_t;
+-iscan_info_t *g_iscan;
+-
+-static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
+-
+-/* Global ASSERT type flag */
+-u32 g_assert_type;
+-
+-static void wl_iw_timerfunc(unsigned long data);
+-static void wl_iw_set_event_mask(struct net_device *dev);
+-static int wl_iw_iscan(iscan_info_t *iscan, wlc_ssid_t *ssid, u16 action);
+-#endif				/* defined(WL_IW_USE_ISCAN) */
+-
+-static int
+-wl_iw_set_scan(struct net_device *dev,
+-	       struct iw_request_info *info,
+-	       union iwreq_data *wrqu, char *extra);
+-
+-static int
+-wl_iw_get_scan(struct net_device *dev,
+-	       struct iw_request_info *info,
+-	       struct iw_point *dwrq, char *extra);
+-
+-static uint
+-wl_iw_get_scan_prep(wl_scan_results_t *list,
+-		    struct iw_request_info *info, char *extra, short max_size);
+-
+-static void swap_key_from_BE(wl_wsec_key_t *key)
+-{
+-	key->index = cpu_to_le32(key->index);
+-	key->len = cpu_to_le32(key->len);
+-	key->algo = cpu_to_le32(key->algo);
+-	key->flags = cpu_to_le32(key->flags);
+-	key->rxiv.hi = cpu_to_le32(key->rxiv.hi);
+-	key->rxiv.lo = cpu_to_le16(key->rxiv.lo);
+-	key->iv_initialized = cpu_to_le32(key->iv_initialized);
+-}
+-
+-static void swap_key_to_BE(wl_wsec_key_t *key)
+-{
+-	key->index = le32_to_cpu(key->index);
+-	key->len = le32_to_cpu(key->len);
+-	key->algo = le32_to_cpu(key->algo);
+-	key->flags = le32_to_cpu(key->flags);
+-	key->rxiv.hi = le32_to_cpu(key->rxiv.hi);
+-	key->rxiv.lo = le16_to_cpu(key->rxiv.lo);
+-	key->iv_initialized = le32_to_cpu(key->iv_initialized);
+-}
+-
+-static int dev_wlc_ioctl(struct net_device *dev, int cmd, void *arg, int len)
+-{
+-	struct ifreq ifr;
+-	wl_ioctl_t ioc;
+-	mm_segment_t fs;
+-	int ret = -EINVAL;
+-
+-	if (!dev) {
+-		WL_ERROR("%s: dev is null\n", __func__);
+-		return ret;
+-	}
+-
+-	WL_INFORM("\n%s, PID:%x: send Local IOCTL -> dhd: cmd:0x%x, buf:%p, len:%d\n",
+-		  __func__, current->pid, cmd, arg, len);
+-
+-	if (g_onoff == G_WLAN_SET_ON) {
+-		memset(&ioc, 0, sizeof(ioc));
+-		ioc.cmd = cmd;
+-		ioc.buf = arg;
+-		ioc.len = len;
+-
+-		strcpy(ifr.ifr_name, dev->name);
+-		ifr.ifr_data = (caddr_t)&ioc;
+-
+-		ret = dev_open(dev);
+-		if (ret) {
+-			WL_ERROR("%s: Error dev_open: %d\n", __func__, ret);
+-			return ret;
+-		}
+-
+-		fs = get_fs();
+-		set_fs(get_ds());
+-		ret = dev->netdev_ops->ndo_do_ioctl(dev, &ifr, SIOCDEVPRIVATE);
+-		set_fs(fs);
+-	} else {
+-		WL_TRACE("%s: call after driver stop : ignored\n", __func__);
+-	}
+-	return ret;
+-}
+-
+-static int dev_wlc_intvar_set(struct net_device *dev, char *name, int val)
+-{
+-	char buf[WLC_IOCTL_SMLEN];
+-	uint len;
+-
+-	val = cpu_to_le32(val);
+-	len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf));
+-	ASSERT(len);
+-
+-	return dev_wlc_ioctl(dev, WLC_SET_VAR, buf, len);
+-}
+-
+-#if defined(WL_IW_USE_ISCAN)
+-static int
+-dev_iw_iovar_setbuf(struct net_device *dev,
+-		    char *iovar,
+-		    void *param, int paramlen, void *bufptr, int buflen)
+-{
+-	int iolen;
+-
+-	iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+-	ASSERT(iolen);
+-
+-	if (iolen == 0)
+-		return 0;
+-
+-	return dev_wlc_ioctl(dev, WLC_SET_VAR, bufptr, iolen);
+-}
+-
+-static int
+-dev_iw_iovar_getbuf(struct net_device *dev,
+-		    char *iovar,
+-		    void *param, int paramlen, void *bufptr, int buflen)
+-{
+-	int iolen;
+-
+-	iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen);
+-	ASSERT(iolen);
+-
+-	return dev_wlc_ioctl(dev, WLC_GET_VAR, bufptr, buflen);
+-}
+-#endif				/* defined(WL_IW_USE_ISCAN) */
+-
+-#if WIRELESS_EXT > 17
+-static int
+-dev_wlc_bufvar_set(struct net_device *dev, char *name, char *buf, int len)
+-{
+-	static char ioctlbuf[MAX_WLIW_IOCTL_LEN];
+-	uint buflen;
+-
+-	buflen = bcm_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf));
+-	ASSERT(buflen);
+-
+-	return dev_wlc_ioctl(dev, WLC_SET_VAR, ioctlbuf, buflen);
+-}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-static int
+-dev_wlc_bufvar_get(struct net_device *dev, char *name, char *buf, int buflen)
+-{
+-	static char ioctlbuf[MAX_WLIW_IOCTL_LEN];
+-	int error;
+-	uint len;
+-
+-	len = bcm_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf));
+-	ASSERT(len);
+-	error =
+-	    dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)ioctlbuf,
+-			  MAX_WLIW_IOCTL_LEN);
+-	if (!error)
+-		memcpy(buf, ioctlbuf, buflen);
+-
+-	return error;
+-}
+-
+-static int dev_wlc_intvar_get(struct net_device *dev, char *name, int *retval)
+-{
+-	union {
+-		char buf[WLC_IOCTL_SMLEN];
+-		int val;
+-	} var;
+-	int error;
+-
+-	uint len;
+-	uint data_null;
+-
+-	len =
+-	    bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var),
+-			sizeof(var.buf));
+-	ASSERT(len);
+-	error = dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)&var, len);
+-
+-	*retval = le32_to_cpu(var.val);
+-
+-	return error;
+-}
+-
+-#if WIRELESS_EXT < 13
+-struct iw_request_info {
+-	__u16 cmd;
+-	__u16 flags;
+-};
+-
+-typedef int (*iw_handler) (struct net_device *dev,
+-			   struct iw_request_info *info,
+-			   void *wrqu, char *extra);
+-#endif
+-
+-static int
+-wl_iw_config_commit(struct net_device *dev,
+-		    struct iw_request_info *info, void *zwrq, char *extra)
+-{
+-	wlc_ssid_t ssid;
+-	int error;
+-	struct sockaddr bssid;
+-
+-	WL_TRACE("%s: SIOCSIWCOMMIT\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_SSID, &ssid, sizeof(ssid));
+-	if (error)
+-		return error;
+-
+-	ssid.SSID_len = le32_to_cpu(ssid.SSID_len);
+-
+-	if (!ssid.SSID_len)
+-		return 0;
+-
+-	memset(&bssid, 0, sizeof(struct sockaddr));
+-	error = dev_wlc_ioctl(dev, WLC_REASSOC, &bssid, ETH_ALEN);
+-	if (error) {
+-		WL_ERROR("%s: WLC_REASSOC to %s failed\n",
+-			 __func__, ssid.SSID);
+-		return error;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_name(struct net_device *dev,
+-	       struct iw_request_info *info, char *cwrq, char *extra)
+-{
+-	WL_TRACE("%s: SIOCGIWNAME\n", dev->name);
+-
+-	strcpy(cwrq, "IEEE 802.11-DS");
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_freq(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_freq *fwrq, char *extra)
+-{
+-	int error, chan;
+-	uint sf = 0;
+-
+-	WL_TRACE("\n %s %s: SIOCSIWFREQ\n", __func__, dev->name);
+-
+-	if (fwrq->e == 0 && fwrq->m < MAXCHANNEL) {
+-		chan = fwrq->m;
+-	} else {
+-		if (fwrq->e >= 6) {
+-			fwrq->e -= 6;
+-			while (fwrq->e--)
+-				fwrq->m *= 10;
+-		} else if (fwrq->e < 6) {
+-			while (fwrq->e++ < 6)
+-				fwrq->m /= 10;
+-		}
+-		if (fwrq->m > 4000 && fwrq->m < 5000)
+-			sf = WF_CHAN_FACTOR_4_G;
+-
+-		chan = bcm_mhz2channel(fwrq->m, sf);
+-	}
+-	chan = cpu_to_le32(chan);
+-
+-	error = dev_wlc_ioctl(dev, WLC_SET_CHANNEL, &chan, sizeof(chan));
+-	if (error)
+-		return error;
+-
+-	g_wl_iw_params.target_channel = chan;
+-	return -EINPROGRESS;
+-}
+-
+-static int
+-wl_iw_get_freq(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_freq *fwrq, char *extra)
+-{
+-	channel_info_t ci;
+-	int error;
+-
+-	WL_TRACE("%s: SIOCGIWFREQ\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci, sizeof(ci));
+-	if (error)
+-		return error;
+-
+-	fwrq->m = le32_to_cpu(ci.hw_channel);
+-	fwrq->e = le32_to_cpu(0);
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_mode(struct net_device *dev,
+-	       struct iw_request_info *info, __u32 *uwrq, char *extra)
+-{
+-	int infra = 0, ap = 0, error = 0;
+-
+-	WL_TRACE("%s: SIOCSIWMODE\n", dev->name);
+-
+-	switch (*uwrq) {
+-	case IW_MODE_MASTER:
+-		infra = ap = 1;
+-		break;
+-	case IW_MODE_ADHOC:
+-	case IW_MODE_AUTO:
+-		break;
+-	case IW_MODE_INFRA:
+-		infra = 1;
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-	infra = cpu_to_le32(infra);
+-	ap = cpu_to_le32(ap);
+-
+-	error = dev_wlc_ioctl(dev, WLC_SET_INFRA, &infra, sizeof(infra));
+-	if (error)
+-		return error;
+-
+-	error = dev_wlc_ioctl(dev, WLC_SET_AP, &ap, sizeof(ap));
+-	if (error)
+-		return error;
+-
+-	return -EINPROGRESS;
+-}
+-
+-static int
+-wl_iw_get_mode(struct net_device *dev,
+-	       struct iw_request_info *info, __u32 *uwrq, char *extra)
+-{
+-	int error, infra = 0, ap = 0;
+-
+-	WL_TRACE("%s: SIOCGIWMODE\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_INFRA, &infra, sizeof(infra));
+-	if (error)
+-		return error;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_AP, &ap, sizeof(ap));
+-	if (error)
+-		return error;
+-
+-	infra = le32_to_cpu(infra);
+-	ap = le32_to_cpu(ap);
+-	*uwrq = infra ? ap ? IW_MODE_MASTER : IW_MODE_INFRA : IW_MODE_ADHOC;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_range(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_point *dwrq, char *extra)
+-{
+-	struct iw_range *range = (struct iw_range *)extra;
+-	wl_u32_list_t *list;
+-	wl_rateset_t rateset;
+-	s8 *channels;
+-	int error, i, k;
+-	uint ch;
+-
+-	int phytype;
+-	int bw_cap = 0, sgi_tx = 0, nmode = 0;
+-	channel_info_t ci;
+-	u8 nrate_list2copy = 0;
+-	u16 nrate_list[4][8] = { {13, 26, 39, 52, 78, 104, 117, 130},
+-	{14, 29, 43, 58, 87, 116, 130, 144},
+-	{27, 54, 81, 108, 162, 216, 243, 270},
+-	{30, 60, 90, 120, 180, 240, 270, 300}
+-	};
+-
+-	WL_TRACE("%s: SIOCGIWRANGE\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	channels = kmalloc((MAXCHANNEL + 1) * 4, GFP_KERNEL);
+-	if (!channels) {
+-		WL_ERROR("Could not alloc channels\n");
+-		return -ENOMEM;
+-	}
+-	list = (wl_u32_list_t *) channels;
+-
+-	dwrq->length = sizeof(struct iw_range);
+-	memset(range, 0, sizeof(*range));
+-
+-	list->count = cpu_to_le32(MAXCHANNEL);
+-	error = dev_wlc_ioctl(dev, WLC_GET_VALID_CHANNELS, channels,
+-				(MAXCHANNEL + 1) * 4);
+-	if (error) {
+-		kfree(channels);
+-		return error;
+-	}
+-	for (i = 0; i < le32_to_cpu(list->count) && i < IW_MAX_FREQUENCIES;
+-	     i++) {
+-		range->freq[i].i = le32_to_cpu(list->element[i]);
+-
+-		ch = le32_to_cpu(list->element[i]);
+-		if (ch <= CH_MAX_2G_CHANNEL) {
+-			range->freq[i].m = ieee80211_dsss_chan_to_freq(ch);
+-		} else {
+-			range->freq[i].m = ieee80211_ofdm_chan_to_freq(
+-						WF_CHAN_FACTOR_5_G/2, ch);
+-		}
+-		range->freq[i].e = 6;
+-	}
+-	range->num_frequency = range->num_channels = i;
+-
+-	range->max_qual.qual = 5;
+-	range->max_qual.level = 0x100 - 200;
+-	range->max_qual.noise = 0x100 - 200;
+-	range->sensitivity = 65535;
+-
+-#if WIRELESS_EXT > 11
+-	range->avg_qual.qual = 3;
+-	range->avg_qual.level = 0x100 + WL_IW_RSSI_GOOD;
+-	range->avg_qual.noise = 0x100 - 75;
+-#endif
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_CURR_RATESET, &rateset,
+-				sizeof(rateset));
+-	if (error) {
+-		kfree(channels);
+-		return error;
+-	}
+-	rateset.count = le32_to_cpu(rateset.count);
+-	range->num_bitrates = rateset.count;
+-	for (i = 0; i < rateset.count && i < IW_MAX_BITRATES; i++)
+-		range->bitrate[i] = (rateset.rates[i] & 0x7f) * 500000;
+-	dev_wlc_intvar_get(dev, "nmode", &nmode);
+-	dev_wlc_ioctl(dev, WLC_GET_PHYTYPE, &phytype, sizeof(phytype));
+-
+-	if (nmode == 1 && phytype == WLC_PHY_TYPE_SSN) {
+-		dev_wlc_intvar_get(dev, "mimo_bw_cap", &bw_cap);
+-		dev_wlc_intvar_get(dev, "sgi_tx", &sgi_tx);
+-		dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci,
+-			      sizeof(channel_info_t));
+-		ci.hw_channel = le32_to_cpu(ci.hw_channel);
+-
+-		if (bw_cap == 0 || (bw_cap == 2 && ci.hw_channel <= 14)) {
+-			if (sgi_tx == 0)
+-				nrate_list2copy = 0;
+-			else
+-				nrate_list2copy = 1;
+-		}
+-		if (bw_cap == 1 || (bw_cap == 2 && ci.hw_channel >= 36)) {
+-			if (sgi_tx == 0)
+-				nrate_list2copy = 2;
+-			else
+-				nrate_list2copy = 3;
+-		}
+-		range->num_bitrates += 8;
+-		for (k = 0; i < range->num_bitrates; k++, i++) {
+-			range->bitrate[i] =
+-			    (nrate_list[nrate_list2copy][k]) * 500000;
+-		}
+-	}
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_PHYTYPE, &i, sizeof(i));
+-	if (error) {
+-		kfree(channels);
+-		return error;
+-	}
+-	i = le32_to_cpu(i);
+-	if (i == WLC_PHY_TYPE_A)
+-		range->throughput = 24000000;
+-	else
+-		range->throughput = 1500000;
+-
+-	range->min_rts = 0;
+-	range->max_rts = 2347;
+-	range->min_frag = 256;
+-	range->max_frag = 2346;
+-
+-	range->max_encoding_tokens = DOT11_MAX_DEFAULT_KEYS;
+-	range->num_encoding_sizes = 4;
+-	range->encoding_size[0] = WLAN_KEY_LEN_WEP40;
+-	range->encoding_size[1] = WLAN_KEY_LEN_WEP104;
+-#if WIRELESS_EXT > 17
+-	range->encoding_size[2] = WLAN_KEY_LEN_TKIP;
+-#else
+-	range->encoding_size[2] = 0;
+-#endif
+-	range->encoding_size[3] = WLAN_KEY_LEN_AES_CMAC;
+-
+-	range->min_pmp = 0;
+-	range->max_pmp = 0;
+-	range->min_pmt = 0;
+-	range->max_pmt = 0;
+-	range->pmp_flags = 0;
+-	range->pm_capa = 0;
+-
+-	range->num_txpower = 2;
+-	range->txpower[0] = 1;
+-	range->txpower[1] = 255;
+-	range->txpower_capa = IW_TXPOW_MWATT;
+-
+-#if WIRELESS_EXT > 10
+-	range->we_version_compiled = WIRELESS_EXT;
+-	range->we_version_source = 19;
+-
+-	range->retry_capa = IW_RETRY_LIMIT;
+-	range->retry_flags = IW_RETRY_LIMIT;
+-	range->r_time_flags = 0;
+-	range->min_retry = 1;
+-	range->max_retry = 255;
+-	range->min_r_time = 0;
+-	range->max_r_time = 0;
+-#endif
+-
+-#if WIRELESS_EXT > 17
+-	range->enc_capa = IW_ENC_CAPA_WPA;
+-	range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP;
+-	range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP;
+-	range->enc_capa |= IW_ENC_CAPA_WPA2;
+-
+-	IW_EVENT_CAPA_SET_KERNEL(range->event_capa);
+-	IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWAP);
+-	IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWSCAN);
+-	IW_EVENT_CAPA_SET(range->event_capa, IWEVTXDROP);
+-	IW_EVENT_CAPA_SET(range->event_capa, IWEVMICHAELMICFAILURE);
+-	IW_EVENT_CAPA_SET(range->event_capa, IWEVPMKIDCAND);
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-	kfree(channels);
+-
+-	return 0;
+-}
+-
+-static int rssi_to_qual(int rssi)
+-{
+-	if (rssi <= WL_IW_RSSI_NO_SIGNAL)
+-		return 0;
+-	else if (rssi <= WL_IW_RSSI_VERY_LOW)
+-		return 1;
+-	else if (rssi <= WL_IW_RSSI_LOW)
+-		return 2;
+-	else if (rssi <= WL_IW_RSSI_GOOD)
+-		return 3;
+-	else if (rssi <= WL_IW_RSSI_VERY_GOOD)
+-		return 4;
+-	else
+-		return 5;
+-}
+-
+-static int
+-wl_iw_set_spy(struct net_device *dev,
+-	      struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+-{
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-	struct sockaddr *addr = (struct sockaddr *)extra;
+-	int i;
+-
+-	WL_TRACE("%s: SIOCSIWSPY\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	iw->spy_num = min_t(int, ARRAY_SIZE(iw->spy_addr), dwrq->length);
+-	for (i = 0; i < iw->spy_num; i++)
+-		memcpy(iw->spy_addr[i], addr[i].sa_data, ETH_ALEN);
+-	memset(iw->spy_qual, 0, sizeof(iw->spy_qual));
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_spy(struct net_device *dev,
+-	      struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+-{
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-	struct sockaddr *addr = (struct sockaddr *)extra;
+-	struct iw_quality *qual = (struct iw_quality *)&addr[iw->spy_num];
+-	int i;
+-
+-	WL_TRACE("%s: SIOCGIWSPY\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	dwrq->length = iw->spy_num;
+-	for (i = 0; i < iw->spy_num; i++) {
+-		memcpy(addr[i].sa_data, iw->spy_addr[i], ETH_ALEN);
+-		addr[i].sa_family = AF_UNIX;
+-		memcpy(&qual[i], &iw->spy_qual[i], sizeof(struct iw_quality));
+-		iw->spy_qual[i].updated = 0;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_ch_to_chanspec(int ch, wl_join_params_t *join_params,
+-		     int *join_params_size)
+-{
+-	chanspec_t chanspec = 0;
+-
+-	if (ch != 0) {
+-		join_params->params.chanspec_num = 1;
+-		join_params->params.chanspec_list[0] = ch;
+-
+-		if (join_params->params.chanspec_list[0])
+-			chanspec |= WL_CHANSPEC_BAND_2G;
+-		else
+-			chanspec |= WL_CHANSPEC_BAND_5G;
+-
+-		chanspec |= WL_CHANSPEC_BW_20;
+-		chanspec |= WL_CHANSPEC_CTL_SB_NONE;
+-
+-		*join_params_size += WL_ASSOC_PARAMS_FIXED_SIZE +
+-		    join_params->params.chanspec_num * sizeof(chanspec_t);
+-
+-		join_params->params.chanspec_list[0] &= WL_CHANSPEC_CHAN_MASK;
+-		join_params->params.chanspec_list[0] |= chanspec;
+-		join_params->params.chanspec_list[0] =
+-		    cpu_to_le16(join_params->params.chanspec_list[0]);
+-
+-		join_params->params.chanspec_num =
+-		    cpu_to_le32(join_params->params.chanspec_num);
+-
+-		WL_TRACE("%s  join_params->params.chanspec_list[0]= %X\n",
+-			 __func__, join_params->params.chanspec_list[0]);
+-	}
+-	return 1;
+-}
+-
+-static int
+-wl_iw_set_wap(struct net_device *dev,
+-	      struct iw_request_info *info, struct sockaddr *awrq, char *extra)
+-{
+-	int error = -EINVAL;
+-	wl_join_params_t join_params;
+-	int join_params_size;
+-
+-	WL_TRACE("%s: SIOCSIWAP\n", dev->name);
+-
+-	if (awrq->sa_family != ARPHRD_ETHER) {
+-		WL_ERROR("Invalid Header...sa_family\n");
+-		return -EINVAL;
+-	}
+-
+-	if (is_broadcast_ether_addr(awrq->sa_data) ||
+-	    is_zero_ether_addr(awrq->sa_data)) {
+-		scb_val_t scbval;
+-		memset(&scbval, 0, sizeof(scb_val_t));
+-		(void)dev_wlc_ioctl(dev, WLC_DISASSOC, &scbval,
+-				    sizeof(scb_val_t));
+-		return 0;
+-	}
+-
+-	memset(&join_params, 0, sizeof(join_params));
+-	join_params_size = sizeof(join_params.ssid);
+-
+-	memcpy(join_params.ssid.SSID, g_ssid.SSID, g_ssid.SSID_len);
+-	join_params.ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len);
+-	memcpy(&join_params.params.bssid, awrq->sa_data, ETH_ALEN);
+-
+-	WL_TRACE("%s  target_channel=%d\n",
+-		 __func__, g_wl_iw_params.target_channel);
+-	wl_iw_ch_to_chanspec(g_wl_iw_params.target_channel, &join_params,
+-			     &join_params_size);
+-
+-	error = dev_wlc_ioctl(dev, WLC_SET_SSID, &join_params,
+-				join_params_size);
+-	if (error) {
+-		WL_ERROR("%s Invalid ioctl data=%d\n", __func__, error);
+-	}
+-
+-	if (g_ssid.SSID_len) {
+-		WL_TRACE("%s: join SSID=%s BSSID=%pM ch=%d\n",
+-			 __func__, g_ssid.SSID, awrq->sa_data,
+-			 g_wl_iw_params.target_channel);
+-	}
+-
+-	memset(&g_ssid, 0, sizeof(g_ssid));
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_wap(struct net_device *dev,
+-	      struct iw_request_info *info, struct sockaddr *awrq, char *extra)
+-{
+-	WL_TRACE("%s: SIOCGIWAP\n", dev->name);
+-
+-	awrq->sa_family = ARPHRD_ETHER;
+-	memset(awrq->sa_data, 0, ETH_ALEN);
+-
+-	(void)dev_wlc_ioctl(dev, WLC_GET_BSSID, awrq->sa_data, ETH_ALEN);
+-
+-	return 0;
+-}
+-
+-#if WIRELESS_EXT > 17
+-static int
+-wl_iw_mlme(struct net_device *dev,
+-	   struct iw_request_info *info, struct sockaddr *awrq, char *extra)
+-{
+-	struct iw_mlme *mlme;
+-	scb_val_t scbval;
+-	int error = -EINVAL;
+-
+-	WL_TRACE("%s: SIOCSIWMLME DISASSOC/DEAUTH\n", dev->name);
+-
+-	mlme = (struct iw_mlme *)extra;
+-	if (mlme == NULL) {
+-		WL_ERROR("Invalid ioctl data\n");
+-		return error;
+-	}
+-
+-	scbval.val = mlme->reason_code;
+-	memcpy(&scbval.ea, &mlme->addr.sa_data, ETH_ALEN);
+-
+-	if (mlme->cmd == IW_MLME_DISASSOC) {
+-		scbval.val = cpu_to_le32(scbval.val);
+-		error =
+-		    dev_wlc_ioctl(dev, WLC_DISASSOC, &scbval,
+-				  sizeof(scb_val_t));
+-	} else if (mlme->cmd == IW_MLME_DEAUTH) {
+-		scbval.val = cpu_to_le32(scbval.val);
+-		error =
+-		    dev_wlc_ioctl(dev, WLC_SCB_DEAUTHENTICATE_FOR_REASON,
+-				  &scbval, sizeof(scb_val_t));
+-	} else {
+-		WL_ERROR("Invalid ioctl data\n");
+-		return error;
+-	}
+-
+-	return error;
+-}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-#ifndef WL_IW_USE_ISCAN
+-static int
+-wl_iw_get_aplist(struct net_device *dev,
+-		 struct iw_request_info *info,
+-		 struct iw_point *dwrq, char *extra)
+-{
+-	wl_scan_results_t *list;
+-	struct sockaddr *addr = (struct sockaddr *)extra;
+-	struct iw_quality qual[IW_MAX_AP];
+-	wl_bss_info_t *bi = NULL;
+-	int error, i;
+-	uint buflen = dwrq->length;
+-
+-	WL_TRACE("%s: SIOCGIWAPLIST\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	list = kzalloc(buflen, GFP_KERNEL);
+-	if (!list)
+-		return -ENOMEM;
+-	list->buflen = cpu_to_le32(buflen);
+-	error = dev_wlc_ioctl(dev, WLC_SCAN_RESULTS, list, buflen);
+-	if (error) {
+-		WL_ERROR("%d: Scan results error %d\n", __LINE__, error);
+-		kfree(list);
+-		return error;
+-	}
+-	list->buflen = le32_to_cpu(list->buflen);
+-	list->version = le32_to_cpu(list->version);
+-	list->count = le32_to_cpu(list->count);
+-	if (list->version != WL_BSS_INFO_VERSION) {
+-		WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n",
+-			 __func__, list->version);
+-		kfree(list);
+-		return -EINVAL;
+-	}
+-
+-	for (i = 0, dwrq->length = 0;
+-	     i < list->count && dwrq->length < IW_MAX_AP; i++) {
+-		bi = bi ? (wl_bss_info_t *) ((unsigned long)bi +
+-					     le32_to_cpu(bi->length)) : list->
+-		    bss_info;
+-		ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <=
+-		       ((unsigned long)list + buflen));
+-
+-		if (!(le16_to_cpu(bi->capability) & WLAN_CAPABILITY_ESS))
+-			continue;
+-
+-		memcpy(addr[dwrq->length].sa_data, &bi->BSSID, ETH_ALEN);
+-		addr[dwrq->length].sa_family = ARPHRD_ETHER;
+-		qual[dwrq->length].qual = rssi_to_qual(le16_to_cpu(bi->RSSI));
+-		qual[dwrq->length].level = 0x100 + le16_to_cpu(bi->RSSI);
+-		qual[dwrq->length].noise = 0x100 + bi->phy_noise;
+-
+-#if WIRELESS_EXT > 18
+-		qual[dwrq->length].updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
+-#else
+-		qual[dwrq->length].updated = 7;
+-#endif
+-		dwrq->length++;
+-	}
+-
+-	kfree(list);
+-
+-	if (dwrq->length) {
+-		memcpy(&addr[dwrq->length], qual,
+-		       sizeof(struct iw_quality) * dwrq->length);
+-		dwrq->flags = 1;
+-	}
+-
+-	return 0;
+-}
+-#endif				/* WL_IW_USE_ISCAN */
+-
+-#ifdef WL_IW_USE_ISCAN
+-static int
+-wl_iw_iscan_get_aplist(struct net_device *dev,
+-		       struct iw_request_info *info,
+-		       struct iw_point *dwrq, char *extra)
+-{
+-	wl_scan_results_t *list;
+-	iscan_buf_t *buf;
+-	iscan_info_t *iscan = g_iscan;
+-
+-	struct sockaddr *addr = (struct sockaddr *)extra;
+-	struct iw_quality qual[IW_MAX_AP];
+-	wl_bss_info_t *bi = NULL;
+-	int i;
+-
+-	WL_TRACE("%s: SIOCGIWAPLIST\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	if ((!iscan) || (!iscan->sysioc_tsk)) {
+-		WL_ERROR("%s error\n", __func__);
+-		return 0;
+-	}
+-
+-	buf = iscan->list_hdr;
+-	while (buf) {
+-		list = &((wl_iscan_results_t *) buf->iscan_buf)->results;
+-		if (list->version != WL_BSS_INFO_VERSION) {
+-			WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n",
+-				 __func__, list->version);
+-			return -EINVAL;
+-		}
+-
+-		bi = NULL;
+-		for (i = 0, dwrq->length = 0;
+-		     i < list->count && dwrq->length < IW_MAX_AP; i++) {
+-			bi = bi ? (wl_bss_info_t *) ((unsigned long)bi +
+-						     le32_to_cpu(bi->length)) :
+-			    list->bss_info;
+-			ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <=
+-			       ((unsigned long)list + WLC_IW_ISCAN_MAXLEN));
+-
+-			if (!(le16_to_cpu(bi->capability) &
+-			      WLAN_CAPABILITY_ESS))
+-				continue;
+-
+-			memcpy(addr[dwrq->length].sa_data, &bi->BSSID,
+-			       ETH_ALEN);
+-			addr[dwrq->length].sa_family = ARPHRD_ETHER;
+-			qual[dwrq->length].qual =
+-			    rssi_to_qual(le16_to_cpu(bi->RSSI));
+-			qual[dwrq->length].level = 0x100 +
+-							le16_to_cpu(bi->RSSI);
+-			qual[dwrq->length].noise = 0x100 + bi->phy_noise;
+-
+-#if WIRELESS_EXT > 18
+-			qual[dwrq->length].updated =
+-			    IW_QUAL_ALL_UPDATED | IW_QUAL_DBM;
+-#else
+-			qual[dwrq->length].updated = 7;
+-#endif
+-
+-			dwrq->length++;
+-		}
+-		buf = buf->next;
+-	}
+-	if (dwrq->length) {
+-		memcpy(&addr[dwrq->length], qual,
+-		       sizeof(struct iw_quality) * dwrq->length);
+-		dwrq->flags = 1;
+-	}
+-
+-	return 0;
+-}
+-
+-static int wl_iw_iscan_prep(wl_scan_params_t *params, wlc_ssid_t *ssid)
+-{
+-	int err = 0;
+-
+-	memcpy(params->bssid, ether_bcast, ETH_ALEN);
+-	params->bss_type = DOT11_BSSTYPE_ANY;
+-	params->scan_type = 0;
+-	params->nprobes = -1;
+-	params->active_time = -1;
+-	params->passive_time = -1;
+-	params->home_time = -1;
+-	params->channel_num = 0;
+-
+-	params->nprobes = cpu_to_le32(params->nprobes);
+-	params->active_time = cpu_to_le32(params->active_time);
+-	params->passive_time = cpu_to_le32(params->passive_time);
+-	params->home_time = cpu_to_le32(params->home_time);
+-	if (ssid && ssid->SSID_len)
+-		memcpy(&params->ssid, ssid, sizeof(wlc_ssid_t));
+-
+-	return err;
+-}
+-
+-static int wl_iw_iscan(iscan_info_t *iscan, wlc_ssid_t *ssid, u16 action)
+-{
+-	int err = 0;
+-
+-	iscan->iscan_ex_params_p->version = cpu_to_le32(ISCAN_REQ_VERSION);
+-	iscan->iscan_ex_params_p->action = cpu_to_le16(action);
+-	iscan->iscan_ex_params_p->scan_duration = cpu_to_le16(0);
+-
+-	WL_SCAN("%s : nprobes=%d\n",
+-		__func__, iscan->iscan_ex_params_p->params.nprobes);
+-	WL_SCAN("active_time=%d\n",
+-		 iscan->iscan_ex_params_p->params.active_time);
+-	WL_SCAN("passive_time=%d\n",
+-		 iscan->iscan_ex_params_p->params.passive_time);
+-	WL_SCAN("home_time=%d\n", iscan->iscan_ex_params_p->params.home_time);
+-	WL_SCAN("scan_type=%d\n", iscan->iscan_ex_params_p->params.scan_type);
+-	WL_SCAN("bss_type=%d\n", iscan->iscan_ex_params_p->params.bss_type);
+-
+-	(void)dev_iw_iovar_setbuf(iscan->dev, "iscan", iscan->iscan_ex_params_p,
+-				  iscan->iscan_ex_param_size, iscan->ioctlbuf,
+-				  sizeof(iscan->ioctlbuf));
+-
+-	return err;
+-}
+-
+-static void wl_iw_timerfunc(unsigned long data)
+-{
+-	iscan_info_t *iscan = (iscan_info_t *) data;
+-	if (iscan) {
+-		iscan->timer_on = 0;
+-		if (iscan->iscan_state != ISCAN_STATE_IDLE) {
+-			WL_TRACE("timer trigger\n");
+-			up(&iscan->sysioc_sem);
+-		}
+-	}
+-}
+-
+-static void wl_iw_set_event_mask(struct net_device *dev)
+-{
+-	char eventmask[WL_EVENTING_MASK_LEN];
+-	char iovbuf[WL_EVENTING_MASK_LEN + 12];
+-
+-	dev_iw_iovar_getbuf(dev, "event_msgs", "", 0, iovbuf, sizeof(iovbuf));
+-	memcpy(eventmask, iovbuf, WL_EVENTING_MASK_LEN);
+-	setbit(eventmask, WLC_E_SCAN_COMPLETE);
+-	dev_iw_iovar_setbuf(dev, "event_msgs", eventmask, WL_EVENTING_MASK_LEN,
+-			    iovbuf, sizeof(iovbuf));
+-}
+-
+-static u32 wl_iw_iscan_get(iscan_info_t *iscan)
+-{
+-	iscan_buf_t *buf;
+-	iscan_buf_t *ptr;
+-	wl_iscan_results_t *list_buf;
+-	wl_iscan_results_t list;
+-	wl_scan_results_t *results;
+-	u32 status;
+-	int res = 0;
+-
+-	MUTEX_LOCK_WL_SCAN_SET();
+-	if (iscan->list_cur) {
+-		buf = iscan->list_cur;
+-		iscan->list_cur = buf->next;
+-	} else {
+-		buf = kmalloc(sizeof(iscan_buf_t), GFP_KERNEL);
+-		if (!buf) {
+-			WL_ERROR("%s can't alloc iscan_buf_t : going to abort current iscan\n",
+-				 __func__);
+-			MUTEX_UNLOCK_WL_SCAN_SET();
+-			return WL_SCAN_RESULTS_NO_MEM;
+-		}
+-		buf->next = NULL;
+-		if (!iscan->list_hdr)
+-			iscan->list_hdr = buf;
+-		else {
+-			ptr = iscan->list_hdr;
+-			while (ptr->next) {
+-				ptr = ptr->next;
+-			}
+-			ptr->next = buf;
+-		}
+-	}
+-	memset(buf->iscan_buf, 0, WLC_IW_ISCAN_MAXLEN);
+-	list_buf = (wl_iscan_results_t *) buf->iscan_buf;
+-	results = &list_buf->results;
+-	results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE;
+-	results->version = 0;
+-	results->count = 0;
+-
+-	memset(&list, 0, sizeof(list));
+-	list.results.buflen = cpu_to_le32(WLC_IW_ISCAN_MAXLEN);
+-	res = dev_iw_iovar_getbuf(iscan->dev,
+-				  "iscanresults",
+-				  &list,
+-				  WL_ISCAN_RESULTS_FIXED_SIZE,
+-				  buf->iscan_buf, WLC_IW_ISCAN_MAXLEN);
+-	if (res == 0) {
+-		results->buflen = le32_to_cpu(results->buflen);
+-		results->version = le32_to_cpu(results->version);
+-		results->count = le32_to_cpu(results->count);
+-		WL_TRACE("results->count = %d\n", results->count);
+-		WL_TRACE("results->buflen = %d\n", results->buflen);
+-		status = le32_to_cpu(list_buf->status);
+-	} else {
+-		WL_ERROR("%s returns error %d\n", __func__, res);
+-		status = WL_SCAN_RESULTS_NO_MEM;
+-	}
+-	MUTEX_UNLOCK_WL_SCAN_SET();
+-	return status;
+-}
+-
+-static void wl_iw_force_specific_scan(iscan_info_t *iscan)
+-{
+-	WL_TRACE("%s force Specific SCAN for %s\n",
+-		 __func__, g_specific_ssid.SSID);
+-	rtnl_lock();
+-
+-	(void)dev_wlc_ioctl(iscan->dev, WLC_SCAN, &g_specific_ssid,
+-			    sizeof(g_specific_ssid));
+-
+-	rtnl_unlock();
+-}
+-
+-static void wl_iw_send_scan_complete(iscan_info_t *iscan)
+-{
+-#ifndef SANDGATE2G
+-	union iwreq_data wrqu;
+-
+-	memset(&wrqu, 0, sizeof(wrqu));
+-
+-	wireless_send_event(iscan->dev, SIOCGIWSCAN, &wrqu, NULL);
+-	WL_TRACE("Send Event ISCAN complete\n");
+-#endif
+-}
+-
+-static int _iscan_sysioc_thread(void *data)
+-{
+-	u32 status;
+-	iscan_info_t *iscan = (iscan_info_t *) data;
+-	static bool iscan_pass_abort = false;
+-
+-	allow_signal(SIGTERM);
+-	status = WL_SCAN_RESULTS_PARTIAL;
+-	while (down_interruptible(&iscan->sysioc_sem) == 0) {
+-		if (kthread_should_stop())
+-			break;
+-
+-		if (iscan->timer_on) {
+-			del_timer_sync(&iscan->timer);
+-			iscan->timer_on = 0;
+-		}
+-		rtnl_lock();
+-		status = wl_iw_iscan_get(iscan);
+-		rtnl_unlock();
+-		if (g_scan_specified_ssid && (iscan_pass_abort == true)) {
+-			WL_TRACE("%s Get results from specific scan status = %d\n",
+-				 __func__, status);
+-			wl_iw_send_scan_complete(iscan);
+-			iscan_pass_abort = false;
+-			status = -1;
+-		}
+-
+-		switch (status) {
+-		case WL_SCAN_RESULTS_PARTIAL:
+-			WL_TRACE("iscanresults incomplete\n");
+-			rtnl_lock();
+-			wl_iw_iscan(iscan, NULL, WL_SCAN_ACTION_CONTINUE);
+-			rtnl_unlock();
+-			mod_timer(&iscan->timer,
+-				  jiffies + iscan->timer_ms * HZ / 1000);
+-			iscan->timer_on = 1;
+-			break;
+-		case WL_SCAN_RESULTS_SUCCESS:
+-			WL_TRACE("iscanresults complete\n");
+-			iscan->iscan_state = ISCAN_STATE_IDLE;
+-			wl_iw_send_scan_complete(iscan);
+-			break;
+-		case WL_SCAN_RESULTS_PENDING:
+-			WL_TRACE("iscanresults pending\n");
+-			mod_timer(&iscan->timer,
+-				  jiffies + iscan->timer_ms * HZ / 1000);
+-			iscan->timer_on = 1;
+-			break;
+-		case WL_SCAN_RESULTS_ABORTED:
+-			WL_TRACE("iscanresults aborted\n");
+-			iscan->iscan_state = ISCAN_STATE_IDLE;
+-			if (g_scan_specified_ssid == 0)
+-				wl_iw_send_scan_complete(iscan);
+-			else {
+-				iscan_pass_abort = true;
+-				wl_iw_force_specific_scan(iscan);
+-			}
+-			break;
+-		case WL_SCAN_RESULTS_NO_MEM:
+-			WL_TRACE("iscanresults can't alloc memory: skip\n");
+-			iscan->iscan_state = ISCAN_STATE_IDLE;
+-			break;
+-		default:
+-			WL_TRACE("iscanresults returned unknown status %d\n",
+-				 status);
+-			break;
+-		}
+-	}
+-
+-	if (iscan->timer_on) {
+-		del_timer_sync(&iscan->timer);
+-		iscan->timer_on = 0;
+-	}
+-	return 0;
+-}
+-#endif				/* WL_IW_USE_ISCAN */
+-
+-static int
+-wl_iw_set_scan(struct net_device *dev,
+-	       struct iw_request_info *info,
+-	       union iwreq_data *wrqu, char *extra)
+-{
+-	int error;
+-	WL_TRACE("\n:%s dev:%s: SIOCSIWSCAN : SCAN\n", __func__, dev->name);
+-
+-	g_set_essid_before_scan = false;
+-#if defined(CSCAN)
+-	WL_ERROR("%s: Scan from SIOCGIWSCAN not supported\n", __func__);
+-	return -EINVAL;
+-#endif
+-
+-	if (g_onoff == G_WLAN_SET_OFF)
+-		return 0;
+-
+-	memset(&g_specific_ssid, 0, sizeof(g_specific_ssid));
+-#ifndef WL_IW_USE_ISCAN
+-	g_scan_specified_ssid = 0;
+-#endif
+-
+-#if WIRELESS_EXT > 17
+-	if (wrqu->data.length == sizeof(struct iw_scan_req)) {
+-		if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
+-			struct iw_scan_req *req = (struct iw_scan_req *)extra;
+-			if (g_scan_specified_ssid) {
+-				WL_TRACE("%s Specific SCAN is not done ignore scan for = %s\n",
+-					 __func__, req->essid);
+-				return -EBUSY;
+-			} else {
+-				g_specific_ssid.SSID_len = min_t(size_t,
+-						sizeof(g_specific_ssid.SSID),
+-						req->essid_len);
+-				memcpy(g_specific_ssid.SSID, req->essid,
+-				       g_specific_ssid.SSID_len);
+-				g_specific_ssid.SSID_len =
+-				    cpu_to_le32(g_specific_ssid.SSID_len);
+-				g_scan_specified_ssid = 1;
+-				WL_TRACE("### Specific scan ssid=%s len=%d\n",
+-					 g_specific_ssid.SSID,
+-					 g_specific_ssid.SSID_len);
+-			}
+-		}
+-	}
+-#endif				/* WIRELESS_EXT > 17 */
+-	error = dev_wlc_ioctl(dev, WLC_SCAN, &g_specific_ssid,
+-				sizeof(g_specific_ssid));
+-	if (error) {
+-		WL_TRACE("#### Set SCAN for %s failed with %d\n",
+-			 g_specific_ssid.SSID, error);
+-		g_scan_specified_ssid = 0;
+-		return -EBUSY;
+-	}
+-
+-	return 0;
+-}
+-
+-#ifdef WL_IW_USE_ISCAN
+-int wl_iw_iscan_set_scan_broadcast_prep(struct net_device *dev, uint flag)
+-{
+-	wlc_ssid_t ssid;
+-	iscan_info_t *iscan = g_iscan;
+-
+-	if (flag)
+-		rtnl_lock();
+-
+-	wl_iw_set_event_mask(dev);
+-
+-	WL_TRACE("+++: Set Broadcast ISCAN\n");
+-	memset(&ssid, 0, sizeof(ssid));
+-
+-	iscan->list_cur = iscan->list_hdr;
+-	iscan->iscan_state = ISCAN_STATE_SCANING;
+-
+-	memset(&iscan->iscan_ex_params_p->params, 0,
+-	       iscan->iscan_ex_param_size);
+-	wl_iw_iscan_prep(&iscan->iscan_ex_params_p->params, &ssid);
+-	wl_iw_iscan(iscan, &ssid, WL_SCAN_ACTION_START);
+-
+-	if (flag)
+-		rtnl_unlock();
+-
+-	mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000);
+-
+-	iscan->timer_on = 1;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_iscan_set_scan(struct net_device *dev,
+-		     struct iw_request_info *info,
+-		     union iwreq_data *wrqu, char *extra)
+-{
+-	wlc_ssid_t ssid;
+-	iscan_info_t *iscan = g_iscan;
+-
+-	WL_TRACE("%s: SIOCSIWSCAN : ISCAN\n", dev->name);
+-
+-#if defined(CSCAN)
+-	WL_ERROR("%s: Scan from SIOCGIWSCAN not supported\n", __func__);
+-	return -EINVAL;
+-#endif
+-
+-	if (g_onoff == G_WLAN_SET_OFF) {
+-		WL_TRACE("%s: driver is not up yet after START\n", __func__);
+-		return 0;
+-	}
+-#ifdef PNO_SUPPORT
+-	if (dhd_dev_get_pno_status(dev)) {
+-		WL_ERROR("%s: Scan called when PNO is active\n", __func__);
+-	}
+-#endif
+-
+-	if ((!iscan) || (!iscan->sysioc_tsk))
+-		return wl_iw_set_scan(dev, info, wrqu, extra);
+-
+-	if (g_scan_specified_ssid) {
+-		WL_TRACE("%s Specific SCAN already running ignoring BC scan\n",
+-			 __func__);
+-		return -EBUSY;
+-	}
+-
+-	memset(&ssid, 0, sizeof(ssid));
+-
+-#if WIRELESS_EXT > 17
+-	if (wrqu->data.length == sizeof(struct iw_scan_req)) {
+-		if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
+-			struct iw_scan_req *req = (struct iw_scan_req *)extra;
+-			ssid.SSID_len = min_t(size_t, sizeof(ssid.SSID),
+-						req->essid_len);
+-			memcpy(ssid.SSID, req->essid, ssid.SSID_len);
+-			ssid.SSID_len = cpu_to_le32(ssid.SSID_len);
+-		} else {
+-			g_scan_specified_ssid = 0;
+-
+-			if (iscan->iscan_state == ISCAN_STATE_SCANING) {
+-				WL_TRACE("%s ISCAN already in progress\n",
+-					 __func__);
+-				return 0;
+-			}
+-		}
+-	}
+-#endif				/* WIRELESS_EXT > 17 */
+-	wl_iw_iscan_set_scan_broadcast_prep(dev, 0);
+-
+-	return 0;
+-}
+-#endif				/* WL_IW_USE_ISCAN */
+-
+-#if WIRELESS_EXT > 17
+-static bool ie_is_wpa_ie(u8 **wpaie, u8 **tlvs, int *tlvs_len)
+-{
+-
+-	u8 *ie = *wpaie;
+-
+-	if ((ie[1] >= 6) &&
+-	    !memcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x01"), 4)) {
+-		return true;
+-	}
+-
+-	ie += ie[1] + 2;
+-	*tlvs_len -= (int)(ie - *tlvs);
+-	*tlvs = ie;
+-	return false;
+-}
+-
+-static bool ie_is_wps_ie(u8 **wpsie, u8 **tlvs, int *tlvs_len)
+-{
+-
+-	u8 *ie = *wpsie;
+-
+-	if ((ie[1] >= 4) &&
+-	    !memcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x04"), 4)) {
+-		return true;
+-	}
+-
+-	ie += ie[1] + 2;
+-	*tlvs_len -= (int)(ie - *tlvs);
+-	*tlvs = ie;
+-	return false;
+-}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-static int
+-wl_iw_handle_scanresults_ies(char **event_p, char *end,
+-			     struct iw_request_info *info, wl_bss_info_t *bi)
+-{
+-#if WIRELESS_EXT > 17
+-	struct iw_event iwe;
+-	char *event;
+-
+-	event = *event_p;
+-	if (bi->ie_length) {
+-		bcm_tlv_t *ie;
+-		u8 *ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
+-		int ptr_len = bi->ie_length;
+-
+-		ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID);
+-		if (ie) {
+-			iwe.cmd = IWEVGENIE;
+-			iwe.u.data.length = ie->len + 2;
+-			event =
+-			    IWE_STREAM_ADD_POINT(info, event, end, &iwe,
+-						 (char *)ie);
+-		}
+-		ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
+-
+-		while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) {
+-			if (ie_is_wps_ie(((u8 **)&ie), &ptr, &ptr_len)) {
+-				iwe.cmd = IWEVGENIE;
+-				iwe.u.data.length = ie->len + 2;
+-				event =
+-				    IWE_STREAM_ADD_POINT(info, event, end, &iwe,
+-							 (char *)ie);
+-				break;
+-			}
+-		}
+-
+-		ptr = ((u8 *) bi) + sizeof(wl_bss_info_t);
+-		ptr_len = bi->ie_length;
+-		while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) {
+-			if (ie_is_wpa_ie(((u8 **)&ie), &ptr, &ptr_len)) {
+-				iwe.cmd = IWEVGENIE;
+-				iwe.u.data.length = ie->len + 2;
+-				event =
+-				    IWE_STREAM_ADD_POINT(info, event, end, &iwe,
+-							 (char *)ie);
+-				break;
+-			}
+-		}
+-
+-		*event_p = event;
+-	}
+-#endif		/* WIRELESS_EXT > 17 */
+-	return 0;
+-}
+-
+-static uint
+-wl_iw_get_scan_prep(wl_scan_results_t *list,
+-		    struct iw_request_info *info, char *extra, short max_size)
+-{
+-	int i, j;
+-	struct iw_event iwe;
+-	wl_bss_info_t *bi = NULL;
+-	char *event = extra, *end = extra + max_size - WE_ADD_EVENT_FIX, *value;
+-	int ret = 0;
+-
+-	ASSERT(list);
+-
+-	for (i = 0; i < list->count && i < IW_MAX_AP; i++) {
+-		if (list->version != WL_BSS_INFO_VERSION) {
+-			WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n",
+-				 __func__, list->version);
+-			return ret;
+-		}
+-
+-		bi = bi ? (wl_bss_info_t *)((unsigned long)bi +
+-					     le32_to_cpu(bi->length)) : list->
+-		    bss_info;
+-
+-		WL_TRACE("%s : %s\n", __func__, bi->SSID);
+-
+-		iwe.cmd = SIOCGIWAP;
+-		iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+-		memcpy(iwe.u.ap_addr.sa_data, &bi->BSSID, ETH_ALEN);
+-		event =
+-		    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-					 IW_EV_ADDR_LEN);
+-		iwe.u.data.length = le32_to_cpu(bi->SSID_len);
+-		iwe.cmd = SIOCGIWESSID;
+-		iwe.u.data.flags = 1;
+-		event = IWE_STREAM_ADD_POINT(info, event, end, &iwe, bi->SSID);
+-
+-		if (le16_to_cpu(bi->capability) & (WLAN_CAPABILITY_ESS |
+-		    WLAN_CAPABILITY_IBSS)) {
+-			iwe.cmd = SIOCGIWMODE;
+-			if (le16_to_cpu(bi->capability) & WLAN_CAPABILITY_ESS)
+-				iwe.u.mode = IW_MODE_INFRA;
+-			else
+-				iwe.u.mode = IW_MODE_ADHOC;
+-			event =
+-			    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-						 IW_EV_UINT_LEN);
+-		}
+-
+-		iwe.cmd = SIOCGIWFREQ;
+-
+-		if (CHSPEC_CHANNEL(bi->chanspec) <= CH_MAX_2G_CHANNEL)
+-			iwe.u.freq.m = ieee80211_dsss_chan_to_freq(
+-						CHSPEC_CHANNEL(bi->chanspec));
+-		else
+-			iwe.u.freq.m = ieee80211_ofdm_chan_to_freq(
+-						WF_CHAN_FACTOR_5_G/2,
+-						CHSPEC_CHANNEL(bi->chanspec));
+-
+-		iwe.u.freq.e = 6;
+-		event =
+-		    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-					 IW_EV_FREQ_LEN);
+-
+-		iwe.cmd = IWEVQUAL;
+-		iwe.u.qual.qual = rssi_to_qual(le16_to_cpu(bi->RSSI));
+-		iwe.u.qual.level = 0x100 + le16_to_cpu(bi->RSSI);
+-		iwe.u.qual.noise = 0x100 + bi->phy_noise;
+-		event =
+-		    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-					 IW_EV_QUAL_LEN);
+-
+-		wl_iw_handle_scanresults_ies(&event, end, info, bi);
+-
+-		iwe.cmd = SIOCGIWENCODE;
+-		if (le16_to_cpu(bi->capability) & WLAN_CAPABILITY_PRIVACY)
+-			iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+-		else
+-			iwe.u.data.flags = IW_ENCODE_DISABLED;
+-		iwe.u.data.length = 0;
+-		event =
+-		    IWE_STREAM_ADD_POINT(info, event, end, &iwe, (char *)event);
+-
+-		if (bi->rateset.count) {
+-			if (((event - extra) +
+-				IW_EV_LCP_LEN) <= (unsigned long)end) {
+-				value = event + IW_EV_LCP_LEN;
+-				iwe.cmd = SIOCGIWRATE;
+-				iwe.u.bitrate.fixed = iwe.u.bitrate.disabled =
+-				    0;
+-				for (j = 0;
+-				     j < bi->rateset.count
+-				     && j < IW_MAX_BITRATES; j++) {
+-					iwe.u.bitrate.value =
+-					    (bi->rateset.rates[j] & 0x7f) *
+-					    500000;
+-					value =
+-					    IWE_STREAM_ADD_VALUE(info, event,
+-						 value, end, &iwe,
+-						 IW_EV_PARAM_LEN);
+-				}
+-				event = value;
+-			}
+-		}
+-	}
+-
+-	ret = event - extra;
+-	if (ret < 0) {
+-		WL_ERROR("==> Wrong size\n");
+-		ret = 0;
+-	}
+-	WL_TRACE("%s: size=%d bytes prepared\n",
+-		 __func__, (unsigned int)(event - extra));
+-	return (uint)ret;
+-}
+-
+-static int
+-wl_iw_get_scan(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+-{
+-	channel_info_t ci;
+-	wl_scan_results_t *list_merge;
+-	wl_scan_results_t *list = (wl_scan_results_t *) g_scan;
+-	int error;
+-	uint buflen_from_user = dwrq->length;
+-	uint len = G_SCAN_RESULTS;
+-	__u16 len_ret = 0;
+-#if defined(WL_IW_USE_ISCAN)
+-	iscan_info_t *iscan = g_iscan;
+-	iscan_buf_t *p_buf;
+-#endif
+-
+-	WL_TRACE("%s: buflen_from_user %d:\n", dev->name, buflen_from_user);
+-
+-	if (!extra) {
+-		WL_TRACE("%s: wl_iw_get_scan return -EINVAL\n", dev->name);
+-		return -EINVAL;
+-	}
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci, sizeof(ci));
+-	if (error)
+-		return error;
+-	ci.scan_channel = le32_to_cpu(ci.scan_channel);
+-	if (ci.scan_channel)
+-		return -EAGAIN;
+-
+-	if (g_scan_specified_ssid) {
+-		list = kmalloc(len, GFP_KERNEL);
+-		if (!list) {
+-			WL_TRACE("%s: wl_iw_get_scan return -ENOMEM\n",
+-				 dev->name);
+-			g_scan_specified_ssid = 0;
+-			return -ENOMEM;
+-		}
+-	}
+-
+-	memset(list, 0, len);
+-	list->buflen = cpu_to_le32(len);
+-	error = dev_wlc_ioctl(dev, WLC_SCAN_RESULTS, list, len);
+-	if (error) {
+-		WL_ERROR("%s: %s : Scan_results ERROR %d\n",
+-			 dev->name, __func__, error);
+-		dwrq->length = len;
+-		if (g_scan_specified_ssid) {
+-			g_scan_specified_ssid = 0;
+-			kfree(list);
+-		}
+-		return 0;
+-	}
+-	list->buflen = le32_to_cpu(list->buflen);
+-	list->version = le32_to_cpu(list->version);
+-	list->count = le32_to_cpu(list->count);
+-
+-	if (list->version != WL_BSS_INFO_VERSION) {
+-		WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n",
+-			 __func__, list->version);
+-		if (g_scan_specified_ssid) {
+-			g_scan_specified_ssid = 0;
+-			kfree(list);
+-		}
+-		return -EINVAL;
+-	}
+-
+-	if (g_scan_specified_ssid) {
+-		WL_TRACE("%s: Specified scan APs in the list =%d\n",
+-			 __func__, list->count);
+-		len_ret =
+-		    (__u16) wl_iw_get_scan_prep(list, info, extra,
+-						buflen_from_user);
+-		kfree(list);
+-
+-#if defined(WL_IW_USE_ISCAN)
+-		p_buf = iscan->list_hdr;
+-		while (p_buf != iscan->list_cur) {
+-			list_merge =
+-			    &((wl_iscan_results_t *) p_buf->iscan_buf)->results;
+-			WL_TRACE("%s: Bcast APs list=%d\n",
+-				 __func__, list_merge->count);
+-			if (list_merge->count > 0)
+-				len_ret +=
+-				    (__u16) wl_iw_get_scan_prep(list_merge,
+-					info, extra + len_ret,
+-					buflen_from_user - len_ret);
+-			p_buf = p_buf->next;
+-		}
+-#else
+-		list_merge = (wl_scan_results_t *) g_scan;
+-		WL_TRACE("%s: Bcast APs list=%d\n",
+-			 __func__, list_merge->count);
+-		if (list_merge->count > 0)
+-			len_ret +=
+-			    (__u16) wl_iw_get_scan_prep(list_merge, info,
+-							extra + len_ret,
+-							buflen_from_user -
+-							len_ret);
+-#endif				/* defined(WL_IW_USE_ISCAN) */
+-	} else {
+-		list = (wl_scan_results_t *) g_scan;
+-		len_ret =
+-		    (__u16) wl_iw_get_scan_prep(list, info, extra,
+-						buflen_from_user);
+-	}
+-
+-#if defined(WL_IW_USE_ISCAN)
+-	g_scan_specified_ssid = 0;
+-#endif
+-	if ((len_ret + WE_ADD_EVENT_FIX) < buflen_from_user)
+-		len = len_ret;
+-
+-	dwrq->length = len;
+-	dwrq->flags = 0;
+-
+-	WL_TRACE("%s return to WE %d bytes APs=%d\n",
+-		 __func__, dwrq->length, list->count);
+-	return 0;
+-}
+-
+-#if defined(WL_IW_USE_ISCAN)
+-static int
+-wl_iw_iscan_get_scan(struct net_device *dev,
+-		     struct iw_request_info *info,
+-		     struct iw_point *dwrq, char *extra)
+-{
+-	wl_scan_results_t *list;
+-	struct iw_event iwe;
+-	wl_bss_info_t *bi = NULL;
+-	int ii, j;
+-	int apcnt;
+-	char *event = extra, *end = extra + dwrq->length, *value;
+-	iscan_info_t *iscan = g_iscan;
+-	iscan_buf_t *p_buf;
+-	u32 counter = 0;
+-	u8 channel;
+-
+-	WL_TRACE("%s %s buflen_from_user %d:\n",
+-		 dev->name, __func__, dwrq->length);
+-
+-	if (!extra) {
+-		WL_TRACE("%s: INVALID SIOCGIWSCAN GET bad parameter\n",
+-			 dev->name);
+-		return -EINVAL;
+-	}
+-
+-	if ((!iscan) || (!iscan->sysioc_tsk)) {
+-		WL_ERROR("%ssysioc_tsk\n", __func__);
+-		return wl_iw_get_scan(dev, info, dwrq, extra);
+-	}
+-
+-	if (iscan->iscan_state == ISCAN_STATE_SCANING) {
+-		WL_TRACE("%s: SIOCGIWSCAN GET still scanning\n", dev->name);
+-		return -EAGAIN;
+-	}
+-
+-	WL_TRACE("%s: SIOCGIWSCAN GET broadcast results\n", dev->name);
+-	apcnt = 0;
+-	p_buf = iscan->list_hdr;
+-	while (p_buf != iscan->list_cur) {
+-		list = &((wl_iscan_results_t *) p_buf->iscan_buf)->results;
+-
+-		counter += list->count;
+-
+-		if (list->version != WL_BSS_INFO_VERSION) {
+-			WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n",
+-				 __func__, list->version);
+-			return -EINVAL;
+-		}
+-
+-		bi = NULL;
+-		for (ii = 0; ii < list->count && apcnt < IW_MAX_AP;
+-		     apcnt++, ii++) {
+-			bi = bi ? (wl_bss_info_t *)((unsigned long)bi +
+-						     le32_to_cpu(bi->length)) :
+-			    list->bss_info;
+-			ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <=
+-			       ((unsigned long)list + WLC_IW_ISCAN_MAXLEN));
+-
+-			if (event + ETH_ALEN + bi->SSID_len +
+-			    IW_EV_UINT_LEN + IW_EV_FREQ_LEN + IW_EV_QUAL_LEN >=
+-			    end)
+-				return -E2BIG;
+-			iwe.cmd = SIOCGIWAP;
+-			iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
+-			memcpy(iwe.u.ap_addr.sa_data, &bi->BSSID,
+-			       ETH_ALEN);
+-			event =
+-			    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-						 IW_EV_ADDR_LEN);
+-
+-			iwe.u.data.length = le32_to_cpu(bi->SSID_len);
+-			iwe.cmd = SIOCGIWESSID;
+-			iwe.u.data.flags = 1;
+-			event =
+-			    IWE_STREAM_ADD_POINT(info, event, end, &iwe,
+-						 bi->SSID);
+-
+-			if (le16_to_cpu(bi->capability) &
+-			    (WLAN_CAPABILITY_ESS | WLAN_CAPABILITY_IBSS)) {
+-				iwe.cmd = SIOCGIWMODE;
+-				if (le16_to_cpu(bi->capability) &
+-				    WLAN_CAPABILITY_ESS)
+-					iwe.u.mode = IW_MODE_INFRA;
+-				else
+-					iwe.u.mode = IW_MODE_ADHOC;
+-				event =
+-				    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-							 IW_EV_UINT_LEN);
+-			}
+-
+-			iwe.cmd = SIOCGIWFREQ;
+-			channel =
+-			    (bi->ctl_ch ==
+-			     0) ? CHSPEC_CHANNEL(bi->chanspec) : bi->ctl_ch;
+-
+-			if (channel <= CH_MAX_2G_CHANNEL)
+-				iwe.u.freq.m =
+-					ieee80211_dsss_chan_to_freq(channel);
+-			else
+-				iwe.u.freq.m = ieee80211_ofdm_chan_to_freq(
+-							WF_CHAN_FACTOR_5_G/2,
+-							channel);
+-
+-			iwe.u.freq.e = 6;
+-			event =
+-			    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-						 IW_EV_FREQ_LEN);
+-
+-			iwe.cmd = IWEVQUAL;
+-			iwe.u.qual.qual = rssi_to_qual(le16_to_cpu(bi->RSSI));
+-			iwe.u.qual.level = 0x100 + le16_to_cpu(bi->RSSI);
+-			iwe.u.qual.noise = 0x100 + bi->phy_noise;
+-			event =
+-			    IWE_STREAM_ADD_EVENT(info, event, end, &iwe,
+-						 IW_EV_QUAL_LEN);
+-
+-			wl_iw_handle_scanresults_ies(&event, end, info, bi);
+-
+-			iwe.cmd = SIOCGIWENCODE;
+-			if (le16_to_cpu(bi->capability) &
+-			    WLAN_CAPABILITY_PRIVACY)
+-				iwe.u.data.flags =
+-				    IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
+-			else
+-				iwe.u.data.flags = IW_ENCODE_DISABLED;
+-			iwe.u.data.length = 0;
+-			event =
+-			    IWE_STREAM_ADD_POINT(info, event, end, &iwe,
+-						 (char *)event);
+-
+-			if (bi->rateset.count) {
+-				if (event + IW_MAX_BITRATES * IW_EV_PARAM_LEN >=
+-				    end)
+-					return -E2BIG;
+-
+-				value = event + IW_EV_LCP_LEN;
+-				iwe.cmd = SIOCGIWRATE;
+-				iwe.u.bitrate.fixed = iwe.u.bitrate.disabled =
+-				    0;
+-				for (j = 0;
+-				     j < bi->rateset.count
+-				     && j < IW_MAX_BITRATES; j++) {
+-					iwe.u.bitrate.value =
+-					    (bi->rateset.rates[j] & 0x7f) *
+-					    500000;
+-					value =
+-					    IWE_STREAM_ADD_VALUE(info, event,
+-						 value, end,
+-						 &iwe,
+-						 IW_EV_PARAM_LEN);
+-				}
+-				event = value;
+-			}
+-		}
+-		p_buf = p_buf->next;
+-	}
+-
+-	dwrq->length = event - extra;
+-	dwrq->flags = 0;
+-
+-	WL_TRACE("%s return to WE %d bytes APs=%d\n",
+-		 __func__, dwrq->length, counter);
+-
+-	if (!dwrq->length)
+-		return -EAGAIN;
+-
+-	return 0;
+-}
+-#endif				/* defined(WL_IW_USE_ISCAN) */
+-
+-static int
+-wl_iw_set_essid(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_point *dwrq, char *extra)
+-{
+-	int error;
+-	wl_join_params_t join_params;
+-	int join_params_size;
+-
+-	WL_TRACE("%s: SIOCSIWESSID\n", dev->name);
+-
+-	if (g_set_essid_before_scan)
+-		return -EAGAIN;
+-
+-	memset(&g_ssid, 0, sizeof(g_ssid));
+-
+-	CHECK_EXTRA_FOR_NULL(extra);
+-
+-	if (dwrq->length && extra) {
+-#if WIRELESS_EXT > 20
+-		g_ssid.SSID_len = min_t(size_t, sizeof(g_ssid.SSID),
+-					dwrq->length);
+-#else
+-		g_ssid.SSID_len = min_t(size_t, sizeof(g_ssid.SSID),
+-					dwrq->length - 1);
+-#endif
+-		memcpy(g_ssid.SSID, extra, g_ssid.SSID_len);
+-	} else {
+-		g_ssid.SSID_len = 0;
+-	}
+-	g_ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len);
+-
+-	memset(&join_params, 0, sizeof(join_params));
+-	join_params_size = sizeof(join_params.ssid);
+-
+-	memcpy(&join_params.ssid.SSID, g_ssid.SSID, g_ssid.SSID_len);
+-	join_params.ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len);
+-	memcpy(join_params.params.bssid, ether_bcast, ETH_ALEN);
+-
+-	wl_iw_ch_to_chanspec(g_wl_iw_params.target_channel, &join_params,
+-			     &join_params_size);
+-
+-	error = dev_wlc_ioctl(dev, WLC_SET_SSID, &join_params,
+-				join_params_size);
+-	if (error)
+-		WL_ERROR("Invalid ioctl data=%d\n", error);
+-
+-	if (g_ssid.SSID_len) {
+-		WL_TRACE("%s: join SSID=%s ch=%d\n",
+-			 __func__, g_ssid.SSID, g_wl_iw_params.target_channel);
+-	}
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_essid(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_point *dwrq, char *extra)
+-{
+-	wlc_ssid_t ssid;
+-	int error;
+-
+-	WL_TRACE("%s: SIOCGIWESSID\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_SSID, &ssid, sizeof(ssid));
+-	if (error) {
+-		WL_ERROR("Error getting the SSID\n");
+-		return error;
+-	}
+-
+-	ssid.SSID_len = le32_to_cpu(ssid.SSID_len);
+-
+-	memcpy(extra, ssid.SSID, ssid.SSID_len);
+-
+-	dwrq->length = ssid.SSID_len;
+-
+-	dwrq->flags = 1;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_nick(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+-{
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-
+-	WL_TRACE("%s: SIOCSIWNICKN\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	if (dwrq->length > sizeof(iw->nickname))
+-		return -E2BIG;
+-
+-	memcpy(iw->nickname, extra, dwrq->length);
+-	iw->nickname[dwrq->length - 1] = '\0';
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_nick(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_point *dwrq, char *extra)
+-{
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-
+-	WL_TRACE("%s: SIOCGIWNICKN\n", dev->name);
+-
+-	if (!extra)
+-		return -EINVAL;
+-
+-	strcpy(extra, iw->nickname);
+-	dwrq->length = strlen(extra) + 1;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_rate(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	wl_rateset_t rateset;
+-	int error, rate, i, error_bg, error_a;
+-
+-	WL_TRACE("%s: SIOCSIWRATE\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_CURR_RATESET, &rateset,
+-				sizeof(rateset));
+-	if (error)
+-		return error;
+-
+-	rateset.count = le32_to_cpu(rateset.count);
+-
+-	if (vwrq->value < 0)
+-		rate = rateset.rates[rateset.count - 1] & 0x7f;
+-	else if (vwrq->value < rateset.count)
+-		rate = rateset.rates[vwrq->value] & 0x7f;
+-	else
+-		rate = vwrq->value / 500000;
+-
+-	if (vwrq->fixed) {
+-		error_bg = dev_wlc_intvar_set(dev, "bg_rate", rate);
+-		error_a = dev_wlc_intvar_set(dev, "a_rate", rate);
+-
+-		if (error_bg && error_a)
+-			return error_bg | error_a;
+-	} else {
+-		error_bg = dev_wlc_intvar_set(dev, "bg_rate", 0);
+-		error_a = dev_wlc_intvar_set(dev, "a_rate", 0);
+-
+-		if (error_bg && error_a)
+-			return error_bg | error_a;
+-
+-		for (i = 0; i < rateset.count; i++)
+-			if ((rateset.rates[i] & 0x7f) > rate)
+-				break;
+-		rateset.count = cpu_to_le32(i);
+-
+-		error = dev_wlc_ioctl(dev, WLC_SET_RATESET, &rateset,
+-					sizeof(rateset));
+-		if (error)
+-			return error;
+-	}
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_rate(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	int error, rate;
+-
+-	WL_TRACE("%s: SIOCGIWRATE\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_RATE, &rate, sizeof(rate));
+-	if (error)
+-		return error;
+-	rate = le32_to_cpu(rate);
+-	vwrq->value = rate * 500000;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_rts(struct net_device *dev,
+-	      struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	int error, rts;
+-
+-	WL_TRACE("%s: SIOCSIWRTS\n", dev->name);
+-
+-	if (vwrq->disabled)
+-		rts = DOT11_DEFAULT_RTS_LEN;
+-	else if (vwrq->value < 0 || vwrq->value > DOT11_DEFAULT_RTS_LEN)
+-		return -EINVAL;
+-	else
+-		rts = vwrq->value;
+-
+-	error = dev_wlc_intvar_set(dev, "rtsthresh", rts);
+-	if (error)
+-		return error;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_rts(struct net_device *dev,
+-	      struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	int error, rts;
+-
+-	WL_TRACE("%s: SIOCGIWRTS\n", dev->name);
+-
+-	error = dev_wlc_intvar_get(dev, "rtsthresh", &rts);
+-	if (error)
+-		return error;
+-
+-	vwrq->value = rts;
+-	vwrq->disabled = (rts >= DOT11_DEFAULT_RTS_LEN);
+-	vwrq->fixed = 1;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_frag(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	int error, frag;
+-
+-	WL_TRACE("%s: SIOCSIWFRAG\n", dev->name);
+-
+-	if (vwrq->disabled)
+-		frag = DOT11_DEFAULT_FRAG_LEN;
+-	else if (vwrq->value < 0 || vwrq->value > DOT11_DEFAULT_FRAG_LEN)
+-		return -EINVAL;
+-	else
+-		frag = vwrq->value;
+-
+-	error = dev_wlc_intvar_set(dev, "fragthresh", frag);
+-	if (error)
+-		return error;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_frag(struct net_device *dev,
+-	       struct iw_request_info *info, struct iw_param *vwrq, char *extra)
+-{
+-	int error, fragthreshold;
+-
+-	WL_TRACE("%s: SIOCGIWFRAG\n", dev->name);
+-
+-	error = dev_wlc_intvar_get(dev, "fragthresh", &fragthreshold);
+-	if (error)
+-		return error;
+-
+-	vwrq->value = fragthreshold;
+-	vwrq->disabled = (fragthreshold >= DOT11_DEFAULT_FRAG_LEN);
+-	vwrq->fixed = 1;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_txpow(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, disable;
+-	u16 txpwrmw;
+-	WL_TRACE("%s: SIOCSIWTXPOW\n", dev->name);
+-
+-	disable = vwrq->disabled ? WL_RADIO_SW_DISABLE : 0;
+-	disable += WL_RADIO_SW_DISABLE << 16;
+-
+-	disable = cpu_to_le32(disable);
+-	error = dev_wlc_ioctl(dev, WLC_SET_RADIO, &disable, sizeof(disable));
+-	if (error)
+-		return error;
+-
+-	if (disable & WL_RADIO_SW_DISABLE)
+-		return 0;
+-
+-	if (!(vwrq->flags & IW_TXPOW_MWATT))
+-		return -EINVAL;
+-
+-	if (vwrq->value < 0)
+-		return 0;
+-
+-	if (vwrq->value > 0xffff)
+-		txpwrmw = 0xffff;
+-	else
+-		txpwrmw = (u16) vwrq->value;
+-
+-	error =
+-	    dev_wlc_intvar_set(dev, "qtxpower", (int)(bcm_mw_to_qdbm(txpwrmw)));
+-	return error;
+-}
+-
+-static int
+-wl_iw_get_txpow(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, disable, txpwrdbm;
+-	u8 result;
+-
+-	WL_TRACE("%s: SIOCGIWTXPOW\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_RADIO, &disable, sizeof(disable));
+-	if (error)
+-		return error;
+-
+-	error = dev_wlc_intvar_get(dev, "qtxpower", &txpwrdbm);
+-	if (error)
+-		return error;
+-
+-	disable = le32_to_cpu(disable);
+-	result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE);
+-	vwrq->value = (s32) bcm_qdbm_to_mw(result);
+-	vwrq->fixed = 0;
+-	vwrq->disabled =
+-	    (disable & (WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE)) ? 1 : 0;
+-	vwrq->flags = IW_TXPOW_MWATT;
+-
+-	return 0;
+-}
+-
+-#if WIRELESS_EXT > 10
+-static int
+-wl_iw_set_retry(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, lrl, srl;
+-
+-	WL_TRACE("%s: SIOCSIWRETRY\n", dev->name);
+-
+-	if (vwrq->disabled || (vwrq->flags & IW_RETRY_LIFETIME))
+-		return -EINVAL;
+-
+-	if (vwrq->flags & IW_RETRY_LIMIT) {
+-
+-#if WIRELESS_EXT > 20
+-		if ((vwrq->flags & IW_RETRY_LONG)
+-		    || (vwrq->flags & IW_RETRY_MAX)
+-		    || !((vwrq->flags & IW_RETRY_SHORT)
+-			 || (vwrq->flags & IW_RETRY_MIN))) {
+-#else
+-		if ((vwrq->flags & IW_RETRY_MAX)
+-		    || !(vwrq->flags & IW_RETRY_MIN)) {
+-#endif
+-			lrl = cpu_to_le32(vwrq->value);
+-			error = dev_wlc_ioctl(dev, WLC_SET_LRL, &lrl,
+-						sizeof(lrl));
+-			if (error)
+-				return error;
+-		}
+-#if WIRELESS_EXT > 20
+-		if ((vwrq->flags & IW_RETRY_SHORT)
+-		    || (vwrq->flags & IW_RETRY_MIN)
+-		    || !((vwrq->flags & IW_RETRY_LONG)
+-			 || (vwrq->flags & IW_RETRY_MAX))) {
+-#else
+-		if ((vwrq->flags & IW_RETRY_MIN)
+-		    || !(vwrq->flags & IW_RETRY_MAX)) {
+-#endif
+-			srl = cpu_to_le32(vwrq->value);
+-			error = dev_wlc_ioctl(dev, WLC_SET_SRL, &srl,
+-						sizeof(srl));
+-			if (error)
+-				return error;
+-		}
+-	}
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_retry(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, lrl, srl;
+-
+-	WL_TRACE("%s: SIOCGIWRETRY\n", dev->name);
+-
+-	vwrq->disabled = 0;
+-
+-	if ((vwrq->flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME)
+-		return -EINVAL;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_LRL, &lrl, sizeof(lrl));
+-	if (error)
+-		return error;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_SRL, &srl, sizeof(srl));
+-	if (error)
+-		return error;
+-
+-	lrl = le32_to_cpu(lrl);
+-	srl = le32_to_cpu(srl);
+-
+-	if (vwrq->flags & IW_RETRY_MAX) {
+-		vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX;
+-		vwrq->value = lrl;
+-	} else {
+-		vwrq->flags = IW_RETRY_LIMIT;
+-		vwrq->value = srl;
+-		if (srl != lrl)
+-			vwrq->flags |= IW_RETRY_MIN;
+-	}
+-
+-	return 0;
+-}
+-#endif				/* WIRELESS_EXT > 10 */
+-
+-static int
+-wl_iw_set_encode(struct net_device *dev,
+-		 struct iw_request_info *info,
+-		 struct iw_point *dwrq, char *extra)
+-{
+-	wl_wsec_key_t key;
+-	int error, val, wsec;
+-
+-	WL_TRACE("%s: SIOCSIWENCODE\n", dev->name);
+-
+-	memset(&key, 0, sizeof(key));
+-
+-	if ((dwrq->flags & IW_ENCODE_INDEX) == 0) {
+-		for (key.index = 0; key.index < DOT11_MAX_DEFAULT_KEYS;
+-		     key.index++) {
+-			val = cpu_to_le32(key.index);
+-			error = dev_wlc_ioctl(dev, WLC_GET_KEY_PRIMARY, &val,
+-						sizeof(val));
+-			if (error)
+-				return error;
+-			val = le32_to_cpu(val);
+-			if (val)
+-				break;
+-		}
+-		if (key.index == DOT11_MAX_DEFAULT_KEYS)
+-			key.index = 0;
+-	} else {
+-		key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+-		if (key.index >= DOT11_MAX_DEFAULT_KEYS)
+-			return -EINVAL;
+-	}
+-
+-	if (!extra || !dwrq->length || (dwrq->flags & IW_ENCODE_NOKEY)) {
+-		val = cpu_to_le32(key.index);
+-		error = dev_wlc_ioctl(dev, WLC_SET_KEY_PRIMARY, &val,
+-					sizeof(val));
+-		if (error)
+-			return error;
+-	} else {
+-		key.len = dwrq->length;
+-
+-		if (dwrq->length > sizeof(key.data))
+-			return -EINVAL;
+-
+-		memcpy(key.data, extra, dwrq->length);
+-
+-		key.flags = WL_PRIMARY_KEY;
+-		switch (key.len) {
+-		case WLAN_KEY_LEN_WEP40:
+-			key.algo = CRYPTO_ALGO_WEP1;
+-			break;
+-		case WLAN_KEY_LEN_WEP104:
+-			key.algo = CRYPTO_ALGO_WEP128;
+-			break;
+-		case WLAN_KEY_LEN_TKIP:
+-			key.algo = CRYPTO_ALGO_TKIP;
+-			break;
+-		case WLAN_KEY_LEN_AES_CMAC:
+-			key.algo = CRYPTO_ALGO_AES_CCM;
+-			break;
+-		default:
+-			return -EINVAL;
+-		}
+-
+-		swap_key_from_BE(&key);
+-		error = dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-		if (error)
+-			return error;
+-	}
+-
+-	val = (dwrq->flags & IW_ENCODE_DISABLED) ? 0 : WEP_ENABLED;
+-
+-	error = dev_wlc_intvar_get(dev, "wsec", &wsec);
+-	if (error)
+-		return error;
+-
+-	wsec &= ~(WEP_ENABLED);
+-	wsec |= val;
+-
+-	error = dev_wlc_intvar_set(dev, "wsec", wsec);
+-	if (error)
+-		return error;
+-
+-	val = (dwrq->flags & IW_ENCODE_RESTRICTED) ? 1 : 0;
+-	val = cpu_to_le32(val);
+-	error = dev_wlc_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val));
+-	if (error)
+-		return error;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_encode(struct net_device *dev,
+-		 struct iw_request_info *info,
+-		 struct iw_point *dwrq, char *extra)
+-{
+-	wl_wsec_key_t key;
+-	int error, val, wsec, auth;
+-
+-	WL_TRACE("%s: SIOCGIWENCODE\n", dev->name);
+-
+-	memset(&key, 0, sizeof(wl_wsec_key_t));
+-
+-	if ((dwrq->flags & IW_ENCODE_INDEX) == 0) {
+-		for (key.index = 0; key.index < DOT11_MAX_DEFAULT_KEYS;
+-		     key.index++) {
+-			val = key.index;
+-			error = dev_wlc_ioctl(dev, WLC_GET_KEY_PRIMARY, &val,
+-						sizeof(val));
+-			if (error)
+-				return error;
+-			val = le32_to_cpu(val);
+-			if (val)
+-				break;
+-		}
+-	} else
+-		key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+-
+-	if (key.index >= DOT11_MAX_DEFAULT_KEYS)
+-		key.index = 0;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec));
+-	if (error)
+-		return error;
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_AUTH, &auth, sizeof(auth));
+-	if (error)
+-		return error;
+-
+-	swap_key_to_BE(&key);
+-
+-	wsec = le32_to_cpu(wsec);
+-	auth = le32_to_cpu(auth);
+-	dwrq->length = min_t(u16, WLAN_MAX_KEY_LEN, key.len);
+-
+-	dwrq->flags = key.index + 1;
+-	if (!(wsec & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)))
+-		dwrq->flags |= IW_ENCODE_DISABLED;
+-
+-	if (auth)
+-		dwrq->flags |= IW_ENCODE_RESTRICTED;
+-
+-	if (dwrq->length && extra)
+-		memcpy(extra, key.data, dwrq->length);
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_power(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, pm;
+-
+-	WL_TRACE("%s: SIOCSIWPOWER\n", dev->name);
+-
+-	pm = vwrq->disabled ? PM_OFF : PM_MAX;
+-
+-	pm = cpu_to_le32(pm);
+-	error = dev_wlc_ioctl(dev, WLC_SET_PM, &pm, sizeof(pm));
+-	if (error)
+-		return error;
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_power(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	int error, pm;
+-
+-	WL_TRACE("%s: SIOCGIWPOWER\n", dev->name);
+-
+-	error = dev_wlc_ioctl(dev, WLC_GET_PM, &pm, sizeof(pm));
+-	if (error)
+-		return error;
+-
+-	pm = le32_to_cpu(pm);
+-	vwrq->disabled = pm ? 0 : 1;
+-	vwrq->flags = IW_POWER_ALL_R;
+-
+-	return 0;
+-}
+-
+-#if WIRELESS_EXT > 17
+-static int
+-wl_iw_set_wpaie(struct net_device *dev,
+-		struct iw_request_info *info, struct iw_point *iwp, char *extra)
+-{
+-
+-	WL_TRACE("%s: SIOCSIWGENIE\n", dev->name);
+-
+-	CHECK_EXTRA_FOR_NULL(extra);
+-
+-	dev_wlc_bufvar_set(dev, "wpaie", extra, iwp->length);
+-
+-	return 0;
+-}
+-
+-static int
+-wl_iw_get_wpaie(struct net_device *dev,
+-		struct iw_request_info *info, struct iw_point *iwp, char *extra)
+-{
+-	WL_TRACE("%s: SIOCGIWGENIE\n", dev->name);
+-	iwp->length = 64;
+-	dev_wlc_bufvar_get(dev, "wpaie", extra, iwp->length);
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_encodeext(struct net_device *dev,
+-		    struct iw_request_info *info,
+-		    struct iw_point *dwrq, char *extra)
+-{
+-	wl_wsec_key_t key;
+-	int error;
+-	struct iw_encode_ext *iwe;
+-
+-	WL_TRACE("%s: SIOCSIWENCODEEXT\n", dev->name);
+-
+-	CHECK_EXTRA_FOR_NULL(extra);
+-
+-	memset(&key, 0, sizeof(key));
+-	iwe = (struct iw_encode_ext *)extra;
+-
+-	if (dwrq->flags & IW_ENCODE_DISABLED) {
+-
+-	}
+-
+-	key.index = 0;
+-	if (dwrq->flags & IW_ENCODE_INDEX)
+-		key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
+-
+-	key.len = iwe->key_len;
+-
+-	if (!is_multicast_ether_addr(iwe->addr.sa_data))
+-		memcpy(&key.ea, &iwe->addr.sa_data, ETH_ALEN);
+-
+-	if (key.len == 0) {
+-		if (iwe->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
+-			WL_WSEC("Changing the the primary Key to %d\n",
+-				key.index);
+-			key.index = cpu_to_le32(key.index);
+-			error = dev_wlc_ioctl(dev, WLC_SET_KEY_PRIMARY,
+-					      &key.index, sizeof(key.index));
+-			if (error)
+-				return error;
+-		} else {
+-			swap_key_from_BE(&key);
+-			dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-		}
+-	} else {
+-		if (iwe->key_len > sizeof(key.data))
+-			return -EINVAL;
+-
+-		WL_WSEC("Setting the key index %d\n", key.index);
+-		if (iwe->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
+-			WL_WSEC("key is a Primary Key\n");
+-			key.flags = WL_PRIMARY_KEY;
+-		}
+-
+-		memcpy(key.data, iwe->key, iwe->key_len);
+-
+-		if (iwe->alg == IW_ENCODE_ALG_TKIP) {
+-			u8 keybuf[8];
+-			memcpy(keybuf, &key.data[24], sizeof(keybuf));
+-			memcpy(&key.data[24], &key.data[16], sizeof(keybuf));
+-			memcpy(&key.data[16], keybuf, sizeof(keybuf));
+-		}
+-
+-		if (iwe->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) {
+-			unsigned char *ivptr;
+-			ivptr = (unsigned char *) iwe->rx_seq;
+-			key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) |
+-			    (ivptr[3] << 8) | ivptr[2];
+-			key.rxiv.lo = (ivptr[1] << 8) | ivptr[0];
+-			key.iv_initialized = true;
+-		}
+-
+-		switch (iwe->alg) {
+-		case IW_ENCODE_ALG_NONE:
+-			key.algo = CRYPTO_ALGO_OFF;
+-			break;
+-		case IW_ENCODE_ALG_WEP:
+-			if (iwe->key_len == WLAN_KEY_LEN_WEP40)
+-				key.algo = CRYPTO_ALGO_WEP1;
+-			else
+-				key.algo = CRYPTO_ALGO_WEP128;
+-			break;
+-		case IW_ENCODE_ALG_TKIP:
+-			key.algo = CRYPTO_ALGO_TKIP;
+-			break;
+-		case IW_ENCODE_ALG_CCMP:
+-			key.algo = CRYPTO_ALGO_AES_CCM;
+-			break;
+-		default:
+-			break;
+-		}
+-		swap_key_from_BE(&key);
+-
+-		dhd_wait_pend8021x(dev);
+-
+-		error = dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key));
+-		if (error)
+-			return error;
+-	}
+-	return 0;
+-}
+-
+-#if WIRELESS_EXT > 17
+-struct {
+-	pmkid_list_t pmkids;
+-	pmkid_t foo[MAXPMKID - 1];
+-} pmkid_list;
+-
+-static int
+-wl_iw_set_pmksa(struct net_device *dev,
+-		struct iw_request_info *info,
+-		struct iw_param *vwrq, char *extra)
+-{
+-	struct iw_pmksa *iwpmksa;
+-	uint i;
+-	int ret = 0;
+-
+-	WL_WSEC("%s: SIOCSIWPMKSA\n", dev->name);
+-
+-	CHECK_EXTRA_FOR_NULL(extra);
+-
+-	iwpmksa = (struct iw_pmksa *)extra;
+-
+-	if (iwpmksa->cmd == IW_PMKSA_FLUSH) {
+-		WL_WSEC("wl_iw_set_pmksa - IW_PMKSA_FLUSH\n");
+-		memset((char *)&pmkid_list, 0, sizeof(pmkid_list));
+-	}
+-
+-	else if (iwpmksa->cmd == IW_PMKSA_REMOVE) {
+-		{
+-			pmkid_list_t pmkid, *pmkidptr;
+-			uint j;
+-			pmkidptr = &pmkid;
+-
+-			memcpy(&pmkidptr->pmkid[0].BSSID,
+-			       &iwpmksa->bssid.sa_data[0],
+-			       ETH_ALEN);
+-			memcpy(&pmkidptr->pmkid[0].PMKID,
+-			       &iwpmksa->pmkid[0],
+-			       WLAN_PMKID_LEN);
+-
+-			WL_WSEC("wl_iw_set_pmksa:IW_PMKSA_REMOVE:PMKID: "
+-				"%pM = ", &pmkidptr->pmkid[0].BSSID);
+-			for (j = 0; j < WLAN_PMKID_LEN; j++)
+-				WL_WSEC("%02x ", pmkidptr->pmkid[0].PMKID[j]);
+-			WL_WSEC("\n");
+-		}
+-
+-		for (i = 0; i < pmkid_list.pmkids.npmkid; i++)
+-			if (!memcmp
+-			    (&iwpmksa->bssid.sa_data[0],
+-			     &pmkid_list.pmkids.pmkid[i].BSSID, ETH_ALEN))
+-				break;
+-
+-		if ((pmkid_list.pmkids.npmkid > 0)
+-		    && (i < pmkid_list.pmkids.npmkid)) {
+-			memset(&pmkid_list.pmkids.pmkid[i], 0, sizeof(pmkid_t));
+-			for (; i < (pmkid_list.pmkids.npmkid - 1); i++) {
+-				memcpy(&pmkid_list.pmkids.pmkid[i].BSSID,
+-				       &pmkid_list.pmkids.pmkid[i + 1].BSSID,
+-				       ETH_ALEN);
+-				memcpy(&pmkid_list.pmkids.pmkid[i].PMKID,
+-				       &pmkid_list.pmkids.pmkid[i + 1].PMKID,
+-				       WLAN_PMKID_LEN);
+-			}
+-			pmkid_list.pmkids.npmkid--;
+-		} else
+-			ret = -EINVAL;
+-	}
+-
+-	else if (iwpmksa->cmd == IW_PMKSA_ADD) {
+-		for (i = 0; i < pmkid_list.pmkids.npmkid; i++)
+-			if (!memcmp
+-			    (&iwpmksa->bssid.sa_data[0],
+-			     &pmkid_list.pmkids.pmkid[i].BSSID, ETH_ALEN))
+-				break;
+-		if (i < MAXPMKID) {
+-			memcpy(&pmkid_list.pmkids.pmkid[i].BSSID,
+-			       &iwpmksa->bssid.sa_data[0],
+-			       ETH_ALEN);
+-			memcpy(&pmkid_list.pmkids.pmkid[i].PMKID,
+-			       &iwpmksa->pmkid[0],
+-			       WLAN_PMKID_LEN);
+-			if (i == pmkid_list.pmkids.npmkid)
+-				pmkid_list.pmkids.npmkid++;
+-		} else
+-			ret = -EINVAL;
+-		{
+-			uint j;
+-			uint k;
+-			k = pmkid_list.pmkids.npmkid;
+-			WL_WSEC("wl_iw_set_pmksa,IW_PMKSA_ADD - PMKID: %pM = ",
+-				&pmkid_list.pmkids.pmkid[k].BSSID);
+-			for (j = 0; j < WLAN_PMKID_LEN; j++)
+-				WL_WSEC("%02x ",
+-					pmkid_list.pmkids.pmkid[k].PMKID[j]);
+-			WL_WSEC("\n");
+-		}
+-	}
+-	WL_WSEC("PRINTING pmkid LIST - No of elements %d\n",
+-		pmkid_list.pmkids.npmkid);
+-	for (i = 0; i < pmkid_list.pmkids.npmkid; i++) {
+-		uint j;
+-		WL_WSEC("PMKID[%d]: %pM = ",
+-			i, &pmkid_list.pmkids.pmkid[i].BSSID);
+-		for (j = 0; j < WLAN_PMKID_LEN; j++)
+-			WL_WSEC("%02x ", pmkid_list.pmkids.pmkid[i].PMKID[j]);
+-		WL_WSEC("\n");
+-	}
+-	WL_WSEC("\n");
+-
+-	if (!ret)
+-		ret = dev_wlc_bufvar_set(dev, "pmkid_info", (char *)&pmkid_list,
+-					 sizeof(pmkid_list));
+-	return ret;
+-}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-static int
+-wl_iw_get_encodeext(struct net_device *dev,
+-		    struct iw_request_info *info,
+-		    struct iw_param *vwrq, char *extra)
+-{
+-	WL_TRACE("%s: SIOCGIWENCODEEXT\n", dev->name);
+-	return 0;
+-}
+-
+-static int
+-wl_iw_set_wpaauth(struct net_device *dev,
+-		  struct iw_request_info *info,
+-		  struct iw_param *vwrq, char *extra)
+-{
+-	int error = 0;
+-	int paramid;
+-	int paramval;
+-	int val = 0;
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-
+-	WL_TRACE("%s: SIOCSIWAUTH\n", dev->name);
+-
+-	paramid = vwrq->flags & IW_AUTH_INDEX;
+-	paramval = vwrq->value;
+-
+-	WL_TRACE("%s: SIOCSIWAUTH, paramid = 0x%0x, paramval = 0x%0x\n",
+-		 dev->name, paramid, paramval);
+-
+-	switch (paramid) {
+-	case IW_AUTH_WPA_VERSION:
+-		if (paramval & IW_AUTH_WPA_VERSION_DISABLED)
+-			val = WPA_AUTH_DISABLED;
+-		else if (paramval & (IW_AUTH_WPA_VERSION_WPA))
+-			val = WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED;
+-		else if (paramval & IW_AUTH_WPA_VERSION_WPA2)
+-			val = WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED;
+-		WL_INFORM("%s: %d: setting wpa_auth to 0x%0x\n",
+-			  __func__, __LINE__, val);
+-		error = dev_wlc_intvar_set(dev, "wpa_auth", val);
+-		if (error)
+-			return error;
+-		break;
+-	case IW_AUTH_CIPHER_PAIRWISE:
+-	case IW_AUTH_CIPHER_GROUP:
+-		if (paramval & (IW_AUTH_CIPHER_WEP40 | IW_AUTH_CIPHER_WEP104))
+-			val = WEP_ENABLED;
+-		if (paramval & IW_AUTH_CIPHER_TKIP)
+-			val = TKIP_ENABLED;
+-		if (paramval & IW_AUTH_CIPHER_CCMP)
+-			val = AES_ENABLED;
+-
+-		if (paramid == IW_AUTH_CIPHER_PAIRWISE) {
+-			iw->pwsec = val;
+-			val |= iw->gwsec;
+-		} else {
+-			iw->gwsec = val;
+-			val |= iw->pwsec;
+-		}
+-
+-		if (iw->privacy_invoked && !val) {
+-			WL_WSEC("%s: %s: 'Privacy invoked' true but clearing wsec, assuming we're a WPS enrollee\n",
+-				dev->name, __func__);
+-			error = dev_wlc_intvar_set(dev, "is_WPS_enrollee",
+-							true);
+-			if (error) {
+-				WL_WSEC("Failed to set is_WPS_enrollee\n");
+-				return error;
+-			}
+-		} else if (val) {
+-			error = dev_wlc_intvar_set(dev, "is_WPS_enrollee",
+-							false);
+-			if (error) {
+-				WL_WSEC("Failed to clear is_WPS_enrollee\n");
+-				return error;
+-			}
+-		}
+-
+-		error = dev_wlc_intvar_set(dev, "wsec", val);
+-		if (error)
+-			return error;
+-
+-		break;
+-
+-	case IW_AUTH_KEY_MGMT:
+-		error = dev_wlc_intvar_get(dev, "wpa_auth", &val);
+-		if (error)
+-			return error;
+-
+-		if (val & (WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED)) {
+-			if (paramval & IW_AUTH_KEY_MGMT_PSK)
+-				val = WPA_AUTH_PSK;
+-			else
+-				val = WPA_AUTH_UNSPECIFIED;
+-		} else if (val & (WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED)) {
+-			if (paramval & IW_AUTH_KEY_MGMT_PSK)
+-				val = WPA2_AUTH_PSK;
+-			else
+-				val = WPA2_AUTH_UNSPECIFIED;
+-		}
+-		WL_INFORM("%s: %d: setting wpa_auth to %d\n",
+-			  __func__, __LINE__, val);
+-		error = dev_wlc_intvar_set(dev, "wpa_auth", val);
+-		if (error)
+-			return error;
+-
+-		break;
+-	case IW_AUTH_TKIP_COUNTERMEASURES:
+-		dev_wlc_bufvar_set(dev, "tkip_countermeasures",
+-				   (char *)&paramval, 1);
+-		break;
+-
+-	case IW_AUTH_80211_AUTH_ALG:
+-		WL_INFORM("Setting the D11auth %d\n", paramval);
+-		if (paramval == IW_AUTH_ALG_OPEN_SYSTEM)
+-			val = 0;
+-		else if (paramval == IW_AUTH_ALG_SHARED_KEY)
+-			val = 1;
+-		else if (paramval ==
+-			 (IW_AUTH_ALG_OPEN_SYSTEM | IW_AUTH_ALG_SHARED_KEY))
+-			val = 2;
+-		else
+-			error = 1;
+-		if (!error) {
+-			error = dev_wlc_intvar_set(dev, "auth", val);
+-			if (error)
+-				return error;
+-		}
+-		break;
+-
+-	case IW_AUTH_WPA_ENABLED:
+-		if (paramval == 0) {
+-			iw->pwsec = 0;
+-			iw->gwsec = 0;
+-			error = dev_wlc_intvar_get(dev, "wsec", &val);
+-			if (error)
+-				return error;
+-			if (val & (TKIP_ENABLED | AES_ENABLED)) {
+-				val &= ~(TKIP_ENABLED | AES_ENABLED);
+-				dev_wlc_intvar_set(dev, "wsec", val);
+-			}
+-			val = 0;
+-			WL_INFORM("%s: %d: setting wpa_auth to %d\n",
+-				  __func__, __LINE__, val);
+-			dev_wlc_intvar_set(dev, "wpa_auth", 0);
+-			return error;
+-		}
+-		break;
+-
+-	case IW_AUTH_DROP_UNENCRYPTED:
+-		dev_wlc_bufvar_set(dev, "wsec_restrict", (char *)&paramval, 1);
+-		break;
+-
+-	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+-		dev_wlc_bufvar_set(dev, "rx_unencrypted_eapol",
+-				   (char *)&paramval, 1);
+-		break;
+-
+-#if WIRELESS_EXT > 17
+-	case IW_AUTH_ROAMING_CONTROL:
+-		WL_INFORM("%s: IW_AUTH_ROAMING_CONTROL\n", __func__);
+-		break;
+-	case IW_AUTH_PRIVACY_INVOKED:
+-		{
+-			int wsec;
+-
+-			if (paramval == 0) {
+-				iw->privacy_invoked = false;
+-				error = dev_wlc_intvar_set(dev,
+-						"is_WPS_enrollee", false);
+-				if (error) {
+-					WL_WSEC("Failed to clear iovar is_WPS_enrollee\n");
+-					return error;
+-				}
+-			} else {
+-				iw->privacy_invoked = true;
+-				error = dev_wlc_intvar_get(dev, "wsec", &wsec);
+-				if (error)
+-					return error;
+-
+-				if (!(IW_WSEC_ENABLED(wsec))) {
+-					error = dev_wlc_intvar_set(dev,
+-							"is_WPS_enrollee",
+-							true);
+-					if (error) {
+-						WL_WSEC("Failed to set iovar is_WPS_enrollee\n");
+-						return error;
+-					}
+-				} else {
+-					error = dev_wlc_intvar_set(dev,
+-							"is_WPS_enrollee",
+-							false);
+-					if (error) {
+-						WL_WSEC("Failed to clear is_WPS_enrollee\n");
+-						return error;
+-					}
+-				}
+-			}
+-			break;
+-		}
+-#endif				/* WIRELESS_EXT > 17 */
+-	default:
+-		break;
+-	}
+-	return 0;
+-}
+-
+-#define VAL_PSK(_val) (((_val) & WPA_AUTH_PSK) || ((_val) & WPA2_AUTH_PSK))
+-
+-static int
+-wl_iw_get_wpaauth(struct net_device *dev,
+-		  struct iw_request_info *info,
+-		  struct iw_param *vwrq, char *extra)
+-{
+-	int error;
+-	int paramid;
+-	int paramval = 0;
+-	int val;
+-	wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev);
+-
+-	WL_TRACE("%s: SIOCGIWAUTH\n", dev->name);
+-
+-	paramid = vwrq->flags & IW_AUTH_INDEX;
+-
+-	switch (paramid) {
+-	case IW_AUTH_WPA_VERSION:
+-		error = dev_wlc_intvar_get(dev, "wpa_auth", &val);
+-		if (error)
+-			return error;
+-		if (val & (WPA_AUTH_NONE | WPA_AUTH_DISABLED))
+-			paramval = IW_AUTH_WPA_VERSION_DISABLED;
+-		else if (val & (WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED))
+-			paramval = IW_AUTH_WPA_VERSION_WPA;
+-		else if (val & (WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED))
+-			paramval = IW_AUTH_WPA_VERSION_WPA2;
+-		break;
+-	case IW_AUTH_CIPHER_PAIRWISE:
+-	case IW_AUTH_CIPHER_GROUP:
+-		if (paramid == IW_AUTH_CIPHER_PAIRWISE)
+-			val = iw->pwsec;
+-		else
+-			val = iw->gwsec;
+-
+-		paramval = 0;
+-		if (val) {
+-			if (val & WEP_ENABLED)
+-				paramval |=
+-				    (IW_AUTH_CIPHER_WEP40 |
+-				     IW_AUTH_CIPHER_WEP104);
+-			if (val & TKIP_ENABLED)
+-				paramval |= (IW_AUTH_CIPHER_TKIP);
+-			if (val & AES_ENABLED)
+-				paramval |= (IW_AUTH_CIPHER_CCMP);
+-		} else
+-			paramval = IW_AUTH_CIPHER_NONE;
+-		break;
+-	case IW_AUTH_KEY_MGMT:
+-		error = dev_wlc_intvar_get(dev, "wpa_auth", &val);
+-		if (error)
+-			return error;
+-		if (VAL_PSK(val))
+-			paramval = IW_AUTH_KEY_MGMT_PSK;
+-		else
+-			paramval = IW_AUTH_KEY_MGMT_802_1X;
+-
+-		break;
+-	case IW_AUTH_TKIP_COUNTERMEASURES:
+-		dev_wlc_bufvar_get(dev, "tkip_countermeasures",
+-				   (char *)&paramval, 1);
+-		break;
+-
+-	case IW_AUTH_DROP_UNENCRYPTED:
+-		dev_wlc_bufvar_get(dev, "wsec_restrict", (char *)&paramval, 1);
+-		break;
+-
+-	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
+-		dev_wlc_bufvar_get(dev, "rx_unencrypted_eapol",
+-				   (char *)&paramval, 1);
+-		break;
+-
+-	case IW_AUTH_80211_AUTH_ALG:
+-		error = dev_wlc_intvar_get(dev, "auth", &val);
+-		if (error)
+-			return error;
+-		if (!val)
+-			paramval = IW_AUTH_ALG_OPEN_SYSTEM;
+-		else
+-			paramval = IW_AUTH_ALG_SHARED_KEY;
+-		break;
+-	case IW_AUTH_WPA_ENABLED:
+-		error = dev_wlc_intvar_get(dev, "wpa_auth", &val);
+-		if (error)
+-			return error;
+-		if (val)
+-			paramval = true;
+-		else
+-			paramval = false;
+-		break;
+-#if WIRELESS_EXT > 17
+-	case IW_AUTH_ROAMING_CONTROL:
+-		WL_ERROR("%s: IW_AUTH_ROAMING_CONTROL\n", __func__);
+-		break;
+-	case IW_AUTH_PRIVACY_INVOKED:
+-		paramval = iw->privacy_invoked;
+-		break;
+-
+-#endif
+-	}
+-	vwrq->value = paramval;
+-	return 0;
+-}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-static const iw_handler wl_iw_handler[] = {
+-	(iw_handler) wl_iw_config_commit,
+-	(iw_handler) wl_iw_get_name,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_set_freq,
+-	(iw_handler) wl_iw_get_freq,
+-	(iw_handler) wl_iw_set_mode,
+-	(iw_handler) wl_iw_get_mode,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_get_range,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_set_spy,
+-	(iw_handler) wl_iw_get_spy,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_set_wap,
+-	(iw_handler) wl_iw_get_wap,
+-#if WIRELESS_EXT > 17
+-	(iw_handler) wl_iw_mlme,
+-#else
+-	(iw_handler) NULL,
+-#endif
+-#if defined(WL_IW_USE_ISCAN)
+-	(iw_handler) wl_iw_iscan_get_aplist,
+-#else
+-	(iw_handler) wl_iw_get_aplist,
+-#endif
+-#if WIRELESS_EXT > 13
+-#if defined(WL_IW_USE_ISCAN)
+-	(iw_handler) wl_iw_iscan_set_scan,
+-	(iw_handler) wl_iw_iscan_get_scan,
+-#else
+-	(iw_handler) wl_iw_set_scan,
+-	(iw_handler) wl_iw_get_scan,
+-#endif
+-#else
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-#endif				/* WIRELESS_EXT > 13 */
+-	(iw_handler) wl_iw_set_essid,
+-	(iw_handler) wl_iw_get_essid,
+-	(iw_handler) wl_iw_set_nick,
+-	(iw_handler) wl_iw_get_nick,
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_set_rate,
+-	(iw_handler) wl_iw_get_rate,
+-	(iw_handler) wl_iw_set_rts,
+-	(iw_handler) wl_iw_get_rts,
+-	(iw_handler) wl_iw_set_frag,
+-	(iw_handler) wl_iw_get_frag,
+-	(iw_handler) wl_iw_set_txpow,
+-	(iw_handler) wl_iw_get_txpow,
+-#if WIRELESS_EXT > 10
+-	(iw_handler) wl_iw_set_retry,
+-	(iw_handler) wl_iw_get_retry,
+-#endif
+-	(iw_handler) wl_iw_set_encode,
+-	(iw_handler) wl_iw_get_encode,
+-	(iw_handler) wl_iw_set_power,
+-	(iw_handler) wl_iw_get_power,
+-#if WIRELESS_EXT > 17
+-	(iw_handler) NULL,
+-	(iw_handler) NULL,
+-	(iw_handler) wl_iw_set_wpaie,
+-	(iw_handler) wl_iw_get_wpaie,
+-	(iw_handler) wl_iw_set_wpaauth,
+-	(iw_handler) wl_iw_get_wpaauth,
+-	(iw_handler) wl_iw_set_encodeext,
+-	(iw_handler) wl_iw_get_encodeext,
+-	(iw_handler) wl_iw_set_pmksa,
+-#endif				/* WIRELESS_EXT > 17 */
+-};
+-
+-#if WIRELESS_EXT > 12
+-
+-const struct iw_handler_def wl_iw_handler_def = {
+-	.num_standard = ARRAY_SIZE(wl_iw_handler),
+-	.standard = (iw_handler *) wl_iw_handler,
+-	.num_private = 0,
+-	.num_private_args = 0,
+-	.private = 0,
+-	.private_args = 0,
+-
+-#if WIRELESS_EXT >= 19
+-	.get_wireless_stats = NULL,
+-#endif
+-};
+-#endif				/* WIRELESS_EXT > 12 */
+-
+-int wl_iw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+-{
+-	struct iwreq *wrq = (struct iwreq *)rq;
+-	struct iw_request_info info;
+-	iw_handler handler;
+-	char *extra = NULL;
+-	int token_size = 1, max_tokens = 0, ret = 0;
+-
+-	WL_TRACE("\n%s, cmd:%x alled via dhd->do_ioctl()entry point\n",
+-		 __func__, cmd);
+-	if (cmd < SIOCIWFIRST ||
+-		IW_IOCTL_IDX(cmd) >= ARRAY_SIZE(wl_iw_handler)) {
+-		WL_ERROR("%s: error in cmd=%x : out of range\n",
+-			 __func__, cmd);
+-		return -EOPNOTSUPP;
+-	}
+-
+-	handler = wl_iw_handler[IW_IOCTL_IDX(cmd)];
+-	if (!handler) {
+-		WL_ERROR("%s: error in cmd=%x : not supported\n",
+-			 __func__, cmd);
+-		return -EOPNOTSUPP;
+-	}
+-
+-	switch (cmd) {
+-
+-	case SIOCSIWESSID:
+-	case SIOCGIWESSID:
+-	case SIOCSIWNICKN:
+-	case SIOCGIWNICKN:
+-		max_tokens = IW_ESSID_MAX_SIZE + 1;
+-		break;
+-
+-	case SIOCSIWENCODE:
+-	case SIOCGIWENCODE:
+-#if WIRELESS_EXT > 17
+-	case SIOCSIWENCODEEXT:
+-	case SIOCGIWENCODEEXT:
+-#endif
+-		max_tokens = wrq->u.data.length;
+-		break;
+-
+-	case SIOCGIWRANGE:
+-		max_tokens = sizeof(struct iw_range) + 500;
+-		break;
+-
+-	case SIOCGIWAPLIST:
+-		token_size =
+-		    sizeof(struct sockaddr) + sizeof(struct iw_quality);
+-		max_tokens = IW_MAX_AP;
+-		break;
+-
+-#if WIRELESS_EXT > 13
+-	case SIOCGIWSCAN:
+-#if defined(WL_IW_USE_ISCAN)
+-		if (g_iscan)
+-			max_tokens = wrq->u.data.length;
+-		else
+-#endif
+-			max_tokens = IW_SCAN_MAX_DATA;
+-		break;
+-#endif				/* WIRELESS_EXT > 13 */
+-
+-	case SIOCSIWSPY:
+-		token_size = sizeof(struct sockaddr);
+-		max_tokens = IW_MAX_SPY;
+-		break;
+-
+-	case SIOCGIWSPY:
+-		token_size =
+-		    sizeof(struct sockaddr) + sizeof(struct iw_quality);
+-		max_tokens = IW_MAX_SPY;
+-		break;
+-
+-#if WIRELESS_EXT > 17
+-	case SIOCSIWPMKSA:
+-	case SIOCSIWGENIE:
+-#endif
+-	case SIOCSIWPRIV:
+-		max_tokens = wrq->u.data.length;
+-		break;
+-	}
+-
+-	if (max_tokens && wrq->u.data.pointer) {
+-		if (wrq->u.data.length > max_tokens) {
+-			WL_ERROR("%s: error in cmd=%x wrq->u.data.length=%d > max_tokens=%d\n",
+-				 __func__, cmd, wrq->u.data.length, max_tokens);
+-			return -E2BIG;
+-		}
+-		extra = kmalloc(max_tokens * token_size, GFP_KERNEL);
+-		if (!extra)
+-			return -ENOMEM;
+-
+-		if (copy_from_user
+-		    (extra, wrq->u.data.pointer,
+-		     wrq->u.data.length * token_size)) {
+-			kfree(extra);
+-			return -EFAULT;
+-		}
+-	}
+-
+-	info.cmd = cmd;
+-	info.flags = 0;
+-
+-	ret = handler(dev, &info, &wrq->u, extra);
+-
+-	if (extra) {
+-		if (copy_to_user
+-		    (wrq->u.data.pointer, extra,
+-		     wrq->u.data.length * token_size)) {
+-			kfree(extra);
+-			return -EFAULT;
+-		}
+-
+-		kfree(extra);
+-	}
+-
+-	return ret;
+-}
+-
+-bool
+-wl_iw_conn_status_str(u32 event_type, u32 status, u32 reason,
+-		      char *stringBuf, uint buflen)
+-{
+-	typedef struct conn_fail_event_map_t {
+-		u32 inEvent;
+-		u32 inStatus;
+-		u32 inReason;
+-		const char *outName;
+-		const char *outCause;
+-	} conn_fail_event_map_t;
+-
+-#define WL_IW_DONT_CARE	9999
+-	const conn_fail_event_map_t event_map[] = {
+-		{WLC_E_SET_SSID, WLC_E_STATUS_SUCCESS, WL_IW_DONT_CARE,
+-		 "Conn", "Success"},
+-		{WLC_E_SET_SSID, WLC_E_STATUS_NO_NETWORKS, WL_IW_DONT_CARE,
+-		 "Conn", "NoNetworks"},
+-		{WLC_E_SET_SSID, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE,
+-		 "Conn", "ConfigMismatch"},
+-		{WLC_E_PRUNE, WL_IW_DONT_CARE, WLC_E_PRUNE_ENCR_MISMATCH,
+-		 "Conn", "EncrypMismatch"},
+-		{WLC_E_PRUNE, WL_IW_DONT_CARE, WLC_E_RSN_MISMATCH,
+-		 "Conn", "RsnMismatch"},
+-		{WLC_E_AUTH, WLC_E_STATUS_TIMEOUT, WL_IW_DONT_CARE,
+-		 "Conn", "AuthTimeout"},
+-		{WLC_E_AUTH, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE,
+-		 "Conn", "AuthFail"},
+-		{WLC_E_AUTH, WLC_E_STATUS_NO_ACK, WL_IW_DONT_CARE,
+-		 "Conn", "AuthNoAck"},
+-		{WLC_E_REASSOC, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE,
+-		 "Conn", "ReassocFail"},
+-		{WLC_E_REASSOC, WLC_E_STATUS_TIMEOUT, WL_IW_DONT_CARE,
+-		 "Conn", "ReassocTimeout"},
+-		{WLC_E_REASSOC, WLC_E_STATUS_ABORT, WL_IW_DONT_CARE,
+-		 "Conn", "ReassocAbort"},
+-		{WLC_E_PSK_SUP, WLC_SUP_KEYED, WL_IW_DONT_CARE,
+-		 "Sup", "ConnSuccess"},
+-		{WLC_E_PSK_SUP, WL_IW_DONT_CARE, WL_IW_DONT_CARE,
+-		 "Sup", "WpaHandshakeFail"},
+-		{WLC_E_DEAUTH_IND, WL_IW_DONT_CARE, WL_IW_DONT_CARE,
+-		 "Conn", "Deauth"},
+-		{WLC_E_DISASSOC_IND, WL_IW_DONT_CARE, WL_IW_DONT_CARE,
+-		 "Conn", "DisassocInd"},
+-		{WLC_E_DISASSOC, WL_IW_DONT_CARE, WL_IW_DONT_CARE,
+-		 "Conn", "Disassoc"}
+-	};
+-
+-	const char *name = "";
+-	const char *cause = NULL;
+-	int i;
+-
+-	for (i = 0; i < sizeof(event_map) / sizeof(event_map[0]); i++) {
+-		const conn_fail_event_map_t *row = &event_map[i];
+-		if (row->inEvent == event_type &&
+-		    (row->inStatus == status
+-		     || row->inStatus == WL_IW_DONT_CARE)
+-		    && (row->inReason == reason
+-			|| row->inReason == WL_IW_DONT_CARE)) {
+-			name = row->outName;
+-			cause = row->outCause;
+-			break;
+-		}
+-	}
+-
+-	if (cause) {
+-		memset(stringBuf, 0, buflen);
+-		snprintf(stringBuf, buflen, "%s %s %02d %02d",
+-			 name, cause, status, reason);
+-		WL_INFORM("Connection status: %s\n", stringBuf);
+-		return true;
+-	} else {
+-		return false;
+-	}
+-}
+-
+-#if WIRELESS_EXT > 14
+-
+-static bool
+-wl_iw_check_conn_fail(wl_event_msg_t *e, char *stringBuf, uint buflen)
+-{
+-	u32 event = be32_to_cpu(e->event_type);
+-	u32 status = be32_to_cpu(e->status);
+-	u32 reason = be32_to_cpu(e->reason);
+-
+-	if (wl_iw_conn_status_str(event, status, reason, stringBuf, buflen)) {
+-		return true;
+-	} else
+-		return false;
+-}
+-#endif
+-
+-#ifndef IW_CUSTOM_MAX
+-#define IW_CUSTOM_MAX 256
+-#endif
+-
+-void wl_iw_event(struct net_device *dev, wl_event_msg_t *e, void *data)
+-{
+-#if WIRELESS_EXT > 13
+-	union iwreq_data wrqu;
+-	char extra[IW_CUSTOM_MAX + 1];
+-	int cmd = 0;
+-	u32 event_type = be32_to_cpu(e->event_type);
+-	u16 flags = be16_to_cpu(e->flags);
+-	u32 datalen = be32_to_cpu(e->datalen);
+-	u32 status = be32_to_cpu(e->status);
+-	wl_iw_t *iw;
+-	u32 toto;
+-	memset(&wrqu, 0, sizeof(wrqu));
+-	memset(extra, 0, sizeof(extra));
+-	iw = 0;
+-
+-	if (!dev) {
+-		WL_ERROR("%s: dev is null\n", __func__);
+-		return;
+-	}
+-
+-	iw = *(wl_iw_t **) netdev_priv(dev);
+-
+-	WL_TRACE("%s: dev=%s event=%d\n", __func__, dev->name, event_type);
+-
+-	switch (event_type) {
+-	case WLC_E_TXFAIL:
+-		cmd = IWEVTXDROP;
+-		memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN);
+-		wrqu.addr.sa_family = ARPHRD_ETHER;
+-		break;
+-#if WIRELESS_EXT > 14
+-	case WLC_E_JOIN:
+-	case WLC_E_ASSOC_IND:
+-	case WLC_E_REASSOC_IND:
+-		memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN);
+-		wrqu.addr.sa_family = ARPHRD_ETHER;
+-		cmd = IWEVREGISTERED;
+-		break;
+-	case WLC_E_DEAUTH_IND:
+-	case WLC_E_DISASSOC_IND:
+-		cmd = SIOCGIWAP;
+-		memset(wrqu.addr.sa_data, 0, ETH_ALEN);
+-		wrqu.addr.sa_family = ARPHRD_ETHER;
+-		memset(&extra, 0, ETH_ALEN);
+-		break;
+-	case WLC_E_LINK:
+-	case WLC_E_NDIS_LINK:
+-		cmd = SIOCGIWAP;
+-		if (!(flags & WLC_EVENT_MSG_LINK)) {
+-			memset(wrqu.addr.sa_data, 0, ETH_ALEN);
+-			memset(&extra, 0, ETH_ALEN);
+-		} else {
+-			memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN);
+-			WL_TRACE("Link UP\n");
+-
+-		}
+-		wrqu.addr.sa_family = ARPHRD_ETHER;
+-		break;
+-	case WLC_E_ACTION_FRAME:
+-		cmd = IWEVCUSTOM;
+-		if (datalen + 1 <= sizeof(extra)) {
+-			wrqu.data.length = datalen + 1;
+-			extra[0] = WLC_E_ACTION_FRAME;
+-			memcpy(&extra[1], data, datalen);
+-			WL_TRACE("WLC_E_ACTION_FRAME len %d\n",
+-				 wrqu.data.length);
+-		}
+-		break;
+-
+-	case WLC_E_ACTION_FRAME_COMPLETE:
+-		cmd = IWEVCUSTOM;
+-		memcpy(&toto, data, 4);
+-		if (sizeof(status) + 1 <= sizeof(extra)) {
+-			wrqu.data.length = sizeof(status) + 1;
+-			extra[0] = WLC_E_ACTION_FRAME_COMPLETE;
+-			memcpy(&extra[1], &status, sizeof(status));
+-			WL_TRACE("wl_iw_event status %d PacketId %d\n", status,
+-				 toto);
+-			WL_TRACE("WLC_E_ACTION_FRAME_COMPLETE len %d\n",
+-				 wrqu.data.length);
+-		}
+-		break;
+-#endif				/* WIRELESS_EXT > 14 */
+-#if WIRELESS_EXT > 17
+-	case WLC_E_MIC_ERROR:
+-		{
+-			struct iw_michaelmicfailure *micerrevt =
+-			    (struct iw_michaelmicfailure *)&extra;
+-			cmd = IWEVMICHAELMICFAILURE;
+-			wrqu.data.length = sizeof(struct iw_michaelmicfailure);
+-			if (flags & WLC_EVENT_MSG_GROUP)
+-				micerrevt->flags |= IW_MICFAILURE_GROUP;
+-			else
+-				micerrevt->flags |= IW_MICFAILURE_PAIRWISE;
+-			memcpy(micerrevt->src_addr.sa_data, &e->addr,
+-			       ETH_ALEN);
+-			micerrevt->src_addr.sa_family = ARPHRD_ETHER;
+-
+-			break;
+-		}
+-	case WLC_E_PMKID_CACHE:
+-		{
+-			if (data) {
+-				struct iw_pmkid_cand *iwpmkidcand =
+-				    (struct iw_pmkid_cand *)&extra;
+-				pmkid_cand_list_t *pmkcandlist;
+-				pmkid_cand_t *pmkidcand;
+-				int count;
+-
+-				cmd = IWEVPMKIDCAND;
+-				pmkcandlist = data;
+-				count = get_unaligned_be32(&pmkcandlist->
+-							   npmkid_cand);
+-				ASSERT(count >= 0);
+-				wrqu.data.length = sizeof(struct iw_pmkid_cand);
+-				pmkidcand = pmkcandlist->pmkid_cand;
+-				while (count) {
+-					memset(iwpmkidcand, 0,
+-					      sizeof(struct iw_pmkid_cand));
+-					if (pmkidcand->preauth)
+-						iwpmkidcand->flags |=
+-						    IW_PMKID_CAND_PREAUTH;
+-					memcpy(&iwpmkidcand->bssid.sa_data,
+-					       &pmkidcand->BSSID,
+-					       ETH_ALEN);
+-#ifndef SANDGATE2G
+-					wireless_send_event(dev, cmd, &wrqu,
+-							    extra);
+-#endif
+-					pmkidcand++;
+-					count--;
+-				}
+-			}
+-			return;
+-		}
+-#endif				/* WIRELESS_EXT > 17 */
+-
+-	case WLC_E_SCAN_COMPLETE:
+-#if defined(WL_IW_USE_ISCAN)
+-		if ((g_iscan) && (g_iscan->sysioc_tsk) &&
+-		    (g_iscan->iscan_state != ISCAN_STATE_IDLE)) {
+-			up(&g_iscan->sysioc_sem);
+-		} else {
+-			cmd = SIOCGIWSCAN;
+-			wrqu.data.length = strlen(extra);
+-			WL_TRACE("Event WLC_E_SCAN_COMPLETE from specific scan %d\n",
+-				 g_iscan->iscan_state);
+-		}
+-#else
+-		cmd = SIOCGIWSCAN;
+-		wrqu.data.length = strlen(extra);
+-		WL_TRACE("Event WLC_E_SCAN_COMPLETE\n");
+-#endif
+-		break;
+-
+-	case WLC_E_PFN_NET_FOUND:
+-		{
+-			wlc_ssid_t *ssid;
+-			ssid = (wlc_ssid_t *) data;
+-			WL_ERROR("%s Event WLC_E_PFN_NET_FOUND, send %s up : find %s len=%d\n",
+-				 __func__, PNO_EVENT_UP,
+-				 ssid->SSID, ssid->SSID_len);
+-			cmd = IWEVCUSTOM;
+-			memset(&wrqu, 0, sizeof(wrqu));
+-			strcpy(extra, PNO_EVENT_UP);
+-			wrqu.data.length = strlen(extra);
+-		}
+-		break;
+-
+-	default:
+-		WL_TRACE("Unknown Event %d: ignoring\n", event_type);
+-		break;
+-	}
+-#ifndef SANDGATE2G
+-	if (cmd) {
+-		if (cmd == SIOCGIWSCAN)
+-			wireless_send_event(dev, cmd, &wrqu, NULL);
+-		else
+-			wireless_send_event(dev, cmd, &wrqu, extra);
+-	}
+-#endif
+-
+-#if WIRELESS_EXT > 14
+-	memset(extra, 0, sizeof(extra));
+-	if (wl_iw_check_conn_fail(e, extra, sizeof(extra))) {
+-		cmd = IWEVCUSTOM;
+-		wrqu.data.length = strlen(extra);
+-#ifndef SANDGATE2G
+-		wireless_send_event(dev, cmd, &wrqu, extra);
+-#endif
+-	}
+-#endif				/* WIRELESS_EXT > 14 */
+-#endif				/* WIRELESS_EXT > 13 */
+-}
+-
+-int wl_iw_attach(struct net_device *dev, void *dhdp)
+-{
+-	int params_size;
+-	wl_iw_t *iw;
+-#if defined(WL_IW_USE_ISCAN)
+-	iscan_info_t *iscan = NULL;
+-
+-	if (!dev)
+-		return 0;
+-
+-	memset(&g_wl_iw_params, 0, sizeof(wl_iw_extra_params_t));
+-
+-#ifdef CSCAN
+-	params_size =
+-	    (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params)) +
+-	    (WL_NUMCHANNELS * sizeof(u16)) +
+-	    WL_SCAN_PARAMS_SSID_MAX * sizeof(wlc_ssid_t);
+-#else
+-	params_size =
+-	    (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params));
+-#endif
+-	iscan = kzalloc(sizeof(iscan_info_t), GFP_KERNEL);
+-
+-	if (!iscan)
+-		return -ENOMEM;
+-
+-	iscan->iscan_ex_params_p = kmalloc(params_size, GFP_KERNEL);
+-	if (!iscan->iscan_ex_params_p) {
+-		kfree(iscan);
+-		return -ENOMEM;
+-	}
+-	iscan->iscan_ex_param_size = params_size;
+-	iscan->sysioc_tsk = NULL;
+-
+-	g_iscan = iscan;
+-	iscan->dev = dev;
+-	iscan->iscan_state = ISCAN_STATE_IDLE;
+-
+-	iscan->timer_ms = 3000;
+-	init_timer(&iscan->timer);
+-	iscan->timer.data = (unsigned long) iscan;
+-	iscan->timer.function = wl_iw_timerfunc;
+-
+-	sema_init(&iscan->sysioc_sem, 0);
+-	iscan->sysioc_tsk = kthread_run(_iscan_sysioc_thread, iscan,
+-					"_iscan_sysioc");
+-	if (IS_ERR(iscan->sysioc_tsk)) {
+-		iscan->sysioc_tsk = NULL;
+-		return -ENOMEM;
+-	}
+-#endif				/* defined(WL_IW_USE_ISCAN) */
+-
+-	iw = *(wl_iw_t **) netdev_priv(dev);
+-	iw->pub = (dhd_pub_t *) dhdp;
+-	MUTEX_LOCK_INIT(iw->pub);
+-	MUTEX_LOCK_WL_SCAN_SET_INIT();
+-#ifdef SOFTAP
+-	priv_dev = dev;
+-	MUTEX_LOCK_SOFTAP_SET_INIT(iw->pub);
+-#endif
+-	g_scan = kzalloc(G_SCAN_RESULTS, GFP_KERNEL);
+-	if (!g_scan)
+-		return -ENOMEM;
+-
+-	g_scan_specified_ssid = 0;
+-
+-	return 0;
+-}
+-
+-void wl_iw_detach(void)
+-{
+-#if defined(WL_IW_USE_ISCAN)
+-	iscan_buf_t *buf;
+-	iscan_info_t *iscan = g_iscan;
+-
+-	if (!iscan)
+-		return;
+-	if (iscan->sysioc_tsk) {
+-		send_sig(SIGTERM, iscan->sysioc_tsk, 1);
+-		kthread_stop(iscan->sysioc_tsk);
+-		iscan->sysioc_tsk = NULL;
+-	}
+-
+-	MUTEX_LOCK_WL_SCAN_SET();
+-	while (iscan->list_hdr) {
+-		buf = iscan->list_hdr->next;
+-		kfree(iscan->list_hdr);
+-		iscan->list_hdr = buf;
+-	}
+-	MUTEX_UNLOCK_WL_SCAN_SET();
+-	kfree(iscan->iscan_ex_params_p);
+-	kfree(iscan);
+-	g_iscan = NULL;
+-#endif				/* WL_IW_USE_ISCAN */
+-
+-	kfree(g_scan);
+-
+-	g_scan = NULL;
+-}
+-
+-#if defined(BCMDBG)
+-void osl_assert(char *exp, char *file, int line)
+-{
+-	char tempbuf[256];
+-	char *basename;
+-
+-	basename = strrchr(file, '/');
+-	/* skip the '/' */
+-	if (basename)
+-		basename++;
+-
+-	if (!basename)
+-		basename = file;
+-
+-	snprintf(tempbuf, 256,
+-		 "assertion \"%s\" failed: file \"%s\", line %d\n", exp,
+-		 basename, line);
+-
+-	/*
+-	 * Print assert message and give it time to
+-	 * be written to /var/log/messages
+-	 */
+-	if (!in_interrupt()) {
+-		const int delay = 3;
+-		printk(KERN_ERR "%s", tempbuf);
+-		printk(KERN_ERR "panic in %d seconds\n", delay);
+-		set_current_state(TASK_INTERRUPTIBLE);
+-		schedule_timeout(delay * HZ);
+-	}
+-
+-	switch (g_assert_type) {
+-	case 0:
+-		panic(KERN_ERR "%s", tempbuf);
+-		break;
+-	case 1:
+-		printk(KERN_ERR "%s", tempbuf);
+-		BUG();
+-		break;
+-	case 2:
+-		printk(KERN_ERR "%s", tempbuf);
+-		break;
+-	default:
+-		break;
+-	}
+-}
+-#endif				/* defined(BCMDBG) */
+diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.h b/drivers/staging/brcm80211/brcmfmac/wl_iw.h
+deleted file mode 100644
+index fe06174..0000000
+--- a/drivers/staging/brcm80211/brcmfmac/wl_iw.h
++++ /dev/null
+@@ -1,142 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef _wl_iw_h_
+-#define _wl_iw_h_
+-
+-#include <linux/wireless.h>
+-
+-#include <wlioctl.h>
+-
+-#define WL_SCAN_PARAMS_SSID_MAX	10
+-#define GET_SSID	"SSID="
+-#define GET_CHANNEL	"CH="
+-#define GET_NPROBE 			"NPROBE="
+-#define GET_ACTIVE_ASSOC_DWELL  	"ACTIVE="
+-#define GET_PASSIVE_ASSOC_DWELL	"PASSIVE="
+-#define GET_HOME_DWELL		"HOME="
+-#define GET_SCAN_TYPE			"TYPE="
+-
+-#define BAND_GET_CMD				"BANDGET"
+-#define BAND_SET_CMD				"BANDSET"
+-#define DTIM_SKIP_GET_CMD			"DTIMSKIPGET"
+-#define DTIM_SKIP_SET_CMD			"DTIMSKIPSET"
+-#define SETSUSPEND_CMD				"SETSUSPENDOPT"
+-#define PNOSSIDCLR_SET_CMD			"PNOSSIDCLR"
+-#define PNOSETUP_SET_CMD			"PNOSETUP"
+-#define PNOENABLE_SET_CMD			"PNOFORCE"
+-#define PNODEBUG_SET_CMD			"PNODEBUG"
+-
+-typedef struct wl_iw_extra_params {
+-	int target_channel;
+-} wl_iw_extra_params_t;
+-
+-#define	WL_IW_RSSI_MINVAL		-200
+-#define	WL_IW_RSSI_NO_SIGNAL	-91
+-#define	WL_IW_RSSI_VERY_LOW	-80
+-#define	WL_IW_RSSI_LOW		-70
+-#define	WL_IW_RSSI_GOOD		-68
+-#define	WL_IW_RSSI_VERY_GOOD	-58
+-#define	WL_IW_RSSI_EXCELLENT	-57
+-#define	WL_IW_RSSI_INVALID	 0
+-#define MAX_WX_STRING 80
+-#define WL_IW_SET_ACTIVE_SCAN	(SIOCIWFIRSTPRIV+1)
+-#define WL_IW_GET_RSSI			(SIOCIWFIRSTPRIV+3)
+-#define WL_IW_SET_PASSIVE_SCAN	(SIOCIWFIRSTPRIV+5)
+-#define WL_IW_GET_LINK_SPEED	(SIOCIWFIRSTPRIV+7)
+-#define WL_IW_GET_CURR_MACADDR	(SIOCIWFIRSTPRIV+9)
+-#define WL_IW_SET_STOP				(SIOCIWFIRSTPRIV+11)
+-#define WL_IW_SET_START			(SIOCIWFIRSTPRIV+13)
+-
+-#define WL_SET_AP_CFG           (SIOCIWFIRSTPRIV+15)
+-#define WL_AP_STA_LIST          (SIOCIWFIRSTPRIV+17)
+-#define WL_AP_MAC_FLTR	        (SIOCIWFIRSTPRIV+19)
+-#define WL_AP_BSS_START         (SIOCIWFIRSTPRIV+21)
+-#define AP_LPB_CMD              (SIOCIWFIRSTPRIV+23)
+-#define WL_AP_STOP              (SIOCIWFIRSTPRIV+25)
+-#define WL_FW_RELOAD            (SIOCIWFIRSTPRIV+27)
+-#define WL_COMBO_SCAN            (SIOCIWFIRSTPRIV+29)
+-#define WL_AP_SPARE3            (SIOCIWFIRSTPRIV+31)
+-#define G_SCAN_RESULTS		(8*1024)
+-#define	WE_ADD_EVENT_FIX	0x80
+-#define          G_WLAN_SET_ON	0
+-#define          G_WLAN_SET_OFF	1
+-
+-#define CHECK_EXTRA_FOR_NULL(extra) \
+-if (!extra) { \
+-	WL_ERROR("%s: error : extra is null pointer\n", __func__);	\
+-	return -EINVAL; \
+-}
+-
+-typedef struct wl_iw {
+-	char nickname[IW_ESSID_MAX_SIZE];
+-
+-	struct iw_statistics wstats;
+-
+-	int spy_num;
+-	u32 pwsec;
+-	u32 gwsec;
+-	bool privacy_invoked;
+-
+-	u8 spy_addr[IW_MAX_SPY][ETH_ALEN];
+-	struct iw_quality spy_qual[IW_MAX_SPY];
+-	void *wlinfo;
+-	dhd_pub_t *pub;
+-} wl_iw_t;
+-
+-#if WIRELESS_EXT > 12
+-#include <net/iw_handler.h>
+-extern const struct iw_handler_def wl_iw_handler_def;
+-#endif
+-
+-extern int wl_iw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
+-extern void wl_iw_event(struct net_device *dev, wl_event_msg_t *e, void *data);
+-extern int wl_iw_get_wireless_stats(struct net_device *dev,
+-				    struct iw_statistics *wstats);
+-int wl_iw_attach(struct net_device *dev, void *dhdp);
+-void wl_iw_detach(void);
+-extern int net_os_set_suspend_disable(struct net_device *dev, int val);
+-extern int net_os_set_suspend(struct net_device *dev, int val);
+-extern int net_os_set_dtim_skip(struct net_device *dev, int val);
+-extern int net_os_set_packet_filter(struct net_device *dev, int val);
+-
+-#define IWE_STREAM_ADD_EVENT(info, stream, ends, iwe, extra) \
+-	iwe_stream_add_event(info, stream, ends, iwe, extra)
+-#define IWE_STREAM_ADD_VALUE(info, event, value, ends, iwe, event_len) \
+-	iwe_stream_add_value(info, event, value, ends, iwe, event_len)
+-#define IWE_STREAM_ADD_POINT(info, stream, ends, iwe, extra) \
+-	iwe_stream_add_point(info, stream, ends, iwe, extra)
+-
+-extern int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled);
+-extern int dhd_pno_clean(dhd_pub_t *dhd);
+-extern int dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid,
+-		       unsigned char scan_fr);
+-extern int dhd_pno_get_status(dhd_pub_t *dhd);
+-extern int dhd_dev_pno_reset(struct net_device *dev);
+-extern int dhd_dev_pno_set(struct net_device *dev, wlc_ssid_t *ssids_local,
+-			   int nssid, unsigned char scan_fr);
+-extern int dhd_dev_pno_enable(struct net_device *dev, int pfn_enabled);
+-extern int dhd_dev_get_pno_status(struct net_device *dev);
+-
+-#define PNO_TLV_PREFIX			'S'
+-#define PNO_TLV_VERSION			1
+-#define PNO_TLV_SUBVERSION		0
+-#define PNO_TLV_RESERVED		0
+-#define PNO_TLV_TYPE_SSID_IE		'S'
+-#define PNO_TLV_TYPE_TIME		'T'
+-#define  PNO_EVENT_UP			"PNO_EVENT"
+-
+-#endif				/* _wl_iw_h_ */
+diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile
+deleted file mode 100644
+index 8d75fe1..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/Makefile
++++ /dev/null
+@@ -1,59 +0,0 @@
+-#
+-# Makefile fragment for Broadcom 802.11n Networking Device Driver
+-#
+-# Copyright (c) 2010 Broadcom Corporation
+-#
+-# Permission to use, copy, modify, and/or distribute this software for any
+-# purpose with or without fee is hereby granted, provided that the above
+-# copyright notice and this permission notice appear in all copies.
+-#
+-# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+-# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+-# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+-# SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+-# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+-# OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+-# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+-
+-ccflags-y :=				\
+-	-DWLC_HIGH				\
+-	-DWLC_LOW				\
+-	-DSTA					\
+-	-DWME					\
+-	-DWL11N					\
+-	-DDBAND					\
+-	-DBCMNVRAMR				\
+-	-Idrivers/staging/brcm80211/brcmsmac \
+-	-Idrivers/staging/brcm80211/brcmsmac/phy \
+-	-Idrivers/staging/brcm80211/include
+-
+-BRCMSMAC_OFILES := \
+-	wl_mac80211.o \
+-	wl_ucode_loader.o \
+-	wlc_alloc.o \
+-	wlc_ampdu.o \
+-	wlc_antsel.o \
+-	wlc_bmac.o \
+-	wlc_channel.o \
+-	wlc_main.o \
+-	wlc_phy_shim.o \
+-	wlc_pmu.o \
+-	wlc_rate.o \
+-	wlc_stf.o \
+-	aiutils.o \
+-	phy/wlc_phy_cmn.o \
+-	phy/wlc_phy_lcn.o \
+-	phy/wlc_phy_n.o \
+-	phy/wlc_phytbl_lcn.o \
+-	phy/wlc_phytbl_n.o \
+-	phy/wlc_phy_qmath.o \
+-	bcmotp.o \
+-	bcmsrom.o \
+-	hnddma.o \
+-	nicpci.o \
+-	nvram.o
+-
+-MODULEPFX := brcmsmac
+-
+-obj-$(CONFIG_BRCMSMAC)	+= $(MODULEPFX).o
+-$(MODULEPFX)-objs	= $(BRCMSMAC_OFILES)
+diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c
+deleted file mode 100644
+index a61185f..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/aiutils.c
++++ /dev/null
+@@ -1,2054 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/delay.h>
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <bcmdefs.h>
+-#include <linux/module.h>
+-#include <linux/pci.h>
+-#include <bcmutils.h>
+-#include <aiutils.h>
+-#include <hndsoc.h>
+-#include <sbchipc.h>
+-#include <pcicfg.h>
+-#include <bcmdevs.h>
+-
+-/* ********** from siutils.c *********** */
+-#include <pci_core.h>
+-#include <pcie_core.h>
+-#include <nicpci.h>
+-#include <bcmnvram.h>
+-#include <bcmsrom.h>
+-#include <wlc_pmu.h>
+-
+-#define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \
+-		(sih->chiprev == 0) && \
+-		(sii->coreid[sii->curidx] == MIPS74K_CORE_ID))
+-
+-/* EROM parsing */
+-
+-static u32
+-get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match)
+-{
+-	u32 ent;
+-	uint inv = 0, nom = 0;
+-
+-	while (true) {
+-		ent = R_REG(*eromptr);
+-		(*eromptr)++;
+-
+-		if (mask == 0)
+-			break;
+-
+-		if ((ent & ER_VALID) == 0) {
+-			inv++;
+-			continue;
+-		}
+-
+-		if (ent == (ER_END | ER_VALID))
+-			break;
+-
+-		if ((ent & mask) == match)
+-			break;
+-
+-		nom++;
+-	}
+-
+-	SI_VMSG(("%s: Returning ent 0x%08x\n", __func__, ent));
+-	if (inv + nom) {
+-		SI_VMSG(("  after %d invalid and %d non-matching entries\n",
+-			 inv, nom));
+-	}
+-	return ent;
+-}
+-
+-static u32
+-get_asd(si_t *sih, u32 **eromptr, uint sp, uint ad, uint st,
+-	u32 *addrl, u32 *addrh, u32 *sizel, u32 *sizeh)
+-{
+-	u32 asd, sz, szd;
+-
+-	asd = get_erom_ent(sih, eromptr, ER_VALID, ER_VALID);
+-	if (((asd & ER_TAG1) != ER_ADD) ||
+-	    (((asd & AD_SP_MASK) >> AD_SP_SHIFT) != sp) ||
+-	    ((asd & AD_ST_MASK) != st)) {
+-		/* This is not what we want, "push" it back */
+-		(*eromptr)--;
+-		return 0;
+-	}
+-	*addrl = asd & AD_ADDR_MASK;
+-	if (asd & AD_AG32)
+-		*addrh = get_erom_ent(sih, eromptr, 0, 0);
+-	else
+-		*addrh = 0;
+-	*sizeh = 0;
+-	sz = asd & AD_SZ_MASK;
+-	if (sz == AD_SZ_SZD) {
+-		szd = get_erom_ent(sih, eromptr, 0, 0);
+-		*sizel = szd & SD_SZ_MASK;
+-		if (szd & SD_SG32)
+-			*sizeh = get_erom_ent(sih, eromptr, 0, 0);
+-	} else
+-		*sizel = AD_SZ_BASE << (sz >> AD_SZ_SHIFT);
+-
+-	SI_VMSG(("  SP %d, ad %d: st = %d, 0x%08x_0x%08x @ 0x%08x_0x%08x\n",
+-		 sp, ad, st, *sizeh, *sizel, *addrh, *addrl));
+-
+-	return asd;
+-}
+-
+-static void ai_hwfixup(si_info_t *sii)
+-{
+-}
+-
+-/* parse the enumeration rom to identify all cores */
+-void ai_scan(si_t *sih, void *regs, uint devid)
+-{
+-	si_info_t *sii = SI_INFO(sih);
+-	chipcregs_t *cc = (chipcregs_t *) regs;
+-	u32 erombase, *eromptr, *eromlim;
+-
+-	erombase = R_REG(&cc->eromptr);
+-
+-	switch (sih->bustype) {
+-	case SI_BUS:
+-		eromptr = (u32 *) REG_MAP(erombase, SI_CORE_SIZE);
+-		break;
+-
+-	case PCI_BUS:
+-		/* Set wrappers address */
+-		sii->curwrap = (void *)((unsigned long)regs + SI_CORE_SIZE);
+-
+-		/* Now point the window at the erom */
+-		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN, erombase);
+-		eromptr = regs;
+-		break;
+-
+-	case SPI_BUS:
+-	case SDIO_BUS:
+-		eromptr = (u32 *)(unsigned long)erombase;
+-		break;
+-
+-	default:
+-		SI_ERROR(("Don't know how to do AXI enumertion on bus %d\n",
+-			  sih->bustype));
+-		return;
+-	}
+-	eromlim = eromptr + (ER_REMAPCONTROL / sizeof(u32));
+-
+-	SI_VMSG(("ai_scan: regs = 0x%p, erombase = 0x%08x, eromptr = 0x%p, eromlim = 0x%p\n", regs, erombase, eromptr, eromlim));
+-	while (eromptr < eromlim) {
+-		u32 cia, cib, cid, mfg, crev, nmw, nsw, nmp, nsp;
+-		u32 mpd, asd, addrl, addrh, sizel, sizeh;
+-		u32 *base;
+-		uint i, j, idx;
+-		bool br;
+-
+-		br = false;
+-
+-		/* Grok a component */
+-		cia = get_erom_ent(sih, &eromptr, ER_TAG, ER_CI);
+-		if (cia == (ER_END | ER_VALID)) {
+-			SI_VMSG(("Found END of erom after %d cores\n",
+-				 sii->numcores));
+-			ai_hwfixup(sii);
+-			return;
+-		}
+-		base = eromptr - 1;
+-		cib = get_erom_ent(sih, &eromptr, 0, 0);
+-
+-		if ((cib & ER_TAG) != ER_CI) {
+-			SI_ERROR(("CIA not followed by CIB\n"));
+-			goto error;
+-		}
+-
+-		cid = (cia & CIA_CID_MASK) >> CIA_CID_SHIFT;
+-		mfg = (cia & CIA_MFG_MASK) >> CIA_MFG_SHIFT;
+-		crev = (cib & CIB_REV_MASK) >> CIB_REV_SHIFT;
+-		nmw = (cib & CIB_NMW_MASK) >> CIB_NMW_SHIFT;
+-		nsw = (cib & CIB_NSW_MASK) >> CIB_NSW_SHIFT;
+-		nmp = (cib & CIB_NMP_MASK) >> CIB_NMP_SHIFT;
+-		nsp = (cib & CIB_NSP_MASK) >> CIB_NSP_SHIFT;
+-
+-		SI_VMSG(("Found component 0x%04x/0x%04x rev %d at erom addr 0x%p, with nmw = %d, " "nsw = %d, nmp = %d & nsp = %d\n", mfg, cid, crev, base, nmw, nsw, nmp, nsp));
+-
+-		if (((mfg == MFGID_ARM) && (cid == DEF_AI_COMP)) || (nsp == 0))
+-			continue;
+-		if ((nmw + nsw == 0)) {
+-			/* A component which is not a core */
+-			if (cid == OOB_ROUTER_CORE_ID) {
+-				asd = get_asd(sih, &eromptr, 0, 0, AD_ST_SLAVE,
+-					      &addrl, &addrh, &sizel, &sizeh);
+-				if (asd != 0) {
+-					sii->oob_router = addrl;
+-				}
+-			}
+-			continue;
+-		}
+-
+-		idx = sii->numcores;
+-/*		sii->eromptr[idx] = base; */
+-		sii->cia[idx] = cia;
+-		sii->cib[idx] = cib;
+-		sii->coreid[idx] = cid;
+-
+-		for (i = 0; i < nmp; i++) {
+-			mpd = get_erom_ent(sih, &eromptr, ER_VALID, ER_VALID);
+-			if ((mpd & ER_TAG) != ER_MP) {
+-				SI_ERROR(("Not enough MP entries for component 0x%x\n", cid));
+-				goto error;
+-			}
+-			SI_VMSG(("  Master port %d, mp: %d id: %d\n", i,
+-				 (mpd & MPD_MP_MASK) >> MPD_MP_SHIFT,
+-				 (mpd & MPD_MUI_MASK) >> MPD_MUI_SHIFT));
+-		}
+-
+-		/* First Slave Address Descriptor should be port 0:
+-		 * the main register space for the core
+-		 */
+-		asd =
+-		    get_asd(sih, &eromptr, 0, 0, AD_ST_SLAVE, &addrl, &addrh,
+-			    &sizel, &sizeh);
+-		if (asd == 0) {
+-			/* Try again to see if it is a bridge */
+-			asd =
+-			    get_asd(sih, &eromptr, 0, 0, AD_ST_BRIDGE, &addrl,
+-				    &addrh, &sizel, &sizeh);
+-			if (asd != 0)
+-				br = true;
+-			else if ((addrh != 0) || (sizeh != 0)
+-				 || (sizel != SI_CORE_SIZE)) {
+-				SI_ERROR(("First Slave ASD for core 0x%04x malformed " "(0x%08x)\n", cid, asd));
+-				goto error;
+-			}
+-		}
+-		sii->coresba[idx] = addrl;
+-		sii->coresba_size[idx] = sizel;
+-		/* Get any more ASDs in port 0 */
+-		j = 1;
+-		do {
+-			asd =
+-			    get_asd(sih, &eromptr, 0, j, AD_ST_SLAVE, &addrl,
+-				    &addrh, &sizel, &sizeh);
+-			if ((asd != 0) && (j == 1) && (sizel == SI_CORE_SIZE)) {
+-				sii->coresba2[idx] = addrl;
+-				sii->coresba2_size[idx] = sizel;
+-			}
+-			j++;
+-		} while (asd != 0);
+-
+-		/* Go through the ASDs for other slave ports */
+-		for (i = 1; i < nsp; i++) {
+-			j = 0;
+-			do {
+-				asd =
+-				    get_asd(sih, &eromptr, i, j++, AD_ST_SLAVE,
+-					    &addrl, &addrh, &sizel, &sizeh);
+-			} while (asd != 0);
+-			if (j == 0) {
+-				SI_ERROR((" SP %d has no address descriptors\n",
+-					  i));
+-				goto error;
+-			}
+-		}
+-
+-		/* Now get master wrappers */
+-		for (i = 0; i < nmw; i++) {
+-			asd =
+-			    get_asd(sih, &eromptr, i, 0, AD_ST_MWRAP, &addrl,
+-				    &addrh, &sizel, &sizeh);
+-			if (asd == 0) {
+-				SI_ERROR(("Missing descriptor for MW %d\n", i));
+-				goto error;
+-			}
+-			if ((sizeh != 0) || (sizel != SI_CORE_SIZE)) {
+-				SI_ERROR(("Master wrapper %d is not 4KB\n", i));
+-				goto error;
+-			}
+-			if (i == 0)
+-				sii->wrapba[idx] = addrl;
+-		}
+-
+-		/* And finally slave wrappers */
+-		for (i = 0; i < nsw; i++) {
+-			uint fwp = (nsp == 1) ? 0 : 1;
+-			asd =
+-			    get_asd(sih, &eromptr, fwp + i, 0, AD_ST_SWRAP,
+-				    &addrl, &addrh, &sizel, &sizeh);
+-			if (asd == 0) {
+-				SI_ERROR(("Missing descriptor for SW %d\n", i));
+-				goto error;
+-			}
+-			if ((sizeh != 0) || (sizel != SI_CORE_SIZE)) {
+-				SI_ERROR(("Slave wrapper %d is not 4KB\n", i));
+-				goto error;
+-			}
+-			if ((nmw == 0) && (i == 0))
+-				sii->wrapba[idx] = addrl;
+-		}
+-
+-		/* Don't record bridges */
+-		if (br)
+-			continue;
+-
+-		/* Done with core */
+-		sii->numcores++;
+-	}
+-
+-	SI_ERROR(("Reached end of erom without finding END"));
+-
+- error:
+-	sii->numcores = 0;
+-	return;
+-}
+-
+-/* This function changes the logical "focus" to the indicated core.
+- * Return the current core's virtual address.
+- */
+-void *ai_setcoreidx(si_t *sih, uint coreidx)
+-{
+-	si_info_t *sii = SI_INFO(sih);
+-	u32 addr = sii->coresba[coreidx];
+-	u32 wrap = sii->wrapba[coreidx];
+-	void *regs;
+-
+-	if (coreidx >= sii->numcores)
+-		return NULL;
+-
+-	switch (sih->bustype) {
+-	case SI_BUS:
+-		/* map new one */
+-		if (!sii->regs[coreidx]) {
+-			sii->regs[coreidx] = REG_MAP(addr, SI_CORE_SIZE);
+-		}
+-		sii->curmap = regs = sii->regs[coreidx];
+-		if (!sii->wrappers[coreidx]) {
+-			sii->wrappers[coreidx] = REG_MAP(wrap, SI_CORE_SIZE);
+-		}
+-		sii->curwrap = sii->wrappers[coreidx];
+-		break;
+-
+-	case PCI_BUS:
+-		/* point bar0 window */
+-		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN, addr);
+-		regs = sii->curmap;
+-		/* point bar0 2nd 4KB window */
+-		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN2, wrap);
+-		break;
+-
+-	case SPI_BUS:
+-	case SDIO_BUS:
+-		sii->curmap = regs = (void *)(unsigned long)addr;
+-		sii->curwrap = (void *)(unsigned long)wrap;
+-		break;
+-
+-	default:
+-		regs = NULL;
+-		break;
+-	}
+-
+-	sii->curmap = regs;
+-	sii->curidx = coreidx;
+-
+-	return regs;
+-}
+-
+-/* Return the number of address spaces in current core */
+-int ai_numaddrspaces(si_t *sih)
+-{
+-	return 2;
+-}
+-
+-/* Return the address of the nth address space in the current core */
+-u32 ai_addrspace(si_t *sih, uint asidx)
+-{
+-	si_info_t *sii;
+-	uint cidx;
+-
+-	sii = SI_INFO(sih);
+-	cidx = sii->curidx;
+-
+-	if (asidx == 0)
+-		return sii->coresba[cidx];
+-	else if (asidx == 1)
+-		return sii->coresba2[cidx];
+-	else {
+-		SI_ERROR(("%s: Need to parse the erom again to find addr space %d\n", __func__, asidx));
+-		return 0;
+-	}
+-}
+-
+-/* Return the size of the nth address space in the current core */
+-u32 ai_addrspacesize(si_t *sih, uint asidx)
+-{
+-	si_info_t *sii;
+-	uint cidx;
+-
+-	sii = SI_INFO(sih);
+-	cidx = sii->curidx;
+-
+-	if (asidx == 0)
+-		return sii->coresba_size[cidx];
+-	else if (asidx == 1)
+-		return sii->coresba2_size[cidx];
+-	else {
+-		SI_ERROR(("%s: Need to parse the erom again to find addr space %d\n", __func__, asidx));
+-		return 0;
+-	}
+-}
+-
+-uint ai_flag(si_t *sih)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-
+-	sii = SI_INFO(sih);
+-	if (BCM47162_DMP()) {
+-		SI_ERROR(("%s: Attempting to read MIPS DMP registers on 47162a0", __func__));
+-		return sii->curidx;
+-	}
+-	ai = sii->curwrap;
+-
+-	return R_REG(&ai->oobselouta30) & 0x1f;
+-}
+-
+-void ai_setint(si_t *sih, int siflag)
+-{
+-}
+-
+-uint ai_corevendor(si_t *sih)
+-{
+-	si_info_t *sii;
+-	u32 cia;
+-
+-	sii = SI_INFO(sih);
+-	cia = sii->cia[sii->curidx];
+-	return (cia & CIA_MFG_MASK) >> CIA_MFG_SHIFT;
+-}
+-
+-uint ai_corerev(si_t *sih)
+-{
+-	si_info_t *sii;
+-	u32 cib;
+-
+-	sii = SI_INFO(sih);
+-	cib = sii->cib[sii->curidx];
+-	return (cib & CIB_REV_MASK) >> CIB_REV_SHIFT;
+-}
+-
+-bool ai_iscoreup(si_t *sih)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-
+-	sii = SI_INFO(sih);
+-	ai = sii->curwrap;
+-
+-	return (((R_REG(&ai->ioctrl) & (SICF_FGC | SICF_CLOCK_EN)) ==
+-		 SICF_CLOCK_EN)
+-		&& ((R_REG(&ai->resetctrl) & AIRC_RESET) == 0));
+-}
+-
+-void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-	u32 w;
+-
+-	sii = SI_INFO(sih);
+-
+-	if (BCM47162_DMP()) {
+-		SI_ERROR(("%s: Accessing MIPS DMP register (ioctrl) on 47162a0",
+-			  __func__));
+-		return;
+-	}
+-
+-	ai = sii->curwrap;
+-
+-	if (mask || val) {
+-		w = ((R_REG(&ai->ioctrl) & ~mask) | val);
+-		W_REG(&ai->ioctrl, w);
+-	}
+-}
+-
+-u32 ai_core_cflags(si_t *sih, u32 mask, u32 val)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-	u32 w;
+-
+-	sii = SI_INFO(sih);
+-	if (BCM47162_DMP()) {
+-		SI_ERROR(("%s: Accessing MIPS DMP register (ioctrl) on 47162a0",
+-			  __func__));
+-		return 0;
+-	}
+-
+-	ai = sii->curwrap;
+-
+-	if (mask || val) {
+-		w = ((R_REG(&ai->ioctrl) & ~mask) | val);
+-		W_REG(&ai->ioctrl, w);
+-	}
+-
+-	return R_REG(&ai->ioctrl);
+-}
+-
+-u32 ai_core_sflags(si_t *sih, u32 mask, u32 val)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-	u32 w;
+-
+-	sii = SI_INFO(sih);
+-	if (BCM47162_DMP()) {
+-		SI_ERROR(("%s: Accessing MIPS DMP register (iostatus) on 47162a0", __func__));
+-		return 0;
+-	}
+-
+-	ai = sii->curwrap;
+-
+-	if (mask || val) {
+-		w = ((R_REG(&ai->iostatus) & ~mask) | val);
+-		W_REG(&ai->iostatus, w);
+-	}
+-
+-	return R_REG(&ai->iostatus);
+-}
+-
+-/* *************** from siutils.c ************** */
+-/* local prototypes */
+-static si_info_t *ai_doattach(si_info_t *sii, uint devid, void *regs,
+-			      uint bustype, void *sdh, char **vars,
+-			      uint *varsz);
+-static bool ai_buscore_prep(si_info_t *sii, uint bustype, uint devid,
+-			    void *sdh);
+-static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
+-			     u32 savewin, uint *origidx, void *regs);
+-static void ai_nvram_process(si_info_t *sii, char *pvars);
+-
+-/* dev path concatenation util */
+-static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name);
+-static bool _ai_clkctl_cc(si_info_t *sii, uint mode);
+-static bool ai_ispcie(si_info_t *sii);
+-
+-/* global variable to indicate reservation/release of gpio's */
+-static u32 ai_gpioreservation;
+-
+-/*
+- * Allocate a si handle.
+- * devid - pci device id (used to determine chip#)
+- * osh - opaque OS handle
+- * regs - virtual address of initial core registers
+- * bustype - pci/sb/sdio/etc
+- * vars - pointer to a pointer area for "environment" variables
+- * varsz - pointer to int to return the size of the vars
+- */
+-si_t *ai_attach(uint devid, void *regs, uint bustype,
+-		void *sdh, char **vars, uint *varsz)
+-{
+-	si_info_t *sii;
+-
+-	/* alloc si_info_t */
+-	sii = kmalloc(sizeof(si_info_t), GFP_ATOMIC);
+-	if (sii == NULL) {
+-		SI_ERROR(("si_attach: malloc failed!\n"));
+-		return NULL;
+-	}
+-
+-	if (ai_doattach(sii, devid, regs, bustype, sdh, vars, varsz) ==
+-	    NULL) {
+-		kfree(sii);
+-		return NULL;
+-	}
+-	sii->vars = vars ? *vars : NULL;
+-	sii->varsz = varsz ? *varsz : 0;
+-
+-	return (si_t *) sii;
+-}
+-
+-/* global kernel resource */
+-static si_info_t ksii;
+-
+-static bool ai_buscore_prep(si_info_t *sii, uint bustype, uint devid,
+-			    void *sdh)
+-{
+-	/* kludge to enable the clock on the 4306 which lacks a slowclock */
+-	if (bustype == PCI_BUS && !ai_ispcie(sii))
+-		ai_clkctl_xtal(&sii->pub, XTAL | PLL, ON);
+-	return true;
+-}
+-
+-static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype,
+-			     u32 savewin, uint *origidx, void *regs)
+-{
+-	bool pci, pcie;
+-	uint i;
+-	uint pciidx, pcieidx, pcirev, pcierev;
+-
+-	cc = ai_setcoreidx(&sii->pub, SI_CC_IDX);
+-
+-	/* get chipcommon rev */
+-	sii->pub.ccrev = (int)ai_corerev(&sii->pub);
+-
+-	/* get chipcommon chipstatus */
+-	if (sii->pub.ccrev >= 11)
+-		sii->pub.chipst = R_REG(&cc->chipstatus);
+-
+-	/* get chipcommon capabilites */
+-	sii->pub.cccaps = R_REG(&cc->capabilities);
+-	/* get chipcommon extended capabilities */
+-
+-	if (sii->pub.ccrev >= 35)
+-		sii->pub.cccaps_ext = R_REG(&cc->capabilities_ext);
+-
+-	/* get pmu rev and caps */
+-	if (sii->pub.cccaps & CC_CAP_PMU) {
+-		sii->pub.pmucaps = R_REG(&cc->pmucapabilities);
+-		sii->pub.pmurev = sii->pub.pmucaps & PCAP_REV_MASK;
+-	}
+-
+-	/* figure out bus/orignal core idx */
+-	sii->pub.buscoretype = NODEV_CORE_ID;
+-	sii->pub.buscorerev = NOREV;
+-	sii->pub.buscoreidx = BADIDX;
+-
+-	pci = pcie = false;
+-	pcirev = pcierev = NOREV;
+-	pciidx = pcieidx = BADIDX;
+-
+-	for (i = 0; i < sii->numcores; i++) {
+-		uint cid, crev;
+-
+-		ai_setcoreidx(&sii->pub, i);
+-		cid = ai_coreid(&sii->pub);
+-		crev = ai_corerev(&sii->pub);
+-
+-		/* Display cores found */
+-		SI_VMSG(("CORE[%d]: id 0x%x rev %d base 0x%x regs 0x%p\n",
+-			 i, cid, crev, sii->coresba[i], sii->regs[i]));
+-
+-		if (bustype == PCI_BUS) {
+-			if (cid == PCI_CORE_ID) {
+-				pciidx = i;
+-				pcirev = crev;
+-				pci = true;
+-			} else if (cid == PCIE_CORE_ID) {
+-				pcieidx = i;
+-				pcierev = crev;
+-				pcie = true;
+-			}
+-		}
+-
+-		/* find the core idx before entering this func. */
+-		if ((savewin && (savewin == sii->coresba[i])) ||
+-		    (regs == sii->regs[i]))
+-			*origidx = i;
+-	}
+-
+-	if (pci && pcie) {
+-		if (ai_ispcie(sii))
+-			pci = false;
+-		else
+-			pcie = false;
+-	}
+-	if (pci) {
+-		sii->pub.buscoretype = PCI_CORE_ID;
+-		sii->pub.buscorerev = pcirev;
+-		sii->pub.buscoreidx = pciidx;
+-	} else if (pcie) {
+-		sii->pub.buscoretype = PCIE_CORE_ID;
+-		sii->pub.buscorerev = pcierev;
+-		sii->pub.buscoreidx = pcieidx;
+-	}
+-
+-	SI_VMSG(("Buscore id/type/rev %d/0x%x/%d\n", sii->pub.buscoreidx,
+-		 sii->pub.buscoretype, sii->pub.buscorerev));
+-
+-	/* fixup necessary chip/core configurations */
+-	if (sii->pub.bustype == PCI_BUS) {
+-		if (SI_FAST(sii)) {
+-			if (!sii->pch) {
+-				sii->pch = (void *)pcicore_init(
+-					&sii->pub, sii->pbus,
+-					(void *)PCIEREGS(sii));
+-				if (sii->pch == NULL)
+-					return false;
+-			}
+-		}
+-		if (ai_pci_fixcfg(&sii->pub)) {
+-			SI_ERROR(("si_doattach: si_pci_fixcfg failed\n"));
+-			return false;
+-		}
+-	}
+-
+-	/* return to the original core */
+-	ai_setcoreidx(&sii->pub, *origidx);
+-
+-	return true;
+-}
+-
+-static __used void ai_nvram_process(si_info_t *sii, char *pvars)
+-{
+-	uint w = 0;
+-
+-	/* get boardtype and boardrev */
+-	switch (sii->pub.bustype) {
+-	case PCI_BUS:
+-		/* do a pci config read to get subsystem id and subvendor id */
+-		pci_read_config_dword(sii->pbus, PCI_SUBSYSTEM_VENDOR_ID, &w);
+-		/* Let nvram variables override subsystem Vend/ID */
+-		sii->pub.boardvendor = (u16)ai_getdevpathintvar(&sii->pub,
+-			"boardvendor");
+-		if (sii->pub.boardvendor == 0)
+-			sii->pub.boardvendor = w & 0xffff;
+-		else
+-			SI_ERROR(("Overriding boardvendor: 0x%x instead of "
+-				  "0x%x\n", sii->pub.boardvendor, w & 0xffff));
+-		sii->pub.boardtype = (u16)ai_getdevpathintvar(&sii->pub,
+-			"boardtype");
+-		if (sii->pub.boardtype == 0)
+-			sii->pub.boardtype = (w >> 16) & 0xffff;
+-		else
+-			SI_ERROR(("Overriding boardtype: 0x%x instead of 0x%x\n"
+-				  , sii->pub.boardtype, (w >> 16) & 0xffff));
+-		break;
+-
+-		sii->pub.boardvendor = getintvar(pvars, "manfid");
+-		sii->pub.boardtype = getintvar(pvars, "prodid");
+-		break;
+-
+-	case SI_BUS:
+-	case JTAG_BUS:
+-		sii->pub.boardvendor = PCI_VENDOR_ID_BROADCOM;
+-		sii->pub.boardtype = getintvar(pvars, "prodid");
+-		if (pvars == NULL || (sii->pub.boardtype == 0)) {
+-			sii->pub.boardtype = getintvar(NULL, "boardtype");
+-			if (sii->pub.boardtype == 0)
+-				sii->pub.boardtype = 0xffff;
+-		}
+-		break;
+-	}
+-
+-	if (sii->pub.boardtype == 0) {
+-		SI_ERROR(("si_doattach: unknown board type\n"));
+-	}
+-
+-	sii->pub.boardflags = getintvar(pvars, "boardflags");
+-}
+-
+-static si_info_t *ai_doattach(si_info_t *sii, uint devid,
+-			      void *regs, uint bustype, void *pbus,
+-			      char **vars, uint *varsz)
+-{
+-	struct si_pub *sih = &sii->pub;
+-	u32 w, savewin;
+-	chipcregs_t *cc;
+-	char *pvars = NULL;
+-	uint socitype;
+-	uint origidx;
+-
+-	memset((unsigned char *) sii, 0, sizeof(si_info_t));
+-
+-	savewin = 0;
+-
+-	sih->buscoreidx = BADIDX;
+-
+-	sii->curmap = regs;
+-	sii->pbus = pbus;
+-
+-	/* check to see if we are a si core mimic'ing a pci core */
+-	if (bustype == PCI_BUS) {
+-		pci_read_config_dword(sii->pbus, PCI_SPROM_CONTROL,  &w);
+-		if (w == 0xffffffff) {
+-			SI_ERROR(("%s: incoming bus is PCI but it's a lie, "
+-				" switching to SI devid:0x%x\n",
+-				__func__, devid));
+-			bustype = SI_BUS;
+-		}
+-	}
+-
+-	/* find Chipcommon address */
+-	if (bustype == PCI_BUS) {
+-		pci_read_config_dword(sii->pbus, PCI_BAR0_WIN, &savewin);
+-		if (!GOODCOREADDR(savewin, SI_ENUM_BASE))
+-			savewin = SI_ENUM_BASE;
+-		pci_write_config_dword(sii->pbus, PCI_BAR0_WIN,
+-				       SI_ENUM_BASE);
+-		cc = (chipcregs_t *) regs;
+-	} else {
+-		cc = (chipcregs_t *) REG_MAP(SI_ENUM_BASE, SI_CORE_SIZE);
+-	}
+-
+-	sih->bustype = bustype;
+-
+-	/* bus/core/clk setup for register access */
+-	if (!ai_buscore_prep(sii, bustype, devid, pbus)) {
+-		SI_ERROR(("si_doattach: si_core_clk_prep failed %d\n",
+-			  bustype));
+-		return NULL;
+-	}
+-
+-	/*
+-	 * ChipID recognition.
+-	 *   We assume we can read chipid at offset 0 from the regs arg.
+-	 *   If we add other chiptypes (or if we need to support old sdio
+-	 *   hosts w/o chipcommon), some way of recognizing them needs to
+-	 *   be added here.
+-	 */
+-	w = R_REG(&cc->chipid);
+-	socitype = (w & CID_TYPE_MASK) >> CID_TYPE_SHIFT;
+-	/* Might as wll fill in chip id rev & pkg */
+-	sih->chip = w & CID_ID_MASK;
+-	sih->chiprev = (w & CID_REV_MASK) >> CID_REV_SHIFT;
+-	sih->chippkg = (w & CID_PKG_MASK) >> CID_PKG_SHIFT;
+-
+-	sih->issim = IS_SIM(sih->chippkg);
+-
+-	/* scan for cores */
+-	if (socitype == SOCI_AI) {
+-		SI_MSG(("Found chip type AI (0x%08x)\n", w));
+-		/* pass chipc address instead of original core base */
+-		ai_scan(&sii->pub, (void *)cc, devid);
+-	} else {
+-		SI_ERROR(("Found chip of unknown type (0x%08x)\n", w));
+-		return NULL;
+-	}
+-	/* no cores found, bail out */
+-	if (sii->numcores == 0) {
+-		SI_ERROR(("si_doattach: could not find any cores\n"));
+-		return NULL;
+-	}
+-	/* bus/core/clk setup */
+-	origidx = SI_CC_IDX;
+-	if (!ai_buscore_setup(sii, cc, bustype, savewin, &origidx, regs)) {
+-		SI_ERROR(("si_doattach: si_buscore_setup failed\n"));
+-		goto exit;
+-	}
+-
+-	/* assume current core is CC */
+-	if ((sii->pub.ccrev == 0x25)
+-	    &&
+-	    ((sih->chip == BCM43236_CHIP_ID
+-	      || sih->chip == BCM43235_CHIP_ID
+-	      || sih->chip == BCM43238_CHIP_ID)
+-	     && (sii->pub.chiprev <= 2))) {
+-
+-		if ((cc->chipstatus & CST43236_BP_CLK) != 0) {
+-			uint clkdiv;
+-			clkdiv = R_REG(&cc->clkdiv);
+-			/* otp_clk_div is even number, 120/14 < 9mhz */
+-			clkdiv = (clkdiv & ~CLKD_OTP) | (14 << CLKD_OTP_SHIFT);
+-			W_REG(&cc->clkdiv, clkdiv);
+-			SI_ERROR(("%s: set clkdiv to %x\n", __func__, clkdiv));
+-		}
+-		udelay(10);
+-	}
+-
+-	/* Init nvram from flash if it exists */
+-	nvram_init();
+-
+-	/* Init nvram from sprom/otp if they exist */
+-	if (srom_var_init
+-	    (&sii->pub, bustype, regs, vars, varsz)) {
+-		SI_ERROR(("si_doattach: srom_var_init failed: bad srom\n"));
+-		goto exit;
+-	}
+-	pvars = vars ? *vars : NULL;
+-	ai_nvram_process(sii, pvars);
+-
+-	/* === NVRAM, clock is ready === */
+-	cc = (chipcregs_t *) ai_setcore(sih, CC_CORE_ID, 0);
+-	W_REG(&cc->gpiopullup, 0);
+-	W_REG(&cc->gpiopulldown, 0);
+-	ai_setcoreidx(sih, origidx);
+-
+-	/* PMU specific initializations */
+-	if (PMUCTL_ENAB(sih)) {
+-		u32 xtalfreq;
+-		si_pmu_init(sih);
+-		si_pmu_chip_init(sih);
+-		xtalfreq = getintvar(pvars, "xtalfreq");
+-		/* If xtalfreq var not available, try to measure it */
+-		if (xtalfreq == 0)
+-			xtalfreq = si_pmu_measure_alpclk(sih);
+-		si_pmu_pll_init(sih, xtalfreq);
+-		si_pmu_res_init(sih);
+-		si_pmu_swreg_init(sih);
+-	}
+-
+-	/* setup the GPIO based LED powersave register */
+-	w = getintvar(pvars, "leddc");
+-	if (w == 0)
+-		w = DEFAULT_GPIOTIMERVAL;
+-	ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, gpiotimerval), ~0, w);
+-
+-	if (PCIE(sii)) {
+-		pcicore_attach(sii->pch, pvars, SI_DOATTACH);
+-	}
+-
+-	if ((sih->chip == BCM43224_CHIP_ID) ||
+-	    (sih->chip == BCM43421_CHIP_ID)) {
+-		/*
+-		 * enable 12 mA drive strenth for 43224 and
+-		 * set chipControl register bit 15
+-		 */
+-		if (sih->chiprev == 0) {
+-			SI_MSG(("Applying 43224A0 WARs\n"));
+-			ai_corereg(sih, SI_CC_IDX,
+-				   offsetof(chipcregs_t, chipcontrol),
+-				   CCTRL43224_GPIO_TOGGLE,
+-				   CCTRL43224_GPIO_TOGGLE);
+-			si_pmu_chipcontrol(sih, 0, CCTRL_43224A0_12MA_LED_DRIVE,
+-					   CCTRL_43224A0_12MA_LED_DRIVE);
+-		}
+-		if (sih->chiprev >= 1) {
+-			SI_MSG(("Applying 43224B0+ WARs\n"));
+-			si_pmu_chipcontrol(sih, 0, CCTRL_43224B0_12MA_LED_DRIVE,
+-					   CCTRL_43224B0_12MA_LED_DRIVE);
+-		}
+-	}
+-
+-	if (sih->chip == BCM4313_CHIP_ID) {
+-		/*
+-		 * enable 12 mA drive strenth for 4313 and
+-		 * set chipControl register bit 1
+-		 */
+-		SI_MSG(("Applying 4313 WARs\n"));
+-		si_pmu_chipcontrol(sih, 0, CCTRL_4313_12MA_LED_DRIVE,
+-				   CCTRL_4313_12MA_LED_DRIVE);
+-	}
+-
+-	if (sih->chip == BCM4331_CHIP_ID) {
+-		/* Enable Ext PA lines depending on chip package option */
+-		ai_chipcontrl_epa4331(sih, true);
+-	}
+-
+-	return sii;
+- exit:
+-	if (sih->bustype == PCI_BUS) {
+-		if (sii->pch)
+-			pcicore_deinit(sii->pch);
+-		sii->pch = NULL;
+-	}
+-
+-	return NULL;
+-}
+-
+-/* may be called with core in reset */
+-void ai_detach(si_t *sih)
+-{
+-	si_info_t *sii;
+-	uint idx;
+-
+-	struct si_pub *si_local = NULL;
+-	bcopy(&sih, &si_local, sizeof(si_t **));
+-
+-	sii = SI_INFO(sih);
+-
+-	if (sii == NULL)
+-		return;
+-
+-	if (sih->bustype == SI_BUS)
+-		for (idx = 0; idx < SI_MAXCORES; idx++)
+-			if (sii->regs[idx]) {
+-				iounmap(sii->regs[idx]);
+-				sii->regs[idx] = NULL;
+-			}
+-
+-	nvram_exit();	/* free up nvram buffers */
+-
+-	if (sih->bustype == PCI_BUS) {
+-		if (sii->pch)
+-			pcicore_deinit(sii->pch);
+-		sii->pch = NULL;
+-	}
+-
+-	if (sii != &ksii)
+-		kfree(sii);
+-}
+-
+-/* register driver interrupt disabling and restoring callback functions */
+-void
+-ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn,
+-			  void *intrsenabled_fn, void *intr_arg)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-	sii->intr_arg = intr_arg;
+-	sii->intrsoff_fn = (si_intrsoff_t) intrsoff_fn;
+-	sii->intrsrestore_fn = (si_intrsrestore_t) intrsrestore_fn;
+-	sii->intrsenabled_fn = (si_intrsenabled_t) intrsenabled_fn;
+-	/* save current core id.  when this function called, the current core
+-	 * must be the core which provides driver functions(il, et, wl, etc.)
+-	 */
+-	sii->dev_coreid = sii->coreid[sii->curidx];
+-}
+-
+-void ai_deregister_intr_callback(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-	sii->intrsoff_fn = NULL;
+-}
+-
+-uint ai_coreid(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-	return sii->coreid[sii->curidx];
+-}
+-
+-uint ai_coreidx(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-	return sii->curidx;
+-}
+-
+-bool ai_backplane64(si_t *sih)
+-{
+-	return (sih->cccaps & CC_CAP_BKPLN64) != 0;
+-}
+-
+-/* return index of coreid or BADIDX if not found */
+-uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit)
+-{
+-	si_info_t *sii;
+-	uint found;
+-	uint i;
+-
+-	sii = SI_INFO(sih);
+-
+-	found = 0;
+-
+-	for (i = 0; i < sii->numcores; i++)
+-		if (sii->coreid[i] == coreid) {
+-			if (found == coreunit)
+-				return i;
+-			found++;
+-		}
+-
+-	return BADIDX;
+-}
+-
+-/*
+- * This function changes logical "focus" to the indicated core;
+- * must be called with interrupts off.
+- * Moreover, callers should keep interrupts off during switching
+- * out of and back to d11 core.
+- */
+-void *ai_setcore(si_t *sih, uint coreid, uint coreunit)
+-{
+-	uint idx;
+-
+-	idx = ai_findcoreidx(sih, coreid, coreunit);
+-	if (!GOODIDX(idx))
+-		return NULL;
+-
+-	return ai_setcoreidx(sih, idx);
+-}
+-
+-/* Turn off interrupt as required by ai_setcore, before switch core */
+-void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val)
+-{
+-	void *cc;
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	if (SI_FAST(sii)) {
+-		/* Overloading the origidx variable to remember the coreid,
+-		 * this works because the core ids cannot be confused with
+-		 * core indices.
+-		 */
+-		*origidx = coreid;
+-		if (coreid == CC_CORE_ID)
+-			return (void *)CCREGS_FAST(sii);
+-		else if (coreid == sih->buscoretype)
+-			return (void *)PCIEREGS(sii);
+-	}
+-	INTR_OFF(sii, *intr_val);
+-	*origidx = sii->curidx;
+-	cc = ai_setcore(sih, coreid, 0);
+-	return cc;
+-}
+-
+-/* restore coreidx and restore interrupt */
+-void ai_restore_core(si_t *sih, uint coreid, uint intr_val)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-	if (SI_FAST(sii)
+-	    && ((coreid == CC_CORE_ID) || (coreid == sih->buscoretype)))
+-		return;
+-
+-	ai_setcoreidx(sih, coreid);
+-	INTR_RESTORE(sii, intr_val);
+-}
+-
+-void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val)
+-{
+-	si_info_t *sii = SI_INFO(sih);
+-	u32 *w = (u32 *) sii->curwrap;
+-	W_REG(w + (offset / 4), val);
+-	return;
+-}
+-
+-/*
+- * Switch to 'coreidx', issue a single arbitrary 32bit register mask&set
+- * operation, switch back to the original core, and return the new value.
+- *
+- * When using the silicon backplane, no fiddling with interrupts or core
+- * switches is needed.
+- *
+- * Also, when using pci/pcie, we can optimize away the core switching for pci
+- * registers and (on newer pci cores) chipcommon registers.
+- */
+-uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val)
+-{
+-	uint origidx = 0;
+-	u32 *r = NULL;
+-	uint w;
+-	uint intr_val = 0;
+-	bool fast = false;
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	if (coreidx >= SI_MAXCORES)
+-		return 0;
+-
+-	if (sih->bustype == SI_BUS) {
+-		/* If internal bus, we can always get at everything */
+-		fast = true;
+-		/* map if does not exist */
+-		if (!sii->regs[coreidx]) {
+-			sii->regs[coreidx] = REG_MAP(sii->coresba[coreidx],
+-						     SI_CORE_SIZE);
+-		}
+-		r = (u32 *) ((unsigned char *) sii->regs[coreidx] + regoff);
+-	} else if (sih->bustype == PCI_BUS) {
+-		/*
+-		 * If pci/pcie, we can get at pci/pcie regs
+-		 * and on newer cores to chipc
+-		 */
+-		if ((sii->coreid[coreidx] == CC_CORE_ID) && SI_FAST(sii)) {
+-			/* Chipc registers are mapped at 12KB */
+-
+-			fast = true;
+-			r = (u32 *) ((char *)sii->curmap +
+-					PCI_16KB0_CCREGS_OFFSET + regoff);
+-		} else if (sii->pub.buscoreidx == coreidx) {
+-			/*
+-			 * pci registers are at either in the last 2KB of
+-			 * an 8KB window or, in pcie and pci rev 13 at 8KB
+-			 */
+-			fast = true;
+-			if (SI_FAST(sii))
+-				r = (u32 *) ((char *)sii->curmap +
+-						PCI_16KB0_PCIREGS_OFFSET +
+-						regoff);
+-			else
+-				r = (u32 *) ((char *)sii->curmap +
+-						((regoff >= SBCONFIGOFF) ?
+-						 PCI_BAR0_PCISBR_OFFSET :
+-						 PCI_BAR0_PCIREGS_OFFSET) +
+-						regoff);
+-		}
+-	}
+-
+-	if (!fast) {
+-		INTR_OFF(sii, intr_val);
+-
+-		/* save current core index */
+-		origidx = ai_coreidx(&sii->pub);
+-
+-		/* switch core */
+-		r = (u32 *) ((unsigned char *) ai_setcoreidx(&sii->pub, coreidx)
+-				+ regoff);
+-	}
+-
+-	/* mask and set */
+-	if (mask || val) {
+-		w = (R_REG(r) & ~mask) | val;
+-		W_REG(r, w);
+-	}
+-
+-	/* readback */
+-	w = R_REG(r);
+-
+-	if (!fast) {
+-		/* restore core index */
+-		if (origidx != coreidx)
+-			ai_setcoreidx(&sii->pub, origidx);
+-
+-		INTR_RESTORE(sii, intr_val);
+-	}
+-
+-	return w;
+-}
+-
+-void ai_core_disable(si_t *sih, u32 bits)
+-{
+-	si_info_t *sii;
+-	u32 dummy;
+-	aidmp_t *ai;
+-
+-	sii = SI_INFO(sih);
+-
+-	ai = sii->curwrap;
+-
+-	/* if core is already in reset, just return */
+-	if (R_REG(&ai->resetctrl) & AIRC_RESET)
+-		return;
+-
+-	W_REG(&ai->ioctrl, bits);
+-	dummy = R_REG(&ai->ioctrl);
+-	udelay(10);
+-
+-	W_REG(&ai->resetctrl, AIRC_RESET);
+-	udelay(1);
+-}
+-
+-/* reset and re-enable a core
+- * inputs:
+- * bits - core specific bits that are set during and after reset sequence
+- * resetbits - core specific bits that are set only during reset sequence
+- */
+-void ai_core_reset(si_t *sih, u32 bits, u32 resetbits)
+-{
+-	si_info_t *sii;
+-	aidmp_t *ai;
+-	u32 dummy;
+-
+-	sii = SI_INFO(sih);
+-	ai = sii->curwrap;
+-
+-	/*
+-	 * Must do the disable sequence first to work
+-	 * for arbitrary current core state.
+-	 */
+-	ai_core_disable(sih, (bits | resetbits));
+-
+-	/*
+-	 * Now do the initialization sequence.
+-	 */
+-	W_REG(&ai->ioctrl, (bits | SICF_FGC | SICF_CLOCK_EN));
+-	dummy = R_REG(&ai->ioctrl);
+-	W_REG(&ai->resetctrl, 0);
+-	udelay(1);
+-
+-	W_REG(&ai->ioctrl, (bits | SICF_CLOCK_EN));
+-	dummy = R_REG(&ai->ioctrl);
+-	udelay(1);
+-}
+-
+-/* return the slow clock source - LPO, XTAL, or PCI */
+-static uint ai_slowclk_src(si_info_t *sii)
+-{
+-	chipcregs_t *cc;
+-	u32 val;
+-
+-	if (sii->pub.ccrev < 6) {
+-		if (sii->pub.bustype == PCI_BUS) {
+-			pci_read_config_dword(sii->pbus, PCI_GPIO_OUT,
+-					      &val);
+-			if (val & PCI_CFG_GPIO_SCS)
+-				return SCC_SS_PCI;
+-		}
+-		return SCC_SS_XTAL;
+-	} else if (sii->pub.ccrev < 10) {
+-		cc = (chipcregs_t *) ai_setcoreidx(&sii->pub, sii->curidx);
+-		return R_REG(&cc->slow_clk_ctl) & SCC_SS_MASK;
+-	} else			/* Insta-clock */
+-		return SCC_SS_XTAL;
+-}
+-
+-/*
+-* return the ILP (slowclock) min or max frequency
+-* precondition: we've established the chip has dynamic clk control
+-*/
+-static uint ai_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc)
+-{
+-	u32 slowclk;
+-	uint div;
+-
+-	slowclk = ai_slowclk_src(sii);
+-	if (sii->pub.ccrev < 6) {
+-		if (slowclk == SCC_SS_PCI)
+-			return max_freq ? (PCIMAXFREQ / 64)
+-				: (PCIMINFREQ / 64);
+-		else
+-			return max_freq ? (XTALMAXFREQ / 32)
+-				: (XTALMINFREQ / 32);
+-	} else if (sii->pub.ccrev < 10) {
+-		div = 4 *
+-		    (((R_REG(&cc->slow_clk_ctl) & SCC_CD_MASK) >>
+-		      SCC_CD_SHIFT) + 1);
+-		if (slowclk == SCC_SS_LPO)
+-			return max_freq ? LPOMAXFREQ : LPOMINFREQ;
+-		else if (slowclk == SCC_SS_XTAL)
+-			return max_freq ? (XTALMAXFREQ / div)
+-				: (XTALMINFREQ / div);
+-		else if (slowclk == SCC_SS_PCI)
+-			return max_freq ? (PCIMAXFREQ / div)
+-				: (PCIMINFREQ / div);
+-	} else {
+-		/* Chipc rev 10 is InstaClock */
+-		div = R_REG(&cc->system_clk_ctl) >> SYCC_CD_SHIFT;
+-		div = 4 * (div + 1);
+-		return max_freq ? XTALMAXFREQ : (XTALMINFREQ / div);
+-	}
+-	return 0;
+-}
+-
+-static void ai_clkctl_setdelay(si_info_t *sii, void *chipcregs)
+-{
+-	chipcregs_t *cc = (chipcregs_t *) chipcregs;
+-	uint slowmaxfreq, pll_delay, slowclk;
+-	uint pll_on_delay, fref_sel_delay;
+-
+-	pll_delay = PLL_DELAY;
+-
+-	/*
+-	 * If the slow clock is not sourced by the xtal then
+-	 * add the xtal_on_delay since the xtal will also be
+-	 * powered down by dynamic clk control logic.
+-	 */
+-
+-	slowclk = ai_slowclk_src(sii);
+-	if (slowclk != SCC_SS_XTAL)
+-		pll_delay += XTAL_ON_DELAY;
+-
+-	/* Starting with 4318 it is ILP that is used for the delays */
+-	slowmaxfreq =
+-	    ai_slowclk_freq(sii, (sii->pub.ccrev >= 10) ? false : true, cc);
+-
+-	pll_on_delay = ((slowmaxfreq * pll_delay) + 999999) / 1000000;
+-	fref_sel_delay = ((slowmaxfreq * FREF_DELAY) + 999999) / 1000000;
+-
+-	W_REG(&cc->pll_on_delay, pll_on_delay);
+-	W_REG(&cc->fref_sel_delay, fref_sel_delay);
+-}
+-
+-/* initialize power control delay registers */
+-void ai_clkctl_init(si_t *sih)
+-{
+-	si_info_t *sii;
+-	uint origidx = 0;
+-	chipcregs_t *cc;
+-	bool fast;
+-
+-	if (!CCCTL_ENAB(sih))
+-		return;
+-
+-	sii = SI_INFO(sih);
+-	fast = SI_FAST(sii);
+-	if (!fast) {
+-		origidx = sii->curidx;
+-		cc = (chipcregs_t *) ai_setcore(sih, CC_CORE_ID, 0);
+-		if (cc == NULL)
+-			return;
+-	} else {
+-		cc = (chipcregs_t *) CCREGS_FAST(sii);
+-		if (cc == NULL)
+-			return;
+-	}
+-
+-	/* set all Instaclk chip ILP to 1 MHz */
+-	if (sih->ccrev >= 10)
+-		SET_REG(&cc->system_clk_ctl, SYCC_CD_MASK,
+-			(ILP_DIV_1MHZ << SYCC_CD_SHIFT));
+-
+-	ai_clkctl_setdelay(sii, (void *)cc);
+-
+-	if (!fast)
+-		ai_setcoreidx(sih, origidx);
+-}
+-
+-/*
+- * return the value suitable for writing to the
+- * dot11 core FAST_PWRUP_DELAY register
+- */
+-u16 ai_clkctl_fast_pwrup_delay(si_t *sih)
+-{
+-	si_info_t *sii;
+-	uint origidx = 0;
+-	chipcregs_t *cc;
+-	uint slowminfreq;
+-	u16 fpdelay;
+-	uint intr_val = 0;
+-	bool fast;
+-
+-	sii = SI_INFO(sih);
+-	if (PMUCTL_ENAB(sih)) {
+-		INTR_OFF(sii, intr_val);
+-		fpdelay = si_pmu_fast_pwrup_delay(sih);
+-		INTR_RESTORE(sii, intr_val);
+-		return fpdelay;
+-	}
+-
+-	if (!CCCTL_ENAB(sih))
+-		return 0;
+-
+-	fast = SI_FAST(sii);
+-	fpdelay = 0;
+-	if (!fast) {
+-		origidx = sii->curidx;
+-		INTR_OFF(sii, intr_val);
+-		cc = (chipcregs_t *) ai_setcore(sih, CC_CORE_ID, 0);
+-		if (cc == NULL)
+-			goto done;
+-	} else {
+-		cc = (chipcregs_t *) CCREGS_FAST(sii);
+-		if (cc == NULL)
+-			goto done;
+-	}
+-
+-	slowminfreq = ai_slowclk_freq(sii, false, cc);
+-	fpdelay = (((R_REG(&cc->pll_on_delay) + 2) * 1000000) +
+-		   (slowminfreq - 1)) / slowminfreq;
+-
+- done:
+-	if (!fast) {
+-		ai_setcoreidx(sih, origidx);
+-		INTR_RESTORE(sii, intr_val);
+-	}
+-	return fpdelay;
+-}
+-
+-/* turn primary xtal and/or pll off/on */
+-int ai_clkctl_xtal(si_t *sih, uint what, bool on)
+-{
+-	si_info_t *sii;
+-	u32 in, out, outen;
+-
+-	sii = SI_INFO(sih);
+-
+-	switch (sih->bustype) {
+-
+-	case PCI_BUS:
+-		/* pcie core doesn't have any mapping to control the xtal pu */
+-		if (PCIE(sii))
+-			return -1;
+-
+-		pci_read_config_dword(sii->pbus, PCI_GPIO_IN, &in);
+-		pci_read_config_dword(sii->pbus, PCI_GPIO_OUT, &out);
+-		pci_read_config_dword(sii->pbus, PCI_GPIO_OUTEN, &outen);
+-
+-		/*
+-		 * Avoid glitching the clock if GPRS is already using it.
+-		 * We can't actually read the state of the PLLPD so we infer it
+-		 * by the value of XTAL_PU which *is* readable via gpioin.
+-		 */
+-		if (on && (in & PCI_CFG_GPIO_XTAL))
+-			return 0;
+-
+-		if (what & XTAL)
+-			outen |= PCI_CFG_GPIO_XTAL;
+-		if (what & PLL)
+-			outen |= PCI_CFG_GPIO_PLL;
+-
+-		if (on) {
+-			/* turn primary xtal on */
+-			if (what & XTAL) {
+-				out |= PCI_CFG_GPIO_XTAL;
+-				if (what & PLL)
+-					out |= PCI_CFG_GPIO_PLL;
+-				pci_write_config_dword(sii->pbus,
+-						       PCI_GPIO_OUT, out);
+-				pci_write_config_dword(sii->pbus,
+-						       PCI_GPIO_OUTEN, outen);
+-				udelay(XTAL_ON_DELAY);
+-			}
+-
+-			/* turn pll on */
+-			if (what & PLL) {
+-				out &= ~PCI_CFG_GPIO_PLL;
+-				pci_write_config_dword(sii->pbus,
+-						       PCI_GPIO_OUT, out);
+-				mdelay(2);
+-			}
+-		} else {
+-			if (what & XTAL)
+-				out &= ~PCI_CFG_GPIO_XTAL;
+-			if (what & PLL)
+-				out |= PCI_CFG_GPIO_PLL;
+-			pci_write_config_dword(sii->pbus,
+-					       PCI_GPIO_OUT, out);
+-			pci_write_config_dword(sii->pbus,
+-					       PCI_GPIO_OUTEN, outen);
+-		}
+-
+-	default:
+-		return -1;
+-	}
+-
+-	return 0;
+-}
+-
+-/*
+- *  clock control policy function throught chipcommon
+- *
+- *    set dynamic clk control mode (forceslow, forcefast, dynamic)
+- *    returns true if we are forcing fast clock
+- *    this is a wrapper over the next internal function
+- *      to allow flexible policy settings for outside caller
+- */
+-bool ai_clkctl_cc(si_t *sih, uint mode)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	/* chipcommon cores prior to rev6 don't support dynamic clock control */
+-	if (sih->ccrev < 6)
+-		return false;
+-
+-	if (PCI_FORCEHT(sii))
+-		return mode == CLK_FAST;
+-
+-	return _ai_clkctl_cc(sii, mode);
+-}
+-
+-/* clk control mechanism through chipcommon, no policy checking */
+-static bool _ai_clkctl_cc(si_info_t *sii, uint mode)
+-{
+-	uint origidx = 0;
+-	chipcregs_t *cc;
+-	u32 scc;
+-	uint intr_val = 0;
+-	bool fast = SI_FAST(sii);
+-
+-	/* chipcommon cores prior to rev6 don't support dynamic clock control */
+-	if (sii->pub.ccrev < 6)
+-		return false;
+-
+-	if (!fast) {
+-		INTR_OFF(sii, intr_val);
+-		origidx = sii->curidx;
+-
+-		if ((sii->pub.bustype == SI_BUS) &&
+-		    ai_setcore(&sii->pub, MIPS33_CORE_ID, 0) &&
+-		    (ai_corerev(&sii->pub) <= 7) && (sii->pub.ccrev >= 10))
+-			goto done;
+-
+-		cc = (chipcregs_t *) ai_setcore(&sii->pub, CC_CORE_ID, 0);
+-	} else {
+-		cc = (chipcregs_t *) CCREGS_FAST(sii);
+-		if (cc == NULL)
+-			goto done;
+-	}
+-
+-	if (!CCCTL_ENAB(&sii->pub) && (sii->pub.ccrev < 20))
+-		goto done;
+-
+-	switch (mode) {
+-	case CLK_FAST:		/* FORCEHT, fast (pll) clock */
+-		if (sii->pub.ccrev < 10) {
+-			/*
+-			 * don't forget to force xtal back
+-			 * on before we clear SCC_DYN_XTAL..
+-			 */
+-			ai_clkctl_xtal(&sii->pub, XTAL, ON);
+-			SET_REG(&cc->slow_clk_ctl,
+-				(SCC_XC | SCC_FS | SCC_IP), SCC_IP);
+-		} else if (sii->pub.ccrev < 20) {
+-			OR_REG(&cc->system_clk_ctl, SYCC_HR);
+-		} else {
+-			OR_REG(&cc->clk_ctl_st, CCS_FORCEHT);
+-		}
+-
+-		/* wait for the PLL */
+-		if (PMUCTL_ENAB(&sii->pub)) {
+-			u32 htavail = CCS_HTAVAIL;
+-			SPINWAIT(((R_REG(&cc->clk_ctl_st) & htavail)
+-				  == 0), PMU_MAX_TRANSITION_DLY);
+-		} else {
+-			udelay(PLL_DELAY);
+-		}
+-		break;
+-
+-	case CLK_DYNAMIC:	/* enable dynamic clock control */
+-		if (sii->pub.ccrev < 10) {
+-			scc = R_REG(&cc->slow_clk_ctl);
+-			scc &= ~(SCC_FS | SCC_IP | SCC_XC);
+-			if ((scc & SCC_SS_MASK) != SCC_SS_XTAL)
+-				scc |= SCC_XC;
+-			W_REG(&cc->slow_clk_ctl, scc);
+-
+-			/*
+-			 * for dynamic control, we have to
+-			 * release our xtal_pu "force on"
+-			 */
+-			if (scc & SCC_XC)
+-				ai_clkctl_xtal(&sii->pub, XTAL, OFF);
+-		} else if (sii->pub.ccrev < 20) {
+-			/* Instaclock */
+-			AND_REG(&cc->system_clk_ctl, ~SYCC_HR);
+-		} else {
+-			AND_REG(&cc->clk_ctl_st, ~CCS_FORCEHT);
+-		}
+-		break;
+-
+-	default:
+-		break;
+-	}
+-
+- done:
+-	if (!fast) {
+-		ai_setcoreidx(&sii->pub, origidx);
+-		INTR_RESTORE(sii, intr_val);
+-	}
+-	return mode == CLK_FAST;
+-}
+-
+-/* Build device path. Support SI, PCI, and JTAG for now. */
+-int ai_devpath(si_t *sih, char *path, int size)
+-{
+-	int slen;
+-
+-	if (!path || size <= 0)
+-		return -1;
+-
+-	switch (sih->bustype) {
+-	case SI_BUS:
+-	case JTAG_BUS:
+-		slen = snprintf(path, (size_t) size, "sb/%u/", ai_coreidx(sih));
+-		break;
+-	case PCI_BUS:
+-		slen = snprintf(path, (size_t) size, "pci/%u/%u/",
+-			((struct pci_dev *)((SI_INFO(sih))->pbus))->bus->number,
+-			PCI_SLOT(
+-			    ((struct pci_dev *)((SI_INFO(sih))->pbus))->devfn));
+-		break;
+-
+-	default:
+-		slen = -1;
+-		break;
+-	}
+-
+-	if (slen < 0 || slen >= size) {
+-		path[0] = '\0';
+-		return -1;
+-	}
+-
+-	return 0;
+-}
+-
+-/* Get a variable, but only if it has a devpath prefix */
+-char *ai_getdevpathvar(si_t *sih, const char *name)
+-{
+-	char varname[SI_DEVPATH_BUFSZ + 32];
+-
+-	ai_devpathvar(sih, varname, sizeof(varname), name);
+-
+-	return getvar(NULL, varname);
+-}
+-
+-/* Get a variable, but only if it has a devpath prefix */
+-int ai_getdevpathintvar(si_t *sih, const char *name)
+-{
+-#if defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS)
+-	return getintvar(NULL, name);
+-#else
+-	char varname[SI_DEVPATH_BUFSZ + 32];
+-
+-	ai_devpathvar(sih, varname, sizeof(varname), name);
+-
+-	return getintvar(NULL, varname);
+-#endif
+-}
+-
+-char *ai_getnvramflvar(si_t *sih, const char *name)
+-{
+-	return getvar(NULL, name);
+-}
+-
+-/* Concatenate the dev path with a varname into the given 'var' buffer
+- * and return the 'var' pointer. Nothing is done to the arguments if
+- * len == 0 or var is NULL, var is still returned. On overflow, the
+- * first char will be set to '\0'.
+- */
+-static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name)
+-{
+-	uint path_len;
+-
+-	if (!var || len <= 0)
+-		return var;
+-
+-	if (ai_devpath(sih, var, len) == 0) {
+-		path_len = strlen(var);
+-
+-		if (strlen(name) + 1 > (uint) (len - path_len))
+-			var[0] = '\0';
+-		else
+-			strncpy(var + path_len, name, len - path_len - 1);
+-	}
+-
+-	return var;
+-}
+-
+-/* return true if PCIE capability exists in the pci config space */
+-static __used bool ai_ispcie(si_info_t *sii)
+-{
+-	u8 cap_ptr;
+-
+-	if (sii->pub.bustype != PCI_BUS)
+-		return false;
+-
+-	cap_ptr =
+-	    pcicore_find_pci_capability(sii->pbus, PCI_CAP_ID_EXP, NULL,
+-					NULL);
+-	if (!cap_ptr)
+-		return false;
+-
+-	return true;
+-}
+-
+-bool ai_pci_war16165(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	return PCI(sii) && (sih->buscorerev <= 10);
+-}
+-
+-void ai_pci_up(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	/* if not pci bus, we're done */
+-	if (sih->bustype != PCI_BUS)
+-		return;
+-
+-	if (PCI_FORCEHT(sii))
+-		_ai_clkctl_cc(sii, CLK_FAST);
+-
+-	if (PCIE(sii))
+-		pcicore_up(sii->pch, SI_PCIUP);
+-
+-}
+-
+-/* Unconfigure and/or apply various WARs when system is going to sleep mode */
+-void ai_pci_sleep(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	pcicore_sleep(sii->pch);
+-}
+-
+-/* Unconfigure and/or apply various WARs when going down */
+-void ai_pci_down(si_t *sih)
+-{
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	/* if not pci bus, we're done */
+-	if (sih->bustype != PCI_BUS)
+-		return;
+-
+-	/* release FORCEHT since chip is going to "down" state */
+-	if (PCI_FORCEHT(sii))
+-		_ai_clkctl_cc(sii, CLK_DYNAMIC);
+-
+-	pcicore_down(sii->pch, SI_PCIDOWN);
+-}
+-
+-/*
+- * Configure the pci core for pci client (NIC) action
+- * coremask is the bitvec of cores by index to be enabled.
+- */
+-void ai_pci_setup(si_t *sih, uint coremask)
+-{
+-	si_info_t *sii;
+-	struct sbpciregs *pciregs = NULL;
+-	u32 siflag = 0, w;
+-	uint idx = 0;
+-
+-	sii = SI_INFO(sih);
+-
+-	if (sii->pub.bustype != PCI_BUS)
+-		return;
+-
+-	if (PCI(sii)) {
+-		/* get current core index */
+-		idx = sii->curidx;
+-
+-		/* we interrupt on this backplane flag number */
+-		siflag = ai_flag(sih);
+-
+-		/* switch over to pci core */
+-		pciregs = ai_setcoreidx(sih, sii->pub.buscoreidx);
+-	}
+-
+-	/*
+-	 * Enable sb->pci interrupts.  Assume
+-	 * PCI rev 2.3 support was added in pci core rev 6 and things changed..
+-	 */
+-	if (PCIE(sii) || (PCI(sii) && ((sii->pub.buscorerev) >= 6))) {
+-		/* pci config write to set this core bit in PCIIntMask */
+-		pci_read_config_dword(sii->pbus, PCI_INT_MASK, &w);
+-		w |= (coremask << PCI_SBIM_SHIFT);
+-		pci_write_config_dword(sii->pbus, PCI_INT_MASK, w);
+-	} else {
+-		/* set sbintvec bit for our flag number */
+-		ai_setint(sih, siflag);
+-	}
+-
+-	if (PCI(sii)) {
+-		OR_REG(&pciregs->sbtopci2,
+-		       (SBTOPCI_PREF | SBTOPCI_BURST));
+-		if (sii->pub.buscorerev >= 11) {
+-			OR_REG(&pciregs->sbtopci2,
+-			       SBTOPCI_RC_READMULTI);
+-			w = R_REG(&pciregs->clkrun);
+-			W_REG(&pciregs->clkrun,
+-			      (w | PCI_CLKRUN_DSBL));
+-			w = R_REG(&pciregs->clkrun);
+-		}
+-
+-		/* switch back to previous core */
+-		ai_setcoreidx(sih, idx);
+-	}
+-}
+-
+-/*
+- * Fixup SROMless PCI device's configuration.
+- * The current core may be changed upon return.
+- */
+-int ai_pci_fixcfg(si_t *sih)
+-{
+-	uint origidx, pciidx;
+-	struct sbpciregs *pciregs = NULL;
+-	sbpcieregs_t *pcieregs = NULL;
+-	void *regs = NULL;
+-	u16 val16, *reg16 = NULL;
+-
+-	si_info_t *sii = SI_INFO(sih);
+-
+-	/* Fixup PI in SROM shadow area to enable the correct PCI core access */
+-	/* save the current index */
+-	origidx = ai_coreidx(&sii->pub);
+-
+-	/* check 'pi' is correct and fix it if not */
+-	if (sii->pub.buscoretype == PCIE_CORE_ID) {
+-		pcieregs = ai_setcore(&sii->pub, PCIE_CORE_ID, 0);
+-		regs = pcieregs;
+-		reg16 = &pcieregs->sprom[SRSH_PI_OFFSET];
+-	} else if (sii->pub.buscoretype == PCI_CORE_ID) {
+-		pciregs = ai_setcore(&sii->pub, PCI_CORE_ID, 0);
+-		regs = pciregs;
+-		reg16 = &pciregs->sprom[SRSH_PI_OFFSET];
+-	}
+-	pciidx = ai_coreidx(&sii->pub);
+-	val16 = R_REG(reg16);
+-	if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) {
+-		val16 =
+-		    (u16) (pciidx << SRSH_PI_SHIFT) | (val16 &
+-							  ~SRSH_PI_MASK);
+-		W_REG(reg16, val16);
+-	}
+-
+-	/* restore the original index */
+-	ai_setcoreidx(&sii->pub, origidx);
+-
+-	pcicore_hwup(sii->pch);
+-	return 0;
+-}
+-
+-/* mask&set gpiocontrol bits */
+-u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority)
+-{
+-	uint regoff;
+-
+-	regoff = 0;
+-
+-	/* gpios could be shared on router platforms
+-	 * ignore reservation if it's high priority (e.g., test apps)
+-	 */
+-	if ((priority != GPIO_HI_PRIORITY) &&
+-	    (sih->bustype == SI_BUS) && (val || mask)) {
+-		mask = priority ? (ai_gpioreservation & mask) :
+-		    ((ai_gpioreservation | mask) & ~(ai_gpioreservation));
+-		val &= mask;
+-	}
+-
+-	regoff = offsetof(chipcregs_t, gpiocontrol);
+-	return ai_corereg(sih, SI_CC_IDX, regoff, mask, val);
+-}
+-
+-void ai_chipcontrl_epa4331(si_t *sih, bool on)
+-{
+-	si_info_t *sii;
+-	chipcregs_t *cc;
+-	uint origidx;
+-	u32 val;
+-
+-	sii = SI_INFO(sih);
+-	origidx = ai_coreidx(sih);
+-
+-	cc = (chipcregs_t *) ai_setcore(sih, CC_CORE_ID, 0);
+-
+-	val = R_REG(&cc->chipcontrol);
+-
+-	if (on) {
+-		if (sih->chippkg == 9 || sih->chippkg == 0xb) {
+-			/* Ext PA Controls for 4331 12x9 Package */
+-			W_REG(&cc->chipcontrol, val |
+-			      (CCTRL4331_EXTPA_EN |
+-			       CCTRL4331_EXTPA_ON_GPIO2_5));
+-		} else {
+-			/* Ext PA Controls for 4331 12x12 Package */
+-			W_REG(&cc->chipcontrol,
+-			      val | (CCTRL4331_EXTPA_EN));
+-		}
+-	} else {
+-		val &= ~(CCTRL4331_EXTPA_EN | CCTRL4331_EXTPA_ON_GPIO2_5);
+-		W_REG(&cc->chipcontrol, val);
+-	}
+-
+-	ai_setcoreidx(sih, origidx);
+-}
+-
+-/* Enable BT-COEX & Ex-PA for 4313 */
+-void ai_epa_4313war(si_t *sih)
+-{
+-	si_info_t *sii;
+-	chipcregs_t *cc;
+-	uint origidx;
+-
+-	sii = SI_INFO(sih);
+-	origidx = ai_coreidx(sih);
+-
+-	cc = (chipcregs_t *) ai_setcore(sih, CC_CORE_ID, 0);
+-
+-	/* EPA Fix */
+-	W_REG(&cc->gpiocontrol,
+-	      R_REG(&cc->gpiocontrol) | GPIO_CTRL_EPA_EN_MASK);
+-
+-	ai_setcoreidx(sih, origidx);
+-}
+-
+-/* check if the device is removed */
+-bool ai_deviceremoved(si_t *sih)
+-{
+-	u32 w;
+-	si_info_t *sii;
+-
+-	sii = SI_INFO(sih);
+-
+-	switch (sih->bustype) {
+-	case PCI_BUS:
+-		pci_read_config_dword(sii->pbus, PCI_VENDOR_ID, &w);
+-		if ((w & 0xFFFF) != PCI_VENDOR_ID_BROADCOM)
+-			return true;
+-		break;
+-	}
+-	return false;
+-}
+-
+-bool ai_is_sprom_available(si_t *sih)
+-{
+-	if (sih->ccrev >= 31) {
+-		si_info_t *sii;
+-		uint origidx;
+-		chipcregs_t *cc;
+-		u32 sromctrl;
+-
+-		if ((sih->cccaps & CC_CAP_SROM) == 0)
+-			return false;
+-
+-		sii = SI_INFO(sih);
+-		origidx = sii->curidx;
+-		cc = ai_setcoreidx(sih, SI_CC_IDX);
+-		sromctrl = R_REG(&cc->sromcontrol);
+-		ai_setcoreidx(sih, origidx);
+-		return sromctrl & SRC_PRESENT;
+-	}
+-
+-	switch (sih->chip) {
+-	case BCM4329_CHIP_ID:
+-		return (sih->chipst & CST4329_SPROM_SEL) != 0;
+-	case BCM4319_CHIP_ID:
+-		return (sih->chipst & CST4319_SPROM_SEL) != 0;
+-	case BCM4336_CHIP_ID:
+-		return (sih->chipst & CST4336_SPROM_PRESENT) != 0;
+-	case BCM4330_CHIP_ID:
+-		return (sih->chipst & CST4330_SPROM_PRESENT) != 0;
+-	case BCM4313_CHIP_ID:
+-		return (sih->chipst & CST4313_SPROM_PRESENT) != 0;
+-	case BCM4331_CHIP_ID:
+-		return (sih->chipst & CST4331_SPROM_PRESENT) != 0;
+-	default:
+-		return true;
+-	}
+-}
+-
+-bool ai_is_otp_disabled(si_t *sih)
+-{
+-	switch (sih->chip) {
+-	case BCM4329_CHIP_ID:
+-		return (sih->chipst & CST4329_SPROM_OTP_SEL_MASK) ==
+-		    CST4329_OTP_PWRDN;
+-	case BCM4319_CHIP_ID:
+-		return (sih->chipst & CST4319_SPROM_OTP_SEL_MASK) ==
+-		    CST4319_OTP_PWRDN;
+-	case BCM4336_CHIP_ID:
+-		return (sih->chipst & CST4336_OTP_PRESENT) == 0;
+-	case BCM4330_CHIP_ID:
+-		return (sih->chipst & CST4330_OTP_PRESENT) == 0;
+-	case BCM4313_CHIP_ID:
+-		return (sih->chipst & CST4313_OTP_PRESENT) == 0;
+-		/* These chips always have their OTP on */
+-	case BCM43224_CHIP_ID:
+-	case BCM43225_CHIP_ID:
+-	case BCM43421_CHIP_ID:
+-	case BCM43235_CHIP_ID:
+-	case BCM43236_CHIP_ID:
+-	case BCM43238_CHIP_ID:
+-	case BCM4331_CHIP_ID:
+-	default:
+-		return false;
+-	}
+-}
+-
+-bool ai_is_otp_powered(si_t *sih)
+-{
+-	if (PMUCTL_ENAB(sih))
+-		return si_pmu_is_otp_powered(sih);
+-	return true;
+-}
+-
+-void ai_otp_power(si_t *sih, bool on)
+-{
+-	if (PMUCTL_ENAB(sih))
+-		si_pmu_otp_power(sih, on);
+-	udelay(1000);
+-}
+diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h
+deleted file mode 100644
+index b98099e..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/aiutils.h
++++ /dev/null
+@@ -1,546 +0,0 @@
+-/*
+- * Copyright (c) 2011 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_aiutils_h_
+-#define	_aiutils_h_
+-
+-/* cpp contortions to concatenate w/arg prescan */
+-#ifndef PAD
+-#define	_PADLINE(line)	pad ## line
+-#define	_XSTR(line)	_PADLINE(line)
+-#define	PAD		_XSTR(__LINE__)
+-#endif
+-
+-/* Include the soci specific files */
+-#include <aidmp.h>
+-
+-/*
+- * SOC Interconnect Address Map.
+- * All regions may not exist on all chips.
+- */
+-/* Physical SDRAM */
+-#define SI_SDRAM_BASE		0x00000000
+-/* Host Mode sb2pcitranslation0 (64 MB) */
+-#define SI_PCI_MEM		0x08000000
+-#define SI_PCI_MEM_SZ		(64 * 1024 * 1024)
+-/* Host Mode sb2pcitranslation1 (64 MB) */
+-#define SI_PCI_CFG		0x0c000000
+-/* Byteswapped Physical SDRAM */
+-#define	SI_SDRAM_SWAPPED	0x10000000
+-/* Region 2 for sdram (512 MB) */
+-#define SI_SDRAM_R2		0x80000000
+-
+-#ifdef SI_ENUM_BASE_VARIABLE
+-#define SI_ENUM_BASE		(sii->pub.si_enum_base)
+-#else
+-#define SI_ENUM_BASE		0x18000000	/* Enumeration space base */
+-#endif				/* SI_ENUM_BASE_VARIABLE */
+-
+-/* Wrapper space base */
+-#define SI_WRAP_BASE		0x18100000
+-/* each core gets 4Kbytes for registers */
+-#define SI_CORE_SIZE		0x1000
+-/*
+- * Max cores (this is arbitrary, for software
+- * convenience and could be changed if we
+- * make any larger chips
+- */
+-#define	SI_MAXCORES		16
+-
+-/* On-chip RAM on chips that also have DDR */
+-#define	SI_FASTRAM		0x19000000
+-#define	SI_FASTRAM_SWAPPED	0x19800000
+-
+-/* Flash Region 2 (region 1 shadowed here) */
+-#define	SI_FLASH2		0x1c000000
+-/* Size of Flash Region 2 */
+-#define	SI_FLASH2_SZ		0x02000000
+-/* ARM Cortex-M3 ROM */
+-#define	SI_ARMCM3_ROM		0x1e000000
+-/* MIPS Flash Region 1 */
+-#define	SI_FLASH1		0x1fc00000
+-/* MIPS Size of Flash Region 1 */
+-#define	SI_FLASH1_SZ		0x00400000
+-/* ARM7TDMI-S ROM */
+-#define	SI_ARM7S_ROM		0x20000000
+-/* ARM Cortex-M3 SRAM Region 2 */
+-#define	SI_ARMCM3_SRAM2		0x60000000
+-/* ARM7TDMI-S SRAM Region 2 */
+-#define	SI_ARM7S_SRAM2		0x80000000
+-/* ARM Flash Region 1 */
+-#define	SI_ARM_FLASH1		0xffff0000
+-/* ARM Size of Flash Region 1 */
+-#define	SI_ARM_FLASH1_SZ	0x00010000
+-
+-/* Client Mode sb2pcitranslation2 (1 GB) */
+-#define SI_PCI_DMA		0x40000000
+-/* Client Mode sb2pcitranslation2 (1 GB) */
+-#define SI_PCI_DMA2		0x80000000
+-/* Client Mode sb2pcitranslation2 size in bytes */
+-#define SI_PCI_DMA_SZ		0x40000000
+-/* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 bits */
+-#define SI_PCIE_DMA_L32		0x00000000
+-/* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32 bits */
+-#define SI_PCIE_DMA_H32		0x80000000
+-
+-/* core codes */
+-#define	NODEV_CORE_ID		0x700	/* Invalid coreid */
+-#define	CC_CORE_ID		0x800	/* chipcommon core */
+-#define	ILINE20_CORE_ID		0x801	/* iline20 core */
+-#define	SRAM_CORE_ID		0x802	/* sram core */
+-#define	SDRAM_CORE_ID		0x803	/* sdram core */
+-#define	PCI_CORE_ID		0x804	/* pci core */
+-#define	MIPS_CORE_ID		0x805	/* mips core */
+-#define	ENET_CORE_ID		0x806	/* enet mac core */
+-#define	CODEC_CORE_ID		0x807	/* v90 codec core */
+-#define	USB_CORE_ID		0x808	/* usb 1.1 host/device core */
+-#define	ADSL_CORE_ID		0x809	/* ADSL core */
+-#define	ILINE100_CORE_ID	0x80a	/* iline100 core */
+-#define	IPSEC_CORE_ID		0x80b	/* ipsec core */
+-#define	UTOPIA_CORE_ID		0x80c	/* utopia core */
+-#define	PCMCIA_CORE_ID		0x80d	/* pcmcia core */
+-#define	SOCRAM_CORE_ID		0x80e	/* internal memory core */
+-#define	MEMC_CORE_ID		0x80f	/* memc sdram core */
+-#define	OFDM_CORE_ID		0x810	/* OFDM phy core */
+-#define	EXTIF_CORE_ID		0x811	/* external interface core */
+-#define	D11_CORE_ID		0x812	/* 802.11 MAC core */
+-#define	APHY_CORE_ID		0x813	/* 802.11a phy core */
+-#define	BPHY_CORE_ID		0x814	/* 802.11b phy core */
+-#define	GPHY_CORE_ID		0x815	/* 802.11g phy core */
+-#define	MIPS33_CORE_ID		0x816	/* mips3302 core */
+-#define	USB11H_CORE_ID		0x817	/* usb 1.1 host core */
+-#define	USB11D_CORE_ID		0x818	/* usb 1.1 device core */
+-#define	USB20H_CORE_ID		0x819	/* usb 2.0 host core */
+-#define	USB20D_CORE_ID		0x81a	/* usb 2.0 device core */
+-#define	SDIOH_CORE_ID		0x81b	/* sdio host core */
+-#define	ROBO_CORE_ID		0x81c	/* roboswitch core */
+-#define	ATA100_CORE_ID		0x81d	/* parallel ATA core */
+-#define	SATAXOR_CORE_ID		0x81e	/* serial ATA & XOR DMA core */
+-#define	GIGETH_CORE_ID		0x81f	/* gigabit ethernet core */
+-#define	PCIE_CORE_ID		0x820	/* pci express core */
+-#define	NPHY_CORE_ID		0x821	/* 802.11n 2x2 phy core */
+-#define	SRAMC_CORE_ID		0x822	/* SRAM controller core */
+-#define	MINIMAC_CORE_ID		0x823	/* MINI MAC/phy core */
+-#define	ARM11_CORE_ID		0x824	/* ARM 1176 core */
+-#define	ARM7S_CORE_ID		0x825	/* ARM7tdmi-s core */
+-#define	LPPHY_CORE_ID		0x826	/* 802.11a/b/g phy core */
+-#define	PMU_CORE_ID		0x827	/* PMU core */
+-#define	SSNPHY_CORE_ID		0x828	/* 802.11n single-stream phy core */
+-#define	SDIOD_CORE_ID		0x829	/* SDIO device core */
+-#define	ARMCM3_CORE_ID		0x82a	/* ARM Cortex M3 core */
+-#define	HTPHY_CORE_ID		0x82b	/* 802.11n 4x4 phy core */
+-#define	MIPS74K_CORE_ID		0x82c	/* mips 74k core */
+-#define	GMAC_CORE_ID		0x82d	/* Gigabit MAC core */
+-#define	DMEMC_CORE_ID		0x82e	/* DDR1/2 memory controller core */
+-#define	PCIERC_CORE_ID		0x82f	/* PCIE Root Complex core */
+-#define	OCP_CORE_ID		0x830	/* OCP2OCP bridge core */
+-#define	SC_CORE_ID		0x831	/* shared common core */
+-#define	AHB_CORE_ID		0x832	/* OCP2AHB bridge core */
+-#define	SPIH_CORE_ID		0x833	/* SPI host core */
+-#define	I2S_CORE_ID		0x834	/* I2S core */
+-#define	DMEMS_CORE_ID		0x835	/* SDR/DDR1 memory controller core */
+-#define	DEF_SHIM_COMP		0x837	/* SHIM component in ubus/6362 */
+-#define OOB_ROUTER_CORE_ID	0x367	/* OOB router core ID */
+-#define	DEF_AI_COMP		0xfff	/* Default component, in ai chips it
+-					 * maps all unused address ranges
+-					 */
+-
+-/* There are TWO constants on all HND chips: SI_ENUM_BASE above,
+- * and chipcommon being the first core:
+- */
+-#define	SI_CC_IDX		0
+-
+-/* SOC Interconnect types (aka chip types) */
+-#define	SOCI_AI			1
+-
+-/* Common core control flags */
+-#define	SICF_BIST_EN		0x8000
+-#define	SICF_PME_EN		0x4000
+-#define	SICF_CORE_BITS		0x3ffc
+-#define	SICF_FGC		0x0002
+-#define	SICF_CLOCK_EN		0x0001
+-
+-/* Common core status flags */
+-#define	SISF_BIST_DONE		0x8000
+-#define	SISF_BIST_ERROR		0x4000
+-#define	SISF_GATED_CLK		0x2000
+-#define	SISF_DMA64		0x1000
+-#define	SISF_CORE_BITS		0x0fff
+-
+-/* A register that is common to all cores to
+- * communicate w/PMU regarding clock control.
+- */
+-#define SI_CLK_CTL_ST		0x1e0	/* clock control and status */
+-
+-/* clk_ctl_st register */
+-#define	CCS_FORCEALP		0x00000001	/* force ALP request */
+-#define	CCS_FORCEHT		0x00000002	/* force HT request */
+-#define	CCS_FORCEILP		0x00000004	/* force ILP request */
+-#define	CCS_ALPAREQ		0x00000008	/* ALP Avail Request */
+-#define	CCS_HTAREQ		0x00000010	/* HT Avail Request */
+-#define	CCS_FORCEHWREQOFF	0x00000020	/* Force HW Clock Request Off */
+-#define CCS_ERSRC_REQ_MASK	0x00000700	/* external resource requests */
+-#define CCS_ERSRC_REQ_SHIFT	8
+-#define	CCS_ALPAVAIL		0x00010000	/* ALP is available */
+-#define	CCS_HTAVAIL		0x00020000	/* HT is available */
+-#define CCS_BP_ON_APL		0x00040000	/* RO: running on ALP clock */
+-#define CCS_BP_ON_HT		0x00080000	/* RO: running on HT clock */
+-#define CCS_ERSRC_STS_MASK	0x07000000	/* external resource status */
+-#define CCS_ERSRC_STS_SHIFT	24
+-
+-/* HT avail in chipc and pcmcia on 4328a0 */
+-#define	CCS0_HTAVAIL		0x00010000
+-/* ALP avail in chipc and pcmcia on 4328a0 */
+-#define	CCS0_ALPAVAIL		0x00020000
+-
+-/* Not really related to SOC Interconnect, but a couple of software
+- * conventions for the use the flash space:
+- */
+-
+-/* Minumum amount of flash we support */
+-#define FLASH_MIN		0x00020000	/* Minimum flash size */
+-
+-/* A boot/binary may have an embedded block that describes its size  */
+-#define	BISZ_OFFSET		0x3e0	/* At this offset into the binary */
+-#define	BISZ_MAGIC		0x4249535a	/* Marked with value: 'BISZ' */
+-#define	BISZ_MAGIC_IDX		0	/* Word 0: magic */
+-#define	BISZ_TXTST_IDX		1	/*      1: text start */
+-#define	BISZ_TXTEND_IDX		2	/*      2: text end */
+-#define	BISZ_DATAST_IDX		3	/*      3: data start */
+-#define	BISZ_DATAEND_IDX	4	/*      4: data end */
+-#define	BISZ_BSSST_IDX		5	/*      5: bss start */
+-#define	BISZ_BSSEND_IDX		6	/*      6: bss end */
+-#define BISZ_SIZE		7	/* descriptor size in 32-bit integers */
+-
+-#define	SI_INFO(sih)	(si_info_t *)sih
+-
+-#define	GOODCOREADDR(x, b) \
+-	(((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \
+-		IS_ALIGNED((x), SI_CORE_SIZE))
+-#define	GOODREGS(regs) \
+-	((regs) != NULL && IS_ALIGNED((unsigned long)(regs), SI_CORE_SIZE))
+-#define BADCOREADDR	0
+-#define	GOODIDX(idx)	(((uint)idx) < SI_MAXCORES)
+-#define	NOREV		-1	/* Invalid rev */
+-
+-/* Newer chips can access PCI/PCIE and CC core without requiring to change
+- * PCI BAR0 WIN
+- */
+-#define SI_FAST(si) (((si)->pub.buscoretype == PCIE_CORE_ID) ||	\
+-		     (((si)->pub.buscoretype == PCI_CORE_ID) && \
+-		      (si)->pub.buscorerev >= 13))
+-
+-#define PCIEREGS(si) (((char *)((si)->curmap) + PCI_16KB0_PCIREGS_OFFSET))
+-#define CCREGS_FAST(si) (((char *)((si)->curmap) + PCI_16KB0_CCREGS_OFFSET))
+-
+-/*
+- * Macros to disable/restore function core(D11, ENET, ILINE20, etc) interrupts
+- * before after core switching to avoid invalid register accesss inside ISR.
+- */
+-#define INTR_OFF(si, intr_val) \
+-	if ((si)->intrsoff_fn && \
+-	    (si)->coreid[(si)->curidx] == (si)->dev_coreid) \
+-		intr_val = (*(si)->intrsoff_fn)((si)->intr_arg)
+-#define INTR_RESTORE(si, intr_val) \
+-	if ((si)->intrsrestore_fn && \
+-	    (si)->coreid[(si)->curidx] == (si)->dev_coreid) \
+-		(*(si)->intrsrestore_fn)((si)->intr_arg, intr_val)
+-
+-/* dynamic clock control defines */
+-#define	LPOMINFREQ		25000	/* low power oscillator min */
+-#define	LPOMAXFREQ		43000	/* low power oscillator max */
+-#define	XTALMINFREQ		19800000	/* 20 MHz - 1% */
+-#define	XTALMAXFREQ		20200000	/* 20 MHz + 1% */
+-#define	PCIMINFREQ		25000000	/* 25 MHz */
+-#define	PCIMAXFREQ		34000000	/* 33 MHz + fudge */
+-
+-#define	ILP_DIV_5MHZ		0	/* ILP = 5 MHz */
+-#define	ILP_DIV_1MHZ		4	/* ILP = 1 MHz */
+-
+-#define PCI(si)		(((si)->pub.bustype == PCI_BUS) &&	\
+-			 ((si)->pub.buscoretype == PCI_CORE_ID))
+-#define PCIE(si)	(((si)->pub.bustype == PCI_BUS) &&	\
+-			 ((si)->pub.buscoretype == PCIE_CORE_ID))
+-#define PCI_FORCEHT(si)	\
+-	(PCIE(si) && (si->pub.chip == BCM4716_CHIP_ID))
+-
+-/* GPIO Based LED powersave defines */
+-#define DEFAULT_GPIO_ONTIME	10	/* Default: 10% on */
+-#define DEFAULT_GPIO_OFFTIME	90	/* Default: 10% on */
+-
+-#ifndef DEFAULT_GPIOTIMERVAL
+-#define DEFAULT_GPIOTIMERVAL \
+-	((DEFAULT_GPIO_ONTIME << GPIO_ONTIME_SHIFT) | DEFAULT_GPIO_OFFTIME)
+-#endif
+-
+-/*
+- * Data structure to export all chip specific common variables
+- *   public (read-only) portion of aiutils handle returned by si_attach()
+- */
+-struct si_pub {
+-	uint bustype;		/* SI_BUS, PCI_BUS */
+-	uint buscoretype;	/* PCI_CORE_ID, PCIE_CORE_ID, PCMCIA_CORE_ID */
+-	uint buscorerev;	/* buscore rev */
+-	uint buscoreidx;	/* buscore index */
+-	int ccrev;		/* chip common core rev */
+-	u32 cccaps;		/* chip common capabilities */
+-	u32 cccaps_ext;	/* chip common capabilities extension */
+-	int pmurev;		/* pmu core rev */
+-	u32 pmucaps;		/* pmu capabilities */
+-	uint boardtype;		/* board type */
+-	uint boardvendor;	/* board vendor */
+-	uint boardflags;	/* board flags */
+-	uint boardflags2;	/* board flags2 */
+-	uint chip;		/* chip number */
+-	uint chiprev;		/* chip revision */
+-	uint chippkg;		/* chip package option */
+-	u32 chipst;		/* chip status */
+-	bool issim;		/* chip is in simulation or emulation */
+-	uint socirev;		/* SOC interconnect rev */
+-	bool pci_pr32414;
+-
+-};
+-
+-/*
+- * for HIGH_ONLY driver, the si_t must be writable to allow states sync from
+- * BMAC to HIGH driver for monolithic driver, it is readonly to prevent accident
+- * change
+- */
+-typedef const struct si_pub si_t;
+-
+-/*
+- * Many of the routines below take an 'sih' handle as their first arg.
+- * Allocate this by calling si_attach().  Free it by calling si_detach().
+- * At any one time, the sih is logically focused on one particular si core
+- * (the "current core").
+- * Use si_setcore() or si_setcoreidx() to change the association to another core
+- */
+-
+-#define	BADIDX		(SI_MAXCORES + 1)
+-
+-/* clkctl xtal what flags */
+-#define	XTAL			0x1	/* primary crystal oscillator (2050) */
+-#define	PLL			0x2	/* main chip pll */
+-
+-/* clkctl clk mode */
+-#define	CLK_FAST		0	/* force fast (pll) clock */
+-#define	CLK_DYNAMIC		2	/* enable dynamic clock control */
+-
+-/* GPIO usage priorities */
+-#define GPIO_DRV_PRIORITY	0	/* Driver */
+-#define GPIO_APP_PRIORITY	1	/* Application */
+-#define GPIO_HI_PRIORITY	2	/* Highest priority. Ignore GPIO
+-					 * reservation
+-					 */
+-
+-/* GPIO pull up/down */
+-#define GPIO_PULLUP		0
+-#define GPIO_PULLDN		1
+-
+-/* GPIO event regtype */
+-#define GPIO_REGEVT		0	/* GPIO register event */
+-#define GPIO_REGEVT_INTMSK	1	/* GPIO register event int mask */
+-#define GPIO_REGEVT_INTPOL	2	/* GPIO register event int polarity */
+-
+-/* device path */
+-#define SI_DEVPATH_BUFSZ	16	/* min buffer size in bytes */
+-
+-/* SI routine enumeration: to be used by update function with multiple hooks */
+-#define	SI_DOATTACH	1
+-#define SI_PCIDOWN	2
+-#define SI_PCIUP	3
+-
+-#define	ISSIM_ENAB(sih)	0
+-
+-/* PMU clock/power control */
+-#if defined(BCMPMUCTL)
+-#define PMUCTL_ENAB(sih)	(BCMPMUCTL)
+-#else
+-#define PMUCTL_ENAB(sih)	((sih)->cccaps & CC_CAP_PMU)
+-#endif
+-
+-/* chipcommon clock/power control (exclusive with PMU's) */
+-#if defined(BCMPMUCTL) && BCMPMUCTL
+-#define CCCTL_ENAB(sih)		(0)
+-#define CCPLL_ENAB(sih)		(0)
+-#else
+-#define CCCTL_ENAB(sih)		((sih)->cccaps & CC_CAP_PWR_CTL)
+-#define CCPLL_ENAB(sih)		((sih)->cccaps & CC_CAP_PLL_MASK)
+-#endif
+-
+-typedef void (*gpio_handler_t) (u32 stat, void *arg);
+-
+-/* External PA enable mask */
+-#define GPIO_CTRL_EPA_EN_MASK 0x40
+-
+-#define	SI_ERROR(args)
+-
+-#ifdef BCMDBG
+-#define	SI_MSG(args)	printk args
+-#else
+-#define	SI_MSG(args)
+-#endif				/* BCMDBG */
+-
+-/* Define SI_VMSG to printf for verbose debugging, but don't check it in */
+-#define	SI_VMSG(args)
+-
+-#define	IS_SIM(chippkg)	\
+-	((chippkg == HDLSIM_PKG_ID) || (chippkg == HWSIM_PKG_ID))
+-
+-typedef u32(*si_intrsoff_t) (void *intr_arg);
+-typedef void (*si_intrsrestore_t) (void *intr_arg, u32 arg);
+-typedef bool(*si_intrsenabled_t) (void *intr_arg);
+-
+-typedef struct gpioh_item {
+-	void *arg;
+-	bool level;
+-	gpio_handler_t handler;
+-	u32 event;
+-	struct gpioh_item *next;
+-} gpioh_item_t;
+-
+-/* misc si info needed by some of the routines */
+-typedef struct si_info {
+-	struct si_pub pub;	/* back plane public state (must be first) */
+-	void *pbus;		/* handle to bus (pci/sdio/..) */
+-	uint dev_coreid;	/* the core provides driver functions */
+-	void *intr_arg;		/* interrupt callback function arg */
+-	si_intrsoff_t intrsoff_fn;	/* turns chip interrupts off */
+-	si_intrsrestore_t intrsrestore_fn; /* restore chip interrupts */
+-	si_intrsenabled_t intrsenabled_fn; /* check if interrupts are enabled */
+-
+-	void *pch;		/* PCI/E core handle */
+-
+-	gpioh_item_t *gpioh_head;	/* GPIO event handlers list */
+-
+-	bool memseg;		/* flag to toggle MEM_SEG register */
+-
+-	char *vars;
+-	uint varsz;
+-
+-	void *curmap;		/* current regs va */
+-	void *regs[SI_MAXCORES];	/* other regs va */
+-
+-	uint curidx;		/* current core index */
+-	uint numcores;		/* # discovered cores */
+-	uint coreid[SI_MAXCORES]; /* id of each core */
+-	u32 coresba[SI_MAXCORES]; /* backplane address of each core */
+-	void *regs2[SI_MAXCORES]; /* 2nd virtual address per core (usbh20) */
+-	u32 coresba2[SI_MAXCORES]; /* 2nd phys address per core (usbh20) */
+-	u32 coresba_size[SI_MAXCORES]; /* backplane address space size */
+-	u32 coresba2_size[SI_MAXCORES];	/* second address space size */
+-
+-	void *curwrap;		/* current wrapper va */
+-	void *wrappers[SI_MAXCORES];	/* other cores wrapper va */
+-	u32 wrapba[SI_MAXCORES];	/* address of controlling wrapper */
+-
+-	u32 cia[SI_MAXCORES];	/* erom cia entry for each core */
+-	u32 cib[SI_MAXCORES];	/* erom cia entry for each core */
+-	u32 oob_router;	/* oob router registers for axi */
+-} si_info_t;
+-
+-/* AMBA Interconnect exported externs */
+-extern void ai_scan(si_t *sih, void *regs, uint devid);
+-
+-extern uint ai_flag(si_t *sih);
+-extern void ai_setint(si_t *sih, int siflag);
+-extern uint ai_coreidx(si_t *sih);
+-extern uint ai_corevendor(si_t *sih);
+-extern uint ai_corerev(si_t *sih);
+-extern bool ai_iscoreup(si_t *sih);
+-extern void *ai_setcoreidx(si_t *sih, uint coreidx);
+-extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val);
+-extern void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val);
+-extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val);
+-extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
+-		       uint val);
+-extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits);
+-extern void ai_core_disable(si_t *sih, u32 bits);
+-extern int ai_numaddrspaces(si_t *sih);
+-extern u32 ai_addrspace(si_t *sih, uint asidx);
+-extern u32 ai_addrspacesize(si_t *sih, uint asidx);
+-extern void ai_write_wrap_reg(si_t *sih, u32 offset, u32 val);
+-
+-/* === exported functions === */
+-extern si_t *ai_attach(uint pcidev, void *regs, uint bustype,
+-		       void *sdh, char **vars, uint *varsz);
+-
+-extern void ai_detach(si_t *sih);
+-extern bool ai_pci_war16165(si_t *sih);
+-
+-extern uint ai_coreid(si_t *sih);
+-extern uint ai_corerev(si_t *sih);
+-extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask,
+-		uint val);
+-extern void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val);
+-extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val);
+-extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val);
+-extern bool ai_iscoreup(si_t *sih);
+-extern uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit);
+-extern void *ai_setcoreidx(si_t *sih, uint coreidx);
+-extern void *ai_setcore(si_t *sih, uint coreid, uint coreunit);
+-extern void *ai_switch_core(si_t *sih, uint coreid, uint *origidx,
+-			    uint *intr_val);
+-extern void ai_restore_core(si_t *sih, uint coreid, uint intr_val);
+-extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits);
+-extern void ai_core_disable(si_t *sih, u32 bits);
+-extern u32 ai_alp_clock(si_t *sih);
+-extern u32 ai_ilp_clock(si_t *sih);
+-extern void ai_pci_setup(si_t *sih, uint coremask);
+-extern void ai_setint(si_t *sih, int siflag);
+-extern bool ai_backplane64(si_t *sih);
+-extern void ai_register_intr_callback(si_t *sih, void *intrsoff_fn,
+-				      void *intrsrestore_fn,
+-				      void *intrsenabled_fn, void *intr_arg);
+-extern void ai_deregister_intr_callback(si_t *sih);
+-extern void ai_clkctl_init(si_t *sih);
+-extern u16 ai_clkctl_fast_pwrup_delay(si_t *sih);
+-extern bool ai_clkctl_cc(si_t *sih, uint mode);
+-extern int ai_clkctl_xtal(si_t *sih, uint what, bool on);
+-extern bool ai_deviceremoved(si_t *sih);
+-extern u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val,
+-			     u8 priority);
+-
+-/* OTP status */
+-extern bool ai_is_otp_disabled(si_t *sih);
+-extern bool ai_is_otp_powered(si_t *sih);
+-extern void ai_otp_power(si_t *sih, bool on);
+-
+-/* SPROM availability */
+-extern bool ai_is_sprom_available(si_t *sih);
+-
+-/*
+- * Build device path. Path size must be >= SI_DEVPATH_BUFSZ.
+- * The returned path is NULL terminated and has trailing '/'.
+- * Return 0 on success, nonzero otherwise.
+- */
+-extern int ai_devpath(si_t *sih, char *path, int size);
+-/* Read variable with prepending the devpath to the name */
+-extern char *ai_getdevpathvar(si_t *sih, const char *name);
+-extern int ai_getdevpathintvar(si_t *sih, const char *name);
+-
+-extern void ai_pci_sleep(si_t *sih);
+-extern void ai_pci_down(si_t *sih);
+-extern void ai_pci_up(si_t *sih);
+-extern int ai_pci_fixcfg(si_t *sih);
+-
+-extern void ai_chipcontrl_epa4331(si_t *sih, bool on);
+-/* Enable Ex-PA for 4313 */
+-extern void ai_epa_4313war(si_t *sih);
+-
+-char *ai_getnvramflvar(si_t *sih, const char *name);
+-
+-#endif				/* _aiutils_h_ */
+diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c
+deleted file mode 100644
+index d09628b..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c
++++ /dev/null
+@@ -1,936 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/delay.h>
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <linux/module.h>
+-#include <linux/pci.h>
+-#include <linux/crc-ccitt.h>
+-
+-#include <bcmdefs.h>
+-#include <bcmdevs.h>
+-#include <bcmutils.h>
+-#include <aiutils.h>
+-#include <hndsoc.h>
+-#include <sbchipc.h>
+-#include <bcmotp.h>
+-
+-/*
+- * There are two different OTP controllers so far:
+- * 	1. new IPX OTP controller:	chipc 21, >=23
+- * 	2. older HND OTP controller:	chipc 12, 17, 22
+- *
+- * Define BCMHNDOTP to include support for the HND OTP controller.
+- * Define BCMIPXOTP to include support for the IPX OTP controller.
+- *
+- * NOTE 1: More than one may be defined
+- * NOTE 2: If none are defined, the default is to include them all.
+- */
+-
+-#if !defined(BCMHNDOTP) && !defined(BCMIPXOTP)
+-#define BCMHNDOTP	1
+-#define BCMIPXOTP	1
+-#endif
+-
+-#define OTPTYPE_HND(ccrev)	((ccrev) < 21 || (ccrev) == 22)
+-#define OTPTYPE_IPX(ccrev)	((ccrev) == 21 || (ccrev) >= 23)
+-
+-#define OTPP_TRIES	10000000	/* # of tries for OTPP */
+-
+-#ifdef BCMIPXOTP
+-#define MAXNUMRDES		9	/* Maximum OTP redundancy entries */
+-#endif
+-
+-/* OTP common function type */
+-typedef int (*otp_status_t) (void *oh);
+-typedef int (*otp_size_t) (void *oh);
+-typedef void *(*otp_init_t) (si_t *sih);
+-typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off);
+-typedef int (*otp_read_region_t) (si_t *sih, int region, u16 *data,
+-				  uint *wlen);
+-typedef int (*otp_nvread_t) (void *oh, char *data, uint *len);
+-
+-/* OTP function struct */
+-typedef struct otp_fn_s {
+-	otp_size_t size;
+-	otp_read_bit_t read_bit;
+-	otp_init_t init;
+-	otp_read_region_t read_region;
+-	otp_nvread_t nvread;
+-	otp_status_t status;
+-} otp_fn_t;
+-
+-typedef struct {
+-	uint ccrev;		/* chipc revision */
+-	otp_fn_t *fn;		/* OTP functions */
+-	si_t *sih;		/* Saved sb handle */
+-
+-#ifdef BCMIPXOTP
+-	/* IPX OTP section */
+-	u16 wsize;		/* Size of otp in words */
+-	u16 rows;		/* Geometry */
+-	u16 cols;		/* Geometry */
+-	u32 status;		/* Flag bits (lock/prog/rv).
+-				 * (Reflected only when OTP is power cycled)
+-				 */
+-	u16 hwbase;		/* hardware subregion offset */
+-	u16 hwlim;		/* hardware subregion boundary */
+-	u16 swbase;		/* software subregion offset */
+-	u16 swlim;		/* software subregion boundary */
+-	u16 fbase;		/* fuse subregion offset */
+-	u16 flim;		/* fuse subregion boundary */
+-	int otpgu_base;		/* offset to General Use Region */
+-#endif				/* BCMIPXOTP */
+-
+-#ifdef BCMHNDOTP
+-	/* HND OTP section */
+-	uint size;		/* Size of otp in bytes */
+-	uint hwprot;		/* Hardware protection bits */
+-	uint signvalid;		/* Signature valid bits */
+-	int boundary;		/* hw/sw boundary */
+-#endif				/* BCMHNDOTP */
+-} otpinfo_t;
+-
+-static otpinfo_t otpinfo;
+-
+-/*
+- * IPX OTP Code
+- *
+- *   Exported functions:
+- *	ipxotp_status()
+- *	ipxotp_size()
+- *	ipxotp_init()
+- *	ipxotp_read_bit()
+- *	ipxotp_read_region()
+- *	ipxotp_nvread()
+- *
+- */
+-
+-#ifdef BCMIPXOTP
+-
+-#define HWSW_RGN(rgn)		(((rgn) == OTP_HW_RGN) ? "h/w" : "s/w")
+-
+-/* OTP layout */
+-/* CC revs 21, 24 and 27 OTP General Use Region word offset */
+-#define REVA4_OTPGU_BASE	12
+-
+-/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */
+-#define REVB8_OTPGU_BASE	20
+-
+-/* CC rev 36 OTP General Use Region word offset */
+-#define REV36_OTPGU_BASE	12
+-
+-/* Subregion word offsets in General Use region */
+-#define OTPGU_HSB_OFF		0
+-#define OTPGU_SFB_OFF		1
+-#define OTPGU_CI_OFF		2
+-#define OTPGU_P_OFF		3
+-#define OTPGU_SROM_OFF		4
+-
+-/* Flag bit offsets in General Use region  */
+-#define OTPGU_HWP_OFF		60
+-#define OTPGU_SWP_OFF		61
+-#define OTPGU_CIP_OFF		62
+-#define OTPGU_FUSEP_OFF		63
+-#define OTPGU_CIP_MSK		0x4000
+-#define OTPGU_P_MSK		0xf000
+-#define OTPGU_P_SHIFT		(OTPGU_HWP_OFF % 16)
+-
+-/* OTP Size */
+-#define OTP_SZ_FU_324		((roundup(324, 8))/8)	/* 324 bits */
+-#define OTP_SZ_FU_288		(288/8)	/* 288 bits */
+-#define OTP_SZ_FU_216		(216/8)	/* 216 bits */
+-#define OTP_SZ_FU_72		(72/8)	/* 72 bits */
+-#define OTP_SZ_CHECKSUM		(16/8)	/* 16 bits */
+-#define OTP4315_SWREG_SZ	178	/* 178 bytes */
+-#define OTP_SZ_FU_144		(144/8)	/* 144 bits */
+-
+-static int ipxotp_status(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	return (int)(oi->status);
+-}
+-
+-/* Return size in bytes */
+-static int ipxotp_size(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	return (int)oi->wsize * 2;
+-}
+-
+-static u16 ipxotp_otpr(void *oh, chipcregs_t *cc, uint wn)
+-{
+-	otpinfo_t *oi;
+-
+-	oi = (otpinfo_t *) oh;
+-
+-	return R_REG(&cc->sromotp[wn]);
+-}
+-
+-static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	uint k, row, col;
+-	u32 otpp, st;
+-
+-	row = off / oi->cols;
+-	col = off % oi->cols;
+-
+-	otpp = OTPP_START_BUSY |
+-	    ((OTPPOC_READ << OTPP_OC_SHIFT) & OTPP_OC_MASK) |
+-	    ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) |
+-	    ((col << OTPP_COL_SHIFT) & OTPP_COL_MASK);
+-	W_REG(&cc->otpprog, otpp);
+-
+-	for (k = 0;
+-	     ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY)
+-	     && (k < OTPP_TRIES); k++)
+-		;
+-	if (k >= OTPP_TRIES) {
+-		return 0xffff;
+-	}
+-	if (st & OTPP_READERR) {
+-		return 0xffff;
+-	}
+-	st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT;
+-
+-	return (int)st;
+-}
+-
+-/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size,
+- * osizew is oi->wsize (OTP size - GU size) in words
+- */
+-static int ipxotp_max_rgnsz(si_t *sih, int osizew)
+-{
+-	int ret = 0;
+-
+-	switch (sih->chip) {
+-	case BCM43224_CHIP_ID:
+-	case BCM43225_CHIP_ID:
+-		ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM;
+-		break;
+-	case BCM4313_CHIP_ID:
+-		ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM;
+-		break;
+-	default:
+-		break;	/* Don't know about this chip */
+-	}
+-
+-	return ret;
+-}
+-
+-static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc)
+-{
+-	uint k;
+-	u32 otpp, st;
+-
+-	/* record word offset of General Use Region for various chipcommon revs */
+-	if (oi->sih->ccrev == 21 || oi->sih->ccrev == 24
+-	    || oi->sih->ccrev == 27) {
+-		oi->otpgu_base = REVA4_OTPGU_BASE;
+-	} else if (oi->sih->ccrev == 36) {
+-		/* OTP size greater than equal to 2KB (128 words), otpgu_base is similar to rev23 */
+-		if (oi->wsize >= 128)
+-			oi->otpgu_base = REVB8_OTPGU_BASE;
+-		else
+-			oi->otpgu_base = REV36_OTPGU_BASE;
+-	} else if (oi->sih->ccrev == 23 || oi->sih->ccrev >= 25) {
+-		oi->otpgu_base = REVB8_OTPGU_BASE;
+-	}
+-
+-	/* First issue an init command so the status is up to date */
+-	otpp =
+-	    OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK);
+-
+-	W_REG(&cc->otpprog, otpp);
+-	for (k = 0;
+-	     ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY)
+-	     && (k < OTPP_TRIES); k++)
+-		;
+-	if (k >= OTPP_TRIES) {
+-		return;
+-	}
+-
+-	/* Read OTP lock bits and subregion programmed indication bits */
+-	oi->status = R_REG(&cc->otpstatus);
+-
+-	if ((oi->sih->chip == BCM43224_CHIP_ID)
+-	    || (oi->sih->chip == BCM43225_CHIP_ID)) {
+-		u32 p_bits;
+-		p_bits =
+-		    (ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) &
+-		     OTPGU_P_MSK)
+-		    >> OTPGU_P_SHIFT;
+-		oi->status |= (p_bits << OTPS_GUP_SHIFT);
+-	}
+-
+-	/*
+-	 * h/w region base and fuse region limit are fixed to the top and
+-	 * the bottom of the general use region. Everything else can be flexible.
+-	 */
+-	oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF;
+-	oi->hwlim = oi->wsize;
+-	if (oi->status & OTPS_GUP_HW) {
+-		oi->hwlim =
+-		    ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_HSB_OFF) / 16;
+-		oi->swbase = oi->hwlim;
+-	} else
+-		oi->swbase = oi->hwbase;
+-
+-	/* subtract fuse and checksum from beginning */
+-	oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2;
+-
+-	if (oi->status & OTPS_GUP_SW) {
+-		oi->swlim =
+-		    ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_SFB_OFF) / 16;
+-		oi->fbase = oi->swlim;
+-	} else
+-		oi->fbase = oi->swbase;
+-
+-	oi->flim = oi->wsize;
+-}
+-
+-static void *ipxotp_init(si_t *sih)
+-{
+-	uint idx;
+-	chipcregs_t *cc;
+-	otpinfo_t *oi;
+-
+-	/* Make sure we're running IPX OTP */
+-	if (!OTPTYPE_IPX(sih->ccrev))
+-		return NULL;
+-
+-	/* Make sure OTP is not disabled */
+-	if (ai_is_otp_disabled(sih))
+-		return NULL;
+-
+-	/* Make sure OTP is powered up */
+-	if (!ai_is_otp_powered(sih))
+-		return NULL;
+-
+-	oi = &otpinfo;
+-
+-	/* Check for otp size */
+-	switch ((sih->cccaps & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) {
+-	case 0:
+-		/* Nothing there */
+-		return NULL;
+-	case 1:		/* 32x64 */
+-		oi->rows = 32;
+-		oi->cols = 64;
+-		oi->wsize = 128;
+-		break;
+-	case 2:		/* 64x64 */
+-		oi->rows = 64;
+-		oi->cols = 64;
+-		oi->wsize = 256;
+-		break;
+-	case 5:		/* 96x64 */
+-		oi->rows = 96;
+-		oi->cols = 64;
+-		oi->wsize = 384;
+-		break;
+-	case 7:		/* 16x64 *//* 1024 bits */
+-		oi->rows = 16;
+-		oi->cols = 64;
+-		oi->wsize = 64;
+-		break;
+-	default:
+-		/* Don't know the geometry */
+-		return NULL;
+-	}
+-
+-	/* Retrieve OTP region info */
+-	idx = ai_coreidx(sih);
+-	cc = ai_setcoreidx(sih, SI_CC_IDX);
+-
+-	_ipxotp_init(oi, cc);
+-
+-	ai_setcoreidx(sih, idx);
+-
+-	return (void *)oi;
+-}
+-
+-static int ipxotp_read_region(void *oh, int region, u16 *data, uint *wlen)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	uint idx;
+-	chipcregs_t *cc;
+-	uint base, i, sz;
+-
+-	/* Validate region selection */
+-	switch (region) {
+-	case OTP_HW_RGN:
+-		sz = (uint) oi->hwlim - oi->hwbase;
+-		if (!(oi->status & OTPS_GUP_HW)) {
+-			*wlen = sz;
+-			return -ENODATA;
+-		}
+-		if (*wlen < sz) {
+-			*wlen = sz;
+-			return -EOVERFLOW;
+-		}
+-		base = oi->hwbase;
+-		break;
+-	case OTP_SW_RGN:
+-		sz = ((uint) oi->swlim - oi->swbase);
+-		if (!(oi->status & OTPS_GUP_SW)) {
+-			*wlen = sz;
+-			return -ENODATA;
+-		}
+-		if (*wlen < sz) {
+-			*wlen = sz;
+-			return -EOVERFLOW;
+-		}
+-		base = oi->swbase;
+-		break;
+-	case OTP_CI_RGN:
+-		sz = OTPGU_CI_SZ;
+-		if (!(oi->status & OTPS_GUP_CI)) {
+-			*wlen = sz;
+-			return -ENODATA;
+-		}
+-		if (*wlen < sz) {
+-			*wlen = sz;
+-			return -EOVERFLOW;
+-		}
+-		base = oi->otpgu_base + OTPGU_CI_OFF;
+-		break;
+-	case OTP_FUSE_RGN:
+-		sz = (uint) oi->flim - oi->fbase;
+-		if (!(oi->status & OTPS_GUP_FUSE)) {
+-			*wlen = sz;
+-			return -ENODATA;
+-		}
+-		if (*wlen < sz) {
+-			*wlen = sz;
+-			return -EOVERFLOW;
+-		}
+-		base = oi->fbase;
+-		break;
+-	case OTP_ALL_RGN:
+-		sz = ((uint) oi->flim - oi->hwbase);
+-		if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) {
+-			*wlen = sz;
+-			return -ENODATA;
+-		}
+-		if (*wlen < sz) {
+-			*wlen = sz;
+-			return -EOVERFLOW;
+-		}
+-		base = oi->hwbase;
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	idx = ai_coreidx(oi->sih);
+-	cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
+-
+-	/* Read the data */
+-	for (i = 0; i < sz; i++)
+-		data[i] = ipxotp_otpr(oh, cc, base + i);
+-
+-	ai_setcoreidx(oi->sih, idx);
+-	*wlen = sz;
+-	return 0;
+-}
+-
+-static int ipxotp_nvread(void *oh, char *data, uint *len)
+-{
+-	return -ENOTSUPP;
+-}
+-
+-static otp_fn_t ipxotp_fn = {
+-	(otp_size_t) ipxotp_size,
+-	(otp_read_bit_t) ipxotp_read_bit,
+-
+-	(otp_init_t) ipxotp_init,
+-	(otp_read_region_t) ipxotp_read_region,
+-	(otp_nvread_t) ipxotp_nvread,
+-
+-	(otp_status_t) ipxotp_status
+-};
+-
+-#endif				/* BCMIPXOTP */
+-
+-/*
+- * HND OTP Code
+- *
+- *   Exported functions:
+- *	hndotp_status()
+- *	hndotp_size()
+- *	hndotp_init()
+- *	hndotp_read_bit()
+- *	hndotp_read_region()
+- *	hndotp_nvread()
+- *
+- */
+-
+-#ifdef BCMHNDOTP
+-
+-/* Fields in otpstatus */
+-#define	OTPS_PROGFAIL		0x80000000
+-#define	OTPS_PROTECT		0x00000007
+-#define	OTPS_HW_PROTECT		0x00000001
+-#define	OTPS_SW_PROTECT		0x00000002
+-#define	OTPS_CID_PROTECT	0x00000004
+-#define	OTPS_RCEV_MSK		0x00003f00
+-#define	OTPS_RCEV_SHIFT		8
+-
+-/* Fields in the otpcontrol register */
+-#define	OTPC_RECWAIT		0xff000000
+-#define	OTPC_PROGWAIT		0x00ffff00
+-#define	OTPC_PRW_SHIFT		8
+-#define	OTPC_MAXFAIL		0x00000038
+-#define	OTPC_VSEL		0x00000006
+-#define	OTPC_SELVL		0x00000001
+-
+-/* OTP regions (Word offsets from otp size) */
+-#define	OTP_SWLIM_OFF	(-4)
+-#define	OTP_CIDBASE_OFF	0
+-#define	OTP_CIDLIM_OFF	4
+-
+-/* Predefined OTP words (Word offset from otp size) */
+-#define	OTP_BOUNDARY_OFF (-4)
+-#define	OTP_HWSIGN_OFF	(-3)
+-#define	OTP_SWSIGN_OFF	(-2)
+-#define	OTP_CIDSIGN_OFF	(-1)
+-#define	OTP_CID_OFF	0
+-#define	OTP_PKG_OFF	1
+-#define	OTP_FID_OFF	2
+-#define	OTP_RSV_OFF	3
+-#define	OTP_LIM_OFF	4
+-#define	OTP_RD_OFF	4	/* Redundancy row starts here */
+-#define	OTP_RC0_OFF	28	/* Redundancy control word 1 */
+-#define	OTP_RC1_OFF	32	/* Redundancy control word 2 */
+-#define	OTP_RC_LIM_OFF	36	/* Redundancy control word end */
+-
+-#define	OTP_HW_REGION	OTPS_HW_PROTECT
+-#define	OTP_SW_REGION	OTPS_SW_PROTECT
+-#define	OTP_CID_REGION	OTPS_CID_PROTECT
+-
+-#if OTP_HW_REGION != OTP_HW_RGN
+-#error "incompatible OTP_HW_RGN"
+-#endif
+-#if OTP_SW_REGION != OTP_SW_RGN
+-#error "incompatible OTP_SW_RGN"
+-#endif
+-#if OTP_CID_REGION != OTP_CI_RGN
+-#error "incompatible OTP_CI_RGN"
+-#endif
+-
+-/* Redundancy entry definitions */
+-#define	OTP_RCE_ROW_SZ		6
+-#define	OTP_RCE_SIGN_MASK	0x7fff
+-#define	OTP_RCE_ROW_MASK	0x3f
+-#define	OTP_RCE_BITS		21
+-#define	OTP_RCE_SIGN_SZ		15
+-#define	OTP_RCE_BIT0		1
+-
+-#define	OTP_WPR		4
+-#define	OTP_SIGNATURE	0x578a
+-#define	OTP_MAGIC	0x4e56
+-
+-static int hndotp_status(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	return (int)(oi->hwprot | oi->signvalid);
+-}
+-
+-static int hndotp_size(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	return (int)(oi->size);
+-}
+-
+-static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn)
+-{
+-	volatile u16 *ptr;
+-
+-	ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
+-	return R_REG(&ptr[wn]);
+-}
+-
+-static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	volatile u16 *ptr;
+-
+-	ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP);
+-
+-	return R_REG(&ptr[(oi->size / 2) + woff]);
+-}
+-
+-static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx)
+-{
+-	uint k, row, col;
+-	u32 otpp, st;
+-
+-	row = idx / 65;
+-	col = idx % 65;
+-
+-	otpp = OTPP_START_BUSY | OTPP_READ |
+-	    ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | (col & OTPP_COL_MASK);
+-
+-	W_REG(&cc->otpprog, otpp);
+-	st = R_REG(&cc->otpprog);
+-	for (k = 0;
+-	     ((st & OTPP_START_BUSY) == OTPP_START_BUSY) && (k < OTPP_TRIES);
+-	     k++)
+-		st = R_REG(&cc->otpprog);
+-
+-	if (k >= OTPP_TRIES) {
+-		return 0xffff;
+-	}
+-	if (st & OTPP_READERR) {
+-		return 0xffff;
+-	}
+-	st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT;
+-	return (u16) st;
+-}
+-
+-static void *hndotp_init(si_t *sih)
+-{
+-	uint idx;
+-	chipcregs_t *cc;
+-	otpinfo_t *oi;
+-	u32 cap = 0, clkdiv, otpdiv = 0;
+-	void *ret = NULL;
+-
+-	oi = &otpinfo;
+-
+-	idx = ai_coreidx(sih);
+-
+-	/* Check for otp */
+-	cc = ai_setcoreidx(sih, SI_CC_IDX);
+-	if (cc != NULL) {
+-		cap = R_REG(&cc->capabilities);
+-		if ((cap & CC_CAP_OTPSIZE) == 0) {
+-			/* Nothing there */
+-			goto out;
+-		}
+-
+-		if (!((oi->ccrev == 12) || (oi->ccrev == 17)
+-		     || (oi->ccrev == 22)))
+-			return NULL;
+-
+-		/* Read the OTP byte size. chipcommon rev >= 18 has RCE so the size is
+-		 * 8 row (64 bytes) smaller
+-		 */
+-		oi->size =
+-		    1 << (((cap & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT)
+-			  + CC_CAP_OTPSIZE_BASE);
+-		if (oi->ccrev >= 18)
+-			oi->size -= ((OTP_RC0_OFF - OTP_BOUNDARY_OFF) * 2);
+-
+-		oi->hwprot = (int)(R_REG(&cc->otpstatus) & OTPS_PROTECT);
+-		oi->boundary = -1;
+-
+-		/* Check the region signature */
+-		if (hndotp_otproff(oi, cc, OTP_HWSIGN_OFF) == OTP_SIGNATURE) {
+-			oi->signvalid |= OTP_HW_REGION;
+-			oi->boundary = hndotp_otproff(oi, cc, OTP_BOUNDARY_OFF);
+-		}
+-
+-		if (hndotp_otproff(oi, cc, OTP_SWSIGN_OFF) == OTP_SIGNATURE)
+-			oi->signvalid |= OTP_SW_REGION;
+-
+-		if (hndotp_otproff(oi, cc, OTP_CIDSIGN_OFF) == OTP_SIGNATURE)
+-			oi->signvalid |= OTP_CID_REGION;
+-
+-		/* Set OTP clkdiv for stability */
+-		if (oi->ccrev == 22)
+-			otpdiv = 12;
+-
+-		if (otpdiv) {
+-			clkdiv = R_REG(&cc->clkdiv);
+-			clkdiv =
+-			    (clkdiv & ~CLKD_OTP) | (otpdiv << CLKD_OTP_SHIFT);
+-			W_REG(&cc->clkdiv, clkdiv);
+-		}
+-		udelay(10);
+-
+-		ret = (void *)oi;
+-	}
+-
+- out:				/* All done */
+-	ai_setcoreidx(sih, idx);
+-
+-	return ret;
+-}
+-
+-static int hndotp_read_region(void *oh, int region, u16 *data, uint *wlen)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	u32 idx, st;
+-	chipcregs_t *cc;
+-	int i;
+-
+-
+-	if (region != OTP_HW_REGION) {
+-		/*
+-		 * Only support HW region
+-		 * (no active chips use HND OTP SW region)
+-		 * */
+-		return -ENOTSUPP;
+-	}
+-
+-	/* Region empty? */
+-	st = oi->hwprot | oi->signvalid;
+-	if ((st & region) == 0)
+-		return -ENODATA;
+-
+-	*wlen =
+-	    ((int)*wlen < oi->boundary / 2) ? *wlen : (uint) oi->boundary / 2;
+-
+-	idx = ai_coreidx(oi->sih);
+-	cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
+-
+-	for (i = 0; i < (int)*wlen; i++)
+-		data[i] = hndotp_otpr(oh, cc, i);
+-
+-	ai_setcoreidx(oi->sih, idx);
+-
+-	return 0;
+-}
+-
+-static int hndotp_nvread(void *oh, char *data, uint *len)
+-{
+-	int rc = 0;
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	u32 base, bound, lim = 0, st;
+-	int i, chunk, gchunks, tsz = 0;
+-	u32 idx;
+-	chipcregs_t *cc;
+-	uint offset;
+-	u16 *rawotp = NULL;
+-
+-	/* save the orig core */
+-	idx = ai_coreidx(oi->sih);
+-	cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
+-
+-	st = hndotp_status(oh);
+-	if (!(st & (OTP_HW_REGION | OTP_SW_REGION))) {
+-		rc = -1;
+-		goto out;
+-	}
+-
+-	/* Read the whole otp so we can easily manipulate it */
+-	lim = hndotp_size(oh);
+-	rawotp = kmalloc(lim, GFP_ATOMIC);
+-	if (rawotp == NULL) {
+-		rc = -2;
+-		goto out;
+-	}
+-	for (i = 0; i < (int)(lim / 2); i++)
+-		rawotp[i] = hndotp_otpr(oh, cc, i);
+-
+-	if ((st & OTP_HW_REGION) == 0) {
+-		/* This could be a programming failure in the first
+-		 * chunk followed by one or more good chunks
+-		 */
+-		for (i = 0; i < (int)(lim / 2); i++)
+-			if (rawotp[i] == OTP_MAGIC)
+-				break;
+-
+-		if (i < (int)(lim / 2)) {
+-			base = i;
+-			bound = (i * 2) + rawotp[i + 1];
+-		} else {
+-			rc = -3;
+-			goto out;
+-		}
+-	} else {
+-		bound = rawotp[(lim / 2) + OTP_BOUNDARY_OFF];
+-
+-		/* There are two cases: 1) The whole otp is used as nvram
+-		 * and 2) There is a hardware header followed by nvram.
+-		 */
+-		if (rawotp[0] == OTP_MAGIC) {
+-			base = 0;
+-		} else
+-			base = bound;
+-	}
+-
+-	/* Find and copy the data */
+-
+-	chunk = 0;
+-	gchunks = 0;
+-	i = base / 2;
+-	offset = 0;
+-	while ((i < (int)(lim / 2)) && (rawotp[i] == OTP_MAGIC)) {
+-		int dsz, rsz = rawotp[i + 1];
+-
+-		if (((i * 2) + rsz) >= (int)lim) {
+-			/* Bad length, try to find another chunk anyway */
+-			rsz = 6;
+-		}
+-		if (crc_ccitt(CRC16_INIT_VALUE, (u8 *) &rawotp[i], rsz) ==
+-			CRC16_GOOD_VALUE) {
+-			/* Good crc, copy the vars */
+-			gchunks++;
+-			dsz = rsz - 6;
+-			tsz += dsz;
+-			if (offset + dsz >= *len) {
+-				goto out;
+-			}
+-			memcpy(&data[offset], &rawotp[i + 2], dsz);
+-			offset += dsz;
+-			/* Remove extra null characters at the end */
+-			while (offset > 1 &&
+-			       data[offset - 1] == 0 && data[offset - 2] == 0)
+-				offset--;
+-			i += rsz / 2;
+-		} else {
+-			/* bad length or crc didn't check, try to find the next set */
+-			if (rawotp[i + (rsz / 2)] == OTP_MAGIC) {
+-				/* Assume length is good */
+-				i += rsz / 2;
+-			} else {
+-				while (++i < (int)(lim / 2))
+-					if (rawotp[i] == OTP_MAGIC)
+-						break;
+-			}
+-		}
+-		chunk++;
+-	}
+-
+-	*len = offset;
+-
+- out:
+-	kfree(rawotp);
+-	ai_setcoreidx(oi->sih, idx);
+-
+-	return rc;
+-}
+-
+-static otp_fn_t hndotp_fn = {
+-	(otp_size_t) hndotp_size,
+-	(otp_read_bit_t) hndotp_read_bit,
+-
+-	(otp_init_t) hndotp_init,
+-	(otp_read_region_t) hndotp_read_region,
+-	(otp_nvread_t) hndotp_nvread,
+-
+-	(otp_status_t) hndotp_status
+-};
+-
+-#endif				/* BCMHNDOTP */
+-
+-/*
+- * Common Code: Compiled for IPX / HND / AUTO
+- *	otp_status()
+- *	otp_size()
+- *	otp_read_bit()
+- *	otp_init()
+- * 	otp_read_region()
+- * 	otp_nvread()
+- */
+-
+-int otp_status(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-
+-	return oi->fn->status(oh);
+-}
+-
+-int otp_size(void *oh)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-
+-	return oi->fn->size(oh);
+-}
+-
+-u16 otp_read_bit(void *oh, uint offset)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-	uint idx = ai_coreidx(oi->sih);
+-	chipcregs_t *cc = ai_setcoreidx(oi->sih, SI_CC_IDX);
+-	u16 readBit = (u16) oi->fn->read_bit(oh, cc, offset);
+-	ai_setcoreidx(oi->sih, idx);
+-	return readBit;
+-}
+-
+-void *otp_init(si_t *sih)
+-{
+-	otpinfo_t *oi;
+-	void *ret = NULL;
+-
+-	oi = &otpinfo;
+-	memset(oi, 0, sizeof(otpinfo_t));
+-
+-	oi->ccrev = sih->ccrev;
+-
+-#ifdef BCMIPXOTP
+-	if (OTPTYPE_IPX(oi->ccrev))
+-		oi->fn = &ipxotp_fn;
+-#endif
+-
+-#ifdef BCMHNDOTP
+-	if (OTPTYPE_HND(oi->ccrev))
+-		oi->fn = &hndotp_fn;
+-#endif
+-
+-	if (oi->fn == NULL) {
+-		return NULL;
+-	}
+-
+-	oi->sih = sih;
+-
+-	ret = (oi->fn->init) (sih);
+-
+-	return ret;
+-}
+-
+-int
+-otp_read_region(si_t *sih, int region, u16 *data,
+-				 uint *wlen) {
+-	bool wasup = false;
+-	void *oh;
+-	int err = 0;
+-
+-	wasup = ai_is_otp_powered(sih);
+-	if (!wasup)
+-		ai_otp_power(sih, true);
+-
+-	if (!ai_is_otp_powered(sih) || ai_is_otp_disabled(sih)) {
+-		err = -EPERM;
+-		goto out;
+-	}
+-
+-	oh = otp_init(sih);
+-	if (oh == NULL) {
+-		err = -EBADE;
+-		goto out;
+-	}
+-
+-	err = (((otpinfo_t *) oh)->fn->read_region) (oh, region, data, wlen);
+-
+- out:
+-	if (!wasup)
+-		ai_otp_power(sih, false);
+-
+-	return err;
+-}
+-
+-int otp_nvread(void *oh, char *data, uint *len)
+-{
+-	otpinfo_t *oi = (otpinfo_t *) oh;
+-
+-	return oi->fn->nvread(oh, data, len);
+-}
+diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c
+deleted file mode 100644
+index bbfc642..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c
++++ /dev/null
+@@ -1,714 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <linux/etherdevice.h>
+-#include <bcmdefs.h>
+-#include <linux/module.h>
+-#include <linux/pci.h>
+-#include <stdarg.h>
+-#include <bcmutils.h>
+-#include <hndsoc.h>
+-#include <sbchipc.h>
+-#include <bcmdevs.h>
+-#include <pcicfg.h>
+-#include <aiutils.h>
+-#include <bcmsrom.h>
+-#include <bcmsrom_tbl.h>
+-
+-#include <bcmnvram.h>
+-#include <bcmotp.h>
+-
+-#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \
+-	(((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \
+-	 ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \
+-	((u8 *)curmap + PCI_BAR0_SPROM_OFFSET))
+-
+-#if defined(BCMDBG)
+-#define WRITE_ENABLE_DELAY	500	/* 500 ms after write enable/disable toggle */
+-#define WRITE_WORD_DELAY	20	/* 20 ms between each word write */
+-#endif
+-
+-typedef struct varbuf {
+-	char *base;		/* pointer to buffer base */
+-	char *buf;		/* pointer to current position */
+-	unsigned int size;	/* current (residual) size in bytes */
+-} varbuf_t;
+-extern char *_vars;
+-extern uint _varsz;
+-
+-static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count);
+-static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b);
+-static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count);
+-static int initvars_flash_si(si_t *sih, char **vars, uint *count);
+-static int sprom_read_pci(si_t *sih, u16 *sprom,
+-			  uint wordoff, u16 *buf, uint nwords, bool check_crc);
+-#if defined(BCMNVRAMR)
+-static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz);
+-#endif
+-static u16 srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
+-			  uint wordoff, u16 data);
+-
+-static int initvars_table(char *start, char *end,
+-			  char **vars, uint *count);
+-static int initvars_flash(si_t *sih, char **vp,
+-			  uint len);
+-
+-/* Initialization of varbuf structure */
+-static void varbuf_init(varbuf_t *b, char *buf, uint size)
+-{
+-	b->size = size;
+-	b->base = b->buf = buf;
+-}
+-
+-/* append a null terminated var=value string */
+-static int varbuf_append(varbuf_t *b, const char *fmt, ...)
+-{
+-	va_list ap;
+-	int r;
+-	size_t len;
+-	char *s;
+-
+-	if (b->size < 2)
+-		return 0;
+-
+-	va_start(ap, fmt);
+-	r = vsnprintf(b->buf, b->size, fmt, ap);
+-	va_end(ap);
+-
+-	/* C99 snprintf behavior returns r >= size on overflow,
+-	 * others return -1 on overflow.
+-	 * All return -1 on format error.
+-	 * We need to leave room for 2 null terminations, one for the current var
+-	 * string, and one for final null of the var table. So check that the
+-	 * strlen written, r, leaves room for 2 chars.
+-	 */
+-	if ((r == -1) || (r > (int)(b->size - 2))) {
+-		b->size = 0;
+-		return 0;
+-	}
+-
+-	/* Remove any earlier occurrence of the same variable */
+-	s = strchr(b->buf, '=');
+-	if (s != NULL) {
+-		len = (size_t) (s - b->buf);
+-		for (s = b->base; s < b->buf;) {
+-			if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') {
+-				len = strlen(s) + 1;
+-				memmove(s, (s + len),
+-					((b->buf + r + 1) - (s + len)));
+-				b->buf -= len;
+-				b->size += (unsigned int)len;
+-				break;
+-			}
+-
+-			while (*s++)
+-				;
+-		}
+-	}
+-
+-	/* skip over this string's null termination */
+-	r++;
+-	b->size -= r;
+-	b->buf += r;
+-
+-	return r;
+-}
+-
+-/*
+- * Initialize local vars from the right source for this platform.
+- * Return 0 on success, nonzero on error.
+- */
+-int srom_var_init(si_t *sih, uint bustype, void *curmap,
+-		  char **vars, uint *count)
+-{
+-	uint len;
+-
+-	len = 0;
+-
+-	if (vars == NULL || count == NULL)
+-		return 0;
+-
+-	*vars = NULL;
+-	*count = 0;
+-
+-	switch (bustype) {
+-	case SI_BUS:
+-	case JTAG_BUS:
+-		return initvars_srom_si(sih, curmap, vars, count);
+-
+-	case PCI_BUS:
+-		if (curmap == NULL)
+-			return -1;
+-
+-		return initvars_srom_pci(sih, curmap, vars, count);
+-
+-	default:
+-		break;
+-	}
+-	return -1;
+-}
+-
+-/* In chips with chipcommon rev 32 and later, the srom is in chipcommon,
+- * not in the bus cores.
+- */
+-static u16
+-srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd,
+-	    uint wordoff, u16 data)
+-{
+-	chipcregs_t *cc = (chipcregs_t *) ccregs;
+-	uint wait_cnt = 1000;
+-
+-	if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) {
+-		W_REG(&cc->sromaddress, wordoff * 2);
+-		if (cmd == SRC_OP_WRITE)
+-			W_REG(&cc->sromdata, data);
+-	}
+-
+-	W_REG(&cc->sromcontrol, SRC_START | cmd);
+-
+-	while (wait_cnt--) {
+-		if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0)
+-			break;
+-	}
+-
+-	if (!wait_cnt) {
+-		return 0xffff;
+-	}
+-	if (cmd == SRC_OP_READ)
+-		return (u16) R_REG(&cc->sromdata);
+-	else
+-		return 0xffff;
+-}
+-
+-static inline void ltoh16_buf(u16 *buf, unsigned int size)
+-{
+-	for (size /= 2; size; size--)
+-		*(buf + size) = le16_to_cpu(*(buf + size));
+-}
+-
+-static inline void htol16_buf(u16 *buf, unsigned int size)
+-{
+-	for (size /= 2; size; size--)
+-		*(buf + size) = cpu_to_le16(*(buf + size));
+-}
+-
+-/*
+- * Read in and validate sprom.
+- * Return 0 on success, nonzero on error.
+- */
+-static int
+-sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff,
+-	       u16 *buf, uint nwords, bool check_crc)
+-{
+-	int err = 0;
+-	uint i;
+-	void *ccregs = NULL;
+-
+-	/* read the sprom */
+-	for (i = 0; i < nwords; i++) {
+-
+-		if (sih->ccrev > 31 && ISSIM_ENAB(sih)) {
+-			/* use indirect since direct is too slow on QT */
+-			if ((sih->cccaps & CC_CAP_SROM) == 0)
+-				return 1;
+-
+-			ccregs = (void *)((u8 *) sprom - CC_SROM_OTP);
+-			buf[i] =
+-			    srom_cc_cmd(sih, ccregs, SRC_OP_READ,
+-					wordoff + i, 0);
+-
+-		} else {
+-			if (ISSIM_ENAB(sih))
+-				buf[i] = R_REG(&sprom[wordoff + i]);
+-
+-			buf[i] = R_REG(&sprom[wordoff + i]);
+-		}
+-
+-	}
+-
+-	/* bypass crc checking for simulation to allow srom hack */
+-	if (ISSIM_ENAB(sih))
+-		return err;
+-
+-	if (check_crc) {
+-
+-		if (buf[0] == 0xffff) {
+-			/* The hardware thinks that an srom that starts with 0xffff
+-			 * is blank, regardless of the rest of the content, so declare
+-			 * it bad.
+-			 */
+-			return 1;
+-		}
+-
+-		/* fixup the endianness so crc8 will pass */
+-		htol16_buf(buf, nwords * 2);
+-		if (bcm_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) !=
+-		    CRC8_GOOD_VALUE) {
+-			/* DBG only pci always read srom4 first, then srom8/9 */
+-			err = 1;
+-		}
+-		/* now correct the endianness of the byte array */
+-		ltoh16_buf(buf, nwords * 2);
+-	}
+-	return err;
+-}
+-
+-#if defined(BCMNVRAMR)
+-static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz)
+-{
+-	u8 *otp;
+-	uint sz = OTP_SZ_MAX / 2;	/* size in words */
+-	int err = 0;
+-
+-	otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC);
+-	if (otp == NULL) {
+-		return -EBADE;
+-	}
+-
+-	err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz);
+-
+-	memcpy(buf, otp, bufsz);
+-
+-	kfree(otp);
+-
+-	/* Check CRC */
+-	if (buf[0] == 0xffff) {
+-		/* The hardware thinks that an srom that starts with 0xffff
+-		 * is blank, regardless of the rest of the content, so declare
+-		 * it bad.
+-		 */
+-		return 1;
+-	}
+-
+-	/* fixup the endianness so crc8 will pass */
+-	htol16_buf(buf, bufsz);
+-	if (bcm_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) !=
+-	    CRC8_GOOD_VALUE) {
+-		err = 1;
+-	}
+-	/* now correct the endianness of the byte array */
+-	ltoh16_buf(buf, bufsz);
+-
+-	return err;
+-}
+-#endif				/* defined(BCMNVRAMR) */
+-/*
+-* Create variable table from memory.
+-* Return 0 on success, nonzero on error.
+-*/
+-static int initvars_table(char *start, char *end,
+-			  char **vars, uint *count)
+-{
+-	int c = (int)(end - start);
+-
+-	/* do it only when there is more than just the null string */
+-	if (c > 1) {
+-		char *vp = kmalloc(c, GFP_ATOMIC);
+-		if (!vp)
+-			return -ENOMEM;
+-		memcpy(vp, start, c);
+-		*vars = vp;
+-		*count = c;
+-	} else {
+-		*vars = NULL;
+-		*count = 0;
+-	}
+-
+-	return 0;
+-}
+-
+-/*
+- * Find variables with <devpath> from flash. 'base' points to the beginning
+- * of the table upon enter and to the end of the table upon exit when success.
+- * Return 0 on success, nonzero on error.
+- */
+-static int initvars_flash(si_t *sih, char **base, uint len)
+-{
+-	char *vp = *base;
+-	char *flash;
+-	int err;
+-	char *s;
+-	uint l, dl, copy_len;
+-	char devpath[SI_DEVPATH_BUFSZ];
+-
+-	/* allocate memory and read in flash */
+-	flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC);
+-	if (!flash)
+-		return -ENOMEM;
+-	err = nvram_getall(flash, NVRAM_SPACE);
+-	if (err)
+-		goto exit;
+-
+-	ai_devpath(sih, devpath, sizeof(devpath));
+-
+-	/* grab vars with the <devpath> prefix in name */
+-	dl = strlen(devpath);
+-	for (s = flash; s && *s; s += l + 1) {
+-		l = strlen(s);
+-
+-		/* skip non-matching variable */
+-		if (strncmp(s, devpath, dl))
+-			continue;
+-
+-		/* is there enough room to copy? */
+-		copy_len = l - dl + 1;
+-		if (len < copy_len) {
+-			err = -EOVERFLOW;
+-			goto exit;
+-		}
+-
+-		/* no prefix, just the name=value */
+-		strncpy(vp, &s[dl], copy_len);
+-		vp += copy_len;
+-		len -= copy_len;
+-	}
+-
+-	/* add null string as terminator */
+-	if (len < 1) {
+-		err = -EOVERFLOW;
+-		goto exit;
+-	}
+-	*vp++ = '\0';
+-
+-	*base = vp;
+-
+- exit:	kfree(flash);
+-	return err;
+-}
+-
+-/*
+- * Initialize nonvolatile variable table from flash.
+- * Return 0 on success, nonzero on error.
+- */
+-static int initvars_flash_si(si_t *sih, char **vars, uint *count)
+-{
+-	char *vp, *base;
+-	int err;
+-
+-	base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
+-	if (!vp)
+-		return -ENOMEM;
+-
+-	err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
+-	if (err == 0)
+-		err = initvars_table(base, vp, vars, count);
+-
+-	kfree(base);
+-
+-	return err;
+-}
+-
+-/* Parse SROM and create name=value pairs. 'srom' points to
+- * the SROM word array. 'off' specifies the offset of the
+- * first word 'srom' points to, which should be either 0 or
+- * SROM3_SWRG_OFF (full SROM or software region).
+- */
+-
+-static uint mask_shift(u16 mask)
+-{
+-	uint i;
+-	for (i = 0; i < (sizeof(mask) << 3); i++) {
+-		if (mask & (1 << i))
+-			return i;
+-	}
+-	return 0;
+-}
+-
+-static uint mask_width(u16 mask)
+-{
+-	int i;
+-	for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) {
+-		if (mask & (1 << i))
+-			return (uint) (i - mask_shift(mask) + 1);
+-	}
+-	return 0;
+-}
+-
+-static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b)
+-{
+-	u16 w;
+-	u32 val;
+-	const sromvar_t *srv;
+-	uint width;
+-	uint flags;
+-	u32 sr = (1 << sromrev);
+-
+-	varbuf_append(b, "sromrev=%d", sromrev);
+-
+-	for (srv = pci_sromvars; srv->name != NULL; srv++) {
+-		const char *name;
+-
+-		if ((srv->revmask & sr) == 0)
+-			continue;
+-
+-		if (srv->off < off)
+-			continue;
+-
+-		flags = srv->flags;
+-		name = srv->name;
+-
+-		/* This entry is for mfgc only. Don't generate param for it, */
+-		if (flags & SRFL_NOVAR)
+-			continue;
+-
+-		if (flags & SRFL_ETHADDR) {
+-			u8 ea[ETH_ALEN];
+-
+-			ea[0] = (srom[srv->off - off] >> 8) & 0xff;
+-			ea[1] = srom[srv->off - off] & 0xff;
+-			ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff;
+-			ea[3] = srom[srv->off + 1 - off] & 0xff;
+-			ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff;
+-			ea[5] = srom[srv->off + 2 - off] & 0xff;
+-
+-			varbuf_append(b, "%s=%pM", name, ea);
+-		} else {
+-			w = srom[srv->off - off];
+-			val = (w & srv->mask) >> mask_shift(srv->mask);
+-			width = mask_width(srv->mask);
+-
+-			while (srv->flags & SRFL_MORE) {
+-				srv++;
+-				if (srv->off == 0 || srv->off < off)
+-					continue;
+-
+-				w = srom[srv->off - off];
+-				val +=
+-				    ((w & srv->mask) >> mask_shift(srv->
+-								   mask)) <<
+-				    width;
+-				width += mask_width(srv->mask);
+-			}
+-
+-			if ((flags & SRFL_NOFFS)
+-			    && ((int)val == (1 << width) - 1))
+-				continue;
+-
+-			if (flags & SRFL_CCODE) {
+-				if (val == 0)
+-					varbuf_append(b, "ccode=");
+-				else
+-					varbuf_append(b, "ccode=%c%c",
+-						      (val >> 8), (val & 0xff));
+-			}
+-			/* LED Powersave duty cycle has to be scaled:
+-			 *(oncount >> 24) (offcount >> 8)
+-			 */
+-			else if (flags & SRFL_LEDDC) {
+-				u32 w32 = (((val >> 8) & 0xff) << 24) |	/* oncount */
+-				    (((val & 0xff)) << 8);	/* offcount */
+-				varbuf_append(b, "leddc=%d", w32);
+-			} else if (flags & SRFL_PRHEX)
+-				varbuf_append(b, "%s=0x%x", name, val);
+-			else if ((flags & SRFL_PRSIGN)
+-				 && (val & (1 << (width - 1))))
+-				varbuf_append(b, "%s=%d", name,
+-					      (int)(val | (~0 << width)));
+-			else
+-				varbuf_append(b, "%s=%u", name, val);
+-		}
+-	}
+-
+-	if (sromrev >= 4) {
+-		/* Do per-path variables */
+-		uint p, pb, psz;
+-
+-		if (sromrev >= 8) {
+-			pb = SROM8_PATH0;
+-			psz = SROM8_PATH1 - SROM8_PATH0;
+-		} else {
+-			pb = SROM4_PATH0;
+-			psz = SROM4_PATH1 - SROM4_PATH0;
+-		}
+-
+-		for (p = 0; p < MAX_PATH_SROM; p++) {
+-			for (srv = perpath_pci_sromvars; srv->name != NULL;
+-			     srv++) {
+-				if ((srv->revmask & sr) == 0)
+-					continue;
+-
+-				if (pb + srv->off < off)
+-					continue;
+-
+-				/* This entry is for mfgc only. Don't generate param for it, */
+-				if (srv->flags & SRFL_NOVAR)
+-					continue;
+-
+-				w = srom[pb + srv->off - off];
+-				val = (w & srv->mask) >> mask_shift(srv->mask);
+-				width = mask_width(srv->mask);
+-
+-				/* Cheating: no per-path var is more than 1 word */
+-
+-				if ((srv->flags & SRFL_NOFFS)
+-				    && ((int)val == (1 << width) - 1))
+-					continue;
+-
+-				if (srv->flags & SRFL_PRHEX)
+-					varbuf_append(b, "%s%d=0x%x", srv->name,
+-						      p, val);
+-				else
+-					varbuf_append(b, "%s%d=%d", srv->name,
+-						      p, val);
+-			}
+-			pb += psz;
+-		}
+-	}
+-}
+-
+-/*
+- * Initialize nonvolatile variable table from sprom.
+- * Return 0 on success, nonzero on error.
+- */
+-static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count)
+-{
+-	u16 *srom, *sromwindow;
+-	u8 sromrev = 0;
+-	u32 sr;
+-	varbuf_t b;
+-	char *vp, *base = NULL;
+-	bool flash = false;
+-	int err = 0;
+-
+-	/*
+-	 * Apply CRC over SROM content regardless SROM is present or not,
+-	 * and use variable <devpath>sromrev's existence in flash to decide
+-	 * if we should return an error when CRC fails or read SROM variables
+-	 * from flash.
+-	 */
+-	srom = kmalloc(SROM_MAX, GFP_ATOMIC);
+-	if (!srom)
+-		return -2;
+-
+-	sromwindow = (u16 *) SROM_OFFSET(sih);
+-	if (ai_is_sprom_available(sih)) {
+-		err =
+-		    sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS,
+-				   true);
+-
+-		if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) ||
+-		    (((sih->buscoretype == PCIE_CORE_ID)
+-		      && (sih->buscorerev >= 6))
+-		     || ((sih->buscoretype == PCI_CORE_ID)
+-			 && (sih->buscorerev >= 0xe)))) {
+-			/* sromrev >= 4, read more */
+-			err =
+-			    sprom_read_pci(sih, sromwindow, 0, srom,
+-					   SROM4_WORDS, true);
+-			sromrev = srom[SROM4_CRCREV] & 0xff;
+-		} else if (err == 0) {
+-			/* srom is good and is rev < 4 */
+-			/* top word of sprom contains version and crc8 */
+-			sromrev = srom[SROM_CRCREV] & 0xff;
+-			/* bcm4401 sroms misprogrammed */
+-			if (sromrev == 0x10)
+-				sromrev = 1;
+-		}
+-	}
+-#if defined(BCMNVRAMR)
+-	/* Use OTP if SPROM not available */
+-	else {
+-		err = otp_read_pci(sih, srom, SROM_MAX);
+-		if (err == 0)
+-			/* OTP only contain SROM rev8/rev9 for now */
+-			sromrev = srom[SROM4_CRCREV] & 0xff;
+-		else
+-			err = 1;
+-	}
+-#else
+-	else
+-		err = 1;
+-#endif
+-
+-	/*
+-	 * We want internal/wltest driver to come up with default
+-	 * sromvars so we can program a blank SPROM/OTP.
+-	 */
+-	if (err) {
+-		char *value;
+-		u32 val;
+-		val = 0;
+-
+-		value = ai_getdevpathvar(sih, "sromrev");
+-		if (value) {
+-			sromrev = (u8) simple_strtoul(value, NULL, 0);
+-			flash = true;
+-			goto varscont;
+-		}
+-
+-		value = ai_getnvramflvar(sih, "sromrev");
+-		if (value) {
+-			err = 0;
+-			goto errout;
+-		}
+-
+-		{
+-			err = -1;
+-			goto errout;
+-		}
+-	}
+-
+- varscont:
+-	/* Bitmask for the sromrev */
+-	sr = 1 << sromrev;
+-
+-	/* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */
+-	if ((sr & 0x33e) == 0) {
+-		err = -2;
+-		goto errout;
+-	}
+-
+-	base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC);
+-	if (!vp) {
+-		err = -2;
+-		goto errout;
+-	}
+-
+-	/* read variables from flash */
+-	if (flash) {
+-		err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS);
+-		if (err)
+-			goto errout;
+-		goto varsdone;
+-	}
+-
+-	varbuf_init(&b, base, MAXSZ_NVRAM_VARS);
+-
+-	/* parse SROM into name=value pairs. */
+-	_initvars_srom_pci(sromrev, srom, 0, &b);
+-
+-	/* final nullbyte terminator */
+-	vp = b.buf;
+-	*vp++ = '\0';
+-
+- varsdone:
+-	err = initvars_table(base, vp, vars, count);
+-
+- errout:
+-	if (base)
+-		kfree(base);
+-
+-	kfree(srom);
+-	return err;
+-}
+-
+-
+-static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *varsz)
+-{
+-	/* Search flash nvram section for srom variables */
+-	return initvars_flash_si(sih, vars, varsz);
+-}
+diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h b/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h
+deleted file mode 100644
+index f4b3e61..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h
++++ /dev/null
+@@ -1,513 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_bcmsrom_tbl_h_
+-#define	_bcmsrom_tbl_h_
+-
+-#include "wlioctl.h"
+-
+-typedef struct {
+-	const char *name;
+-	u32 revmask;
+-	u32 flags;
+-	u16 off;
+-	u16 mask;
+-} sromvar_t;
+-
+-#define SRFL_MORE	1	/* value continues as described by the next entry */
+-#define	SRFL_NOFFS	2	/* value bits can't be all one's */
+-#define	SRFL_PRHEX	4	/* value is in hexdecimal format */
+-#define	SRFL_PRSIGN	8	/* value is in signed decimal format */
+-#define	SRFL_CCODE	0x10	/* value is in country code format */
+-#define	SRFL_ETHADDR	0x20	/* value is an Ethernet address */
+-#define SRFL_LEDDC	0x40	/* value is an LED duty cycle */
+-#define SRFL_NOVAR	0x80	/* do not generate a nvram param, entry is for mfgc */
+-
+-/* Assumptions:
+- * - Ethernet address spans across 3 consective words
+- *
+- * Table rules:
+- * - Add multiple entries next to each other if a value spans across multiple words
+- *   (even multiple fields in the same word) with each entry except the last having
+- *   it's SRFL_MORE bit set.
+- * - Ethernet address entry does not follow above rule and must not have SRFL_MORE
+- *   bit set. Its SRFL_ETHADDR bit implies it takes multiple words.
+- * - The last entry's name field must be NULL to indicate the end of the table. Other
+- *   entries must have non-NULL name.
+- */
+-
+-static const sromvar_t pci_sromvars[] = {
+-	{"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff},
+-	{"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
+-	{"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
+-	{"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},
+-	{"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff},
+-	{"boardflags", 0x00000004, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff},
+-	{"", 0, 0, SROM_BFL2, 0xffff},
+-	{"boardflags", 0x00000008, SRFL_PRHEX | SRFL_MORE, SROM_BFL, 0xffff},
+-	{"", 0, 0, SROM3_BFL2, 0xffff},
+-	{"boardflags", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL0, 0xffff},
+-	{"", 0, 0, SROM4_BFL1, 0xffff},
+-	{"boardflags", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL0, 0xffff},
+-	{"", 0, 0, SROM5_BFL1, 0xffff},
+-	{"boardflags", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL0, 0xffff},
+-	{"", 0, 0, SROM8_BFL1, 0xffff},
+-	{"boardflags2", 0x00000010, SRFL_PRHEX | SRFL_MORE, SROM4_BFL2, 0xffff},
+-	{"", 0, 0, SROM4_BFL3, 0xffff},
+-	{"boardflags2", 0x000000e0, SRFL_PRHEX | SRFL_MORE, SROM5_BFL2, 0xffff},
+-	{"", 0, 0, SROM5_BFL3, 0xffff},
+-	{"boardflags2", 0xffffff00, SRFL_PRHEX | SRFL_MORE, SROM8_BFL2, 0xffff},
+-	{"", 0, 0, SROM8_BFL3, 0xffff},
+-	{"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff},
+-	{"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff},
+-	{"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff},
+-	{"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff},
+-	{"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff},
+-	{"boardnum", 0xffffff00, 0, SROM8_MACLO, 0xffff},
+-	{"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK},
+-	{"regrev", 0x00000008, 0, SROM_OPO, 0xff00},
+-	{"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff},
+-	{"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff},
+-	{"regrev", 0xffffff00, 0, SROM8_REGREV, 0x00ff},
+-	{"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff},
+-	{"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00},
+-	{"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff},
+-	{"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00},
+-	{"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff},
+-	{"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00},
+-	{"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff},
+-	{"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00},
+-	{"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff},
+-	{"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00},
+-	{"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff},
+-	{"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00},
+-	{"ledbh0", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff},
+-	{"ledbh1", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH10, 0xff00},
+-	{"ledbh2", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff},
+-	{"ledbh3", 0xffffff00, SRFL_NOFFS, SROM8_LEDBH32, 0xff00},
+-	{"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff},
+-	{"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff},
+-	{"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff},
+-	{"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff},
+-	{"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff},
+-	{"pa0b0", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff},
+-	{"pa0b1", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff},
+-	{"pa0b2", 0xffffff00, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff},
+-	{"pa0itssit", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0xff00},
+-	{"pa0maxpwr", 0xffffff00, 0, SROM8_W0_ITTMAXP, 0x00ff},
+-	{"opo", 0x0000000c, 0, SROM_OPO, 0x00ff},
+-	{"opo", 0xffffff00, 0, SROM8_2G_OFDMPO, 0x00ff},
+-	{"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK},
+-	{"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff},
+-	{"aa2g", 0xffffff00, 0, SROM8_AA, 0x00ff},
+-	{"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK},
+-	{"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00},
+-	{"aa5g", 0xffffff00, 0, SROM8_AA, 0xff00},
+-	{"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff},
+-	{"ag1", 0x0000000e, 0, SROM_AG10, 0xff00},
+-	{"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff},
+-	{"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00},
+-	{"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff},
+-	{"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00},
+-	{"ag0", 0xffffff00, 0, SROM8_AG10, 0x00ff},
+-	{"ag1", 0xffffff00, 0, SROM8_AG10, 0xff00},
+-	{"ag2", 0xffffff00, 0, SROM8_AG32, 0x00ff},
+-	{"ag3", 0xffffff00, 0, SROM8_AG32, 0xff00},
+-	{"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff},
+-	{"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff},
+-	{"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff},
+-	{"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff},
+-	{"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff},
+-	{"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff},
+-	{"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff},
+-	{"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff},
+-	{"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff},
+-	{"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00},
+-	{"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00},
+-	{"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00},
+-	{"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff},
+-	{"pa1b0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff},
+-	{"pa1b1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff},
+-	{"pa1b2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff},
+-	{"pa1lob0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff},
+-	{"pa1lob1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff},
+-	{"pa1lob2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff},
+-	{"pa1hib0", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff},
+-	{"pa1hib1", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff},
+-	{"pa1hib2", 0xffffff00, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff},
+-	{"pa1itssit", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0xff00},
+-	{"pa1maxpwr", 0xffffff00, 0, SROM8_W1_ITTMAXP, 0x00ff},
+-	{"pa1lomaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0xff00},
+-	{"pa1himaxpwr", 0xffffff00, 0, SROM8_W1_MAXP_LCHC, 0x00ff},
+-	{"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800},
+-	{"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700},
+-	{"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0},
+-	{"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f},
+-	{"bxa2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x1800},
+-	{"rssisav2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x0700},
+-	{"rssismc2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x00f0},
+-	{"rssismf2g", 0xffffff00, 0, SROM8_BXARSSI2G, 0x000f},
+-	{"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800},
+-	{"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700},
+-	{"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0},
+-	{"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f},
+-	{"bxa5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x1800},
+-	{"rssisav5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x0700},
+-	{"rssismc5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x00f0},
+-	{"rssismf5g", 0xffffff00, 0, SROM8_BXARSSI5G, 0x000f},
+-	{"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff},
+-	{"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00},
+-	{"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff},
+-	{"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00},
+-	{"tri2g", 0xffffff00, 0, SROM8_TRI52G, 0x00ff},
+-	{"tri5g", 0xffffff00, 0, SROM8_TRI52G, 0xff00},
+-	{"tri5gl", 0xffffff00, 0, SROM8_TRI5GHL, 0x00ff},
+-	{"tri5gh", 0xffffff00, 0, SROM8_TRI5GHL, 0xff00},
+-	{"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff},
+-	{"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00},
+-	{"rxpo2g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff},
+-	{"rxpo5g", 0xffffff00, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00},
+-	{"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK},
+-	{"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK},
+-	{"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK},
+-	{"txchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK},
+-	{"rxchain", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK},
+-	{"antswitch", 0xffffff00, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK},
+-	{"tssipos2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK},
+-	{"extpagain2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK},
+-	{"pdetrange2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK},
+-	{"triso2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK},
+-	{"antswctl2g", 0xffffff00, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK},
+-	{"tssipos5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK},
+-	{"extpagain5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK},
+-	{"pdetrange5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK},
+-	{"triso5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK},
+-	{"antswctl5g", 0xffffff00, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK},
+-	{"tempthresh", 0xffffff00, 0, SROM8_THERMAL, 0xff00},
+-	{"tempoffset", 0xffffff00, 0, SROM8_THERMAL, 0x00ff},
+-	{"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff},
+-	{"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00},
+-	{"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff},
+-	{"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00},
+-	{"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff},
+-	{"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00},
+-	{"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff},
+-	{"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00},
+-	{"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff},
+-	{"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00},
+-	{"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff},
+-	{"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00},
+-	{"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff},
+-	{"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00},
+-	{"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff},
+-	{"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00},
+-
+-	{"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff},
+-	{"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff},
+-	{"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff},
+-	{"ccode", 0xffffff00, SRFL_CCODE, SROM8_CCODE, 0xffff},
+-	{"macaddr", 0xffffff00, SRFL_ETHADDR, SROM8_MACHI, 0xffff},
+-	{"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff},
+-	{"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff},
+-	{"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff},
+-	{"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff},
+-	{"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff},
+-	{"leddc", 0xffffff00, SRFL_NOFFS | SRFL_LEDDC, SROM8_LEDDC, 0xffff},
+-	{"leddc", 0x000000e0, SRFL_NOFFS | SRFL_LEDDC, SROM5_LEDDC, 0xffff},
+-	{"leddc", 0x00000010, SRFL_NOFFS | SRFL_LEDDC, SROM4_LEDDC, 0xffff},
+-	{"leddc", 0x00000008, SRFL_NOFFS | SRFL_LEDDC, SROM3_LEDDC, 0xffff},
+-	{"rawtempsense", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff},
+-	{"measpower", 0xffffff00, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00},
+-	{"tempsense_slope", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX,
+-	 0x00ff},
+-	{"tempcorrx", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00},
+-	{"tempsense_option", 0xffffff00, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX,
+-	 0x0300},
+-	{"freqoffset_corr", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP,
+-	 0x000f},
+-	{"iqcal_swp_dis", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010},
+-	{"hw_iqcal_en", 0xffffff00, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020},
+-	{"phycal_tempdelta", 0xffffff00, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff},
+-
+-	{"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff},
+-	{"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff},
+-	{"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff},
+-	{"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff},
+-	{"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff},
+-	{"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff},
+-	{"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff},
+-	{"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff},
+-	{"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff},
+-	{"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff},
+-	{"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff},
+-	{"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff},
+-	{"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff},
+-	{"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff},
+-	{"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff},
+-	{"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff},
+-	{"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff},
+-	{"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff},
+-	{"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff},
+-	{"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff},
+-	{"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff},
+-	{"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff},
+-	{"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff},
+-	{"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff},
+-	{"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff},
+-	{"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff},
+-	{"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff},
+-	{"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff},
+-	{"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff},
+-	{"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff},
+-	{"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff},
+-	{"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff},
+-	{"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff},
+-	{"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff},
+-	{"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff},
+-	{"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff},
+-	{"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff},
+-	{"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff},
+-	{"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff},
+-	{"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff},
+-	{"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff},
+-	{"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff},
+-	{"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff},
+-	{"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff},
+-	{"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff},
+-	{"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff},
+-	{"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff},
+-	{"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff},
+-	{"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff},
+-	{"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff},
+-	{"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff},
+-	{"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff},
+-	{"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff},
+-	{"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff},
+-	{"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff},
+-	{"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff},
+-	{"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff},
+-	{"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff},
+-	{"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff},
+-	{"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff},
+-	{"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff},
+-	{"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff},
+-	{"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff},
+-	{"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff},
+-	{"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff},
+-	{"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff},
+-	{"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff},
+-	{"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff},
+-	{"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff},
+-	{"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff},
+-	{"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff},
+-	{"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff},
+-	{"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff},
+-	{"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff},
+-	{"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff},
+-	{"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff},
+-	{"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff},
+-	{"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff},
+-	{"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff},
+-	{"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff},
+-	{"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff},
+-	{"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff},
+-	{"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff},
+-
+-	/* power per rate from sromrev 9 */
+-	{"cckbw202gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20, 0xffff},
+-	{"cckbw20ul2gpo", 0xfffffe00, 0, SROM9_2GPO_CCKBW20UL, 0xffff},
+-	{"legofdmbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20,
+-	 0xffff},
+-	{"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff},
+-	{"legofdmbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff},
+-	{"legofdmbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff},
+-	{"legofdmbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff},
+-	{"legofdmbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff},
+-	{"legofdmbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff},
+-	{"legofdmbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff},
+-	{"legofdmbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff},
+-	{"mcsbw202gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff},
+-	{"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff},
+-	{"mcsbw20ul2gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff},
+-	{"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff},
+-	{"mcsbw402gpo", 0xfffffe00, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff},
+-	{"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff},
+-	{"mcsbw205glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff},
+-	{"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff},
+-	{"mcsbw20ul5glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff},
+-	{"mcsbw405glpo", 0xfffffe00, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff},
+-	{"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff},
+-	{"mcsbw205gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff},
+-	{"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff},
+-	{"mcsbw20ul5gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff},
+-	{"mcsbw405gmpo", 0xfffffe00, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff},
+-	{"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff},
+-	{"mcsbw205ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff},
+-	{"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff},
+-	{"mcsbw20ul5ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW20UL,
+-	 0xffff},
+-	{"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff},
+-	{"mcsbw405ghpo", 0xfffffe00, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff},
+-	{"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff},
+-	{"mcs32po", 0xfffffe00, 0, SROM9_PO_MCS32, 0xffff},
+-	{"legofdm40duppo", 0xfffffe00, 0, SROM9_PO_LOFDM40DUP, 0xffff},
+-
+-	{NULL, 0, 0, 0, 0}
+-};
+-
+-static const sromvar_t perpath_pci_sromvars[] = {
+-	{"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff},
+-	{"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00},
+-	{"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00},
+-	{"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff},
+-	{"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff},
+-	{"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff},
+-	{"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff},
+-	{"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff},
+-	{"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff},
+-	{"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00},
+-	{"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff},
+-	{"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff},
+-	{"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff},
+-	{"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff},
+-	{"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff},
+-	{"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff},
+-	{"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff},
+-	{"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff},
+-	{"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff},
+-	{"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff},
+-	{"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff},
+-	{"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff},
+-	{"maxp2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0x00ff},
+-	{"itt2ga", 0xffffff00, 0, SROM8_2G_ITT_MAXP, 0xff00},
+-	{"itt5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0xff00},
+-	{"pa2gw0a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA, 0xffff},
+-	{"pa2gw1a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff},
+-	{"pa2gw2a", 0xffffff00, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff},
+-	{"maxp5ga", 0xffffff00, 0, SROM8_5G_ITT_MAXP, 0x00ff},
+-	{"maxp5gha", 0xffffff00, 0, SROM8_5GLH_MAXP, 0x00ff},
+-	{"maxp5gla", 0xffffff00, 0, SROM8_5GLH_MAXP, 0xff00},
+-	{"pa5gw0a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA, 0xffff},
+-	{"pa5gw1a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff},
+-	{"pa5gw2a", 0xffffff00, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff},
+-	{"pa5glw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA, 0xffff},
+-	{"pa5glw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff},
+-	{"pa5glw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff},
+-	{"pa5ghw0a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA, 0xffff},
+-	{"pa5ghw1a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff},
+-	{"pa5ghw2a", 0xffffff00, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff},
+-	{NULL, 0, 0, 0, 0}
+-};
+-
+-#if !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP))
+-#define	PHY_TYPE_N		4	/* N-Phy value */
+-#define	PHY_TYPE_LP		5	/* LP-Phy value */
+-#endif				/* !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) */
+-#if !defined(PHY_TYPE_NULL)
+-#define	PHY_TYPE_NULL		0xf	/* Invalid Phy value */
+-#endif				/* !defined(PHY_TYPE_NULL) */
+-
+-typedef struct {
+-	u16 phy_type;
+-	u16 bandrange;
+-	u16 chain;
+-	const char *vars;
+-} pavars_t;
+-
+-static const pavars_t pavars[] = {
+-	/* NPHY */
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 0,
+-	 "pa5glw0a0 pa5glw1a0 pa5glw2a0"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 1,
+-	 "pa5glw0a1 pa5glw1a1 pa5glw2a1"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 0,
+-	 "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 1,
+-	 "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"},
+-	/* LPPHY */
+-	{PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_2G, 0, "pa0b0 pa0b1 pa0b2"},
+-	{PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GL, 0, "pa1lob0 pa1lob1 pa1lob2"},
+-	{PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GM, 0, "pa1b0 pa1b1 pa1b2"},
+-	{PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GH, 0, "pa1hib0 pa1hib1 pa1hib2"},
+-	{PHY_TYPE_NULL, 0, 0, ""}
+-};
+-
+-typedef struct {
+-	u16 phy_type;
+-	u16 bandrange;
+-	const char *vars;
+-} povars_t;
+-
+-static const povars_t povars[] = {
+-	/* NPHY */
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G,
+-	 "mcs2gpo0 mcs2gpo1 mcs2gpo2 mcs2gpo3 "
+-	 "mcs2gpo4 mcs2gpo5 mcs2gpo6 mcs2gpo7"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL,
+-	 "mcs5glpo0 mcs5glpo1 mcs5glpo2 mcs5glpo3 "
+-	 "mcs5glpo4 mcs5glpo5 mcs5glpo6 mcs5glpo7"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM,
+-	 "mcs5gpo0 mcs5gpo1 mcs5gpo2 mcs5gpo3 "
+-	 "mcs5gpo4 mcs5gpo5 mcs5gpo6 mcs5gpo7"},
+-	{PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH,
+-	 "mcs5ghpo0 mcs5ghpo1 mcs5ghpo2 mcs5ghpo3 "
+-	 "mcs5ghpo4 mcs5ghpo5 mcs5ghpo6 mcs5ghpo7"},
+-	{PHY_TYPE_NULL, 0, ""}
+-};
+-
+-typedef struct {
+-	u8 tag;		/* Broadcom subtag name */
+-	u8 len;		/* Length field of the tuple, note that it includes the
+-				 * subtag name (1 byte): 1 + tuple content length
+-				 */
+-	const char *params;
+-} cis_tuple_t;
+-
+-#define OTP_RAW		(0xff - 1)	/* Reserved tuple number for wrvar Raw input */
+-#define OTP_VERS_1	(0xff - 2)	/* CISTPL_VERS_1 */
+-#define OTP_MANFID	(0xff - 3)	/* CISTPL_MANFID */
+-#define OTP_RAW1	(0xff - 4)	/* Like RAW, but comes first */
+-
+-#endif				/* _bcmsrom_tbl_h_ */
+diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h
+deleted file mode 100644
+index d91e418..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/d11.h
++++ /dev/null
+@@ -1,1773 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#ifndef	_D11_H
+-#define	_D11_H
+-
+-#include <sbconfig.h>
+-
+-#ifndef WL_RSSI_ANT_MAX
+-#define WL_RSSI_ANT_MAX		4	/* max possible rx antennas */
+-#elif WL_RSSI_ANT_MAX != 4
+-#error "WL_RSSI_ANT_MAX does not match"
+-#endif
+-
+-/* cpp contortions to concatenate w/arg prescan */
+-#ifndef	PAD
+-#define	_PADLINE(line)	pad ## line
+-#define	_XSTR(line)	_PADLINE(line)
+-#define	PAD		_XSTR(__LINE__)
+-#endif
+-
+-#define	BCN_TMPL_LEN		512	/* length of the BCN template area */
+-
+-/* RX FIFO numbers */
+-#define	RX_FIFO			0	/* data and ctl frames */
+-#define	RX_TXSTATUS_FIFO	3	/* RX fifo for tx status packages */
+-
+-/* TX FIFO numbers using WME Access Classes */
+-#define	TX_AC_BK_FIFO		0	/* Access Category Background TX FIFO */
+-#define	TX_AC_BE_FIFO		1	/* Access Category Best-Effort TX FIFO */
+-#define	TX_AC_VI_FIFO		2	/* Access Class Video TX FIFO */
+-#define	TX_AC_VO_FIFO		3	/* Access Class Voice TX FIFO */
+-#define	TX_BCMC_FIFO		4	/* Broadcast/Multicast TX FIFO */
+-#define	TX_ATIM_FIFO		5	/* TX fifo for ATIM window info */
+-
+-/* Addr is byte address used by SW; offset is word offset used by uCode */
+-
+-/* Per AC TX limit settings */
+-#define M_AC_TXLMT_BASE_ADDR         (0x180 * 2)
+-#define M_AC_TXLMT_ADDR(_ac)         (M_AC_TXLMT_BASE_ADDR + (2 * (_ac)))
+-
+-/* Legacy TX FIFO numbers */
+-#define	TX_DATA_FIFO		TX_AC_BE_FIFO
+-#define	TX_CTL_FIFO		TX_AC_VO_FIFO
+-
+-typedef volatile struct {
+-	u32 intstatus;
+-	u32 intmask;
+-} intctrlregs_t;
+-
+-/* PIO structure,
+- *  support two PIO format: 2 bytes access and 4 bytes access
+- *  basic FIFO register set is per channel(transmit or receive)
+- *  a pair of channels is defined for convenience
+- */
+-/* 2byte-wide pio register set per channel(xmt or rcv) */
+-typedef volatile struct {
+-	u16 fifocontrol;
+-	u16 fifodata;
+-	u16 fifofree;	/* only valid in xmt channel, not in rcv channel */
+-	u16 PAD;
+-} pio2regs_t;
+-
+-/* a pair of pio channels(tx and rx) */
+-typedef volatile struct {
+-	pio2regs_t tx;
+-	pio2regs_t rx;
+-} pio2regp_t;
+-
+-/* 4byte-wide pio register set per channel(xmt or rcv) */
+-typedef volatile struct {
+-	u32 fifocontrol;
+-	u32 fifodata;
+-} pio4regs_t;
+-
+-/* a pair of pio channels(tx and rx) */
+-typedef volatile struct {
+-	pio4regs_t tx;
+-	pio4regs_t rx;
+-} pio4regp_t;
+-
+-/* read: 32-bit register that can be read as 32-bit or as 2 16-bit
+- * write: only low 16b-it half can be written
+- */
+-typedef volatile union {
+-	u32 pmqhostdata;	/* read only! */
+-	struct {
+-		u16 pmqctrlstatus;	/* read/write */
+-		u16 PAD;
+-	} w;
+-} pmqreg_t;
+-
+-typedef volatile struct {
+-	dma64regs_t dmaxmt;	/* dma tx */
+-	pio4regs_t piotx;	/* pio tx */
+-	dma64regs_t dmarcv;	/* dma rx */
+-	pio4regs_t piorx;	/* pio rx */
+-} fifo64_t;
+-
+-/*
+- * Host Interface Registers
+- * - primed from hnd_cores/dot11mac/systemC/registers/ihr.h
+- * - but definitely not complete
+- */
+-typedef volatile struct _d11regs {
+-	/* Device Control ("semi-standard host registers") */
+-	u32 PAD[3];		/* 0x0 - 0x8 */
+-	u32 biststatus;	/* 0xC */
+-	u32 biststatus2;	/* 0x10 */
+-	u32 PAD;		/* 0x14 */
+-	u32 gptimer;		/* 0x18 */
+-	u32 usectimer;	/* 0x1c *//* for corerev >= 26 */
+-
+-	/* Interrupt Control *//* 0x20 */
+-	intctrlregs_t intctrlregs[8];
+-
+-	u32 PAD[40];		/* 0x60 - 0xFC */
+-
+-	u32 intrcvlazy[4];	/* 0x100 - 0x10C */
+-
+-	u32 PAD[4];		/* 0x110 - 0x11c */
+-
+-	u32 maccontrol;	/* 0x120 */
+-	u32 maccommand;	/* 0x124 */
+-	u32 macintstatus;	/* 0x128 */
+-	u32 macintmask;	/* 0x12C */
+-
+-	/* Transmit Template Access */
+-	u32 tplatewrptr;	/* 0x130 */
+-	u32 tplatewrdata;	/* 0x134 */
+-	u32 PAD[2];		/* 0x138 - 0x13C */
+-
+-	/* PMQ registers */
+-	pmqreg_t pmqreg;	/* 0x140 */
+-	u32 pmqpatl;		/* 0x144 */
+-	u32 pmqpath;		/* 0x148 */
+-	u32 PAD;		/* 0x14C */
+-
+-	u32 chnstatus;	/* 0x150 */
+-	u32 psmdebug;	/* 0x154 */
+-	u32 phydebug;	/* 0x158 */
+-	u32 machwcap;	/* 0x15C */
+-
+-	/* Extended Internal Objects */
+-	u32 objaddr;		/* 0x160 */
+-	u32 objdata;		/* 0x164 */
+-	u32 PAD[2];		/* 0x168 - 0x16c */
+-
+-	u32 frmtxstatus;	/* 0x170 */
+-	u32 frmtxstatus2;	/* 0x174 */
+-	u32 PAD[2];		/* 0x178 - 0x17c */
+-
+-	/* TSF host access */
+-	u32 tsf_timerlow;	/* 0x180 */
+-	u32 tsf_timerhigh;	/* 0x184 */
+-	u32 tsf_cfprep;	/* 0x188 */
+-	u32 tsf_cfpstart;	/* 0x18c */
+-	u32 tsf_cfpmaxdur32;	/* 0x190 */
+-	u32 PAD[3];		/* 0x194 - 0x19c */
+-
+-	u32 maccontrol1;	/* 0x1a0 */
+-	u32 machwcap1;	/* 0x1a4 */
+-	u32 PAD[14];		/* 0x1a8 - 0x1dc */
+-
+-	/* Clock control and hardware workarounds*/
+-	u32 clk_ctl_st;	/* 0x1e0 */
+-	u32 hw_war;
+-	u32 d11_phypllctl;	/* the phypll request/avail bits are
+-				 * moved to clk_ctl_st
+-				 */
+-	u32 PAD[5];		/* 0x1ec - 0x1fc */
+-
+-	/* 0x200-0x37F dma/pio registers */
+-	fifo64_t fifo64regs[6];
+-
+-	/* FIFO diagnostic port access */
+-	dma32diag_t dmafifo;	/* 0x380 - 0x38C */
+-
+-	u32 aggfifocnt;	/* 0x390 */
+-	u32 aggfifodata;	/* 0x394 */
+-	u32 PAD[16];		/* 0x398 - 0x3d4 */
+-	u16 radioregaddr;	/* 0x3d8 */
+-	u16 radioregdata;	/* 0x3da */
+-
+-	/*
+-	 * time delay between the change on rf disable input and
+-	 * radio shutdown
+-	 */
+-	u32 rfdisabledly;	/* 0x3DC */
+-
+-	/* PHY register access */
+-	u16 phyversion;	/* 0x3e0 - 0x0 */
+-	u16 phybbconfig;	/* 0x3e2 - 0x1 */
+-	u16 phyadcbias;	/* 0x3e4 - 0x2  Bphy only */
+-	u16 phyanacore;	/* 0x3e6 - 0x3  pwwrdwn on aphy */
+-	u16 phyrxstatus0;	/* 0x3e8 - 0x4 */
+-	u16 phyrxstatus1;	/* 0x3ea - 0x5 */
+-	u16 phycrsth;	/* 0x3ec - 0x6 */
+-	u16 phytxerror;	/* 0x3ee - 0x7 */
+-	u16 phychannel;	/* 0x3f0 - 0x8 */
+-	u16 PAD[1];		/* 0x3f2 - 0x9 */
+-	u16 phytest;		/* 0x3f4 - 0xa */
+-	u16 phy4waddr;	/* 0x3f6 - 0xb */
+-	u16 phy4wdatahi;	/* 0x3f8 - 0xc */
+-	u16 phy4wdatalo;	/* 0x3fa - 0xd */
+-	u16 phyregaddr;	/* 0x3fc - 0xe */
+-	u16 phyregdata;	/* 0x3fe - 0xf */
+-
+-	/* IHR *//* 0x400 - 0x7FE */
+-
+-	/* RXE Block */
+-	u16 PAD[3];		/* 0x400 - 0x406 */
+-	u16 rcv_fifo_ctl;	/* 0x406 */
+-	u16 PAD;		/* 0x408 - 0x40a */
+-	u16 rcv_frm_cnt;	/* 0x40a */
+-	u16 PAD[4];		/* 0x40a - 0x414 */
+-	u16 rssi;		/* 0x414 */
+-	u16 PAD[5];		/* 0x414 - 0x420 */
+-	u16 rcm_ctl;		/* 0x420 */
+-	u16 rcm_mat_data;	/* 0x422 */
+-	u16 rcm_mat_mask;	/* 0x424 */
+-	u16 rcm_mat_dly;	/* 0x426 */
+-	u16 rcm_cond_mask_l;	/* 0x428 */
+-	u16 rcm_cond_mask_h;	/* 0x42A */
+-	u16 rcm_cond_dly;	/* 0x42C */
+-	u16 PAD[1];		/* 0x42E */
+-	u16 ext_ihr_addr;	/* 0x430 */
+-	u16 ext_ihr_data;	/* 0x432 */
+-	u16 rxe_phyrs_2;	/* 0x434 */
+-	u16 rxe_phyrs_3;	/* 0x436 */
+-	u16 phy_mode;	/* 0x438 */
+-	u16 rcmta_ctl;	/* 0x43a */
+-	u16 rcmta_size;	/* 0x43c */
+-	u16 rcmta_addr0;	/* 0x43e */
+-	u16 rcmta_addr1;	/* 0x440 */
+-	u16 rcmta_addr2;	/* 0x442 */
+-	u16 PAD[30];		/* 0x444 - 0x480 */
+-
+-	/* PSM Block *//* 0x480 - 0x500 */
+-
+-	u16 PAD;		/* 0x480 */
+-	u16 psm_maccontrol_h;	/* 0x482 */
+-	u16 psm_macintstatus_l;	/* 0x484 */
+-	u16 psm_macintstatus_h;	/* 0x486 */
+-	u16 psm_macintmask_l;	/* 0x488 */
+-	u16 psm_macintmask_h;	/* 0x48A */
+-	u16 PAD;		/* 0x48C */
+-	u16 psm_maccommand;	/* 0x48E */
+-	u16 psm_brc;		/* 0x490 */
+-	u16 psm_phy_hdr_param;	/* 0x492 */
+-	u16 psm_postcard;	/* 0x494 */
+-	u16 psm_pcard_loc_l;	/* 0x496 */
+-	u16 psm_pcard_loc_h;	/* 0x498 */
+-	u16 psm_gpio_in;	/* 0x49A */
+-	u16 psm_gpio_out;	/* 0x49C */
+-	u16 psm_gpio_oe;	/* 0x49E */
+-
+-	u16 psm_bred_0;	/* 0x4A0 */
+-	u16 psm_bred_1;	/* 0x4A2 */
+-	u16 psm_bred_2;	/* 0x4A4 */
+-	u16 psm_bred_3;	/* 0x4A6 */
+-	u16 psm_brcl_0;	/* 0x4A8 */
+-	u16 psm_brcl_1;	/* 0x4AA */
+-	u16 psm_brcl_2;	/* 0x4AC */
+-	u16 psm_brcl_3;	/* 0x4AE */
+-	u16 psm_brpo_0;	/* 0x4B0 */
+-	u16 psm_brpo_1;	/* 0x4B2 */
+-	u16 psm_brpo_2;	/* 0x4B4 */
+-	u16 psm_brpo_3;	/* 0x4B6 */
+-	u16 psm_brwk_0;	/* 0x4B8 */
+-	u16 psm_brwk_1;	/* 0x4BA */
+-	u16 psm_brwk_2;	/* 0x4BC */
+-	u16 psm_brwk_3;	/* 0x4BE */
+-
+-	u16 psm_base_0;	/* 0x4C0 */
+-	u16 psm_base_1;	/* 0x4C2 */
+-	u16 psm_base_2;	/* 0x4C4 */
+-	u16 psm_base_3;	/* 0x4C6 */
+-	u16 psm_base_4;	/* 0x4C8 */
+-	u16 psm_base_5;	/* 0x4CA */
+-	u16 psm_base_6;	/* 0x4CC */
+-	u16 psm_pc_reg_0;	/* 0x4CE */
+-	u16 psm_pc_reg_1;	/* 0x4D0 */
+-	u16 psm_pc_reg_2;	/* 0x4D2 */
+-	u16 psm_pc_reg_3;	/* 0x4D4 */
+-	u16 PAD[0xD];	/* 0x4D6 - 0x4DE */
+-	u16 psm_corectlsts;	/* 0x4f0 *//* Corerev >= 13 */
+-	u16 PAD[0x7];	/* 0x4f2 - 0x4fE */
+-
+-	/* TXE0 Block *//* 0x500 - 0x580 */
+-	u16 txe_ctl;		/* 0x500 */
+-	u16 txe_aux;		/* 0x502 */
+-	u16 txe_ts_loc;	/* 0x504 */
+-	u16 txe_time_out;	/* 0x506 */
+-	u16 txe_wm_0;	/* 0x508 */
+-	u16 txe_wm_1;	/* 0x50A */
+-	u16 txe_phyctl;	/* 0x50C */
+-	u16 txe_status;	/* 0x50E */
+-	u16 txe_mmplcp0;	/* 0x510 */
+-	u16 txe_mmplcp1;	/* 0x512 */
+-	u16 txe_phyctl1;	/* 0x514 */
+-
+-	u16 PAD[0x05];	/* 0x510 - 0x51E */
+-
+-	/* Transmit control */
+-	u16 xmtfifodef;	/* 0x520 */
+-	u16 xmtfifo_frame_cnt;	/* 0x522 *//* Corerev >= 16 */
+-	u16 xmtfifo_byte_cnt;	/* 0x524 *//* Corerev >= 16 */
+-	u16 xmtfifo_head;	/* 0x526 *//* Corerev >= 16 */
+-	u16 xmtfifo_rd_ptr;	/* 0x528 *//* Corerev >= 16 */
+-	u16 xmtfifo_wr_ptr;	/* 0x52A *//* Corerev >= 16 */
+-	u16 xmtfifodef1;	/* 0x52C *//* Corerev >= 16 */
+-
+-	u16 PAD[0x09];	/* 0x52E - 0x53E */
+-
+-	u16 xmtfifocmd;	/* 0x540 */
+-	u16 xmtfifoflush;	/* 0x542 */
+-	u16 xmtfifothresh;	/* 0x544 */
+-	u16 xmtfifordy;	/* 0x546 */
+-	u16 xmtfifoprirdy;	/* 0x548 */
+-	u16 xmtfiforqpri;	/* 0x54A */
+-	u16 xmttplatetxptr;	/* 0x54C */
+-	u16 PAD;		/* 0x54E */
+-	u16 xmttplateptr;	/* 0x550 */
+-	u16 smpl_clct_strptr;	/* 0x552 *//* Corerev >= 22 */
+-	u16 smpl_clct_stpptr;	/* 0x554 *//* Corerev >= 22 */
+-	u16 smpl_clct_curptr;	/* 0x556 *//* Corerev >= 22 */
+-	u16 PAD[0x04];	/* 0x558 - 0x55E */
+-	u16 xmttplatedatalo;	/* 0x560 */
+-	u16 xmttplatedatahi;	/* 0x562 */
+-
+-	u16 PAD[2];		/* 0x564 - 0x566 */
+-
+-	u16 xmtsel;		/* 0x568 */
+-	u16 xmttxcnt;	/* 0x56A */
+-	u16 xmttxshmaddr;	/* 0x56C */
+-
+-	u16 PAD[0x09];	/* 0x56E - 0x57E */
+-
+-	/* TXE1 Block */
+-	u16 PAD[0x40];	/* 0x580 - 0x5FE */
+-
+-	/* TSF Block */
+-	u16 PAD[0X02];	/* 0x600 - 0x602 */
+-	u16 tsf_cfpstrt_l;	/* 0x604 */
+-	u16 tsf_cfpstrt_h;	/* 0x606 */
+-	u16 PAD[0X05];	/* 0x608 - 0x610 */
+-	u16 tsf_cfppretbtt;	/* 0x612 */
+-	u16 PAD[0XD];	/* 0x614 - 0x62C */
+-	u16 tsf_clk_frac_l;	/* 0x62E */
+-	u16 tsf_clk_frac_h;	/* 0x630 */
+-	u16 PAD[0X14];	/* 0x632 - 0x658 */
+-	u16 tsf_random;	/* 0x65A */
+-	u16 PAD[0x05];	/* 0x65C - 0x664 */
+-	/* GPTimer 2 registers */
+-	u16 tsf_gpt2_stat;	/* 0x666 */
+-	u16 tsf_gpt2_ctr_l;	/* 0x668 */
+-	u16 tsf_gpt2_ctr_h;	/* 0x66A */
+-	u16 tsf_gpt2_val_l;	/* 0x66C */
+-	u16 tsf_gpt2_val_h;	/* 0x66E */
+-	u16 tsf_gptall_stat;	/* 0x670 */
+-	u16 PAD[0x07];	/* 0x672 - 0x67E */
+-
+-	/* IFS Block */
+-	u16 ifs_sifs_rx_tx_tx;	/* 0x680 */
+-	u16 ifs_sifs_nav_tx;	/* 0x682 */
+-	u16 ifs_slot;	/* 0x684 */
+-	u16 PAD;		/* 0x686 */
+-	u16 ifs_ctl;		/* 0x688 */
+-	u16 PAD[0x3];	/* 0x68a - 0x68F */
+-	u16 ifsstat;		/* 0x690 */
+-	u16 ifsmedbusyctl;	/* 0x692 */
+-	u16 iftxdur;		/* 0x694 */
+-	u16 PAD[0x3];	/* 0x696 - 0x69b */
+-	/* EDCF support in dot11macs */
+-	u16 ifs_aifsn;	/* 0x69c */
+-	u16 ifs_ctl1;	/* 0x69e */
+-
+-	/* slow clock registers */
+-	u16 scc_ctl;		/* 0x6a0 */
+-	u16 scc_timer_l;	/* 0x6a2 */
+-	u16 scc_timer_h;	/* 0x6a4 */
+-	u16 scc_frac;	/* 0x6a6 */
+-	u16 scc_fastpwrup_dly;	/* 0x6a8 */
+-	u16 scc_per;		/* 0x6aa */
+-	u16 scc_per_frac;	/* 0x6ac */
+-	u16 scc_cal_timer_l;	/* 0x6ae */
+-	u16 scc_cal_timer_h;	/* 0x6b0 */
+-	u16 PAD;		/* 0x6b2 */
+-
+-	u16 PAD[0x26];
+-
+-	/* NAV Block */
+-	u16 nav_ctl;		/* 0x700 */
+-	u16 navstat;		/* 0x702 */
+-	u16 PAD[0x3e];	/* 0x702 - 0x77E */
+-
+-	/* WEP/PMQ Block *//* 0x780 - 0x7FE */
+-	u16 PAD[0x20];	/* 0x780 - 0x7BE */
+-
+-	u16 wepctl;		/* 0x7C0 */
+-	u16 wepivloc;	/* 0x7C2 */
+-	u16 wepivkey;	/* 0x7C4 */
+-	u16 wepwkey;		/* 0x7C6 */
+-
+-	u16 PAD[4];		/* 0x7C8 - 0x7CE */
+-	u16 pcmctl;		/* 0X7D0 */
+-	u16 pcmstat;		/* 0X7D2 */
+-	u16 PAD[6];		/* 0x7D4 - 0x7DE */
+-
+-	u16 pmqctl;		/* 0x7E0 */
+-	u16 pmqstatus;	/* 0x7E2 */
+-	u16 pmqpat0;		/* 0x7E4 */
+-	u16 pmqpat1;		/* 0x7E6 */
+-	u16 pmqpat2;		/* 0x7E8 */
+-
+-	u16 pmqdat;		/* 0x7EA */
+-	u16 pmqdator;	/* 0x7EC */
+-	u16 pmqhst;		/* 0x7EE */
+-	u16 pmqpath0;	/* 0x7F0 */
+-	u16 pmqpath1;	/* 0x7F2 */
+-	u16 pmqpath2;	/* 0x7F4 */
+-	u16 pmqdath;		/* 0x7F6 */
+-
+-	u16 PAD[0x04];	/* 0x7F8 - 0x7FE */
+-
+-	/* SHM *//* 0x800 - 0xEFE */
+-	u16 PAD[0x380];	/* 0x800 - 0xEFE */
+-
+-	/* SB configuration registers: 0xF00 */
+-	sbconfig_t sbconfig;	/* sb config regs occupy top 256 bytes */
+-} d11regs_t;
+-
+-#define	PIHR_BASE	0x0400	/* byte address of packed IHR region */
+-
+-/* biststatus */
+-#define	BT_DONE		(1U << 31)	/* bist done */
+-#define	BT_B2S		(1 << 30)	/* bist2 ram summary bit */
+-
+-/* intstatus and intmask */
+-#define	I_PC		(1 << 10)	/* pci descriptor error */
+-#define	I_PD		(1 << 11)	/* pci data error */
+-#define	I_DE		(1 << 12)	/* descriptor protocol error */
+-#define	I_RU		(1 << 13)	/* receive descriptor underflow */
+-#define	I_RO		(1 << 14)	/* receive fifo overflow */
+-#define	I_XU		(1 << 15)	/* transmit fifo underflow */
+-#define	I_RI		(1 << 16)	/* receive interrupt */
+-#define	I_XI		(1 << 24)	/* transmit interrupt */
+-
+-/* interrupt receive lazy */
+-#define	IRL_TO_MASK		0x00ffffff	/* timeout */
+-#define	IRL_FC_MASK		0xff000000	/* frame count */
+-#define	IRL_FC_SHIFT		24	/* frame count */
+-
+-/* maccontrol register */
+-#define	MCTL_GMODE		(1U << 31)
+-#define	MCTL_DISCARD_PMQ	(1 << 30)
+-#define	MCTL_WAKE		(1 << 26)
+-#define	MCTL_HPS		(1 << 25)
+-#define	MCTL_PROMISC		(1 << 24)
+-#define	MCTL_KEEPBADFCS		(1 << 23)
+-#define	MCTL_KEEPCONTROL	(1 << 22)
+-#define	MCTL_PHYLOCK		(1 << 21)
+-#define	MCTL_BCNS_PROMISC	(1 << 20)
+-#define	MCTL_LOCK_RADIO		(1 << 19)
+-#define	MCTL_AP			(1 << 18)
+-#define	MCTL_INFRA		(1 << 17)
+-#define	MCTL_BIGEND		(1 << 16)
+-#define	MCTL_GPOUT_SEL_MASK	(3 << 14)
+-#define	MCTL_GPOUT_SEL_SHIFT	14
+-#define	MCTL_EN_PSMDBG		(1 << 13)
+-#define	MCTL_IHR_EN		(1 << 10)
+-#define	MCTL_SHM_UPPER		(1 <<  9)
+-#define	MCTL_SHM_EN		(1 <<  8)
+-#define	MCTL_PSM_JMP_0		(1 <<  2)
+-#define	MCTL_PSM_RUN		(1 <<  1)
+-#define	MCTL_EN_MAC		(1 <<  0)
+-
+-/* maccommand register */
+-#define	MCMD_BCN0VLD		(1 <<  0)
+-#define	MCMD_BCN1VLD		(1 <<  1)
+-#define	MCMD_DIRFRMQVAL		(1 <<  2)
+-#define	MCMD_CCA		(1 <<  3)
+-#define	MCMD_BG_NOISE		(1 <<  4)
+-#define	MCMD_SKIP_SHMINIT	(1 <<  5)	/* only used for simulation */
+-#define MCMD_SAMPLECOLL		MCMD_SKIP_SHMINIT	/* reuse for sample collect */
+-
+-/* macintstatus/macintmask */
+-#define	MI_MACSSPNDD		(1 <<  0)	/* MAC has gracefully suspended */
+-#define	MI_BCNTPL		(1 <<  1)	/* beacon template available */
+-#define	MI_TBTT			(1 <<  2)	/* TBTT indication */
+-#define	MI_BCNSUCCESS		(1 <<  3)	/* beacon successfully tx'd */
+-#define	MI_BCNCANCLD		(1 <<  4)	/* beacon canceled (IBSS) */
+-#define	MI_ATIMWINEND		(1 <<  5)	/* end of ATIM-window (IBSS) */
+-#define	MI_PMQ			(1 <<  6)	/* PMQ entries available */
+-#define	MI_NSPECGEN_0		(1 <<  7)	/* non-specific gen-stat bits that are set by PSM */
+-#define	MI_NSPECGEN_1		(1 <<  8)	/* non-specific gen-stat bits that are set by PSM */
+-#define	MI_MACTXERR		(1 <<  9)	/* MAC level Tx error */
+-#define	MI_NSPECGEN_3		(1 << 10)	/* non-specific gen-stat bits that are set by PSM */
+-#define	MI_PHYTXERR		(1 << 11)	/* PHY Tx error */
+-#define	MI_PME			(1 << 12)	/* Power Management Event */
+-#define	MI_GP0			(1 << 13)	/* General-purpose timer0 */
+-#define	MI_GP1			(1 << 14)	/* General-purpose timer1 */
+-#define	MI_DMAINT		(1 << 15)	/* (ORed) DMA-interrupts */
+-#define	MI_TXSTOP		(1 << 16)	/* MAC has completed a TX FIFO Suspend/Flush */
+-#define	MI_CCA			(1 << 17)	/* MAC has completed a CCA measurement */
+-#define	MI_BG_NOISE		(1 << 18)	/* MAC has collected background noise samples */
+-#define	MI_DTIM_TBTT		(1 << 19)	/* MBSS DTIM TBTT indication */
+-#define MI_PRQ			(1 << 20)	/* Probe response queue needs attention */
+-#define	MI_PWRUP		(1 << 21)	/* Radio/PHY has been powered back up. */
+-#define	MI_RESERVED3		(1 << 22)
+-#define	MI_RESERVED2		(1 << 23)
+-#define MI_RESERVED1		(1 << 25)
+-/* MAC detected change on RF Disable input*/
+-#define MI_RFDISABLE		(1 << 28)
+-#define	MI_TFS			(1 << 29)	/* MAC has completed a TX */
+-#define	MI_PHYCHANGED		(1 << 30)	/* A phy status change wrt G mode */
+-#define	MI_TO			(1U << 31)	/* general purpose timeout */
+-
+-/* Mac capabilities registers */
+-/* machwcap */
+-#define	MCAP_TKIPMIC		0x80000000	/* TKIP MIC hardware present */
+-
+-/* pmqhost data */
+-#define	PMQH_DATA_MASK		0xffff0000	/* data entry of head pmq entry */
+-#define	PMQH_BSSCFG		0x00100000	/* PM entry for BSS config */
+-#define	PMQH_PMOFF		0x00010000	/* PM Mode OFF: power save off */
+-#define	PMQH_PMON		0x00020000	/* PM Mode ON: power save on */
+-#define	PMQH_DASAT		0x00040000	/* Dis-associated or De-authenticated */
+-#define	PMQH_ATIMFAIL		0x00080000	/* ATIM not acknowledged */
+-#define	PMQH_DEL_ENTRY		0x00000001	/* delete head entry */
+-#define	PMQH_DEL_MULT		0x00000002	/* delete head entry to cur read pointer -1 */
+-#define	PMQH_OFLO		0x00000004	/* pmq overflow indication */
+-#define	PMQH_NOT_EMPTY		0x00000008	/* entries are present in pmq */
+-
+-/* phydebug */
+-#define	PDBG_CRS		(1 << 0)	/* phy is asserting carrier sense */
+-#define	PDBG_TXA		(1 << 1)	/* phy is taking xmit byte from mac this cycle */
+-#define	PDBG_TXF		(1 << 2)	/* mac is instructing the phy to transmit a frame */
+-#define	PDBG_TXE		(1 << 3)	/* phy is signalling a transmit Error to the mac */
+-#define	PDBG_RXF		(1 << 4)	/* phy detected the end of a valid frame preamble */
+-#define	PDBG_RXS		(1 << 5)	/* phy detected the end of a valid PLCP header */
+-#define	PDBG_RXFRG		(1 << 6)	/* rx start not asserted */
+-#define	PDBG_RXV		(1 << 7)	/* mac is taking receive byte from phy this cycle */
+-#define	PDBG_RFD		(1 << 16)	/* RF portion of the radio is disabled */
+-
+-/* objaddr register */
+-#define	OBJADDR_SEL_MASK	0x000F0000
+-#define	OBJADDR_UCM_SEL		0x00000000
+-#define	OBJADDR_SHM_SEL		0x00010000
+-#define	OBJADDR_SCR_SEL		0x00020000
+-#define	OBJADDR_IHR_SEL		0x00030000
+-#define	OBJADDR_RCMTA_SEL	0x00040000
+-#define	OBJADDR_SRCHM_SEL	0x00060000
+-#define	OBJADDR_WINC		0x01000000
+-#define	OBJADDR_RINC		0x02000000
+-#define	OBJADDR_AUTO_INC	0x03000000
+-
+-#define	WEP_PCMADDR		0x07d4
+-#define	WEP_PCMDATA		0x07d6
+-
+-/* frmtxstatus */
+-#define	TXS_V			(1 << 0)	/* valid bit */
+-#define	TXS_STATUS_MASK		0xffff
+-#define	TXS_FID_MASK		0xffff0000
+-#define	TXS_FID_SHIFT		16
+-
+-/* frmtxstatus2 */
+-#define	TXS_SEQ_MASK		0xffff
+-#define	TXS_PTX_MASK		0xff0000
+-#define	TXS_PTX_SHIFT		16
+-#define	TXS_MU_MASK		0x01000000
+-#define	TXS_MU_SHIFT		24
+-
+-/* clk_ctl_st */
+-#define CCS_ERSRC_REQ_D11PLL	0x00000100	/* d11 core pll request */
+-#define CCS_ERSRC_REQ_PHYPLL	0x00000200	/* PHY pll request */
+-#define CCS_ERSRC_AVAIL_D11PLL	0x01000000	/* d11 core pll available */
+-#define CCS_ERSRC_AVAIL_PHYPLL	0x02000000	/* PHY pll available */
+-
+-/* HT Cloclk Ctrl and Clock Avail for 4313 */
+-#define CCS_ERSRC_REQ_HT    0x00000010	/* HT avail request */
+-#define CCS_ERSRC_AVAIL_HT  0x00020000	/* HT clock available */
+-
+-/* tsf_cfprep register */
+-#define	CFPREP_CBI_MASK		0xffffffc0
+-#define	CFPREP_CBI_SHIFT	6
+-#define	CFPREP_CFPP		0x00000001
+-
+-/* tx fifo sizes values are in terms of 256 byte blocks */
+-#define TXFIFOCMD_RESET_MASK	(1 << 15)	/* reset */
+-#define TXFIFOCMD_FIFOSEL_SHIFT	8	/* fifo */
+-#define TXFIFO_FIFOTOP_SHIFT	8	/* fifo start */
+-
+-#define TXFIFO_START_BLK16	 65	/* Base address + 32 * 512 B/P */
+-#define TXFIFO_START_BLK	 6	/* Base address + 6 * 256 B */
+-#define TXFIFO_SIZE_UNIT	256	/* one unit corresponds to 256 bytes */
+-#define MBSS16_TEMPLMEM_MINBLKS	65	/* one unit corresponds to 256 bytes */
+-
+-/* phy versions, PhyVersion:Revision field */
+-#define	PV_AV_MASK		0xf000	/* analog block version */
+-#define	PV_AV_SHIFT		12	/* analog block version bitfield offset */
+-#define	PV_PT_MASK		0x0f00	/* phy type */
+-#define	PV_PT_SHIFT		8	/* phy type bitfield offset */
+-#define	PV_PV_MASK		0x000f	/* phy version */
+-#define	PHY_TYPE(v)		((v & PV_PT_MASK) >> PV_PT_SHIFT)
+-
+-/* phy types, PhyVersion:PhyType field */
+-#define	PHY_TYPE_N		4	/* N-Phy value */
+-#define	PHY_TYPE_SSN		6	/* SSLPN-Phy value */
+-#define	PHY_TYPE_LCN		8	/* LCN-Phy value */
+-#define	PHY_TYPE_LCNXN		9	/* LCNXN-Phy value */
+-#define	PHY_TYPE_NULL		0xf	/* Invalid Phy value */
+-
+-/* analog types, PhyVersion:AnalogType field */
+-#define	ANA_11N_013		5
+-
+-/* 802.11a PLCP header def */
+-typedef struct ofdm_phy_hdr ofdm_phy_hdr_t;
+-struct ofdm_phy_hdr {
+-	u8 rlpt[3];		/* rate, length, parity, tail */
+-	u16 service;
+-	u8 pad;
+-} __attribute__((packed));
+-
+-#define	D11A_PHY_HDR_GRATE(phdr)	((phdr)->rlpt[0] & 0x0f)
+-#define	D11A_PHY_HDR_GRES(phdr)		(((phdr)->rlpt[0] >> 4) & 0x01)
+-#define	D11A_PHY_HDR_GLENGTH(phdr)	(((u32 *)((phdr)->rlpt) >> 5) & 0x0fff)
+-#define	D11A_PHY_HDR_GPARITY(phdr)	(((phdr)->rlpt[3] >> 1) & 0x01)
+-#define	D11A_PHY_HDR_GTAIL(phdr)	(((phdr)->rlpt[3] >> 2) & 0x3f)
+-
+-/* rate encoded per 802.11a-1999 sec 17.3.4.1 */
+-#define	D11A_PHY_HDR_SRATE(phdr, rate)		\
+-	((phdr)->rlpt[0] = ((phdr)->rlpt[0] & 0xf0) | ((rate) & 0xf))
+-/* set reserved field to zero */
+-#define	D11A_PHY_HDR_SRES(phdr)		((phdr)->rlpt[0] &= 0xef)
+-/* length is number of octets in PSDU */
+-#define	D11A_PHY_HDR_SLENGTH(phdr, length)	\
+-	(*(u32 *)((phdr)->rlpt) = *(u32 *)((phdr)->rlpt) | \
+-	(((length) & 0x0fff) << 5))
+-/* set the tail to all zeros */
+-#define	D11A_PHY_HDR_STAIL(phdr)	((phdr)->rlpt[3] &= 0x03)
+-
+-#define	D11A_PHY_HDR_LEN_L	3	/* low-rate part of PLCP header */
+-#define	D11A_PHY_HDR_LEN_R	2	/* high-rate part of PLCP header */
+-
+-#define	D11A_PHY_TX_DELAY	(2)	/* 2.1 usec */
+-
+-#define	D11A_PHY_HDR_TIME	(4)	/* low-rate part of PLCP header */
+-#define	D11A_PHY_PRE_TIME	(16)
+-#define	D11A_PHY_PREHDR_TIME	(D11A_PHY_PRE_TIME + D11A_PHY_HDR_TIME)
+-
+-/* 802.11b PLCP header def */
+-typedef struct cck_phy_hdr cck_phy_hdr_t;
+-struct cck_phy_hdr {
+-	u8 signal;
+-	u8 service;
+-	u16 length;
+-	u16 crc;
+-} __attribute__((packed));
+-
+-#define	D11B_PHY_HDR_LEN	6
+-
+-#define	D11B_PHY_TX_DELAY	(3)	/* 3.4 usec */
+-
+-#define	D11B_PHY_LHDR_TIME	(D11B_PHY_HDR_LEN << 3)
+-#define	D11B_PHY_LPRE_TIME	(144)
+-#define	D11B_PHY_LPREHDR_TIME	(D11B_PHY_LPRE_TIME + D11B_PHY_LHDR_TIME)
+-
+-#define	D11B_PHY_SHDR_TIME	(D11B_PHY_LHDR_TIME >> 1)
+-#define	D11B_PHY_SPRE_TIME	(D11B_PHY_LPRE_TIME >> 1)
+-#define	D11B_PHY_SPREHDR_TIME	(D11B_PHY_SPRE_TIME + D11B_PHY_SHDR_TIME)
+-
+-#define	D11B_PLCP_SIGNAL_LOCKED	(1 << 2)
+-#define	D11B_PLCP_SIGNAL_LE	(1 << 7)
+-
+-#define MIMO_PLCP_MCS_MASK	0x7f	/* mcs index */
+-#define MIMO_PLCP_40MHZ		0x80	/* 40 Hz frame */
+-#define MIMO_PLCP_AMPDU		0x08	/* ampdu */
+-
+-#define WLC_GET_CCK_PLCP_LEN(plcp) (plcp[4] + (plcp[5] << 8))
+-#define WLC_GET_MIMO_PLCP_LEN(plcp) (plcp[1] + (plcp[2] << 8))
+-#define WLC_SET_MIMO_PLCP_LEN(plcp, len) \
+-	do { \
+-		plcp[1] = len & 0xff; \
+-		plcp[2] = ((len >> 8) & 0xff); \
+-	} while (0);
+-
+-#define WLC_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU)
+-#define WLC_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &= ~MIMO_PLCP_AMPDU)
+-#define WLC_IS_MIMO_PLCP_AMPDU(plcp) (plcp[3] & MIMO_PLCP_AMPDU)
+-
+-/* The dot11a PLCP header is 5 bytes.  To simplify the software (so that we
+- * don't need e.g. different tx DMA headers for 11a and 11b), the PLCP header has
+- * padding added in the ucode.
+- */
+-#define	D11_PHY_HDR_LEN	6
+-
+-/* TX DMA buffer header */
+-typedef struct d11txh d11txh_t;
+-struct d11txh {
+-	u16 MacTxControlLow;	/* 0x0 */
+-	u16 MacTxControlHigh;	/* 0x1 */
+-	u16 MacFrameControl;	/* 0x2 */
+-	u16 TxFesTimeNormal;	/* 0x3 */
+-	u16 PhyTxControlWord;	/* 0x4 */
+-	u16 PhyTxControlWord_1;	/* 0x5 */
+-	u16 PhyTxControlWord_1_Fbr;	/* 0x6 */
+-	u16 PhyTxControlWord_1_Rts;	/* 0x7 */
+-	u16 PhyTxControlWord_1_FbrRts;	/* 0x8 */
+-	u16 MainRates;	/* 0x9 */
+-	u16 XtraFrameTypes;	/* 0xa */
+-	u8 IV[16];		/* 0x0b - 0x12 */
+-	u8 TxFrameRA[6];	/* 0x13 - 0x15 */
+-	u16 TxFesTimeFallback;	/* 0x16 */
+-	u8 RTSPLCPFallback[6];	/* 0x17 - 0x19 */
+-	u16 RTSDurFallback;	/* 0x1a */
+-	u8 FragPLCPFallback[6];	/* 0x1b - 1d */
+-	u16 FragDurFallback;	/* 0x1e */
+-	u16 MModeLen;	/* 0x1f */
+-	u16 MModeFbrLen;	/* 0x20 */
+-	u16 TstampLow;	/* 0x21 */
+-	u16 TstampHigh;	/* 0x22 */
+-	u16 ABI_MimoAntSel;	/* 0x23 */
+-	u16 PreloadSize;	/* 0x24 */
+-	u16 AmpduSeqCtl;	/* 0x25 */
+-	u16 TxFrameID;	/* 0x26 */
+-	u16 TxStatus;	/* 0x27 */
+-	u16 MaxNMpdus;	/* 0x28 */
+-	u16 MaxABytes_MRT;	/* 0x29 */
+-	u16 MaxABytes_FBR;	/* 0x2a */
+-	u16 MinMBytes;	/* 0x2b */
+-	u8 RTSPhyHeader[D11_PHY_HDR_LEN];	/* 0x2c - 0x2e */
+-	struct ieee80211_rts rts_frame;	/* 0x2f - 0x36 */
+-	u16 PAD;		/* 0x37 */
+-} __attribute__((packed));
+-
+-#define	D11_TXH_LEN		112	/* bytes */
+-
+-/* Frame Types */
+-#define FT_CCK	0
+-#define FT_OFDM	1
+-#define FT_HT	2
+-#define FT_N	3
+-
+-/* Position of MPDU inside A-MPDU; indicated with bits 10:9 of MacTxControlLow */
+-#define TXC_AMPDU_SHIFT		9	/* shift for ampdu settings */
+-#define TXC_AMPDU_NONE		0	/* Regular MPDU, not an A-MPDU */
+-#define TXC_AMPDU_FIRST		1	/* first MPDU of an A-MPDU */
+-#define TXC_AMPDU_MIDDLE	2	/* intermediate MPDU of an A-MPDU */
+-#define TXC_AMPDU_LAST		3	/* last (or single) MPDU of an A-MPDU */
+-
+-/* MacTxControlLow */
+-#define TXC_AMIC		0x8000
+-#define	TXC_SENDCTS		0x0800
+-#define TXC_AMPDU_MASK		0x0600
+-#define TXC_BW_40		0x0100
+-#define TXC_FREQBAND_5G		0x0080
+-#define	TXC_DFCS		0x0040
+-#define	TXC_IGNOREPMQ		0x0020
+-#define	TXC_HWSEQ		0x0010
+-#define	TXC_STARTMSDU		0x0008
+-#define	TXC_SENDRTS		0x0004
+-#define	TXC_LONGFRAME		0x0002
+-#define	TXC_IMMEDACK		0x0001
+-
+-/* MacTxControlHigh */
+-#define TXC_PREAMBLE_RTS_FB_SHORT	0x8000	/* RTS fallback preamble type 1 = SHORT 0 = LONG */
+-#define TXC_PREAMBLE_RTS_MAIN_SHORT	0x4000	/* RTS main rate preamble type 1 = SHORT 0 = LONG */
+-#define TXC_PREAMBLE_DATA_FB_SHORT	0x2000	/* Main fallback rate preamble type
+-						 * 1 = SHORT for OFDM/GF for MIMO
+-						 * 0 = LONG for CCK/MM for MIMO
+-						 */
+-/* TXC_PREAMBLE_DATA_MAIN is in PhyTxControl bit 5 */
+-#define	TXC_AMPDU_FBR		0x1000	/* use fallback rate for this AMPDU */
+-#define	TXC_SECKEY_MASK		0x0FF0
+-#define	TXC_SECKEY_SHIFT	4
+-#define	TXC_ALT_TXPWR		0x0008	/* Use alternate txpwr defined at loc. M_ALT_TXPWR_IDX */
+-#define	TXC_SECTYPE_MASK	0x0007
+-#define	TXC_SECTYPE_SHIFT	0
+-
+-/* Null delimiter for Fallback rate */
+-#define AMPDU_FBR_NULL_DELIM  5	/* Location of Null delimiter count for AMPDU */
+-
+-/* PhyTxControl for Mimophy */
+-#define	PHY_TXC_PWR_MASK	0xFC00
+-#define	PHY_TXC_PWR_SHIFT	10
+-#define	PHY_TXC_ANT_MASK	0x03C0	/* bit 6, 7, 8, 9 */
+-#define	PHY_TXC_ANT_SHIFT	6
+-#define	PHY_TXC_ANT_0_1		0x00C0	/* auto, last rx */
+-#define	PHY_TXC_LCNPHY_ANT_LAST	0x0000
+-#define	PHY_TXC_ANT_3		0x0200	/* virtual antenna 3 */
+-#define	PHY_TXC_ANT_2		0x0100	/* virtual antenna 2 */
+-#define	PHY_TXC_ANT_1		0x0080	/* virtual antenna 1 */
+-#define	PHY_TXC_ANT_0		0x0040	/* virtual antenna 0 */
+-#define	PHY_TXC_SHORT_HDR	0x0010
+-
+-#define	PHY_TXC_OLD_ANT_0	0x0000
+-#define	PHY_TXC_OLD_ANT_1	0x0100
+-#define	PHY_TXC_OLD_ANT_LAST	0x0300
+-
+-/* PhyTxControl_1 for Mimophy */
+-#define PHY_TXC1_BW_MASK		0x0007
+-#define PHY_TXC1_BW_10MHZ		0
+-#define PHY_TXC1_BW_10MHZ_UP		1
+-#define PHY_TXC1_BW_20MHZ		2
+-#define PHY_TXC1_BW_20MHZ_UP		3
+-#define PHY_TXC1_BW_40MHZ		4
+-#define PHY_TXC1_BW_40MHZ_DUP		5
+-#define PHY_TXC1_MODE_SHIFT		3
+-#define PHY_TXC1_MODE_MASK		0x0038
+-#define PHY_TXC1_MODE_SISO		0
+-#define PHY_TXC1_MODE_CDD		1
+-#define PHY_TXC1_MODE_STBC		2
+-#define PHY_TXC1_MODE_SDM		3
+-
+-/* PhyTxControl for HTphy that are different from Mimophy */
+-#define	PHY_TXC_HTANT_MASK		0x3fC0	/* bit 6, 7, 8, 9, 10, 11, 12, 13 */
+-
+-/* XtraFrameTypes */
+-#define XFTS_RTS_FT_SHIFT	2
+-#define XFTS_FBRRTS_FT_SHIFT	4
+-#define XFTS_CHANNEL_SHIFT	8
+-
+-/* Antenna diversity bit in ant_wr_settle */
+-#define	PHY_AWS_ANTDIV		0x2000
+-
+-/* IFS ctl */
+-#define IFS_USEEDCF	(1 << 2)
+-
+-/* IFS ctl1 */
+-#define IFS_CTL1_EDCRS	(1 << 3)
+-#define IFS_CTL1_EDCRS_20L (1 << 4)
+-#define IFS_CTL1_EDCRS_40 (1 << 5)
+-
+-/* ABI_MimoAntSel */
+-#define ABI_MAS_ADDR_BMP_IDX_MASK	0x0f00
+-#define ABI_MAS_ADDR_BMP_IDX_SHIFT	8
+-#define ABI_MAS_FBR_ANT_PTN_MASK	0x00f0
+-#define ABI_MAS_FBR_ANT_PTN_SHIFT	4
+-#define ABI_MAS_MRT_ANT_PTN_MASK	0x000f
+-
+-/* tx status packet */
+-typedef struct tx_status tx_status_t;
+-struct tx_status {
+-	u16 framelen;
+-	u16 PAD;
+-	u16 frameid;
+-	u16 status;
+-	u16 lasttxtime;
+-	u16 sequence;
+-	u16 phyerr;
+-	u16 ackphyrxsh;
+-} __attribute__((packed));
+-
+-#define	TXSTATUS_LEN	16
+-
+-/* status field bit definitions */
+-#define	TX_STATUS_FRM_RTX_MASK	0xF000
+-#define	TX_STATUS_FRM_RTX_SHIFT	12
+-#define	TX_STATUS_RTS_RTX_MASK	0x0F00
+-#define	TX_STATUS_RTS_RTX_SHIFT	8
+-#define TX_STATUS_MASK		0x00FE
+-#define	TX_STATUS_PMINDCTD	(1 << 7)	/* PM mode indicated to AP */
+-#define	TX_STATUS_INTERMEDIATE	(1 << 6)	/* intermediate or 1st ampdu pkg */
+-#define	TX_STATUS_AMPDU		(1 << 5)	/* AMPDU status */
+-#define TX_STATUS_SUPR_MASK	0x1C	/* suppress status bits (4:2) */
+-#define TX_STATUS_SUPR_SHIFT	2
+-#define	TX_STATUS_ACK_RCV	(1 << 1)	/* ACK received */
+-#define	TX_STATUS_VALID		(1 << 0)	/* Tx status valid */
+-#define	TX_STATUS_NO_ACK	0
+-
+-/* suppress status reason codes */
+-#define	TX_STATUS_SUPR_PMQ	(1 << 2)	/* PMQ entry */
+-#define	TX_STATUS_SUPR_FLUSH	(2 << 2)	/* flush request */
+-#define	TX_STATUS_SUPR_FRAG	(3 << 2)	/* previous frag failure */
+-#define	TX_STATUS_SUPR_TBTT	(3 << 2)	/* SHARED: Probe response supr for TBTT */
+-#define	TX_STATUS_SUPR_BADCH	(4 << 2)	/* channel mismatch */
+-#define	TX_STATUS_SUPR_EXPTIME	(5 << 2)	/* lifetime expiry */
+-#define	TX_STATUS_SUPR_UF	(6 << 2)	/* underflow */
+-
+-/* Unexpected tx status for rate update */
+-#define TX_STATUS_UNEXP(status) \
+-	((((status) & TX_STATUS_INTERMEDIATE) != 0) && \
+-	 TX_STATUS_UNEXP_AMPDU(status))
+-
+-/* Unexpected tx status for A-MPDU rate update */
+-#define TX_STATUS_UNEXP_AMPDU(status) \
+-	((((status) & TX_STATUS_SUPR_MASK) != 0) && \
+-	 (((status) & TX_STATUS_SUPR_MASK) != TX_STATUS_SUPR_EXPTIME))
+-
+-#define TX_STATUS_BA_BMAP03_MASK	0xF000	/* ba bitmap 0:3 in 1st pkg */
+-#define TX_STATUS_BA_BMAP03_SHIFT	12	/* ba bitmap 0:3 in 1st pkg */
+-#define TX_STATUS_BA_BMAP47_MASK	0x001E	/* ba bitmap 4:7 in 2nd pkg */
+-#define TX_STATUS_BA_BMAP47_SHIFT	3	/* ba bitmap 4:7 in 2nd pkg */
+-
+-/* RXE (Receive Engine) */
+-
+-/* RCM_CTL */
+-#define	RCM_INC_MASK_H		0x0080
+-#define	RCM_INC_MASK_L		0x0040
+-#define	RCM_INC_DATA		0x0020
+-#define	RCM_INDEX_MASK		0x001F
+-#define	RCM_SIZE		15
+-
+-#define	RCM_MAC_OFFSET		0	/* current MAC address */
+-#define	RCM_BSSID_OFFSET	3	/* current BSSID address */
+-#define	RCM_F_BSSID_0_OFFSET	6	/* foreign BSS CFP tracking */
+-#define	RCM_F_BSSID_1_OFFSET	9	/* foreign BSS CFP tracking */
+-#define	RCM_F_BSSID_2_OFFSET	12	/* foreign BSS CFP tracking */
+-
+-#define RCM_WEP_TA0_OFFSET	16
+-#define RCM_WEP_TA1_OFFSET	19
+-#define RCM_WEP_TA2_OFFSET	22
+-#define RCM_WEP_TA3_OFFSET	25
+-
+-/* PSM Block */
+-
+-/* psm_phy_hdr_param bits */
+-#define MAC_PHY_RESET		1
+-#define MAC_PHY_CLOCK_EN	2
+-#define MAC_PHY_FORCE_CLK	4
+-
+-/* WEP Block */
+-
+-/* WEP_WKEY */
+-#define	WKEY_START		(1 << 8)
+-#define	WKEY_SEL_MASK		0x1F
+-
+-/* WEP data formats */
+-
+-/* the number of RCMTA entries */
+-#define RCMTA_SIZE 50
+-
+-#define M_ADDR_BMP_BLK		(0x37e * 2)
+-#define M_ADDR_BMP_BLK_SZ	12
+-
+-#define ADDR_BMP_RA		(1 << 0)	/* Receiver Address (RA) */
+-#define ADDR_BMP_TA		(1 << 1)	/* Transmitter Address (TA) */
+-#define ADDR_BMP_BSSID		(1 << 2)	/* BSSID */
+-#define ADDR_BMP_AP		(1 << 3)	/* Infra-BSS Access Point (AP) */
+-#define ADDR_BMP_STA		(1 << 4)	/* Infra-BSS Station (STA) */
+-#define ADDR_BMP_RESERVED1	(1 << 5)
+-#define ADDR_BMP_RESERVED2	(1 << 6)
+-#define ADDR_BMP_RESERVED3	(1 << 7)
+-#define ADDR_BMP_BSS_IDX_MASK	(3 << 8)	/* BSS control block index */
+-#define ADDR_BMP_BSS_IDX_SHIFT	8
+-
+-#define	WSEC_MAX_RCMTA_KEYS	54
+-
+-/* max keys in M_TKMICKEYS_BLK */
+-#define	WSEC_MAX_TKMIC_ENGINE_KEYS		12	/* 8 + 4 default */
+-
+-/* max RXE match registers */
+-#define WSEC_MAX_RXE_KEYS	4
+-
+-/* SECKINDXALGO (Security Key Index & Algorithm Block) word format */
+-/* SKL (Security Key Lookup) */
+-#define	SKL_ALGO_MASK		0x0007
+-#define	SKL_ALGO_SHIFT		0
+-#define	SKL_KEYID_MASK		0x0008
+-#define	SKL_KEYID_SHIFT		3
+-#define	SKL_INDEX_MASK		0x03F0
+-#define	SKL_INDEX_SHIFT		4
+-#define	SKL_GRP_ALGO_MASK	0x1c00
+-#define	SKL_GRP_ALGO_SHIFT	10
+-
+-/* additional bits defined for IBSS group key support */
+-#define	SKL_IBSS_INDEX_MASK	0x01F0
+-#define	SKL_IBSS_INDEX_SHIFT	4
+-#define	SKL_IBSS_KEYID1_MASK	0x0600
+-#define	SKL_IBSS_KEYID1_SHIFT	9
+-#define	SKL_IBSS_KEYID2_MASK	0x1800
+-#define	SKL_IBSS_KEYID2_SHIFT	11
+-#define	SKL_IBSS_KEYALGO_MASK	0xE000
+-#define	SKL_IBSS_KEYALGO_SHIFT	13
+-
+-#define	WSEC_MODE_OFF		0
+-#define	WSEC_MODE_HW		1
+-#define	WSEC_MODE_SW		2
+-
+-#define	WSEC_ALGO_OFF		0
+-#define	WSEC_ALGO_WEP1		1
+-#define	WSEC_ALGO_TKIP		2
+-#define	WSEC_ALGO_AES		3
+-#define	WSEC_ALGO_WEP128	4
+-#define	WSEC_ALGO_AES_LEGACY	5
+-#define	WSEC_ALGO_NALG		6
+-
+-#define	AES_MODE_NONE		0
+-#define	AES_MODE_CCM		1
+-
+-/* WEP_CTL (Rev 0) */
+-#define	WECR0_KEYREG_SHIFT	0
+-#define	WECR0_KEYREG_MASK	0x7
+-#define	WECR0_DECRYPT		(1 << 3)
+-#define	WECR0_IVINLINE		(1 << 4)
+-#define	WECR0_WEPALG_SHIFT	5
+-#define	WECR0_WEPALG_MASK	(0x7 << 5)
+-#define	WECR0_WKEYSEL_SHIFT	8
+-#define	WECR0_WKEYSEL_MASK	(0x7 << 8)
+-#define	WECR0_WKEYSTART		(1 << 11)
+-#define	WECR0_WEPINIT		(1 << 14)
+-#define	WECR0_ICVERR		(1 << 15)
+-
+-/* Frame template map byte offsets */
+-#define	T_ACTS_TPL_BASE		(0)
+-#define	T_NULL_TPL_BASE		(0xc * 2)
+-#define	T_QNULL_TPL_BASE	(0x1c * 2)
+-#define	T_RR_TPL_BASE		(0x2c * 2)
+-#define	T_BCN0_TPL_BASE		(0x34 * 2)
+-#define	T_PRS_TPL_BASE		(0x134 * 2)
+-#define	T_BCN1_TPL_BASE		(0x234 * 2)
+-#define T_TX_FIFO_TXRAM_BASE	(T_ACTS_TPL_BASE + (TXFIFO_START_BLK * TXFIFO_SIZE_UNIT))
+-
+-#define T_BA_TPL_BASE		T_QNULL_TPL_BASE	/* template area for BA */
+-
+-#define T_RAM_ACCESS_SZ		4	/* template ram is 4 byte access only */
+-
+-/* Shared Mem byte offsets */
+-
+-/* Location where the ucode expects the corerev */
+-#define	M_MACHW_VER		(0x00b * 2)
+-
+-/* Location where the ucode expects the MAC capabilities */
+-#define	M_MACHW_CAP_L		(0x060 * 2)
+-#define	M_MACHW_CAP_H	(0x061 * 2)
+-
+-/* WME shared memory */
+-#define M_EDCF_STATUS_OFF	(0x007 * 2)
+-#define M_TXF_CUR_INDEX		(0x018 * 2)
+-#define M_EDCF_QINFO		(0x120 * 2)
+-
+-/* PS-mode related parameters */
+-#define	M_DOT11_SLOT		(0x008 * 2)
+-#define	M_DOT11_DTIMPERIOD	(0x009 * 2)
+-#define	M_NOSLPZNATDTIM		(0x026 * 2)
+-
+-/* Beacon-related parameters */
+-#define	M_BCN0_FRM_BYTESZ	(0x00c * 2)	/* Bcn 0 template length */
+-#define	M_BCN1_FRM_BYTESZ	(0x00d * 2)	/* Bcn 1 template length */
+-#define	M_BCN_TXTSF_OFFSET	(0x00e * 2)
+-#define	M_TIMBPOS_INBEACON	(0x00f * 2)
+-#define	M_SFRMTXCNTFBRTHSD	(0x022 * 2)
+-#define	M_LFRMTXCNTFBRTHSD	(0x023 * 2)
+-#define	M_BCN_PCTLWD		(0x02a * 2)
+-#define M_BCN_LI		(0x05b * 2)	/* beacon listen interval */
+-
+-/* MAX Rx Frame len */
+-#define M_MAXRXFRM_LEN		(0x010 * 2)
+-
+-/* ACK/CTS related params */
+-#define	M_RSP_PCTLWD		(0x011 * 2)
+-
+-/* Hardware Power Control */
+-#define M_TXPWR_N		(0x012 * 2)
+-#define M_TXPWR_TARGET		(0x013 * 2)
+-#define M_TXPWR_MAX		(0x014 * 2)
+-#define M_TXPWR_CUR		(0x019 * 2)
+-
+-/* Rx-related parameters */
+-#define	M_RX_PAD_DATA_OFFSET	(0x01a * 2)
+-
+-/* WEP Shared mem data */
+-#define	M_SEC_DEFIVLOC		(0x01e * 2)
+-#define	M_SEC_VALNUMSOFTMCHTA	(0x01f * 2)
+-#define	M_PHYVER		(0x028 * 2)
+-#define	M_PHYTYPE		(0x029 * 2)
+-#define	M_SECRXKEYS_PTR		(0x02b * 2)
+-#define	M_TKMICKEYS_PTR		(0x059 * 2)
+-#define	M_SECKINDXALGO_BLK	(0x2ea * 2)
+-#define M_SECKINDXALGO_BLK_SZ	54
+-#define	M_SECPSMRXTAMCH_BLK	(0x2fa * 2)
+-#define	M_TKIP_TSC_TTAK		(0x18c * 2)
+-#define	D11_MAX_KEY_SIZE	16
+-
+-#define	M_MAX_ANTCNT		(0x02e * 2)	/* antenna swap threshold */
+-
+-/* Probe response related parameters */
+-#define	M_SSIDLEN		(0x024 * 2)
+-#define	M_PRB_RESP_FRM_LEN	(0x025 * 2)
+-#define	M_PRS_MAXTIME		(0x03a * 2)
+-#define	M_SSID			(0xb0 * 2)
+-#define	M_CTXPRS_BLK		(0xc0 * 2)
+-#define	C_CTX_PCTLWD_POS	(0x4 * 2)
+-
+-/* Delta between OFDM and CCK power in CCK power boost mode */
+-#define M_OFDM_OFFSET		(0x027 * 2)
+-
+-/* TSSI for last 4 11b/g CCK packets transmitted */
+-#define	M_B_TSSI_0		(0x02c * 2)
+-#define	M_B_TSSI_1		(0x02d * 2)
+-
+-/* Host flags to turn on ucode options */
+-#define	M_HOST_FLAGS1		(0x02f * 2)
+-#define	M_HOST_FLAGS2		(0x030 * 2)
+-#define	M_HOST_FLAGS3		(0x031 * 2)
+-#define	M_HOST_FLAGS4		(0x03c * 2)
+-#define	M_HOST_FLAGS5		(0x06a * 2)
+-#define	M_HOST_FLAGS_SZ		16
+-
+-#define M_RADAR_REG		(0x033 * 2)
+-
+-/* TSSI for last 4 11a OFDM packets transmitted */
+-#define	M_A_TSSI_0		(0x034 * 2)
+-#define	M_A_TSSI_1		(0x035 * 2)
+-
+-/* noise interference measurement */
+-#define M_NOISE_IF_COUNT	(0x034 * 2)
+-#define M_NOISE_IF_TIMEOUT	(0x035 * 2)
+-
+-#define	M_RF_RX_SP_REG1		(0x036 * 2)
+-
+-/* TSSI for last 4 11g OFDM packets transmitted */
+-#define	M_G_TSSI_0		(0x038 * 2)
+-#define	M_G_TSSI_1		(0x039 * 2)
+-
+-/* Background noise measure */
+-#define	M_JSSI_0		(0x44 * 2)
+-#define	M_JSSI_1		(0x45 * 2)
+-#define	M_JSSI_AUX		(0x46 * 2)
+-
+-#define	M_CUR_2050_RADIOCODE	(0x47 * 2)
+-
+-/* TX fifo sizes */
+-#define M_FIFOSIZE0		(0x4c * 2)
+-#define M_FIFOSIZE1		(0x4d * 2)
+-#define M_FIFOSIZE2		(0x4e * 2)
+-#define M_FIFOSIZE3		(0x4f * 2)
+-#define D11_MAX_TX_FRMS		32	/* max frames allowed in tx fifo */
+-
+-/* Current channel number plus upper bits */
+-#define M_CURCHANNEL		(0x50 * 2)
+-#define D11_CURCHANNEL_5G	0x0100;
+-#define D11_CURCHANNEL_40	0x0200;
+-#define D11_CURCHANNEL_MAX	0x00FF;
+-
+-/* last posted frameid on the bcmc fifo */
+-#define M_BCMC_FID		(0x54 * 2)
+-#define INVALIDFID		0xffff
+-
+-/* extended beacon phyctl bytes for 11N */
+-#define	M_BCN_PCTL1WD		(0x058 * 2)
+-
+-/* idle busy ratio to duty_cycle requirement  */
+-#define M_TX_IDLE_BUSY_RATIO_X_16_CCK  (0x52 * 2)
+-#define M_TX_IDLE_BUSY_RATIO_X_16_OFDM (0x5A * 2)
+-
+-/* CW RSSI for LCNPHY */
+-#define M_LCN_RSSI_0 		0x1332
+-#define M_LCN_RSSI_1 		0x1338
+-#define M_LCN_RSSI_2 		0x133e
+-#define M_LCN_RSSI_3 		0x1344
+-
+-/* SNR for LCNPHY */
+-#define M_LCN_SNR_A_0 	0x1334
+-#define M_LCN_SNR_B_0 	0x1336
+-
+-#define M_LCN_SNR_A_1 	0x133a
+-#define M_LCN_SNR_B_1 	0x133c
+-
+-#define M_LCN_SNR_A_2 	0x1340
+-#define M_LCN_SNR_B_2 	0x1342
+-
+-#define M_LCN_SNR_A_3 	0x1346
+-#define M_LCN_SNR_B_3 	0x1348
+-
+-#define M_LCN_LAST_RESET 	(81*2)
+-#define M_LCN_LAST_LOC	(63*2)
+-#define M_LCNPHY_RESET_STATUS (4902)
+-#define M_LCNPHY_DSC_TIME	(0x98d*2)
+-#define M_LCNPHY_RESET_CNT_DSC (0x98b*2)
+-#define M_LCNPHY_RESET_CNT	(0x98c*2)
+-
+-/* Rate table offsets */
+-#define	M_RT_DIRMAP_A		(0xe0 * 2)
+-#define	M_RT_BBRSMAP_A		(0xf0 * 2)
+-#define	M_RT_DIRMAP_B		(0x100 * 2)
+-#define	M_RT_BBRSMAP_B		(0x110 * 2)
+-
+-/* Rate table entry offsets */
+-#define	M_RT_PRS_PLCP_POS	10
+-#define	M_RT_PRS_DUR_POS	16
+-#define	M_RT_OFDM_PCTL1_POS	18
+-
+-#define M_20IN40_IQ			(0x380 * 2)
+-
+-/* SHM locations where ucode stores the current power index */
+-#define M_CURR_IDX1		(0x384 * 2)
+-#define M_CURR_IDX2		(0x387 * 2)
+-
+-#define M_BSCALE_ANT0	(0x5e * 2)
+-#define M_BSCALE_ANT1	(0x5f * 2)
+-
+-/* Antenna Diversity Testing */
+-#define M_MIMO_ANTSEL_RXDFLT	(0x63 * 2)
+-#define M_ANTSEL_CLKDIV	(0x61 * 2)
+-#define M_MIMO_ANTSEL_TXDFLT	(0x64 * 2)
+-
+-#define M_MIMO_MAXSYM	(0x5d * 2)
+-#define MIMO_MAXSYM_DEF		0x8000	/* 32k */
+-#define MIMO_MAXSYM_MAX		0xffff	/* 64k */
+-
+-#define M_WATCHDOG_8TU		(0x1e * 2)
+-#define WATCHDOG_8TU_DEF	5
+-#define WATCHDOG_8TU_MAX	10
+-
+-/* Manufacturing Test Variables */
+-#define M_PKTENG_CTRL		(0x6c * 2)	/* PER test mode */
+-#define M_PKTENG_IFS		(0x6d * 2)	/* IFS for TX mode */
+-#define M_PKTENG_FRMCNT_LO		(0x6e * 2)	/* Lower word of tx frmcnt/rx lostcnt */
+-#define M_PKTENG_FRMCNT_HI		(0x6f * 2)	/* Upper word of tx frmcnt/rx lostcnt */
+-
+-/* Index variation in vbat ripple */
+-#define M_LCN_PWR_IDX_MAX	(0x67 * 2)	/* highest index read by ucode */
+-#define M_LCN_PWR_IDX_MIN	(0x66 * 2)	/* lowest index read by ucode */
+-
+-/* M_PKTENG_CTRL bit definitions */
+-#define M_PKTENG_MODE_TX		0x0001
+-#define M_PKTENG_MODE_TX_RIFS	        0x0004
+-#define M_PKTENG_MODE_TX_CTS            0x0008
+-#define M_PKTENG_MODE_RX		0x0002
+-#define M_PKTENG_MODE_RX_WITH_ACK	0x0402
+-#define M_PKTENG_MODE_MASK		0x0003
+-#define M_PKTENG_FRMCNT_VLD		0x0100	/* TX frames indicated in the frmcnt reg */
+-
+-/* Sample Collect parameters (bitmap and type) */
+-#define M_SMPL_COL_BMP		(0x37d * 2)	/* Trigger bitmap for sample collect */
+-#define M_SMPL_COL_CTL		(0x3b2 * 2)	/* Sample collect type */
+-
+-#define ANTSEL_CLKDIV_4MHZ	6
+-#define MIMO_ANTSEL_BUSY	0x4000	/* bit 14 (busy) */
+-#define MIMO_ANTSEL_SEL		0x8000	/* bit 15 write the value */
+-#define MIMO_ANTSEL_WAIT	50	/* 50us wait */
+-#define MIMO_ANTSEL_OVERRIDE	0x8000	/* flag */
+-
+-typedef struct shm_acparams shm_acparams_t;
+-struct shm_acparams {
+-	u16 txop;
+-	u16 cwmin;
+-	u16 cwmax;
+-	u16 cwcur;
+-	u16 aifs;
+-	u16 bslots;
+-	u16 reggap;
+-	u16 status;
+-	u16 rsvd[8];
+-} __attribute__((packed));
+-#define M_EDCF_QLEN	(16 * 2)
+-
+-#define WME_STATUS_NEWAC	(1 << 8)
+-
+-/* M_HOST_FLAGS */
+-#define MHFMAX		5	/* Number of valid hostflag half-word (u16) */
+-#define MHF1		0	/* Hostflag 1 index */
+-#define MHF2		1	/* Hostflag 2 index */
+-#define MHF3		2	/* Hostflag 3 index */
+-#define MHF4		3	/* Hostflag 4 index */
+-#define MHF5		4	/* Hostflag 5 index */
+-
+-/* Flags in M_HOST_FLAGS */
+-#define	MHF1_ANTDIV		0x0001	/* Enable ucode antenna diversity help */
+-#define	MHF1_EDCF		0x0100	/* Enable EDCF access control */
+-#define MHF1_IQSWAP_WAR		0x0200
+-#define	MHF1_FORCEFASTCLK	0x0400	/* Disable Slow clock request, for corerev < 11 */
+-
+-/* Flags in M_HOST_FLAGS2 */
+-#define MHF2_PCISLOWCLKWAR	0x0008	/* PR16165WAR : Enable ucode PCI slow clock WAR */
+-#define MHF2_TXBCMC_NOW		0x0040	/* Flush BCMC FIFO immediately */
+-#define MHF2_HWPWRCTL		0x0080	/* Enable ucode/hw power control */
+-#define MHF2_NPHY40MHZ_WAR	0x0800
+-
+-/* Flags in M_HOST_FLAGS3 */
+-#define MHF3_ANTSEL_EN		0x0001	/* enabled mimo antenna selection */
+-#define MHF3_ANTSEL_MODE	0x0002	/* antenna selection mode: 0: 2x3, 1: 2x4 */
+-#define MHF3_RESERVED1		0x0004
+-#define MHF3_RESERVED2		0x0008
+-#define MHF3_NPHY_MLADV_WAR	0x0010
+-
+-/* Flags in M_HOST_FLAGS4 */
+-#define MHF4_BPHY_TXCORE0	0x0080	/* force bphy Tx on core 0 (board level WAR) */
+-#define MHF4_EXTPA_ENABLE  	0x4000	/* for 4313A0 FEM boards */
+-
+-/* Flags in M_HOST_FLAGS5 */
+-#define MHF5_4313_GPIOCTRL	0x0001
+-#define MHF5_RESERVED1		0x0002
+-#define MHF5_RESERVED2		0x0004
+-/* Radio power setting for ucode */
+-#define	M_RADIO_PWR		(0x32 * 2)
+-
+-/* phy noise recorded by ucode right after tx */
+-#define	M_PHY_NOISE		(0x037 * 2)
+-#define	PHY_NOISE_MASK		0x00ff
+-
+-/* Receive Frame Data Header for 802.11b DCF-only frames */
+-typedef struct d11rxhdr d11rxhdr_t;
+-struct d11rxhdr {
+-	u16 RxFrameSize;	/* Actual byte length of the frame data received */
+-	u16 PAD;
+-	u16 PhyRxStatus_0;	/* PhyRxStatus 15:0 */
+-	u16 PhyRxStatus_1;	/* PhyRxStatus 31:16 */
+-	u16 PhyRxStatus_2;	/* PhyRxStatus 47:32 */
+-	u16 PhyRxStatus_3;	/* PhyRxStatus 63:48 */
+-	u16 PhyRxStatus_4;	/* PhyRxStatus 79:64 */
+-	u16 PhyRxStatus_5;	/* PhyRxStatus 95:80 */
+-	u16 RxStatus1;	/* MAC Rx Status */
+-	u16 RxStatus2;	/* extended MAC Rx status */
+-	u16 RxTSFTime;	/* RxTSFTime time of first MAC symbol + M_PHY_PLCPRX_DLY */
+-	u16 RxChan;		/* gain code, channel radio code, and phy type */
+-} __attribute__((packed));
+-
+-#define	RXHDR_LEN		24	/* sizeof d11rxhdr_t */
+-#define	FRAMELEN(h)		((h)->RxFrameSize)
+-
+-typedef struct wlc_d11rxhdr wlc_d11rxhdr_t;
+-struct wlc_d11rxhdr {
+-	d11rxhdr_t rxhdr;
+-	u32 tsf_l;		/* TSF_L reading */
+-	s8 rssi;		/* computed instanteneous rssi in BMAC */
+-	s8 rxpwr0;		/* obsoleted, place holder for legacy ROM code. use rxpwr[] */
+-	s8 rxpwr1;		/* obsoleted, place holder for legacy ROM code. use rxpwr[] */
+-	s8 do_rssi_ma;	/* do per-pkt sampling for per-antenna ma in HIGH */
+-	s8 rxpwr[WL_RSSI_ANT_MAX];	/* rssi for supported antennas */
+-} __attribute__((packed));
+-
+-/* PhyRxStatus_0: */
+-#define	PRXS0_FT_MASK		0x0003	/* NPHY only: CCK, OFDM, preN, N */
+-#define	PRXS0_CLIP_MASK		0x000C	/* NPHY only: clip count adjustment steps by AGC */
+-#define	PRXS0_CLIP_SHIFT	2
+-#define	PRXS0_UNSRATE		0x0010	/* PHY received a frame with unsupported rate */
+-#define	PRXS0_RXANT_UPSUBBAND	0x0020	/* GPHY: rx ant, NPHY: upper sideband */
+-#define	PRXS0_LCRS		0x0040	/* CCK frame only: lost crs during cck frame reception */
+-#define	PRXS0_SHORTH		0x0080	/* Short Preamble */
+-#define	PRXS0_PLCPFV		0x0100	/* PLCP violation */
+-#define	PRXS0_PLCPHCF		0x0200	/* PLCP header integrity check failed */
+-#define	PRXS0_GAIN_CTL		0x4000	/* legacy PHY gain control */
+-#define PRXS0_ANTSEL_MASK	0xF000	/* NPHY: Antennas used for received frame, bitmask */
+-#define PRXS0_ANTSEL_SHIFT	0x12
+-
+-/* subfield PRXS0_FT_MASK */
+-#define	PRXS0_CCK		0x0000
+-#define	PRXS0_OFDM		0x0001	/* valid only for G phy, use rxh->RxChan for A phy */
+-#define	PRXS0_PREN		0x0002
+-#define	PRXS0_STDN		0x0003
+-
+-/* subfield PRXS0_ANTSEL_MASK */
+-#define PRXS0_ANTSEL_0		0x0	/* antenna 0 is used */
+-#define PRXS0_ANTSEL_1		0x2	/* antenna 1 is used */
+-#define PRXS0_ANTSEL_2		0x4	/* antenna 2 is used */
+-#define PRXS0_ANTSEL_3		0x8	/* antenna 3 is used */
+-
+-/* PhyRxStatus_1: */
+-#define	PRXS1_JSSI_MASK		0x00FF
+-#define	PRXS1_JSSI_SHIFT	0
+-#define	PRXS1_SQ_MASK		0xFF00
+-#define	PRXS1_SQ_SHIFT		8
+-
+-/* nphy PhyRxStatus_1: */
+-#define PRXS1_nphy_PWR0_MASK	0x00FF
+-#define PRXS1_nphy_PWR1_MASK	0xFF00
+-
+-/* HTPHY Rx Status defines */
+-/* htphy PhyRxStatus_0: those bit are overlapped with PhyRxStatus_0 */
+-#define PRXS0_BAND	        0x0400	/* 0 = 2.4G, 1 = 5G */
+-#define PRXS0_RSVD	        0x0800	/* reserved; set to 0 */
+-#define PRXS0_UNUSED	        0xF000	/* unused and not defined; set to 0 */
+-
+-/* htphy PhyRxStatus_1: */
+-#define PRXS1_HTPHY_CORE_MASK	0x000F	/* core enables for {3..0}, 0=disabled, 1=enabled */
+-#define PRXS1_HTPHY_ANTCFG_MASK	0x00F0	/* antenna configation */
+-#define PRXS1_HTPHY_MMPLCPLenL_MASK	0xFF00	/* Mixmode PLCP Length low byte mask */
+-
+-/* htphy PhyRxStatus_2: */
+-#define PRXS2_HTPHY_MMPLCPLenH_MASK	0x000F	/* Mixmode PLCP Length high byte maskw */
+-#define PRXS2_HTPHY_MMPLCH_RATE_MASK	0x00F0	/* Mixmode PLCP rate mask */
+-#define PRXS2_HTPHY_RXPWR_ANT0	0xFF00	/* Rx power on core 0 */
+-
+-/* htphy PhyRxStatus_3: */
+-#define PRXS3_HTPHY_RXPWR_ANT1	0x00FF	/* Rx power on core 1 */
+-#define PRXS3_HTPHY_RXPWR_ANT2	0xFF00	/* Rx power on core 2 */
+-
+-/* htphy PhyRxStatus_4: */
+-#define PRXS4_HTPHY_RXPWR_ANT3	0x00FF	/* Rx power on core 3 */
+-#define PRXS4_HTPHY_CFO		0xFF00	/* Coarse frequency offset */
+-
+-/* htphy PhyRxStatus_5: */
+-#define PRXS5_HTPHY_FFO	        0x00FF	/* Fine frequency offset */
+-#define PRXS5_HTPHY_AR	        0xFF00	/* Advance Retard */
+-
+-#define HTPHY_MMPLCPLen(rxs)	((((rxs)->PhyRxStatus_1 & PRXS1_HTPHY_MMPLCPLenL_MASK) >> 8) | \
+-	(((rxs)->PhyRxStatus_2 & PRXS2_HTPHY_MMPLCPLenH_MASK) << 8))
+-/* Get Rx power on core 0 */
+-#define HTPHY_RXPWR_ANT0(rxs)	((((rxs)->PhyRxStatus_2) & PRXS2_HTPHY_RXPWR_ANT0) >> 8)
+-/* Get Rx power on core 1 */
+-#define HTPHY_RXPWR_ANT1(rxs)	(((rxs)->PhyRxStatus_3) & PRXS3_HTPHY_RXPWR_ANT1)
+-/* Get Rx power on core 2 */
+-#define HTPHY_RXPWR_ANT2(rxs)	((((rxs)->PhyRxStatus_3) & PRXS3_HTPHY_RXPWR_ANT2) >> 8)
+-
+-/* ucode RxStatus1: */
+-#define	RXS_BCNSENT		0x8000
+-#define	RXS_SECKINDX_MASK	0x07e0
+-#define	RXS_SECKINDX_SHIFT	5
+-#define	RXS_DECERR		(1 << 4)
+-#define	RXS_DECATMPT		(1 << 3)
+-#define	RXS_PBPRES		(1 << 2)	/* PAD bytes to make IP data 4 bytes aligned */
+-#define	RXS_RESPFRAMETX		(1 << 1)
+-#define	RXS_FCSERR		(1 << 0)
+-
+-/* ucode RxStatus2: */
+-#define RXS_AMSDU_MASK		1
+-#define	RXS_AGGTYPE_MASK	0x6
+-#define	RXS_AGGTYPE_SHIFT	1
+-#define	RXS_PHYRXST_VALID	(1 << 8)
+-#define RXS_RXANT_MASK		0x3
+-#define RXS_RXANT_SHIFT		12
+-
+-/* RxChan */
+-#define RXS_CHAN_40		0x1000
+-#define RXS_CHAN_5G		0x0800
+-#define	RXS_CHAN_ID_MASK	0x07f8
+-#define	RXS_CHAN_ID_SHIFT	3
+-#define	RXS_CHAN_PHYTYPE_MASK	0x0007
+-#define	RXS_CHAN_PHYTYPE_SHIFT	0
+-
+-/* Index of attenuations used during ucode power control. */
+-#define M_PWRIND_BLKS	(0x184 * 2)
+-#define M_PWRIND_MAP0	(M_PWRIND_BLKS + 0x0)
+-#define M_PWRIND_MAP1	(M_PWRIND_BLKS + 0x2)
+-#define M_PWRIND_MAP2	(M_PWRIND_BLKS + 0x4)
+-#define M_PWRIND_MAP3	(M_PWRIND_BLKS + 0x6)
+-/* M_PWRIND_MAP(core) macro */
+-#define M_PWRIND_MAP(core)  (M_PWRIND_BLKS + ((core)<<1))
+-
+-/* PSM SHM variable offsets */
+-#define	M_PSM_SOFT_REGS	0x0
+-#define	M_BOM_REV_MAJOR	(M_PSM_SOFT_REGS + 0x0)
+-#define	M_BOM_REV_MINOR	(M_PSM_SOFT_REGS + 0x2)
+-#define	M_UCODE_DBGST	(M_PSM_SOFT_REGS + 0x40)	/* ucode debug status code */
+-#define	M_UCODE_MACSTAT	(M_PSM_SOFT_REGS + 0xE0)	/* macstat counters */
+-
+-#define M_AGING_THRSH	(0x3e * 2)	/* max time waiting for medium before tx */
+-#define	M_MBURST_SIZE	(0x40 * 2)	/* max frames in a frameburst */
+-#define	M_MBURST_TXOP	(0x41 * 2)	/* max frameburst TXOP in unit of us */
+-#define M_SYNTHPU_DLY	(0x4a * 2)	/* pre-wakeup for synthpu, default: 500 */
+-#define	M_PRETBTT	(0x4b * 2)
+-
+-#define M_ALT_TXPWR_IDX		(M_PSM_SOFT_REGS + (0x3b * 2))	/* offset to the target txpwr */
+-#define M_PHY_TX_FLT_PTR	(M_PSM_SOFT_REGS + (0x3d * 2))
+-#define M_CTS_DURATION		(M_PSM_SOFT_REGS + (0x5c * 2))
+-#define M_LP_RCCAL_OVR		(M_PSM_SOFT_REGS + (0x6b * 2))
+-
+-/* PKTENG Rx Stats Block */
+-#define M_RXSTATS_BLK_PTR	(M_PSM_SOFT_REGS + (0x65 * 2))
+-
+-/* ucode debug status codes */
+-#define	DBGST_INACTIVE		0	/* not valid really */
+-#define	DBGST_INIT		1	/* after zeroing SHM, before suspending at init */
+-#define	DBGST_ACTIVE		2	/* "normal" state */
+-#define	DBGST_SUSPENDED		3	/* suspended */
+-#define	DBGST_ASLEEP		4	/* asleep (PS mode) */
+-
+-/* Scratch Reg defs */
+-typedef enum {
+-	S_RSV0 = 0,
+-	S_RSV1,
+-	S_RSV2,
+-
+-	/* scratch registers for Dot11-contants */
+-	S_DOT11_CWMIN,		/* CW-minimum                                   0x03 */
+-	S_DOT11_CWMAX,		/* CW-maximum                                   0x04 */
+-	S_DOT11_CWCUR,		/* CW-current                                   0x05 */
+-	S_DOT11_SRC_LMT,	/* short retry count limit                      0x06 */
+-	S_DOT11_LRC_LMT,	/* long retry count limit                       0x07 */
+-	S_DOT11_DTIMCOUNT,	/* DTIM-count                                   0x08 */
+-
+-	/* Tx-side scratch registers */
+-	S_SEQ_NUM,		/* hardware sequence number reg                 0x09 */
+-	S_SEQ_NUM_FRAG,		/* seq-num for frags (Set at the start os MSDU  0x0A */
+-	S_FRMRETX_CNT,		/* frame retx count                             0x0B */
+-	S_SSRC,			/* Station short retry count                    0x0C */
+-	S_SLRC,			/* Station long retry count                     0x0D */
+-	S_EXP_RSP,		/* Expected response frame                      0x0E */
+-	S_OLD_BREM,		/* Remaining backoff ctr                        0x0F */
+-	S_OLD_CWWIN,		/* saved-off CW-cur                             0x10 */
+-	S_TXECTL,		/* TXE-Ctl word constructed in scr-pad          0x11 */
+-	S_CTXTST,		/* frm type-subtype as read from Tx-descr       0x12 */
+-
+-	/* Rx-side scratch registers */
+-	S_RXTST,		/* Type and subtype in Rxframe                  0x13 */
+-
+-	/* Global state register */
+-	S_STREG,		/* state storage actual bit maps below          0x14 */
+-
+-	S_TXPWR_SUM,		/* Tx power control: accumulator                0x15 */
+-	S_TXPWR_ITER,		/* Tx power control: iteration                  0x16 */
+-	S_RX_FRMTYPE,		/* Rate and PHY type for frames                 0x17 */
+-	S_THIS_AGG,		/* Size of this AGG (A-MSDU)                    0x18 */
+-
+-	S_KEYINDX,		/*                                              0x19 */
+-	S_RXFRMLEN,		/* Receive MPDU length in bytes                 0x1A */
+-
+-	/* Receive TSF time stored in SCR */
+-	S_RXTSFTMRVAL_WD3,	/* TSF value at the start of rx                 0x1B */
+-	S_RXTSFTMRVAL_WD2,	/* TSF value at the start of rx                 0x1C */
+-	S_RXTSFTMRVAL_WD1,	/* TSF value at the start of rx                 0x1D */
+-	S_RXTSFTMRVAL_WD0,	/* TSF value at the start of rx                 0x1E */
+-	S_RXSSN,		/* Received start seq number for A-MPDU BA      0x1F */
+-	S_RXQOSFLD,		/* Rx-QoS field (if present)                    0x20 */
+-
+-	/* Scratch pad regs used in microcode as temp storage */
+-	S_TMP0,			/* stmp0                                        0x21 */
+-	S_TMP1,			/* stmp1                                        0x22 */
+-	S_TMP2,			/* stmp2                                        0x23 */
+-	S_TMP3,			/* stmp3                                        0x24 */
+-	S_TMP4,			/* stmp4                                        0x25 */
+-	S_TMP5,			/* stmp5                                        0x26 */
+-	S_PRQPENALTY_CTR,	/* Probe response queue penalty counter         0x27 */
+-	S_ANTCNT,		/* unsuccessful attempts on current ant.        0x28 */
+-	S_SYMBOL,		/* flag for possible symbol ctl frames          0x29 */
+-	S_RXTP,			/* rx frame type                                0x2A */
+-	S_STREG2,		/* extra state storage                          0x2B */
+-	S_STREG3,		/* even more extra state storage                0x2C */
+-	S_STREG4,		/* ...                                          0x2D */
+-	S_STREG5,		/* remember to initialize it to zero            0x2E */
+-
+-	S_ADJPWR_IDX,
+-	S_CUR_PTR,		/* Temp pointer for A-MPDU re-Tx SHM table      0x32 */
+-	S_REVID4,		/* 0x33 */
+-	S_INDX,			/* 0x34 */
+-	S_ADDR0,		/* 0x35 */
+-	S_ADDR1,		/* 0x36 */
+-	S_ADDR2,		/* 0x37 */
+-	S_ADDR3,		/* 0x38 */
+-	S_ADDR4,		/* 0x39 */
+-	S_ADDR5,		/* 0x3A */
+-	S_TMP6,			/* 0x3B */
+-	S_KEYINDX_BU,		/* Backup for Key index                         0x3C */
+-	S_MFGTEST_TMP0,		/* Temp register used for RX test calculations  0x3D */
+-	S_RXESN,		/* Received end sequence number for A-MPDU BA   0x3E */
+-	S_STREG6,		/* 0x3F */
+-} ePsmScratchPadRegDefinitions;
+-
+-#define S_BEACON_INDX	S_OLD_BREM
+-#define S_PRS_INDX	S_OLD_CWWIN
+-#define S_PHYTYPE	S_SSRC
+-#define S_PHYVER	S_SLRC
+-
+-/* IHR SLOW_CTRL values */
+-#define SLOW_CTRL_PDE		(1 << 0)
+-#define SLOW_CTRL_FD		(1 << 8)
+-
+-/* ucode mac statistic counters in shared memory */
+-typedef struct macstat {
+-	u16 txallfrm;	/* 0x80 */
+-	u16 txrtsfrm;	/* 0x82 */
+-	u16 txctsfrm;	/* 0x84 */
+-	u16 txackfrm;	/* 0x86 */
+-	u16 txdnlfrm;	/* 0x88 */
+-	u16 txbcnfrm;	/* 0x8a */
+-	u16 txfunfl[8];	/* 0x8c - 0x9b */
+-	u16 txtplunfl;	/* 0x9c */
+-	u16 txphyerr;	/* 0x9e */
+-	u16 pktengrxducast;	/* 0xa0 */
+-	u16 pktengrxdmcast;	/* 0xa2 */
+-	u16 rxfrmtoolong;	/* 0xa4 */
+-	u16 rxfrmtooshrt;	/* 0xa6 */
+-	u16 rxinvmachdr;	/* 0xa8 */
+-	u16 rxbadfcs;	/* 0xaa */
+-	u16 rxbadplcp;	/* 0xac */
+-	u16 rxcrsglitch;	/* 0xae */
+-	u16 rxstrt;		/* 0xb0 */
+-	u16 rxdfrmucastmbss;	/* 0xb2 */
+-	u16 rxmfrmucastmbss;	/* 0xb4 */
+-	u16 rxcfrmucast;	/* 0xb6 */
+-	u16 rxrtsucast;	/* 0xb8 */
+-	u16 rxctsucast;	/* 0xba */
+-	u16 rxackucast;	/* 0xbc */
+-	u16 rxdfrmocast;	/* 0xbe */
+-	u16 rxmfrmocast;	/* 0xc0 */
+-	u16 rxcfrmocast;	/* 0xc2 */
+-	u16 rxrtsocast;	/* 0xc4 */
+-	u16 rxctsocast;	/* 0xc6 */
+-	u16 rxdfrmmcast;	/* 0xc8 */
+-	u16 rxmfrmmcast;	/* 0xca */
+-	u16 rxcfrmmcast;	/* 0xcc */
+-	u16 rxbeaconmbss;	/* 0xce */
+-	u16 rxdfrmucastobss;	/* 0xd0 */
+-	u16 rxbeaconobss;	/* 0xd2 */
+-	u16 rxrsptmout;	/* 0xd4 */
+-	u16 bcntxcancl;	/* 0xd6 */
+-	u16 PAD;
+-	u16 rxf0ovfl;	/* 0xda */
+-	u16 rxf1ovfl;	/* 0xdc */
+-	u16 rxf2ovfl;	/* 0xde */
+-	u16 txsfovfl;	/* 0xe0 */
+-	u16 pmqovfl;		/* 0xe2 */
+-	u16 rxcgprqfrm;	/* 0xe4 */
+-	u16 rxcgprsqovfl;	/* 0xe6 */
+-	u16 txcgprsfail;	/* 0xe8 */
+-	u16 txcgprssuc;	/* 0xea */
+-	u16 prs_timeout;	/* 0xec */
+-	u16 rxnack;
+-	u16 frmscons;
+-	u16 txnack;
+-	u16 txglitch_nack;
+-	u16 txburst;		/* 0xf6 # tx bursts */
+-	u16 bphy_rxcrsglitch;	/* bphy rx crs glitch */
+-	u16 phywatchdog;	/* 0xfa # of phy watchdog events */
+-	u16 PAD;
+-	u16 bphy_badplcp;	/* bphy bad plcp */
+-} macstat_t;
+-
+-/* dot11 core-specific control flags */
+-#define	SICF_PCLKE		0x0004	/* PHY clock enable */
+-#define	SICF_PRST		0x0008	/* PHY reset */
+-#define	SICF_MPCLKE		0x0010	/* MAC PHY clockcontrol enable */
+-#define	SICF_FREF		0x0020	/* PLL FreqRefSelect */
+-/* NOTE: the following bw bits only apply when the core is attached
+- * to a NPHY
+- */
+-#define	SICF_BWMASK		0x00c0	/* phy clock mask (b6 & b7) */
+-#define	SICF_BW40		0x0080	/* 40MHz BW (160MHz phyclk) */
+-#define	SICF_BW20		0x0040	/* 20MHz BW (80MHz phyclk) */
+-#define	SICF_BW10		0x0000	/* 10MHz BW (40MHz phyclk) */
+-#define	SICF_GMODE		0x2000	/* gmode enable */
+-
+-/* dot11 core-specific status flags */
+-#define	SISF_2G_PHY		0x0001	/* 2.4G capable phy */
+-#define	SISF_5G_PHY		0x0002	/* 5G capable phy */
+-#define	SISF_FCLKA		0x0004	/* FastClkAvailable */
+-#define	SISF_DB_PHY		0x0008	/* Dualband phy */
+-
+-/* === End of MAC reg, Beginning of PHY(b/a/g/n) reg, radio and LPPHY regs are separated === */
+-
+-#define	BPHY_REG_OFT_BASE	0x0
+-/* offsets for indirect access to bphy registers */
+-#define	BPHY_BB_CONFIG		0x01
+-#define	BPHY_ADCBIAS		0x02
+-#define	BPHY_ANACORE		0x03
+-#define	BPHY_PHYCRSTH		0x06
+-#define	BPHY_TEST		0x0a
+-#define	BPHY_PA_TX_TO		0x10
+-#define	BPHY_SYNTH_DC_TO	0x11
+-#define	BPHY_PA_TX_TIME_UP	0x12
+-#define	BPHY_RX_FLTR_TIME_UP	0x13
+-#define	BPHY_TX_POWER_OVERRIDE	0x14
+-#define	BPHY_RF_OVERRIDE	0x15
+-#define	BPHY_RF_TR_LOOKUP1	0x16
+-#define	BPHY_RF_TR_LOOKUP2	0x17
+-#define	BPHY_COEFFS		0x18
+-#define	BPHY_PLL_OUT		0x19
+-#define	BPHY_REFRESH_MAIN	0x1a
+-#define	BPHY_REFRESH_TO0	0x1b
+-#define	BPHY_REFRESH_TO1	0x1c
+-#define	BPHY_RSSI_TRESH		0x20
+-#define	BPHY_IQ_TRESH_HH	0x21
+-#define	BPHY_IQ_TRESH_H		0x22
+-#define	BPHY_IQ_TRESH_L		0x23
+-#define	BPHY_IQ_TRESH_LL	0x24
+-#define	BPHY_GAIN		0x25
+-#define	BPHY_LNA_GAIN_RANGE	0x26
+-#define	BPHY_JSSI		0x27
+-#define	BPHY_TSSI_CTL		0x28
+-#define	BPHY_TSSI		0x29
+-#define	BPHY_TR_LOSS_CTL	0x2a
+-#define	BPHY_LO_LEAKAGE		0x2b
+-#define	BPHY_LO_RSSI_ACC	0x2c
+-#define	BPHY_LO_IQMAG_ACC	0x2d
+-#define	BPHY_TX_DC_OFF1		0x2e
+-#define	BPHY_TX_DC_OFF2		0x2f
+-#define	BPHY_PEAK_CNT_THRESH	0x30
+-#define	BPHY_FREQ_OFFSET	0x31
+-#define	BPHY_DIVERSITY_CTL	0x32
+-#define	BPHY_PEAK_ENERGY_LO	0x33
+-#define	BPHY_PEAK_ENERGY_HI	0x34
+-#define	BPHY_SYNC_CTL		0x35
+-#define	BPHY_TX_PWR_CTRL	0x36
+-#define BPHY_TX_EST_PWR 	0x37
+-#define	BPHY_STEP		0x38
+-#define	BPHY_WARMUP		0x39
+-#define	BPHY_LMS_CFF_READ	0x3a
+-#define	BPHY_LMS_COEFF_I	0x3b
+-#define	BPHY_LMS_COEFF_Q	0x3c
+-#define	BPHY_SIG_POW		0x3d
+-#define	BPHY_RFDC_CANCEL_CTL	0x3e
+-#define	BPHY_HDR_TYPE		0x40
+-#define	BPHY_SFD_TO		0x41
+-#define	BPHY_SFD_CTL		0x42
+-#define	BPHY_DEBUG		0x43
+-#define	BPHY_RX_DELAY_COMP	0x44
+-#define	BPHY_CRS_DROP_TO	0x45
+-#define	BPHY_SHORT_SFD_NZEROS	0x46
+-#define	BPHY_DSSS_COEFF1	0x48
+-#define	BPHY_DSSS_COEFF2	0x49
+-#define	BPHY_CCK_COEFF1		0x4a
+-#define	BPHY_CCK_COEFF2		0x4b
+-#define	BPHY_TR_CORR		0x4c
+-#define	BPHY_ANGLE_SCALE	0x4d
+-#define	BPHY_TX_PWR_BASE_IDX	0x4e
+-#define	BPHY_OPTIONAL_MODES2	0x4f
+-#define	BPHY_CCK_LMS_STEP	0x50
+-#define	BPHY_BYPASS		0x51
+-#define	BPHY_CCK_DELAY_LONG	0x52
+-#define	BPHY_CCK_DELAY_SHORT	0x53
+-#define	BPHY_PPROC_CHAN_DELAY	0x54
+-#define	BPHY_DDFS_ENABLE	0x58
+-#define	BPHY_PHASE_SCALE	0x59
+-#define	BPHY_FREQ_CONTROL	0x5a
+-#define	BPHY_LNA_GAIN_RANGE_10	0x5b
+-#define	BPHY_LNA_GAIN_RANGE_32	0x5c
+-#define	BPHY_OPTIONAL_MODES	0x5d
+-#define	BPHY_RX_STATUS2		0x5e
+-#define	BPHY_RX_STATUS3		0x5f
+-#define	BPHY_DAC_CONTROL	0x60
+-#define	BPHY_ANA11G_FILT_CTRL	0x62
+-#define	BPHY_REFRESH_CTRL	0x64
+-#define	BPHY_RF_OVERRIDE2	0x65
+-#define	BPHY_SPUR_CANCEL_CTRL	0x66
+-#define	BPHY_FINE_DIGIGAIN_CTRL	0x67
+-#define	BPHY_RSSI_LUT		0x88
+-#define	BPHY_RSSI_LUT_END	0xa7
+-#define	BPHY_TSSI_LUT		0xa8
+-#define	BPHY_TSSI_LUT_END	0xc7
+-#define	BPHY_TSSI2PWR_LUT	0x380
+-#define	BPHY_TSSI2PWR_LUT_END	0x39f
+-#define	BPHY_LOCOMP_LUT		0x3a0
+-#define	BPHY_LOCOMP_LUT_END	0x3bf
+-#define	BPHY_TXGAIN_LUT		0x3c0
+-#define	BPHY_TXGAIN_LUT_END	0x3ff
+-
+-/* Bits in BB_CONFIG: */
+-#define	PHY_BBC_ANT_MASK	0x0180
+-#define	PHY_BBC_ANT_SHIFT	7
+-#define	BB_DARWIN		0x1000
+-#define BBCFG_RESETCCA		0x4000
+-#define BBCFG_RESETRX		0x8000
+-
+-/* Bits in phytest(0x0a): */
+-#define	TST_DDFS		0x2000
+-#define	TST_TXFILT1		0x0800
+-#define	TST_UNSCRAM		0x0400
+-#define	TST_CARR_SUPP		0x0200
+-#define	TST_DC_COMP_LOOP	0x0100
+-#define	TST_LOOPBACK		0x0080
+-#define	TST_TXFILT0		0x0040
+-#define	TST_TXTEST_ENABLE	0x0020
+-#define	TST_TXTEST_RATE		0x0018
+-#define	TST_TXTEST_PHASE	0x0007
+-
+-/* phytest txTestRate values */
+-#define	TST_TXTEST_RATE_1MBPS	0
+-#define	TST_TXTEST_RATE_2MBPS	1
+-#define	TST_TXTEST_RATE_5_5MBPS	2
+-#define	TST_TXTEST_RATE_11MBPS	3
+-#define	TST_TXTEST_RATE_SHIFT	3
+-
+-#define SHM_BYT_CNT	0x2	/* IHR location */
+-#define MAX_BYT_CNT	0x600	/* Maximum frame len */
+-
+-#endif				/* _D11_H */
+diff --git a/drivers/staging/brcm80211/brcmsmac/hnddma.c b/drivers/staging/brcm80211/brcmsmac/hnddma.c
+deleted file mode 100644
+index f607315..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/hnddma.c
++++ /dev/null
+@@ -1,1756 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/kernel.h>
+-#include <linux/string.h>
+-#include <linux/netdevice.h>
+-#include <linux/pci.h>
+-#include <bcmdefs.h>
+-#include <bcmdevs.h>
+-#include <hndsoc.h>
+-#include <bcmutils.h>
+-#include <aiutils.h>
+-
+-#include <sbhnddma.h>
+-#include <hnddma.h>
+-
+-#if defined(__mips__)
+-#include <asm/addrspace.h>
+-#endif
+-
+-#ifdef BRCM_FULLMAC
+-#error "hnddma.c shouldn't be needed for FULLMAC"
+-#endif
+-
+-/* debug/trace */
+-#ifdef BCMDBG
+-#define	DMA_ERROR(args) \
+-	do { \
+-		if (!(*di->msg_level & 1)) \
+-			; \
+-		else \
+-			printk args; \
+-	} while (0)
+-#define	DMA_TRACE(args) \
+-	do { \
+-		if (!(*di->msg_level & 2)) \
+-			; \
+-		else \
+-			printk args; \
+-	} while (0)
+-#else
+-#define	DMA_ERROR(args)
+-#define	DMA_TRACE(args)
+-#endif				/* BCMDBG */
+-
+-#define	DMA_NONE(args)
+-
+-#define d64txregs	dregs.d64_u.txregs_64
+-#define d64rxregs	dregs.d64_u.rxregs_64
+-#define txd64		dregs.d64_u.txd_64
+-#define rxd64		dregs.d64_u.rxd_64
+-
+-/* default dma message level (if input msg_level pointer is null in dma_attach()) */
+-static uint dma_msg_level;
+-
+-#define	MAXNAMEL	8	/* 8 char names */
+-
+-#define	DI_INFO(dmah)	((dma_info_t *)dmah)
+-
+-#define R_SM(r)		(*(r))
+-#define W_SM(r, v)	(*(r) = (v))
+-
+-/* dma engine software state */
+-typedef struct dma_info {
+-	struct hnddma_pub hnddma; /* exported structure */
+-	uint *msg_level;	/* message level pointer */
+-	char name[MAXNAMEL];	/* callers name for diag msgs */
+-
+-	void *pbus;		/* bus handle */
+-
+-	bool dma64;		/* this dma engine is operating in 64-bit mode */
+-	bool addrext;		/* this dma engine supports DmaExtendedAddrChanges */
+-
+-	union {
+-		struct {
+-			dma64regs_t *txregs_64;	/* 64-bit dma tx engine registers */
+-			dma64regs_t *rxregs_64;	/* 64-bit dma rx engine registers */
+-			dma64dd_t *txd_64;	/* pointer to dma64 tx descriptor ring */
+-			dma64dd_t *rxd_64;	/* pointer to dma64 rx descriptor ring */
+-		} d64_u;
+-	} dregs;
+-
+-	u16 dmadesc_align;	/* alignment requirement for dma descriptors */
+-
+-	u16 ntxd;		/* # tx descriptors tunable */
+-	u16 txin;		/* index of next descriptor to reclaim */
+-	u16 txout;		/* index of next descriptor to post */
+-	void **txp;		/* pointer to parallel array of pointers to packets */
+-	hnddma_seg_map_t *txp_dmah;	/* DMA MAP meta-data handle */
+-	dmaaddr_t txdpa;	/* Aligned physical address of descriptor ring */
+-	dmaaddr_t txdpaorig;	/* Original physical address of descriptor ring */
+-	u16 txdalign;	/* #bytes added to alloc'd mem to align txd */
+-	u32 txdalloc;	/* #bytes allocated for the ring */
+-	u32 xmtptrbase;	/* When using unaligned descriptors, the ptr register
+-				 * is not just an index, it needs all 13 bits to be
+-				 * an offset from the addr register.
+-				 */
+-
+-	u16 nrxd;		/* # rx descriptors tunable */
+-	u16 rxin;		/* index of next descriptor to reclaim */
+-	u16 rxout;		/* index of next descriptor to post */
+-	void **rxp;		/* pointer to parallel array of pointers to packets */
+-	hnddma_seg_map_t *rxp_dmah;	/* DMA MAP meta-data handle */
+-	dmaaddr_t rxdpa;	/* Aligned physical address of descriptor ring */
+-	dmaaddr_t rxdpaorig;	/* Original physical address of descriptor ring */
+-	u16 rxdalign;	/* #bytes added to alloc'd mem to align rxd */
+-	u32 rxdalloc;	/* #bytes allocated for the ring */
+-	u32 rcvptrbase;	/* Base for ptr reg when using unaligned descriptors */
+-
+-	/* tunables */
+-	unsigned int rxbufsize;	/* rx buffer size in bytes,
+-				 * not including the extra headroom
+-				 */
+-	uint rxextrahdrroom;	/* extra rx headroom, reverseved to assist upper stack
+-				 *  e.g. some rx pkt buffers will be bridged to tx side
+-				 *  without byte copying. The extra headroom needs to be
+-				 *  large enough to fit txheader needs.
+-				 *  Some dongle driver may not need it.
+-				 */
+-	uint nrxpost;		/* # rx buffers to keep posted */
+-	unsigned int rxoffset;	/* rxcontrol offset */
+-	uint ddoffsetlow;	/* add to get dma address of descriptor ring, low 32 bits */
+-	uint ddoffsethigh;	/*   high 32 bits */
+-	uint dataoffsetlow;	/* add to get dma address of data buffer, low 32 bits */
+-	uint dataoffsethigh;	/*   high 32 bits */
+-	bool aligndesc_4k;	/* descriptor base need to be aligned or not */
+-} dma_info_t;
+-
+-/* DMA Scatter-gather list is supported. Note this is limited to TX direction only */
+-#ifdef BCMDMASGLISTOSL
+-#define DMASGLIST_ENAB true
+-#else
+-#define DMASGLIST_ENAB false
+-#endif				/* BCMDMASGLISTOSL */
+-
+-/* descriptor bumping macros */
+-#define	XXD(x, n)	((x) & ((n) - 1))	/* faster than %, but n must be power of 2 */
+-#define	TXD(x)		XXD((x), di->ntxd)
+-#define	RXD(x)		XXD((x), di->nrxd)
+-#define	NEXTTXD(i)	TXD((i) + 1)
+-#define	PREVTXD(i)	TXD((i) - 1)
+-#define	NEXTRXD(i)	RXD((i) + 1)
+-#define	PREVRXD(i)	RXD((i) - 1)
+-
+-#define	NTXDACTIVE(h, t)	TXD((t) - (h))
+-#define	NRXDACTIVE(h, t)	RXD((t) - (h))
+-
+-/* macros to convert between byte offsets and indexes */
+-#define	B2I(bytes, type)	((bytes) / sizeof(type))
+-#define	I2B(index, type)	((index) * sizeof(type))
+-
+-#define	PCI32ADDR_HIGH		0xc0000000	/* address[31:30] */
+-#define	PCI32ADDR_HIGH_SHIFT	30	/* address[31:30] */
+-
+-#define	PCI64ADDR_HIGH		0x80000000	/* address[63] */
+-#define	PCI64ADDR_HIGH_SHIFT	31	/* address[63] */
+-
+-/* Common prototypes */
+-static bool _dma_isaddrext(dma_info_t *di);
+-static bool _dma_descriptor_align(dma_info_t *di);
+-static bool _dma_alloc(dma_info_t *di, uint direction);
+-static void _dma_detach(dma_info_t *di);
+-static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa);
+-static void _dma_rxinit(dma_info_t *di);
+-static void *_dma_rx(dma_info_t *di);
+-static bool _dma_rxfill(dma_info_t *di);
+-static void _dma_rxreclaim(dma_info_t *di);
+-static void _dma_rxenable(dma_info_t *di);
+-static void *_dma_getnextrxp(dma_info_t *di, bool forceall);
+-static void _dma_rx_param_get(dma_info_t *di, u16 *rxoffset,
+-			      u16 *rxbufsize);
+-
+-static void _dma_txblock(dma_info_t *di);
+-static void _dma_txunblock(dma_info_t *di);
+-static uint _dma_txactive(dma_info_t *di);
+-static uint _dma_rxactive(dma_info_t *di);
+-static uint _dma_txpending(dma_info_t *di);
+-static uint _dma_txcommitted(dma_info_t *di);
+-
+-static void *_dma_peeknexttxp(dma_info_t *di);
+-static void *_dma_peeknextrxp(dma_info_t *di);
+-static unsigned long _dma_getvar(dma_info_t *di, const char *name);
+-static void _dma_counterreset(dma_info_t *di);
+-static void _dma_fifoloopbackenable(dma_info_t *di);
+-static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags);
+-static u8 dma_align_sizetobits(uint size);
+-static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size,
+-			   u16 *alignbits, uint *alloced,
+-			   dmaaddr_t *descpa);
+-
+-/* Prototypes for 64-bit routines */
+-static bool dma64_alloc(dma_info_t *di, uint direction);
+-static bool dma64_txreset(dma_info_t *di);
+-static bool dma64_rxreset(dma_info_t *di);
+-static bool dma64_txsuspendedidle(dma_info_t *di);
+-static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, bool commit);
+-static int dma64_txunframed(dma_info_t *di, void *p0, uint len, bool commit);
+-static void *dma64_getpos(dma_info_t *di, bool direction);
+-static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range);
+-static void *dma64_getnextrxp(dma_info_t *di, bool forceall);
+-static void dma64_txrotate(dma_info_t *di);
+-
+-static bool dma64_rxidle(dma_info_t *di);
+-static void dma64_txinit(dma_info_t *di);
+-static bool dma64_txenabled(dma_info_t *di);
+-static void dma64_txsuspend(dma_info_t *di);
+-static void dma64_txresume(dma_info_t *di);
+-static bool dma64_txsuspended(dma_info_t *di);
+-static void dma64_txreclaim(dma_info_t *di, txd_range_t range);
+-static bool dma64_txstopped(dma_info_t *di);
+-static bool dma64_rxstopped(dma_info_t *di);
+-static bool dma64_rxenabled(dma_info_t *di);
+-static bool _dma64_addrext(dma64regs_t *dma64regs);
+-
+-static inline u32 parity32(u32 data);
+-
+-const di_fcn_t dma64proc = {
+-	(di_detach_t) _dma_detach,
+-	(di_txinit_t) dma64_txinit,
+-	(di_txreset_t) dma64_txreset,
+-	(di_txenabled_t) dma64_txenabled,
+-	(di_txsuspend_t) dma64_txsuspend,
+-	(di_txresume_t) dma64_txresume,
+-	(di_txsuspended_t) dma64_txsuspended,
+-	(di_txsuspendedidle_t) dma64_txsuspendedidle,
+-	(di_txfast_t) dma64_txfast,
+-	(di_txunframed_t) dma64_txunframed,
+-	(di_getpos_t) dma64_getpos,
+-	(di_txstopped_t) dma64_txstopped,
+-	(di_txreclaim_t) dma64_txreclaim,
+-	(di_getnexttxp_t) dma64_getnexttxp,
+-	(di_peeknexttxp_t) _dma_peeknexttxp,
+-	(di_txblock_t) _dma_txblock,
+-	(di_txunblock_t) _dma_txunblock,
+-	(di_txactive_t) _dma_txactive,
+-	(di_txrotate_t) dma64_txrotate,
+-
+-	(di_rxinit_t) _dma_rxinit,
+-	(di_rxreset_t) dma64_rxreset,
+-	(di_rxidle_t) dma64_rxidle,
+-	(di_rxstopped_t) dma64_rxstopped,
+-	(di_rxenable_t) _dma_rxenable,
+-	(di_rxenabled_t) dma64_rxenabled,
+-	(di_rx_t) _dma_rx,
+-	(di_rxfill_t) _dma_rxfill,
+-	(di_rxreclaim_t) _dma_rxreclaim,
+-	(di_getnextrxp_t) _dma_getnextrxp,
+-	(di_peeknextrxp_t) _dma_peeknextrxp,
+-	(di_rxparam_get_t) _dma_rx_param_get,
+-
+-	(di_fifoloopbackenable_t) _dma_fifoloopbackenable,
+-	(di_getvar_t) _dma_getvar,
+-	(di_counterreset_t) _dma_counterreset,
+-	(di_ctrlflags_t) _dma_ctrlflags,
+-	NULL,
+-	NULL,
+-	NULL,
+-	(di_rxactive_t) _dma_rxactive,
+-	(di_txpending_t) _dma_txpending,
+-	(di_txcommitted_t) _dma_txcommitted,
+-	39
+-};
+-
+-struct hnddma_pub *dma_attach(char *name, si_t *sih,
+-		     void *dmaregstx, void *dmaregsrx, uint ntxd,
+-		     uint nrxd, uint rxbufsize, int rxextheadroom,
+-		     uint nrxpost, uint rxoffset, uint *msg_level)
+-{
+-	dma_info_t *di;
+-	uint size;
+-
+-	/* allocate private info structure */
+-	di = kzalloc(sizeof(dma_info_t), GFP_ATOMIC);
+-	if (di == NULL) {
+-#ifdef BCMDBG
+-		printk(KERN_ERR "dma_attach: out of memory\n");
+-#endif
+-		return NULL;
+-	}
+-
+-	di->msg_level = msg_level ? msg_level : &dma_msg_level;
+-
+-
+-	di->dma64 = ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64);
+-
+-	/* init dma reg pointer */
+-	di->d64txregs = (dma64regs_t *) dmaregstx;
+-	di->d64rxregs = (dma64regs_t *) dmaregsrx;
+-	di->hnddma.di_fn = (const di_fcn_t *)&dma64proc;
+-
+-	/* Default flags (which can be changed by the driver calling dma_ctrlflags
+-	 * before enable): For backwards compatibility both Rx Overflow Continue
+-	 * and Parity are DISABLED.
+-	 * supports it.
+-	 */
+-	di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN,
+-				    0);
+-
+-	DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d "
+-		   "rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d "
+-		   "dmaregstx %p dmaregsrx %p\n", name, "DMA64",
+-		   di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize,
+-		   rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx));
+-
+-	/* make a private copy of our callers name */
+-	strncpy(di->name, name, MAXNAMEL);
+-	di->name[MAXNAMEL - 1] = '\0';
+-
+-	di->pbus = ((struct si_info *)sih)->pbus;
+-
+-	/* save tunables */
+-	di->ntxd = (u16) ntxd;
+-	di->nrxd = (u16) nrxd;
+-
+-	/* the actual dma size doesn't include the extra headroom */
+-	di->rxextrahdrroom =
+-	    (rxextheadroom == -1) ? BCMEXTRAHDROOM : rxextheadroom;
+-	if (rxbufsize > BCMEXTRAHDROOM)
+-		di->rxbufsize = (u16) (rxbufsize - di->rxextrahdrroom);
+-	else
+-		di->rxbufsize = (u16) rxbufsize;
+-
+-	di->nrxpost = (u16) nrxpost;
+-	di->rxoffset = (u8) rxoffset;
+-
+-	/*
+-	 * figure out the DMA physical address offset for dd and data
+-	 *     PCI/PCIE: they map silicon backplace address to zero based memory, need offset
+-	 *     Other bus: use zero
+-	 *     SI_BUS BIGENDIAN kludge: use sdram swapped region for data buffer, not descriptor
+-	 */
+-	di->ddoffsetlow = 0;
+-	di->dataoffsetlow = 0;
+-	/* for pci bus, add offset */
+-	if (sih->bustype == PCI_BUS) {
+-		/* pcie with DMA64 */
+-		di->ddoffsetlow = 0;
+-		di->ddoffsethigh = SI_PCIE_DMA_H32;
+-		di->dataoffsetlow = di->ddoffsetlow;
+-		di->dataoffsethigh = di->ddoffsethigh;
+-	}
+-#if defined(__mips__) && defined(IL_BIGENDIAN)
+-	di->dataoffsetlow = di->dataoffsetlow + SI_SDRAM_SWAPPED;
+-#endif				/* defined(__mips__) && defined(IL_BIGENDIAN) */
+-	/* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */
+-	if ((ai_coreid(sih) == SDIOD_CORE_ID)
+-	    && ((ai_corerev(sih) > 0) && (ai_corerev(sih) <= 2)))
+-		di->addrext = 0;
+-	else if ((ai_coreid(sih) == I2S_CORE_ID) &&
+-		 ((ai_corerev(sih) == 0) || (ai_corerev(sih) == 1)))
+-		di->addrext = 0;
+-	else
+-		di->addrext = _dma_isaddrext(di);
+-
+-	/* does the descriptors need to be aligned and if yes, on 4K/8K or not */
+-	di->aligndesc_4k = _dma_descriptor_align(di);
+-	if (di->aligndesc_4k) {
+-		di->dmadesc_align = D64RINGALIGN_BITS;
+-		if ((ntxd < D64MAXDD / 2) && (nrxd < D64MAXDD / 2)) {
+-			/* for smaller dd table, HW relax alignment reqmnt */
+-			di->dmadesc_align = D64RINGALIGN_BITS - 1;
+-		}
+-	} else
+-		di->dmadesc_align = 4;	/* 16 byte alignment */
+-
+-	DMA_NONE(("DMA descriptor align_needed %d, align %d\n",
+-		  di->aligndesc_4k, di->dmadesc_align));
+-
+-	/* allocate tx packet pointer vector */
+-	if (ntxd) {
+-		size = ntxd * sizeof(void *);
+-		di->txp = kzalloc(size, GFP_ATOMIC);
+-		if (di->txp == NULL) {
+-			DMA_ERROR(("%s: dma_attach: out of tx memory\n", di->name));
+-			goto fail;
+-		}
+-	}
+-
+-	/* allocate rx packet pointer vector */
+-	if (nrxd) {
+-		size = nrxd * sizeof(void *);
+-		di->rxp = kzalloc(size, GFP_ATOMIC);
+-		if (di->rxp == NULL) {
+-			DMA_ERROR(("%s: dma_attach: out of rx memory\n", di->name));
+-			goto fail;
+-		}
+-	}
+-
+-	/* allocate transmit descriptor ring, only need ntxd descriptors but it must be aligned */
+-	if (ntxd) {
+-		if (!_dma_alloc(di, DMA_TX))
+-			goto fail;
+-	}
+-
+-	/* allocate receive descriptor ring, only need nrxd descriptors but it must be aligned */
+-	if (nrxd) {
+-		if (!_dma_alloc(di, DMA_RX))
+-			goto fail;
+-	}
+-
+-	if ((di->ddoffsetlow != 0) && !di->addrext) {
+-		if (PHYSADDRLO(di->txdpa) > SI_PCI_DMA_SZ) {
+-			DMA_ERROR(("%s: dma_attach: txdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->txdpa)));
+-			goto fail;
+-		}
+-		if (PHYSADDRLO(di->rxdpa) > SI_PCI_DMA_SZ) {
+-			DMA_ERROR(("%s: dma_attach: rxdpa 0x%x: addrext not supported\n", di->name, (u32) PHYSADDRLO(di->rxdpa)));
+-			goto fail;
+-		}
+-	}
+-
+-	DMA_TRACE(("ddoffsetlow 0x%x ddoffsethigh 0x%x dataoffsetlow 0x%x dataoffsethigh " "0x%x addrext %d\n", di->ddoffsetlow, di->ddoffsethigh, di->dataoffsetlow, di->dataoffsethigh, di->addrext));
+-
+-	/* allocate DMA mapping vectors */
+-	if (DMASGLIST_ENAB) {
+-		if (ntxd) {
+-			size = ntxd * sizeof(hnddma_seg_map_t);
+-			di->txp_dmah = kzalloc(size, GFP_ATOMIC);
+-			if (di->txp_dmah == NULL)
+-				goto fail;
+-		}
+-
+-		if (nrxd) {
+-			size = nrxd * sizeof(hnddma_seg_map_t);
+-			di->rxp_dmah = kzalloc(size, GFP_ATOMIC);
+-			if (di->rxp_dmah == NULL)
+-				goto fail;
+-		}
+-	}
+-
+-	return (struct hnddma_pub *) di;
+-
+- fail:
+-	_dma_detach(di);
+-	return NULL;
+-}
+-
+-/* Check for odd number of 1's */
+-static inline u32 parity32(u32 data)
+-{
+-	data ^= data >> 16;
+-	data ^= data >> 8;
+-	data ^= data >> 4;
+-	data ^= data >> 2;
+-	data ^= data >> 1;
+-
+-	return data & 1;
+-}
+-
+-#define DMA64_DD_PARITY(dd)  parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2)
+-
+-static inline void
+-dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx,
+-	     u32 *flags, u32 bufcount)
+-{
+-	u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK;
+-
+-	/* PCI bus with big(>1G) physical address, use address extension */
+-#if defined(__mips__) && defined(IL_BIGENDIAN)
+-	if ((di->dataoffsetlow == SI_SDRAM_SWAPPED)
+-	    || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) {
+-#else
+-	if ((di->dataoffsetlow == 0) || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) {
+-#endif				/* defined(__mips__) && defined(IL_BIGENDIAN) */
+-
+-		W_SM(&ddring[outidx].addrlow,
+-		     BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow));
+-		W_SM(&ddring[outidx].addrhigh,
+-		     BUS_SWAP32(PHYSADDRHI(pa) + di->dataoffsethigh));
+-		W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags));
+-		W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2));
+-	} else {
+-		/* address extension for 32-bit PCI */
+-		u32 ae;
+-
+-		ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >> PCI32ADDR_HIGH_SHIFT;
+-		PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH;
+-
+-		ctrl2 |= (ae << D64_CTRL2_AE_SHIFT) & D64_CTRL2_AE;
+-		W_SM(&ddring[outidx].addrlow,
+-		     BUS_SWAP32(PHYSADDRLO(pa) + di->dataoffsetlow));
+-		W_SM(&ddring[outidx].addrhigh,
+-		     BUS_SWAP32(0 + di->dataoffsethigh));
+-		W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags));
+-		W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2));
+-	}
+-	if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) {
+-		if (DMA64_DD_PARITY(&ddring[outidx])) {
+-			W_SM(&ddring[outidx].ctrl2,
+-			     BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY));
+-		}
+-	}
+-}
+-
+-static bool _dma_alloc(dma_info_t *di, uint direction)
+-{
+-	return dma64_alloc(di, direction);
+-}
+-
+-void *dma_alloc_consistent(struct pci_dev *pdev, uint size, u16 align_bits,
+-			       uint *alloced, unsigned long *pap)
+-{
+-	if (align_bits) {
+-		u16 align = (1 << align_bits);
+-		if (!IS_ALIGNED(PAGE_SIZE, align))
+-			size += align;
+-		*alloced = size;
+-	}
+-	return pci_alloc_consistent(pdev, size, (dma_addr_t *) pap);
+-}
+-
+-/* !! may be called with core in reset */
+-static void _dma_detach(dma_info_t *di)
+-{
+-
+-	DMA_TRACE(("%s: dma_detach\n", di->name));
+-
+-	/* free dma descriptor rings */
+-	if (di->txd64)
+-		pci_free_consistent(di->pbus, di->txdalloc,
+-				    ((s8 *)di->txd64 - di->txdalign),
+-				    (di->txdpaorig));
+-	if (di->rxd64)
+-		pci_free_consistent(di->pbus, di->rxdalloc,
+-				    ((s8 *)di->rxd64 - di->rxdalign),
+-				    (di->rxdpaorig));
+-
+-	/* free packet pointer vectors */
+-	kfree(di->txp);
+-	kfree(di->rxp);
+-
+-	/* free tx packet DMA handles */
+-	kfree(di->txp_dmah);
+-
+-	/* free rx packet DMA handles */
+-	kfree(di->rxp_dmah);
+-
+-	/* free our private info structure */
+-	kfree(di);
+-
+-}
+-
+-static bool _dma_descriptor_align(dma_info_t *di)
+-{
+-	u32 addrl;
+-
+-	/* Check to see if the descriptors need to be aligned on 4K/8K or not */
+-	if (di->d64txregs != NULL) {
+-		W_REG(&di->d64txregs->addrlow, 0xff0);
+-		addrl = R_REG(&di->d64txregs->addrlow);
+-		if (addrl != 0)
+-			return false;
+-	} else if (di->d64rxregs != NULL) {
+-		W_REG(&di->d64rxregs->addrlow, 0xff0);
+-		addrl = R_REG(&di->d64rxregs->addrlow);
+-		if (addrl != 0)
+-			return false;
+-	}
+-	return true;
+-}
+-
+-/* return true if this dma engine supports DmaExtendedAddrChanges, otherwise false */
+-static bool _dma_isaddrext(dma_info_t *di)
+-{
+-	/* DMA64 supports full 32- or 64-bit operation. AE is always valid */
+-
+-	/* not all tx or rx channel are available */
+-	if (di->d64txregs != NULL) {
+-		if (!_dma64_addrext(di->d64txregs)) {
+-			DMA_ERROR(("%s: _dma_isaddrext: DMA64 tx doesn't have "
+-				   "AE set\n", di->name));
+-		}
+-		return true;
+-	} else if (di->d64rxregs != NULL) {
+-		if (!_dma64_addrext(di->d64rxregs)) {
+-			DMA_ERROR(("%s: _dma_isaddrext: DMA64 rx doesn't have "
+-				   "AE set\n", di->name));
+-		}
+-		return true;
+-	}
+-	return false;
+-}
+-
+-/* initialize descriptor table base address */
+-static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa)
+-{
+-	if (!di->aligndesc_4k) {
+-		if (direction == DMA_TX)
+-			di->xmtptrbase = PHYSADDRLO(pa);
+-		else
+-			di->rcvptrbase = PHYSADDRLO(pa);
+-	}
+-
+-	if ((di->ddoffsetlow == 0)
+-	    || !(PHYSADDRLO(pa) & PCI32ADDR_HIGH)) {
+-		if (direction == DMA_TX) {
+-			W_REG(&di->d64txregs->addrlow,
+-			      (PHYSADDRLO(pa) + di->ddoffsetlow));
+-			W_REG(&di->d64txregs->addrhigh,
+-			      (PHYSADDRHI(pa) + di->ddoffsethigh));
+-		} else {
+-			W_REG(&di->d64rxregs->addrlow,
+-			      (PHYSADDRLO(pa) + di->ddoffsetlow));
+-			W_REG(&di->d64rxregs->addrhigh,
+-				(PHYSADDRHI(pa) + di->ddoffsethigh));
+-		}
+-	} else {
+-		/* DMA64 32bits address extension */
+-		u32 ae;
+-
+-		/* shift the high bit(s) from pa to ae */
+-		ae = (PHYSADDRLO(pa) & PCI32ADDR_HIGH) >>
+-		    PCI32ADDR_HIGH_SHIFT;
+-		PHYSADDRLO(pa) &= ~PCI32ADDR_HIGH;
+-
+-		if (direction == DMA_TX) {
+-			W_REG(&di->d64txregs->addrlow,
+-			      (PHYSADDRLO(pa) + di->ddoffsetlow));
+-			W_REG(&di->d64txregs->addrhigh,
+-			      di->ddoffsethigh);
+-			SET_REG(&di->d64txregs->control,
+-				D64_XC_AE, (ae << D64_XC_AE_SHIFT));
+-		} else {
+-			W_REG(&di->d64rxregs->addrlow,
+-			      (PHYSADDRLO(pa) + di->ddoffsetlow));
+-			W_REG(&di->d64rxregs->addrhigh,
+-			      di->ddoffsethigh);
+-			SET_REG(&di->d64rxregs->control,
+-				D64_RC_AE, (ae << D64_RC_AE_SHIFT));
+-		}
+-	}
+-}
+-
+-static void _dma_fifoloopbackenable(dma_info_t *di)
+-{
+-	DMA_TRACE(("%s: dma_fifoloopbackenable\n", di->name));
+-
+-	OR_REG(&di->d64txregs->control, D64_XC_LE);
+-}
+-
+-static void _dma_rxinit(dma_info_t *di)
+-{
+-	DMA_TRACE(("%s: dma_rxinit\n", di->name));
+-
+-	if (di->nrxd == 0)
+-		return;
+-
+-	di->rxin = di->rxout = 0;
+-
+-	/* clear rx descriptor ring */
+-	memset((void *)di->rxd64, '\0',
+-		(di->nrxd * sizeof(dma64dd_t)));
+-
+-	/* DMA engine with out alignment requirement requires table to be inited
+-	 * before enabling the engine
+-	 */
+-	if (!di->aligndesc_4k)
+-		_dma_ddtable_init(di, DMA_RX, di->rxdpa);
+-
+-	_dma_rxenable(di);
+-
+-	if (di->aligndesc_4k)
+-		_dma_ddtable_init(di, DMA_RX, di->rxdpa);
+-}
+-
+-static void _dma_rxenable(dma_info_t *di)
+-{
+-	uint dmactrlflags = di->hnddma.dmactrlflags;
+-	u32 control;
+-
+-	DMA_TRACE(("%s: dma_rxenable\n", di->name));
+-
+-	control =
+-	    (R_REG(&di->d64rxregs->control) & D64_RC_AE) |
+-	    D64_RC_RE;
+-
+-	if ((dmactrlflags & DMA_CTRL_PEN) == 0)
+-		control |= D64_RC_PD;
+-
+-	if (dmactrlflags & DMA_CTRL_ROC)
+-		control |= D64_RC_OC;
+-
+-	W_REG(&di->d64rxregs->control,
+-		((di->rxoffset << D64_RC_RO_SHIFT) | control));
+-}
+-
+-static void
+-_dma_rx_param_get(dma_info_t *di, u16 *rxoffset, u16 *rxbufsize)
+-{
+-	/* the normal values fit into 16 bits */
+-	*rxoffset = (u16) di->rxoffset;
+-	*rxbufsize = (u16) di->rxbufsize;
+-}
+-
+-/* !! rx entry routine
+- * returns a pointer to the next frame received, or NULL if there are no more
+- *   if DMA_CTRL_RXMULTI is defined, DMA scattering(multiple buffers) is supported
+- *      with pkts chain
+- *   otherwise, it's treated as giant pkt and will be tossed.
+- *   The DMA scattering starts with normal DMA header, followed by first buffer data.
+- *   After it reaches the max size of buffer, the data continues in next DMA descriptor
+- *   buffer WITHOUT DMA header
+- */
+-static void *_dma_rx(dma_info_t *di)
+-{
+-	struct sk_buff *p, *head, *tail;
+-	uint len;
+-	uint pkt_len;
+-	int resid = 0;
+-
+- next_frame:
+-	head = _dma_getnextrxp(di, false);
+-	if (head == NULL)
+-		return NULL;
+-
+-	len = le16_to_cpu(*(u16 *) (head->data));
+-	DMA_TRACE(("%s: dma_rx len %d\n", di->name, len));
+-	dma_spin_for_len(len, head);
+-
+-	/* set actual length */
+-	pkt_len = min((di->rxoffset + len), di->rxbufsize);
+-	__skb_trim(head, pkt_len);
+-	resid = len - (di->rxbufsize - di->rxoffset);
+-
+-	/* check for single or multi-buffer rx */
+-	if (resid > 0) {
+-		tail = head;
+-		while ((resid > 0) && (p = _dma_getnextrxp(di, false))) {
+-			tail->next = p;
+-			pkt_len = min(resid, (int)di->rxbufsize);
+-			__skb_trim(p, pkt_len);
+-
+-			tail = p;
+-			resid -= di->rxbufsize;
+-		}
+-
+-#ifdef BCMDBG
+-		if (resid > 0) {
+-			uint cur;
+-			cur =
+-			    B2I(((R_REG(&di->d64rxregs->status0) &
+-				  D64_RS0_CD_MASK) -
+-				 di->rcvptrbase) & D64_RS0_CD_MASK,
+-				dma64dd_t);
+-			DMA_ERROR(("_dma_rx, rxin %d rxout %d, hw_curr %d\n",
+-				   di->rxin, di->rxout, cur));
+-		}
+-#endif				/* BCMDBG */
+-
+-		if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) {
+-			DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n",
+-				   di->name, len));
+-			bcm_pkt_buf_free_skb(head);
+-			di->hnddma.rxgiants++;
+-			goto next_frame;
+-		}
+-	}
+-
+-	return head;
+-}
+-
+-/* post receive buffers
+- *  return false is refill failed completely and ring is empty
+- *  this will stall the rx dma and user might want to call rxfill again asap
+- *  This unlikely happens on memory-rich NIC, but often on memory-constrained dongle
+- */
+-static bool _dma_rxfill(dma_info_t *di)
+-{
+-	struct sk_buff *p;
+-	u16 rxin, rxout;
+-	u32 flags = 0;
+-	uint n;
+-	uint i;
+-	dmaaddr_t pa;
+-	uint extra_offset = 0;
+-	bool ring_empty;
+-
+-	ring_empty = false;
+-
+-	/*
+-	 * Determine how many receive buffers we're lacking
+-	 * from the full complement, allocate, initialize,
+-	 * and post them, then update the chip rx lastdscr.
+-	 */
+-
+-	rxin = di->rxin;
+-	rxout = di->rxout;
+-
+-	n = di->nrxpost - NRXDACTIVE(rxin, rxout);
+-
+-	DMA_TRACE(("%s: dma_rxfill: post %d\n", di->name, n));
+-
+-	if (di->rxbufsize > BCMEXTRAHDROOM)
+-		extra_offset = di->rxextrahdrroom;
+-
+-	for (i = 0; i < n; i++) {
+-		/* the di->rxbufsize doesn't include the extra headroom, we need to add it to the
+-		   size to be allocated
+-		 */
+-
+-		p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset);
+-
+-		if (p == NULL) {
+-			DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n",
+-				   di->name));
+-			if (i == 0 && dma64_rxidle(di)) {
+-				DMA_ERROR(("%s: rxfill64: ring is empty !\n",
+-					   di->name));
+-				ring_empty = true;
+-			}
+-			di->hnddma.rxnobuf++;
+-			break;
+-		}
+-		/* reserve an extra headroom, if applicable */
+-		if (extra_offset)
+-			skb_pull(p, extra_offset);
+-
+-		/* Do a cached write instead of uncached write since DMA_MAP
+-		 * will flush the cache.
+-		 */
+-		*(u32 *) (p->data) = 0;
+-
+-		if (DMASGLIST_ENAB)
+-			memset(&di->rxp_dmah[rxout], 0,
+-				sizeof(hnddma_seg_map_t));
+-
+-		pa = pci_map_single(di->pbus, p->data,
+-			di->rxbufsize, PCI_DMA_FROMDEVICE);
+-
+-		/* save the free packet pointer */
+-		di->rxp[rxout] = p;
+-
+-		/* reset flags for each descriptor */
+-		flags = 0;
+-		if (rxout == (di->nrxd - 1))
+-			flags = D64_CTRL1_EOT;
+-
+-		dma64_dd_upd(di, di->rxd64, pa, rxout, &flags,
+-			     di->rxbufsize);
+-		rxout = NEXTRXD(rxout);
+-	}
+-
+-	di->rxout = rxout;
+-
+-	/* update the chip lastdscr pointer */
+-	W_REG(&di->d64rxregs->ptr,
+-	      di->rcvptrbase + I2B(rxout, dma64dd_t));
+-
+-	return ring_empty;
+-}
+-
+-/* like getnexttxp but no reclaim */
+-static void *_dma_peeknexttxp(dma_info_t *di)
+-{
+-	uint end, i;
+-
+-	if (di->ntxd == 0)
+-		return NULL;
+-
+-	end =
+-	    B2I(((R_REG(&di->d64txregs->status0) &
+-		  D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK,
+-		  dma64dd_t);
+-
+-	for (i = di->txin; i != end; i = NEXTTXD(i))
+-		if (di->txp[i])
+-			return di->txp[i];
+-
+-	return NULL;
+-}
+-
+-/* like getnextrxp but not take off the ring */
+-static void *_dma_peeknextrxp(dma_info_t *di)
+-{
+-	uint end, i;
+-
+-	if (di->nrxd == 0)
+-		return NULL;
+-
+-	end =
+-	    B2I(((R_REG(&di->d64rxregs->status0) &
+-		  D64_RS0_CD_MASK) - di->rcvptrbase) & D64_RS0_CD_MASK,
+-		  dma64dd_t);
+-
+-	for (i = di->rxin; i != end; i = NEXTRXD(i))
+-		if (di->rxp[i])
+-			return di->rxp[i];
+-
+-	return NULL;
+-}
+-
+-static void _dma_rxreclaim(dma_info_t *di)
+-{
+-	void *p;
+-
+-	DMA_TRACE(("%s: dma_rxreclaim\n", di->name));
+-
+-	while ((p = _dma_getnextrxp(di, true)))
+-		bcm_pkt_buf_free_skb(p);
+-}
+-
+-static void *_dma_getnextrxp(dma_info_t *di, bool forceall)
+-{
+-	if (di->nrxd == 0)
+-		return NULL;
+-
+-	return dma64_getnextrxp(di, forceall);
+-}
+-
+-static void _dma_txblock(dma_info_t *di)
+-{
+-	di->hnddma.txavail = 0;
+-}
+-
+-static void _dma_txunblock(dma_info_t *di)
+-{
+-	di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+-}
+-
+-static uint _dma_txactive(dma_info_t *di)
+-{
+-	return NTXDACTIVE(di->txin, di->txout);
+-}
+-
+-static uint _dma_txpending(dma_info_t *di)
+-{
+-	uint curr;
+-
+-	curr =
+-	    B2I(((R_REG(&di->d64txregs->status0) &
+-		  D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK,
+-		  dma64dd_t);
+-
+-	return NTXDACTIVE(curr, di->txout);
+-}
+-
+-static uint _dma_txcommitted(dma_info_t *di)
+-{
+-	uint ptr;
+-	uint txin = di->txin;
+-
+-	if (txin == di->txout)
+-		return 0;
+-
+-	ptr = B2I(R_REG(&di->d64txregs->ptr), dma64dd_t);
+-
+-	return NTXDACTIVE(di->txin, ptr);
+-}
+-
+-static uint _dma_rxactive(dma_info_t *di)
+-{
+-	return NRXDACTIVE(di->rxin, di->rxout);
+-}
+-
+-static void _dma_counterreset(dma_info_t *di)
+-{
+-	/* reset all software counter */
+-	di->hnddma.rxgiants = 0;
+-	di->hnddma.rxnobuf = 0;
+-	di->hnddma.txnobuf = 0;
+-}
+-
+-static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags)
+-{
+-	uint dmactrlflags = di->hnddma.dmactrlflags;
+-
+-	if (di == NULL) {
+-		DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name));
+-		return 0;
+-	}
+-
+-	dmactrlflags &= ~mask;
+-	dmactrlflags |= flags;
+-
+-	/* If trying to enable parity, check if parity is actually supported */
+-	if (dmactrlflags & DMA_CTRL_PEN) {
+-		u32 control;
+-
+-		control = R_REG(&di->d64txregs->control);
+-		W_REG(&di->d64txregs->control,
+-		      control | D64_XC_PD);
+-		if (R_REG(&di->d64txregs->control) & D64_XC_PD) {
+-			/* We *can* disable it so it is supported,
+-			 * restore control register
+-			 */
+-			W_REG(&di->d64txregs->control,
+-			control);
+-		} else {
+-			/* Not supported, don't allow it to be enabled */
+-			dmactrlflags &= ~DMA_CTRL_PEN;
+-		}
+-	}
+-
+-	di->hnddma.dmactrlflags = dmactrlflags;
+-
+-	return dmactrlflags;
+-}
+-
+-/* get the address of the var in order to change later */
+-static unsigned long _dma_getvar(dma_info_t *di, const char *name)
+-{
+-	if (!strcmp(name, "&txavail"))
+-		return (unsigned long)&(di->hnddma.txavail);
+-	return 0;
+-}
+-
+-static
+-u8 dma_align_sizetobits(uint size)
+-{
+-	u8 bitpos = 0;
+-	while (size >>= 1) {
+-		bitpos++;
+-	}
+-	return bitpos;
+-}
+-
+-/* This function ensures that the DMA descriptor ring will not get allocated
+- * across Page boundary. If the allocation is done across the page boundary
+- * at the first time, then it is freed and the allocation is done at
+- * descriptor ring size aligned location. This will ensure that the ring will
+- * not cross page boundary
+- */
+-static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size,
+-			   u16 *alignbits, uint *alloced,
+-			   dmaaddr_t *descpa)
+-{
+-	void *va;
+-	u32 desc_strtaddr;
+-	u32 alignbytes = 1 << *alignbits;
+-
+-	va = dma_alloc_consistent(di->pbus, size, *alignbits, alloced, descpa);
+-
+-	if (NULL == va)
+-		return NULL;
+-
+-	desc_strtaddr = (u32) roundup((unsigned long)va, alignbytes);
+-	if (((desc_strtaddr + size - 1) & boundary) != (desc_strtaddr
+-							& boundary)) {
+-		*alignbits = dma_align_sizetobits(size);
+-		pci_free_consistent(di->pbus, size, va, *descpa);
+-		va = dma_alloc_consistent(di->pbus, size, *alignbits,
+-			alloced, descpa);
+-	}
+-	return va;
+-}
+-
+-/* 64-bit DMA functions */
+-
+-static void dma64_txinit(dma_info_t *di)
+-{
+-	u32 control = D64_XC_XE;
+-
+-	DMA_TRACE(("%s: dma_txinit\n", di->name));
+-
+-	if (di->ntxd == 0)
+-		return;
+-
+-	di->txin = di->txout = 0;
+-	di->hnddma.txavail = di->ntxd - 1;
+-
+-	/* clear tx descriptor ring */
+-	memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t)));
+-
+-	/* DMA engine with out alignment requirement requires table to be inited
+-	 * before enabling the engine
+-	 */
+-	if (!di->aligndesc_4k)
+-		_dma_ddtable_init(di, DMA_TX, di->txdpa);
+-
+-	if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0)
+-		control |= D64_XC_PD;
+-	OR_REG(&di->d64txregs->control, control);
+-
+-	/* DMA engine with alignment requirement requires table to be inited
+-	 * before enabling the engine
+-	 */
+-	if (di->aligndesc_4k)
+-		_dma_ddtable_init(di, DMA_TX, di->txdpa);
+-}
+-
+-static bool dma64_txenabled(dma_info_t *di)
+-{
+-	u32 xc;
+-
+-	/* If the chip is dead, it is not enabled :-) */
+-	xc = R_REG(&di->d64txregs->control);
+-	return (xc != 0xffffffff) && (xc & D64_XC_XE);
+-}
+-
+-static void dma64_txsuspend(dma_info_t *di)
+-{
+-	DMA_TRACE(("%s: dma_txsuspend\n", di->name));
+-
+-	if (di->ntxd == 0)
+-		return;
+-
+-	OR_REG(&di->d64txregs->control, D64_XC_SE);
+-}
+-
+-static void dma64_txresume(dma_info_t *di)
+-{
+-	DMA_TRACE(("%s: dma_txresume\n", di->name));
+-
+-	if (di->ntxd == 0)
+-		return;
+-
+-	AND_REG(&di->d64txregs->control, ~D64_XC_SE);
+-}
+-
+-static bool dma64_txsuspended(dma_info_t *di)
+-{
+-	return (di->ntxd == 0) ||
+-	    ((R_REG(&di->d64txregs->control) & D64_XC_SE) ==
+-	     D64_XC_SE);
+-}
+-
+-static void dma64_txreclaim(dma_info_t *di, txd_range_t range)
+-{
+-	void *p;
+-
+-	DMA_TRACE(("%s: dma_txreclaim %s\n", di->name,
+-		   (range == HNDDMA_RANGE_ALL) ? "all" :
+-		   ((range ==
+-		     HNDDMA_RANGE_TRANSMITTED) ? "transmitted" :
+-		    "transferred")));
+-
+-	if (di->txin == di->txout)
+-		return;
+-
+-	while ((p = dma64_getnexttxp(di, range))) {
+-		/* For unframed data, we don't have any packets to free */
+-		if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED))
+-			bcm_pkt_buf_free_skb(p);
+-	}
+-}
+-
+-static bool dma64_txstopped(dma_info_t *di)
+-{
+-	return ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) ==
+-		D64_XS0_XS_STOPPED);
+-}
+-
+-static bool dma64_rxstopped(dma_info_t *di)
+-{
+-	return ((R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK) ==
+-		D64_RS0_RS_STOPPED);
+-}
+-
+-static bool dma64_alloc(dma_info_t *di, uint direction)
+-{
+-	u16 size;
+-	uint ddlen;
+-	void *va;
+-	uint alloced = 0;
+-	u16 align;
+-	u16 align_bits;
+-
+-	ddlen = sizeof(dma64dd_t);
+-
+-	size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen);
+-	align_bits = di->dmadesc_align;
+-	align = (1 << align_bits);
+-
+-	if (direction == DMA_TX) {
+-		va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits,
+-			&alloced, &di->txdpaorig);
+-		if (va == NULL) {
+-			DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(ntxd) failed\n", di->name));
+-			return false;
+-		}
+-		align = (1 << align_bits);
+-		di->txd64 = (dma64dd_t *) roundup((unsigned long)va, align);
+-		di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va);
+-		PHYSADDRLOSET(di->txdpa,
+-			      PHYSADDRLO(di->txdpaorig) + di->txdalign);
+-		PHYSADDRHISET(di->txdpa, PHYSADDRHI(di->txdpaorig));
+-		di->txdalloc = alloced;
+-	} else {
+-		va = dma_ringalloc(di, D64RINGALIGN, size, &align_bits,
+-			&alloced, &di->rxdpaorig);
+-		if (va == NULL) {
+-			DMA_ERROR(("%s: dma64_alloc: DMA_ALLOC_CONSISTENT(nrxd) failed\n", di->name));
+-			return false;
+-		}
+-		align = (1 << align_bits);
+-		di->rxd64 = (dma64dd_t *) roundup((unsigned long)va, align);
+-		di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va);
+-		PHYSADDRLOSET(di->rxdpa,
+-			      PHYSADDRLO(di->rxdpaorig) + di->rxdalign);
+-		PHYSADDRHISET(di->rxdpa, PHYSADDRHI(di->rxdpaorig));
+-		di->rxdalloc = alloced;
+-	}
+-
+-	return true;
+-}
+-
+-static bool dma64_txreset(dma_info_t *di)
+-{
+-	u32 status;
+-
+-	if (di->ntxd == 0)
+-		return true;
+-
+-	/* suspend tx DMA first */
+-	W_REG(&di->d64txregs->control, D64_XC_SE);
+-	SPINWAIT(((status =
+-		   (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK))
+-		  != D64_XS0_XS_DISABLED) && (status != D64_XS0_XS_IDLE)
+-		 && (status != D64_XS0_XS_STOPPED), 10000);
+-
+-	W_REG(&di->d64txregs->control, 0);
+-	SPINWAIT(((status =
+-		   (R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK))
+-		  != D64_XS0_XS_DISABLED), 10000);
+-
+-	/* wait for the last transaction to complete */
+-	udelay(300);
+-
+-	return status == D64_XS0_XS_DISABLED;
+-}
+-
+-static bool dma64_rxidle(dma_info_t *di)
+-{
+-	DMA_TRACE(("%s: dma_rxidle\n", di->name));
+-
+-	if (di->nrxd == 0)
+-		return true;
+-
+-	return ((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) ==
+-		(R_REG(&di->d64rxregs->ptr) & D64_RS0_CD_MASK));
+-}
+-
+-static bool dma64_rxreset(dma_info_t *di)
+-{
+-	u32 status;
+-
+-	if (di->nrxd == 0)
+-		return true;
+-
+-	W_REG(&di->d64rxregs->control, 0);
+-	SPINWAIT(((status =
+-		   (R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK))
+-		  != D64_RS0_RS_DISABLED), 10000);
+-
+-	return status == D64_RS0_RS_DISABLED;
+-}
+-
+-static bool dma64_rxenabled(dma_info_t *di)
+-{
+-	u32 rc;
+-
+-	rc = R_REG(&di->d64rxregs->control);
+-	return (rc != 0xffffffff) && (rc & D64_RC_RE);
+-}
+-
+-static bool dma64_txsuspendedidle(dma_info_t *di)
+-{
+-
+-	if (di->ntxd == 0)
+-		return true;
+-
+-	if (!(R_REG(&di->d64txregs->control) & D64_XC_SE))
+-		return 0;
+-
+-	if ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) ==
+-	    D64_XS0_XS_IDLE)
+-		return 1;
+-
+-	return 0;
+-}
+-
+-/* Useful when sending unframed data.  This allows us to get a progress report from the DMA.
+- * We return a pointer to the beginning of the DATA buffer of the current descriptor.
+- * If DMA is idle, we return NULL.
+- */
+-static void *dma64_getpos(dma_info_t *di, bool direction)
+-{
+-	void *va;
+-	bool idle;
+-	u32 cd_offset;
+-
+-	if (direction == DMA_TX) {
+-		cd_offset =
+-		    R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK;
+-		idle = !NTXDACTIVE(di->txin, di->txout);
+-		va = di->txp[B2I(cd_offset, dma64dd_t)];
+-	} else {
+-		cd_offset =
+-		    R_REG(&di->d64rxregs->status0) & D64_XS0_CD_MASK;
+-		idle = !NRXDACTIVE(di->rxin, di->rxout);
+-		va = di->rxp[B2I(cd_offset, dma64dd_t)];
+-	}
+-
+-	/* If DMA is IDLE, return NULL */
+-	if (idle) {
+-		DMA_TRACE(("%s: DMA idle, return NULL\n", __func__));
+-		va = NULL;
+-	}
+-
+-	return va;
+-}
+-
+-/* TX of unframed data
+- *
+- * Adds a DMA ring descriptor for the data pointed to by "buf".
+- * This is for DMA of a buffer of data and is unlike other hnddma TX functions
+- * that take a pointer to a "packet"
+- * Each call to this is results in a single descriptor being added for "len" bytes of
+- * data starting at "buf", it doesn't handle chained buffers.
+- */
+-static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit)
+-{
+-	u16 txout;
+-	u32 flags = 0;
+-	dmaaddr_t pa;		/* phys addr */
+-
+-	txout = di->txout;
+-
+-	/* return nonzero if out of tx descriptors */
+-	if (NEXTTXD(txout) == di->txin)
+-		goto outoftxd;
+-
+-	if (len == 0)
+-		return 0;
+-
+-	pa = pci_map_single(di->pbus, buf, len, PCI_DMA_TODEVICE);
+-
+-	flags = (D64_CTRL1_SOF | D64_CTRL1_IOC | D64_CTRL1_EOF);
+-
+-	if (txout == (di->ntxd - 1))
+-		flags |= D64_CTRL1_EOT;
+-
+-	dma64_dd_upd(di, di->txd64, pa, txout, &flags, len);
+-
+-	/* save the buffer pointer - used by dma_getpos */
+-	di->txp[txout] = buf;
+-
+-	txout = NEXTTXD(txout);
+-	/* bump the tx descriptor index */
+-	di->txout = txout;
+-
+-	/* kick the chip */
+-	if (commit) {
+-		W_REG(&di->d64txregs->ptr,
+-		      di->xmtptrbase + I2B(txout, dma64dd_t));
+-	}
+-
+-	/* tx flow control */
+-	di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+-
+-	return 0;
+-
+- outoftxd:
+-	DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__));
+-	di->hnddma.txavail = 0;
+-	di->hnddma.txnobuf++;
+-	return -1;
+-}
+-
+-/* !! tx entry routine
+- * WARNING: call must check the return value for error.
+- *   the error(toss frames) could be fatal and cause many subsequent hard to debug problems
+- */
+-static int dma64_txfast(dma_info_t *di, struct sk_buff *p0,
+-				    bool commit)
+-{
+-	struct sk_buff *p, *next;
+-	unsigned char *data;
+-	uint len;
+-	u16 txout;
+-	u32 flags = 0;
+-	dmaaddr_t pa;
+-
+-	DMA_TRACE(("%s: dma_txfast\n", di->name));
+-
+-	txout = di->txout;
+-
+-	/*
+-	 * Walk the chain of packet buffers
+-	 * allocating and initializing transmit descriptor entries.
+-	 */
+-	for (p = p0; p; p = next) {
+-		uint nsegs, j;
+-		hnddma_seg_map_t *map;
+-
+-		data = p->data;
+-		len = p->len;
+-		next = p->next;
+-
+-		/* return nonzero if out of tx descriptors */
+-		if (NEXTTXD(txout) == di->txin)
+-			goto outoftxd;
+-
+-		if (len == 0)
+-			continue;
+-
+-		/* get physical address of buffer start */
+-		if (DMASGLIST_ENAB)
+-			memset(&di->txp_dmah[txout], 0,
+-				sizeof(hnddma_seg_map_t));
+-
+-		pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE);
+-
+-		if (DMASGLIST_ENAB) {
+-			map = &di->txp_dmah[txout];
+-
+-			/* See if all the segments can be accounted for */
+-			if (map->nsegs >
+-			    (uint) (di->ntxd - NTXDACTIVE(di->txin, di->txout) -
+-				    1))
+-				goto outoftxd;
+-
+-			nsegs = map->nsegs;
+-		} else
+-			nsegs = 1;
+-
+-		for (j = 1; j <= nsegs; j++) {
+-			flags = 0;
+-			if (p == p0 && j == 1)
+-				flags |= D64_CTRL1_SOF;
+-
+-			/* With a DMA segment list, Descriptor table is filled
+-			 * using the segment list instead of looping over
+-			 * buffers in multi-chain DMA. Therefore, EOF for SGLIST is when
+-			 * end of segment list is reached.
+-			 */
+-			if ((!DMASGLIST_ENAB && next == NULL) ||
+-			    (DMASGLIST_ENAB && j == nsegs))
+-				flags |= (D64_CTRL1_IOC | D64_CTRL1_EOF);
+-			if (txout == (di->ntxd - 1))
+-				flags |= D64_CTRL1_EOT;
+-
+-			if (DMASGLIST_ENAB) {
+-				len = map->segs[j - 1].length;
+-				pa = map->segs[j - 1].addr;
+-			}
+-			dma64_dd_upd(di, di->txd64, pa, txout, &flags, len);
+-
+-			txout = NEXTTXD(txout);
+-		}
+-
+-		/* See above. No need to loop over individual buffers */
+-		if (DMASGLIST_ENAB)
+-			break;
+-	}
+-
+-	/* if last txd eof not set, fix it */
+-	if (!(flags & D64_CTRL1_EOF))
+-		W_SM(&di->txd64[PREVTXD(txout)].ctrl1,
+-		     BUS_SWAP32(flags | D64_CTRL1_IOC | D64_CTRL1_EOF));
+-
+-	/* save the packet */
+-	di->txp[PREVTXD(txout)] = p0;
+-
+-	/* bump the tx descriptor index */
+-	di->txout = txout;
+-
+-	/* kick the chip */
+-	if (commit)
+-		W_REG(&di->d64txregs->ptr,
+-		      di->xmtptrbase + I2B(txout, dma64dd_t));
+-
+-	/* tx flow control */
+-	di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+-
+-	return 0;
+-
+- outoftxd:
+-	DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name));
+-	bcm_pkt_buf_free_skb(p0);
+-	di->hnddma.txavail = 0;
+-	di->hnddma.txnobuf++;
+-	return -1;
+-}
+-
+-/*
+- * Reclaim next completed txd (txds if using chained buffers) in the range
+- * specified and return associated packet.
+- * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be
+- * transmitted as noted by the hardware "CurrDescr" pointer.
+- * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be
+- * transferred by the DMA as noted by the hardware "ActiveDescr" pointer.
+- * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and
+- * return associated packet regardless of the value of hardware pointers.
+- */
+-static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range)
+-{
+-	u16 start, end, i;
+-	u16 active_desc;
+-	void *txp;
+-
+-	DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name,
+-		   (range == HNDDMA_RANGE_ALL) ? "all" :
+-		   ((range ==
+-		     HNDDMA_RANGE_TRANSMITTED) ? "transmitted" :
+-		    "transferred")));
+-
+-	if (di->ntxd == 0)
+-		return NULL;
+-
+-	txp = NULL;
+-
+-	start = di->txin;
+-	if (range == HNDDMA_RANGE_ALL)
+-		end = di->txout;
+-	else {
+-		dma64regs_t *dregs = di->d64txregs;
+-
+-		end =
+-		    (u16) (B2I
+-			      (((R_REG(&dregs->status0) &
+-				 D64_XS0_CD_MASK) -
+-				di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t));
+-
+-		if (range == HNDDMA_RANGE_TRANSFERED) {
+-			active_desc =
+-			    (u16) (R_REG(&dregs->status1) &
+-				      D64_XS1_AD_MASK);
+-			active_desc =
+-			    (active_desc - di->xmtptrbase) & D64_XS0_CD_MASK;
+-			active_desc = B2I(active_desc, dma64dd_t);
+-			if (end != active_desc)
+-				end = PREVTXD(active_desc);
+-		}
+-	}
+-
+-	if ((start == 0) && (end > di->txout))
+-		goto bogus;
+-
+-	for (i = start; i != end && !txp; i = NEXTTXD(i)) {
+-		dmaaddr_t pa;
+-		hnddma_seg_map_t *map = NULL;
+-		uint size, j, nsegs;
+-
+-		PHYSADDRLOSET(pa,
+-			      (BUS_SWAP32(R_SM(&di->txd64[i].addrlow)) -
+-			       di->dataoffsetlow));
+-		PHYSADDRHISET(pa,
+-			      (BUS_SWAP32(R_SM(&di->txd64[i].addrhigh)) -
+-			       di->dataoffsethigh));
+-
+-		if (DMASGLIST_ENAB) {
+-			map = &di->txp_dmah[i];
+-			size = map->origsize;
+-			nsegs = map->nsegs;
+-		} else {
+-			size =
+-			    (BUS_SWAP32(R_SM(&di->txd64[i].ctrl2)) &
+-			     D64_CTRL2_BC_MASK);
+-			nsegs = 1;
+-		}
+-
+-		for (j = nsegs; j > 0; j--) {
+-			W_SM(&di->txd64[i].addrlow, 0xdeadbeef);
+-			W_SM(&di->txd64[i].addrhigh, 0xdeadbeef);
+-
+-			txp = di->txp[i];
+-			di->txp[i] = NULL;
+-			if (j > 1)
+-				i = NEXTTXD(i);
+-		}
+-
+-		pci_unmap_single(di->pbus, pa, size, PCI_DMA_TODEVICE);
+-	}
+-
+-	di->txin = i;
+-
+-	/* tx flow control */
+-	di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+-
+-	return txp;
+-
+- bogus:
+-	DMA_NONE(("dma_getnexttxp: bogus curr: start %d end %d txout %d force %d\n", start, end, di->txout, forceall));
+-	return NULL;
+-}
+-
+-static void *dma64_getnextrxp(dma_info_t *di, bool forceall)
+-{
+-	uint i, curr;
+-	void *rxp;
+-	dmaaddr_t pa;
+-
+-	i = di->rxin;
+-
+-	/* return if no packets posted */
+-	if (i == di->rxout)
+-		return NULL;
+-
+-	curr =
+-	    B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) -
+-		 di->rcvptrbase) & D64_RS0_CD_MASK, dma64dd_t);
+-
+-	/* ignore curr if forceall */
+-	if (!forceall && (i == curr))
+-		return NULL;
+-
+-	/* get the packet pointer that corresponds to the rx descriptor */
+-	rxp = di->rxp[i];
+-	di->rxp[i] = NULL;
+-
+-	PHYSADDRLOSET(pa,
+-		      (BUS_SWAP32(R_SM(&di->rxd64[i].addrlow)) -
+-		       di->dataoffsetlow));
+-	PHYSADDRHISET(pa,
+-		      (BUS_SWAP32(R_SM(&di->rxd64[i].addrhigh)) -
+-		       di->dataoffsethigh));
+-
+-	/* clear this packet from the descriptor ring */
+-	pci_unmap_single(di->pbus, pa, di->rxbufsize, PCI_DMA_FROMDEVICE);
+-
+-	W_SM(&di->rxd64[i].addrlow, 0xdeadbeef);
+-	W_SM(&di->rxd64[i].addrhigh, 0xdeadbeef);
+-
+-	di->rxin = NEXTRXD(i);
+-
+-	return rxp;
+-}
+-
+-static bool _dma64_addrext(dma64regs_t *dma64regs)
+-{
+-	u32 w;
+-	OR_REG(&dma64regs->control, D64_XC_AE);
+-	w = R_REG(&dma64regs->control);
+-	AND_REG(&dma64regs->control, ~D64_XC_AE);
+-	return (w & D64_XC_AE) == D64_XC_AE;
+-}
+-
+-/*
+- * Rotate all active tx dma ring entries "forward" by (ActiveDescriptor - txin).
+- */
+-static void dma64_txrotate(dma_info_t *di)
+-{
+-	u16 ad;
+-	uint nactive;
+-	uint rot;
+-	u16 old, new;
+-	u32 w;
+-	u16 first, last;
+-
+-	nactive = _dma_txactive(di);
+-	ad = (u16) (B2I
+-		       ((((R_REG(&di->d64txregs->status1) &
+-			   D64_XS1_AD_MASK)
+-			  - di->xmtptrbase) & D64_XS1_AD_MASK), dma64dd_t));
+-	rot = TXD(ad - di->txin);
+-
+-	/* full-ring case is a lot harder - don't worry about this */
+-	if (rot >= (di->ntxd - nactive)) {
+-		DMA_ERROR(("%s: dma_txrotate: ring full - punt\n", di->name));
+-		return;
+-	}
+-
+-	first = di->txin;
+-	last = PREVTXD(di->txout);
+-
+-	/* move entries starting at last and moving backwards to first */
+-	for (old = last; old != PREVTXD(first); old = PREVTXD(old)) {
+-		new = TXD(old + rot);
+-
+-		/*
+-		 * Move the tx dma descriptor.
+-		 * EOT is set only in the last entry in the ring.
+-		 */
+-		w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl1)) & ~D64_CTRL1_EOT;
+-		if (new == (di->ntxd - 1))
+-			w |= D64_CTRL1_EOT;
+-		W_SM(&di->txd64[new].ctrl1, BUS_SWAP32(w));
+-
+-		w = BUS_SWAP32(R_SM(&di->txd64[old].ctrl2));
+-		W_SM(&di->txd64[new].ctrl2, BUS_SWAP32(w));
+-
+-		W_SM(&di->txd64[new].addrlow, R_SM(&di->txd64[old].addrlow));
+-		W_SM(&di->txd64[new].addrhigh, R_SM(&di->txd64[old].addrhigh));
+-
+-		/* zap the old tx dma descriptor address field */
+-		W_SM(&di->txd64[old].addrlow, BUS_SWAP32(0xdeadbeef));
+-		W_SM(&di->txd64[old].addrhigh, BUS_SWAP32(0xdeadbeef));
+-
+-		/* move the corresponding txp[] entry */
+-		di->txp[new] = di->txp[old];
+-
+-		/* Move the map */
+-		if (DMASGLIST_ENAB) {
+-			memcpy(&di->txp_dmah[new], &di->txp_dmah[old],
+-			       sizeof(hnddma_seg_map_t));
+-			memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t));
+-		}
+-
+-		di->txp[old] = NULL;
+-	}
+-
+-	/* update txin and txout */
+-	di->txin = ad;
+-	di->txout = TXD(di->txout + rot);
+-	di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1;
+-
+-	/* kick the chip */
+-	W_REG(&di->d64txregs->ptr,
+-	      di->xmtptrbase + I2B(di->txout, dma64dd_t));
+-}
+-
+-uint dma_addrwidth(si_t *sih, void *dmaregs)
+-{
+-	/* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */
+-	/* DMA engine is 64-bit capable */
+-	if ((ai_core_sflags(sih, 0, 0) & SISF_DMA64) == SISF_DMA64) {
+-		/* backplane are 64-bit capable */
+-		if (ai_backplane64(sih))
+-			/* If bus is System Backplane or PCIE then we can access 64-bits */
+-			if ((sih->bustype == SI_BUS) ||
+-			    ((sih->bustype == PCI_BUS) &&
+-			     (sih->buscoretype == PCIE_CORE_ID)))
+-				return DMADDRWIDTH_64;
+-	}
+-	/* DMA hardware not supported by this driver*/
+-	return DMADDRWIDTH_64;
+-}
+-
+-/*
+- * Mac80211 initiated actions sometimes require packets in the DMA queue to be
+- * modified. The modified portion of the packet is not under control of the DMA
+- * engine. This function calls a caller-supplied function for each packet in
+- * the caller specified dma chain.
+- */
+-void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc)
+-		      (void *pkt, void *arg_a), void *arg_a)
+-{
+-	dma_info_t *di = (dma_info_t *) dmah;
+-	uint i =   di->txin;
+-	uint end = di->txout;
+-	struct sk_buff *skb;
+-	struct ieee80211_tx_info *tx_info;
+-
+-	while (i != end) {
+-		skb = (struct sk_buff *)di->txp[i];
+-		if (skb != NULL) {
+-			tx_info = (struct ieee80211_tx_info *)skb->cb;
+-			(callback_fnc)(tx_info, arg_a);
+-		}
+-		i = NEXTTXD(i);
+-	}
+-}
+diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c
+deleted file mode 100644
+index 18b844a..0000000
+--- a/drivers/staging/brcm80211/brcmsmac/nicpci.c
++++ /dev/null
+@@ -1,836 +0,0 @@
+-/*
+- * Copyright (c) 2010 Broadcom Corporation
+- *
+- * Permission to use, copy, modify, and/or distribute this software for any
+- * purpose with or without fee is hereby granted, provided that the above
+- * copyright notice and this permission notice appear in all copies.
+- *
+- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+- * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+- * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+- * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+- */
+-
+-#include <linux/delay.h>
+-#include <linux/string.h>
+-#include <linux/pci.h>
+-#include <bcmdefs.h>
+-#include <bcmutils.h>
+-#include <bcmnvram.h>
+-#include <aiutils.h>
+-#include <hndsoc.h>
+-#include <bcmdevs.h>
+-#include <sbchipc.h>
+-#include <pci_core.h>
+-#include <pcie_core.h>
+-#include <nicpci.h>
+-#include <pcicfg.h>
+-
+-typedef struct {
+-	union {
+-		sbpcieregs_t *pcieregs;
+-		struct sbpciregs *pciregs;
+-	} regs;			/* Memory mapped register to the core */
+-
+-	si_t *sih;		/* System interconnect handle */
+-	struct pci_dev *dev;
+-	u8 pciecap_lcreg_offset;	/* PCIE capability LCreg offset in the config space */
+-	bool pcie_pr42767;
+-	u8 pcie_polarity;
+-	u8 pcie_war_aspm_ovr;	/* Override ASPM/Clkreq settings */
+-
+-	u8 pmecap_offset;	/* PM Capability offset in the config space */
+-	bool pmecap;		/* Capable of generating PME */
+-} pcicore_info_t;
+-
+-/* debug/trace */
+-#define	PCI_ERROR(args)
+-#define PCIE_PUB(sih) \
+-	(((sih)->bustype == PCI_BUS) && ((sih)->buscoretype == PCIE_CORE_ID))
+-
+-/* routines to access mdio slave device registers */
+-static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk);
+-static int pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr,
+-		       bool write, uint *val);
+-static int pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint readdr,
+-			  uint val);
+-static int pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint readdr,
+-			 uint *ret_val);
+-
+-static void pcie_extendL1timer(pcicore_info_t *pi, bool extend);
+-static void pcie_clkreq_upd(pcicore_info_t *pi, uint state);
+-
+-static void pcie_war_aspm_clkreq(pcicore_info_t *pi);
+-static void pcie_war_serdes(pcicore_info_t *pi);
+-static void pcie_war_noplldown(pcicore_info_t *pi);
+-static void pcie_war_polarity(pcicore_info_t *pi);
+-static void pcie_war_pci_setup(pcicore_info_t *pi);
+-
+-static bool pcicore_pmecap(pcicore_info_t *pi);
+-
+-#define PCIE_ASPM(sih)	((PCIE_PUB(sih)) && (((sih)->buscorerev >= 3) && ((sih)->buscorerev <= 5)))
+-
+-
+-/* delay needed between the mdio control/ mdiodata register data access */
+-#define PR28829_DELAY() udelay(10)
+-
+-/* Initialize the PCI core. It's caller's responsibility to make sure that this is done
+- * only once
+- */
+-void *pcicore_init(si_t *sih, void *pdev, void *regs)
+-{
+-	pcicore_info_t *pi;
+-
+-	/* alloc pcicore_info_t */
+-	pi = kzalloc(sizeof(pcicore_info_t), GFP_ATOMIC);
+-	if (pi == NULL) {
+-		PCI_ERROR(("pci_attach: malloc failed!\n"));
+-		return NULL;
+-	}
+-
+-	pi->sih = sih;
+-	pi->dev = pdev;
+-
+-	if (sih->buscoretype == PCIE_CORE_ID) {
+-		u8 cap_ptr;
+-		pi->regs.pcieregs = (sbpcieregs_t *) regs;
+-		cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_EXP,
+-						      NULL, NULL);
+-		pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET;
+-	} else
+-		pi->regs.pciregs = (struct sbpciregs *) regs;
+-
+-	return pi;
+-}
+-
+-void pcicore_deinit(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-
+-	if (pi == NULL)
+-		return;
+-	kfree(pi);
+-}
+-
+-/* return cap_offset if requested capability exists in the PCI config space */
+-/* Note that it's caller's responsibility to make sure it's a pci bus */
+-u8
+-pcicore_find_pci_capability(void *dev, u8 req_cap_id,
+-			    unsigned char *buf, u32 *buflen)
+-{
+-	u8 cap_id;
+-	u8 cap_ptr = 0;
+-	u32 bufsize;
+-	u8 byte_val;
+-
+-	/* check for Header type 0 */
+-	pci_read_config_byte(dev, PCI_HEADER_TYPE, &byte_val);
+-	if ((byte_val & 0x7f) != PCI_HEADER_TYPE_NORMAL)
+-		goto end;
+-
+-	/* check if the capability pointer field exists */
+-	pci_read_config_byte(dev, PCI_STATUS, &byte_val);
+-	if (!(byte_val & PCI_STATUS_CAP_LIST))
+-		goto end;
+-
+-	pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &cap_ptr);
+-	/* check if the capability pointer is 0x00 */
+-	if (cap_ptr == 0x00)
+-		goto end;
+-
+-	/* loop thr'u the capability list and see if the pcie capabilty exists */
+-
+-	pci_read_config_byte(dev, cap_ptr, &cap_id);
+-
+-	while (cap_id != req_cap_id) {
+-		pci_read_config_byte(dev, cap_ptr + 1, &cap_ptr);
+-		if (cap_ptr == 0x00)
+-			break;
+-		pci_read_config_byte(dev, cap_ptr, &cap_id);
+-	}
+-	if (cap_id != req_cap_id) {
+-		goto end;
+-	}
+-	/* found the caller requested capability */
+-	if ((buf != NULL) && (buflen != NULL)) {
+-		u8 cap_data;
+-
+-		bufsize = *buflen;
+-		if (!bufsize)
+-			goto end;
+-		*buflen = 0;
+-		/* copy the cpability data excluding cap ID and next ptr */
+-		cap_data = cap_ptr + 2;
+-		if ((bufsize + cap_data) > PCI_SZPCR)
+-			bufsize = PCI_SZPCR - cap_data;
+-		*buflen = bufsize;
+-		while (bufsize--) {
+-			pci_read_config_byte(dev, cap_data, buf);
+-			cap_data++;
+-			buf++;
+-		}
+-	}
+- end:
+-	return cap_ptr;
+-}
+-
+-/* ***** Register Access API */
+-uint
+-pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype,
+-	     uint offset)
+-{
+-	uint retval = 0xFFFFFFFF;
+-
+-	switch (addrtype) {
+-	case PCIE_CONFIGREGS:
+-		W_REG((&pcieregs->configaddr), offset);
+-		(void)R_REG((&pcieregs->configaddr));
+-		retval = R_REG(&(pcieregs->configdata));
+-		break;
+-	case PCIE_PCIEREGS:
+-		W_REG(&(pcieregs->pcieindaddr), offset);
+-		(void)R_REG((&pcieregs->pcieindaddr));
+-		retval = R_REG(&(pcieregs->pcieinddata));
+-		break;
+-	default:
+-		break;
+-	}
+-
+-	return retval;
+-}
+-
+-uint
+-pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype,
+-	      uint offset, uint val)
+-{
+-	switch (addrtype) {
+-	case PCIE_CONFIGREGS:
+-		W_REG((&pcieregs->configaddr), offset);
+-		W_REG((&pcieregs->configdata), val);
+-		break;
+-	case PCIE_PCIEREGS:
+-		W_REG((&pcieregs->pcieindaddr), offset);
+-		W_REG((&pcieregs->pcieinddata), val);
+-		break;
+-	default:
+-		break;
+-	}
+-	return 0;
+-}
+-
+-static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk)
+-{
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	uint mdiodata, i = 0;
+-	uint pcie_serdes_spinwait = 200;
+-
+-	mdiodata =
+-	    MDIODATA_START | MDIODATA_WRITE | (MDIODATA_DEV_ADDR <<
+-					       MDIODATA_DEVADDR_SHF) |
+-	    (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | MDIODATA_TA | (blk <<
+-									 4);
+-	W_REG(&pcieregs->mdiodata, mdiodata);
+-
+-	PR28829_DELAY();
+-	/* retry till the transaction is complete */
+-	while (i < pcie_serdes_spinwait) {
+-		if (R_REG(&(pcieregs->mdiocontrol)) &
+-		    MDIOCTL_ACCESS_DONE) {
+-			break;
+-		}
+-		udelay(1000);
+-		i++;
+-	}
+-
+-	if (i >= pcie_serdes_spinwait) {
+-		PCI_ERROR(("pcie_mdiosetblock: timed out\n"));
+-		return false;
+-	}
+-
+-	return true;
+-}
+-
+-static int
+-pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr, bool write,
+-	    uint *val)
+-{
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	uint mdiodata;
+-	uint i = 0;
+-	uint pcie_serdes_spinwait = 10;
+-
+-	/* enable mdio access to SERDES */
+-	W_REG((&pcieregs->mdiocontrol),
+-	      MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL);
+-
+-	if (pi->sih->buscorerev >= 10) {
+-		/* new serdes is slower in rw, using two layers of reg address mapping */
+-		if (!pcie_mdiosetblock(pi, physmedia))
+-			return 1;
+-		mdiodata = (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) |
+-		    (regaddr << MDIODATA_REGADDR_SHF);
+-		pcie_serdes_spinwait *= 20;
+-	} else {
+-		mdiodata = (physmedia << MDIODATA_DEVADDR_SHF_OLD) |
+-		    (regaddr << MDIODATA_REGADDR_SHF_OLD);
+-	}
+-
+-	if (!write)
+-		mdiodata |= (MDIODATA_START | MDIODATA_READ | MDIODATA_TA);
+-	else
+-		mdiodata |=
+-		    (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | *val);
+-
+-	W_REG(&pcieregs->mdiodata, mdiodata);
+-
+-	PR28829_DELAY();
+-
+-	/* retry till the transaction is complete */
+-	while (i < pcie_serdes_spinwait) {
+-		if (R_REG(&(pcieregs->mdiocontrol)) &
+-		    MDIOCTL_ACCESS_DONE) {
+-			if (!write) {
+-				PR28829_DELAY();
+-				*val =
+-				    (R_REG(&(pcieregs->mdiodata)) &
+-				     MDIODATA_MASK);
+-			}
+-			/* Disable mdio access to SERDES */
+-			W_REG((&pcieregs->mdiocontrol), 0);
+-			return 0;
+-		}
+-		udelay(1000);
+-		i++;
+-	}
+-
+-	PCI_ERROR(("pcie_mdioop: timed out op: %d\n", write));
+-	/* Disable mdio access to SERDES */
+-	W_REG((&pcieregs->mdiocontrol), 0);
+-	return 1;
+-}
+-
+-/* use the mdio interface to read from mdio slaves */
+-static int
+-pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint regaddr, uint *regval)
+-{
+-	return pcie_mdioop(pi, physmedia, regaddr, false, regval);
+-}
+-
+-/* use the mdio interface to write to mdio slaves */
+-static int
+-pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val)
+-{
+-	return pcie_mdioop(pi, physmedia, regaddr, true, &val);
+-}
+-
+-/* ***** Support functions ***** */
+-u8 pcie_clkreq(void *pch, u32 mask, u32 val)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u32 reg_val;
+-	u8 offset;
+-
+-	offset = pi->pciecap_lcreg_offset;
+-	if (!offset)
+-		return 0;
+-
+-	pci_read_config_dword(pi->dev, offset, &reg_val);
+-	/* set operation */
+-	if (mask) {
+-		if (val)
+-			reg_val |= PCIE_CLKREQ_ENAB;
+-		else
+-			reg_val &= ~PCIE_CLKREQ_ENAB;
+-		pci_write_config_dword(pi->dev, offset, reg_val);
+-		pci_read_config_dword(pi->dev, offset, &reg_val);
+-	}
+-	if (reg_val & PCIE_CLKREQ_ENAB)
+-		return 1;
+-	else
+-		return 0;
+-}
+-
+-static void pcie_extendL1timer(pcicore_info_t *pi, bool extend)
+-{
+-	u32 w;
+-	si_t *sih = pi->sih;
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-
+-	if (!PCIE_PUB(sih) || sih->buscorerev < 7)
+-		return;
+-
+-	w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);
+-	if (extend)
+-		w |= PCIE_ASPMTIMER_EXTEND;
+-	else
+-		w &= ~PCIE_ASPMTIMER_EXTEND;
+-	pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w);
+-	w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG);
+-}
+-
+-/* centralized clkreq control policy */
+-static void pcie_clkreq_upd(pcicore_info_t *pi, uint state)
+-{
+-	si_t *sih = pi->sih;
+-
+-	switch (state) {
+-	case SI_DOATTACH:
+-		if (PCIE_ASPM(sih))
+-			pcie_clkreq((void *)pi, 1, 0);
+-		break;
+-	case SI_PCIDOWN:
+-		if (sih->buscorerev == 6) {	/* turn on serdes PLL down */
+-			ai_corereg(sih, SI_CC_IDX,
+-				   offsetof(chipcregs_t, chipcontrol_addr), ~0,
+-				   0);
+-			ai_corereg(sih, SI_CC_IDX,
+-				   offsetof(chipcregs_t, chipcontrol_data),
+-				   ~0x40, 0);
+-		} else if (pi->pcie_pr42767) {
+-			pcie_clkreq((void *)pi, 1, 1);
+-		}
+-		break;
+-	case SI_PCIUP:
+-		if (sih->buscorerev == 6) {	/* turn off serdes PLL down */
+-			ai_corereg(sih, SI_CC_IDX,
+-				   offsetof(chipcregs_t, chipcontrol_addr), ~0,
+-				   0);
+-			ai_corereg(sih, SI_CC_IDX,
+-				   offsetof(chipcregs_t, chipcontrol_data),
+-				   ~0x40, 0x40);
+-		} else if (PCIE_ASPM(sih)) {	/* disable clkreq */
+-			pcie_clkreq((void *)pi, 1, 0);
+-		}
+-		break;
+-	default:
+-		break;
+-	}
+-}
+-
+-/* ***** PCI core WARs ***** */
+-/* Done only once at attach time */
+-static void pcie_war_polarity(pcicore_info_t *pi)
+-{
+-	u32 w;
+-
+-	if (pi->pcie_polarity != 0)
+-		return;
+-
+-	w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS,
+-			 PCIE_PLP_STATUSREG);
+-
+-	/* Detect the current polarity at attach and force that polarity and
+-	 * disable changing the polarity
+-	 */
+-	if ((w & PCIE_PLP_POLARITYINV_STAT) == 0)
+-		pi->pcie_polarity = (SERDES_RX_CTRL_FORCE);
+-	else
+-		pi->pcie_polarity =
+-		    (SERDES_RX_CTRL_FORCE | SERDES_RX_CTRL_POLARITY);
+-}
+-
+-/* enable ASPM and CLKREQ if srom doesn't have it */
+-/* Needs to happen when update to shadow SROM is needed
+- *   : Coming out of 'standby'/'hibernate'
+- *   : If pcie_war_aspm_ovr state changed
+- */
+-static void pcie_war_aspm_clkreq(pcicore_info_t *pi)
+-{
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	si_t *sih = pi->sih;
+-	u16 val16, *reg16;
+-	u32 w;
+-
+-	if (!PCIE_ASPM(sih))
+-		return;
+-
+-	/* bypass this on QT or VSIM */
+-	if (!ISSIM_ENAB(sih)) {
+-
+-		reg16 = &pcieregs->sprom[SRSH_ASPM_OFFSET];
+-		val16 = R_REG(reg16);
+-
+-		val16 &= ~SRSH_ASPM_ENB;
+-		if (pi->pcie_war_aspm_ovr == PCIE_ASPM_ENAB)
+-			val16 |= SRSH_ASPM_ENB;
+-		else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L1_ENAB)
+-			val16 |= SRSH_ASPM_L1_ENB;
+-		else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L0s_ENAB)
+-			val16 |= SRSH_ASPM_L0s_ENB;
+-
+-		W_REG(reg16, val16);
+-
+-		pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset,
+-					&w);
+-		w &= ~PCIE_ASPM_ENAB;
+-		w |= pi->pcie_war_aspm_ovr;
+-		pci_write_config_dword(pi->dev,
+-					pi->pciecap_lcreg_offset, w);
+-	}
+-
+-	reg16 = &pcieregs->sprom[SRSH_CLKREQ_OFFSET_REV5];
+-	val16 = R_REG(reg16);
+-
+-	if (pi->pcie_war_aspm_ovr != PCIE_ASPM_DISAB) {
+-		val16 |= SRSH_CLKREQ_ENB;
+-		pi->pcie_pr42767 = true;
+-	} else
+-		val16 &= ~SRSH_CLKREQ_ENB;
+-
+-	W_REG(reg16, val16);
+-}
+-
+-/* Apply the polarity determined at the start */
+-/* Needs to happen when coming out of 'standby'/'hibernate' */
+-static void pcie_war_serdes(pcicore_info_t *pi)
+-{
+-	u32 w = 0;
+-
+-	if (pi->pcie_polarity != 0)
+-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CTRL,
+-			       pi->pcie_polarity);
+-
+-	pcie_mdioread(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, &w);
+-	if (w & PLL_CTRL_FREQDET_EN) {
+-		w &= ~PLL_CTRL_FREQDET_EN;
+-		pcie_mdiowrite(pi, MDIODATA_DEV_PLL, SERDES_PLL_CTRL, w);
+-	}
+-}
+-
+-/* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */
+-/* Needs to happen when coming out of 'standby'/'hibernate' */
+-static void pcie_misc_config_fixup(pcicore_info_t *pi)
+-{
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	u16 val16, *reg16;
+-
+-	reg16 = &pcieregs->sprom[SRSH_PCIE_MISC_CONFIG];
+-	val16 = R_REG(reg16);
+-
+-	if ((val16 & SRSH_L23READY_EXIT_NOPERST) == 0) {
+-		val16 |= SRSH_L23READY_EXIT_NOPERST;
+-		W_REG(reg16, val16);
+-	}
+-}
+-
+-/* quick hack for testing */
+-/* Needs to happen when coming out of 'standby'/'hibernate' */
+-static void pcie_war_noplldown(pcicore_info_t *pi)
+-{
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	u16 *reg16;
+-
+-	/* turn off serdes PLL down */
+-	ai_corereg(pi->sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol),
+-		   CHIPCTRL_4321_PLL_DOWN, CHIPCTRL_4321_PLL_DOWN);
+-
+-	/*  clear srom shadow backdoor */
+-	reg16 = &pcieregs->sprom[SRSH_BD_OFFSET];
+-	W_REG(reg16, 0);
+-}
+-
+-/* Needs to happen when coming out of 'standby'/'hibernate' */
+-static void pcie_war_pci_setup(pcicore_info_t *pi)
+-{
+-	si_t *sih = pi->sih;
+-	sbpcieregs_t *pcieregs = pi->regs.pcieregs;
+-	u32 w;
+-
+-	if ((sih->buscorerev == 0) || (sih->buscorerev == 1)) {
+-		w = pcie_readreg(pcieregs, PCIE_PCIEREGS,
+-				 PCIE_TLP_WORKAROUNDSREG);
+-		w |= 0x8;
+-		pcie_writereg(pcieregs, PCIE_PCIEREGS,
+-			      PCIE_TLP_WORKAROUNDSREG, w);
+-	}
+-
+-	if (sih->buscorerev == 1) {
+-		w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG);
+-		w |= (0x40);
+-		pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w);
+-	}
+-
+-	if (sih->buscorerev == 0) {
+-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_TIMER1, 0x8128);
+-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDR, 0x0100);
+-		pcie_mdiowrite(pi, MDIODATA_DEV_RX, SERDES_RX_CDRBW, 0x1466);
+-	} else if (PCIE_ASPM(sih)) {
+-		/* Change the L1 threshold for better performance */
+-		w = pcie_readreg(pcieregs, PCIE_PCIEREGS,
+-				 PCIE_DLLP_PMTHRESHREG);
+-		w &= ~(PCIE_L1THRESHOLDTIME_MASK);
+-		w |= (PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT);
+-		pcie_writereg(pcieregs, PCIE_PCIEREGS,
+-			      PCIE_DLLP_PMTHRESHREG, w);
+-
+-		pcie_war_serdes(pi);
+-
+-		pcie_war_aspm_clkreq(pi);
+-	} else if (pi->sih->buscorerev == 7)
+-		pcie_war_noplldown(pi);
+-
+-	/* Note that the fix is actually in the SROM, that's why this is open-ended */
+-	if (pi->sih->buscorerev >= 6)
+-		pcie_misc_config_fixup(pi);
+-}
+-
+-void pcie_war_ovr_aspm_update(void *pch, u8 aspm)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-
+-	if (!PCIE_ASPM(pi->sih))
+-		return;
+-
+-	/* Validate */
+-	if (aspm > PCIE_ASPM_ENAB)
+-		return;
+-
+-	pi->pcie_war_aspm_ovr = aspm;
+-
+-	/* Update the current state */
+-	pcie_war_aspm_clkreq(pi);
+-}
+-
+-/* ***** Functions called during driver state changes ***** */
+-void pcicore_attach(void *pch, char *pvars, int state)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	si_t *sih = pi->sih;
+-
+-	/* Determine if this board needs override */
+-	if (PCIE_ASPM(sih)) {
+-		if ((u32) getintvar(pvars, "boardflags2") & BFL2_PCIEWAR_OVR) {
+-			pi->pcie_war_aspm_ovr = PCIE_ASPM_DISAB;
+-		} else {
+-			pi->pcie_war_aspm_ovr = PCIE_ASPM_ENAB;
+-		}
+-	}
+-
+-	/* These need to happen in this order only */
+-	pcie_war_polarity(pi);
+-
+-	pcie_war_serdes(pi);
+-
+-	pcie_war_aspm_clkreq(pi);
+-
+-	pcie_clkreq_upd(pi, state);
+-
+-}
+-
+-void pcicore_hwup(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-
+-	if (!pi || !PCIE_PUB(pi->sih))
+-		return;
+-
+-	pcie_war_pci_setup(pi);
+-}
+-
+-void pcicore_up(void *pch, int state)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-
+-	if (!pi || !PCIE_PUB(pi->sih))
+-		return;
+-
+-	/* Restore L1 timer for better performance */
+-	pcie_extendL1timer(pi, true);
+-
+-	pcie_clkreq_upd(pi, state);
+-}
+-
+-/* When the device is going to enter D3 state (or the system is going to enter S3/S4 states */
+-void pcicore_sleep(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u32 w;
+-
+-	if (!pi || !PCIE_ASPM(pi->sih))
+-		return;
+-
+-	pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset, &w);
+-	w &= ~PCIE_CAP_LCREG_ASPML1;
+-	pci_write_config_dword(pi->dev, pi->pciecap_lcreg_offset, w);
+-
+-	pi->pcie_pr42767 = false;
+-}
+-
+-void pcicore_down(void *pch, int state)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-
+-	if (!pi || !PCIE_PUB(pi->sih))
+-		return;
+-
+-	pcie_clkreq_upd(pi, state);
+-
+-	/* Reduce L1 timer for better power savings */
+-	pcie_extendL1timer(pi, false);
+-}
+-
+-/* ***** Wake-on-wireless-LAN (WOWL) support functions ***** */
+-/* Just uses PCI config accesses to find out, when needed before sb_attach is done */
+-bool pcicore_pmecap_fast(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u8 cap_ptr;
+-	u32 pmecap;
+-
+-	cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_PM, NULL,
+-					      NULL);
+-
+-	if (!cap_ptr)
+-		return false;
+-
+-	pci_read_config_dword(pi->dev, cap_ptr, &pmecap);
+-
+-	return (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0;
+-}
+-
+-/* return true if PM capability exists in the pci config space
+- * Uses and caches the information using core handle
+- */
+-static bool pcicore_pmecap(pcicore_info_t *pi)
+-{
+-	u8 cap_ptr;
+-	u32 pmecap;
+-
+-	if (!pi->pmecap_offset) {
+-		cap_ptr = pcicore_find_pci_capability(pi->dev,
+-						      PCI_CAP_ID_PM,
+-						      NULL, NULL);
+-		if (!cap_ptr)
+-			return false;
+-
+-		pi->pmecap_offset = cap_ptr;
+-
+-		pci_read_config_dword(pi->dev, pi->pmecap_offset,
+-					&pmecap);
+-
+-		/* At least one state can generate PME */
+-		pi->pmecap = (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0;
+-	}
+-
+-	return pi->pmecap;
+-}
+-
+-/* Enable PME generation */
+-void pcicore_pmeen(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u32 w;
+-
+-	/* if not pmecapable return */
+-	if (!pcicore_pmecap(pi))
+-		return;
+-
+-	pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
+-				&w);
+-	w |= (PCI_PM_CTRL_PME_ENABLE);
+-	pci_write_config_dword(pi->dev,
+-				pi->pmecap_offset + PCI_PM_CTRL, w);
+-}
+-
+-/*
+- * Return true if PME status set
+- */
+-bool pcicore_pmestat(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u32 w;
+-
+-	if (!pcicore_pmecap(pi))
+-		return false;
+-
+-	pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
+-				&w);
+-
+-	return (w & PCI_PM_CTRL_PME_STATUS) == PCI_PM_CTRL_PME_STATUS;
+-}
+-
+-/* Disable PME generation, clear the PME status bit if set
+- */
+-void pcicore_pmeclr(void *pch)
+-{
+-	pcicore_info_t *pi = (pcicore_info_t *) pch;
+-	u32 w;
+-
+-	if (!pcicore_pmecap(pi))
+-		return;
+-
+-	pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL,
+-				&w);
+-
+-	PCI_ERROR(("pcicore_pci_pmeclr PMECSR : 0x%x\n", w));
+-
+-	/* PMESTAT is cleared by writing 1 to it */
+-	w &= ~(PCI_PM_CTRL_PME_ENABLE);
+-
+-	pci_write_config_dword(pi->dev,
+-				pi->pmecap_offset + PCI_PM_CTRL, w);
+-}
+-
+-u32 pcie_lcreg(void *pch, u32 mask, u32 val)
+-{
+-	pcicore_info_t *pi = (pc