[linux-yocto] [PATCH 5/7] PCI: Power on bridges before scanning new devices

Yong, Jonathan jonathan.yong at intel.com
Wed Jun 29 18:03:21 PDT 2016

From: Mika Westerberg <mika.westerberg at linux.intel.com>

When a PCI device is removed through sysfs interface the upstream bridge
(PCIe port) can be runtime suspended if it was the last device on that bus.
Now, if the bridge is in D3 we cannot find devices below the bridge
anymore.  For example following fails to find the removed device again:

  # echo 1 > /sys/bus/pci/devices/0000:00:01.0/0000:01:00.0/remove
  # echo 1 > /sys/bus/pci/devices/0000:00:01.0/rescan

Where 0000:00:01.0 is the bridge device.

In order to be able to rescan devices below the bridge add
pm_runtime_get_sync()/pm_runtime_put() calls to pci_scan_bridge().  This
should keep bridges powered on while their children devices are being

Reported-by: Peter Wu <peter at lekensteyn.nl>
Signed-off-by: Mika Westerberg <mika.westerberg at linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki at intel.com>


Cutoff the dependency patches. To fully pull in them will likely go over hunderd patches. The changes is too wide and drastic.
Signed-off-by: Yong, Jonathan <jonathan.yong at intel.com>
 drivers/pci/probe.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 993ff22..054e377 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -13,6 +13,10 @@
 #include <linux/cpumask.h>
 #include <linux/pci-aspm.h>
 #include <asm-generic/pci-bridge.h>
+#include <linux/aer.h>
+#include <linux/acpi.h>
+#include <linux/irqdomain.h>
+#include <linux/pm_runtime.h>
 #include "pci.h"
 #define CARDBUS_LATENCY_TIMER	176	/* secondary latency timer */
@@ -773,6 +777,12 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
 	u8 primary, secondary, subordinate;
 	int broken = 0;
+	/*
+	 * Make sure the bridge is powered on to be able to access config
+	 * space of devices below it.
+	 */
+	pm_runtime_get_sync(&dev->dev);
 	pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
 	primary = buses & 0xFF;
 	secondary = (buses >> 8) & 0xFF;
@@ -953,6 +963,8 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, int pass)
 	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
+	pm_runtime_put(&dev->dev);
 	return max;

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