[linux-yocto] [PATCH 1/1] meta: valleyisland-io: remove PCI mode LPSS device config

rebecca.swee.fun.chang at intel.com rebecca.swee.fun.chang at intel.com
Mon Feb 10 05:08:17 PST 2014

From: "Chang, Rebecca Swee Fun" <rebecca.swee.fun.chang at intel.com>

Remove PCI mode LPSS deivce configurations. These
configurations are moved into a patch in recipe layer
in order for Valley Island LPSS devices to support both
ACPI mode and PCI mode enumeration.

Signed-off-by: Chang, Rebecca Swee Fun <rebecca.swee.fun.chang at intel.com>
 .../kernel-cache/features/valleyisland-io/valleyisland-io.cfg |    9 ---------
 1 file changed, 9 deletions(-)

diff --git a/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io.cfg b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io.cfg
index 983315b..a505cbd 100644
--- a/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io.cfg
+++ b/meta/cfg/kernel-cache/features/valleyisland-io/valleyisland-io.cfg
@@ -1,12 +1,3 @@
-# By default, enable PCI mode enumeration
-# change to "n" if to disable PCI mode
 #GPIO Support

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