This layer is a first attempt to create a layer for kirkwoord.
It is based upon the OpenEmbedded recipes (most of which I have
added too)

u-boot still needs some work and the kernel also needs some attention
(but marvell/globalscale are not really keeping things up to date)

Appreciate your feedback!

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@...>
---
0001-meta-bsp-kirkwood-created.patch |48673 ++++++++++++++++++++
meta-bsp-kirkwood/conf/layer.conf | 10 +
meta-bsp-kirkwood/conf/machine/dockstar.conf | 20 +
.../conf/machine/include/kirkwood.inc | 25 +
meta-bsp-kirkwood/conf/machine/openrd-base.conf | 21 +
meta-bsp-kirkwood/conf/machine/openrd-client.conf | 21 +
meta-bsp-kirkwood/conf/machine/sheevaplug.conf | 21 +
.../0001--ARM-Kirkwood-CPU-idle-driver.patch | 162 +
...001-ARM-Kirkwood-Sound-Sound-driver-added.patch | 3514 ++
...lient-PCIe-Initialize-PCI-express-and-i2c.patch | 36 +
...wood-peripherals-clock-gating-for-power-m.patch | 131 +
...003-ARM-Kirkwood-Sound-Sound-driver-added.patch | 3498 ++
...04-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch | 207 +
...M-Kirkwood-OpenRD-base-SD-UART1-selection.patch | 110 +
.../cpuidle-reenable-interrupts.patch | 19 +
.../recipes/linux/linux-kirkwood/defconfig | 2439 +
.../recipes/linux/linux-kirkwood/fw.patch | 36 +
.../recipes/linux/linux-kirkwood/mvsdio.patch | 46 +
.../linux-kirkwood/newer-arm-mach-types.patch | 181 +
.../linux/linux-kirkwood/openrd-base/defconfig | 2610 ++
.../openrd-base/openrd-base-enable-pcie.patch | 22 +
...002-OpenRD-Client-Volari-Z11-driver-added.patch |29769 ++++++++++++
.../linux/linux-kirkwood/openrd-client/defconfig | 2812 ++
.../linux/linux-kirkwood/sheevaplug/defconfig | 2578 ++
.../recipes/linux/linux-kirkwood_2.6.33-rc5.bb | 41 +
meta-bsp-kirkwood/recipes/linux/linux.inc | 118 +
meta-bsp-kirkwood/recipes/u-boot/u-boot.inc | 67 +
meta-bsp-kirkwood/recipes/u-boot/u-boot_git.bb | 17 +
28 files changed, 97204 insertions(+), 0 deletions(-)
create mode 100644 0001-meta-bsp-kirkwood-created.patch
create mode 100644 meta-bsp-kirkwood/conf/layer.conf
create mode 100644 meta-bsp-kirkwood/conf/machine/dockstar.conf
create mode 100644 meta-bsp-kirkwood/conf/machine/include/kirkwood.inc
create mode 100644 meta-bsp-kirkwood/conf/machine/openrd-base.conf
create mode 100644 meta-bsp-kirkwood/conf/machine/openrd-client.conf
create mode 100644 meta-bsp-kirkwood/conf/machine/sheevaplug.conf
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-ARM-Kirkwood-Sound-Sound-driver-added.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-OpenRD-Client-PCIe-Initialize-PCI-express-and-i2c.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0003-ARM-Kirkwood-Sound-Sound-driver-added.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-base-SD-UART1-selection.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/defconfig
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/fw.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/mvsdio.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/newer-arm-mach-types.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/defconfig
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/openrd-base-enable-pcie.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/0002-OpenRD-Client-Volari-Z11-driver-added.patch
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/defconfig
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/sheevaplug/defconfig
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood_2.6.33-rc5.bb
create mode 100644 meta-bsp-kirkwood/recipes/linux/linux.inc
create mode 100644 meta-bsp-kirkwood/recipes/u-boot/u-boot.inc
create mode 100644 meta-bsp-kirkwood/recipes/u-boot/u-boot_git.bb

diff --git a/0001-meta-bsp-kirkwood-created.patch b/0001-meta-bsp-kirkwood-created.patch
new file mode 100644
index 0000000..559a215
--- /dev/null
+++ b/0001-meta-bsp-kirkwood-created.patch
@@ -0,0 +1,48673 @@
+From ec93783c0e8c4a3ede2e064e7309450192453a6d Mon Sep 17 00:00:00 2001
+From: Frans Meulenbroeks <fransmeulenbroeks@...>
+Date: Sat, 27 Nov 2010 21:55:57 +0100
+Subject: [PATCH] meta-bsp-kirkwood: created
+
+Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@...>
+---
+ meta-bsp-kirkwood/conf/layer.conf | 10 +
+ .../conf/machine/include/kirkwood.inc | 25 +
+ meta-bsp-kirkwood/conf/machine/sheevaplug.conf | 21 +
+ .../0001--ARM-Kirkwood-CPU-idle-driver.patch | 162 +
+ ...001-ARM-Kirkwood-Sound-Sound-driver-added.patch | 3514 +++
+ ...lient-PCIe-Initialize-PCI-express-and-i2c.patch | 36 +
+ ...wood-peripherals-clock-gating-for-power-m.patch | 131 +
+ ...003-ARM-Kirkwood-Sound-Sound-driver-added.patch | 3498 +++
+ ...04-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch | 207 +
+ ...M-Kirkwood-OpenRD-base-SD-UART1-selection.patch | 110 +
+ .../cpuidle-reenable-interrupts.patch | 19 +
+ .../recipes/linux/linux-kirkwood/defconfig | 2439 ++
+ .../recipes/linux/linux-kirkwood/fw.patch | 36 +
+ .../recipes/linux/linux-kirkwood/mvsdio.patch | 46 +
+ .../linux-kirkwood/newer-arm-mach-types.patch | 181 +
+ .../linux/linux-kirkwood/openrd-base/defconfig | 2610 ++
+ .../openrd-base/openrd-base-enable-pcie.patch | 22 +
+ ...002-OpenRD-Client-Volari-Z11-driver-added.patch |29769 ++++++++++++++++++++
+ .../linux/linux-kirkwood/openrd-client/defconfig | 2812 ++
+ .../linux/linux-kirkwood/sheevaplug/defconfig | 2578 ++
+ .../recipes/linux/linux-kirkwood_2.6.33-rc5.bb | 41 +
+ meta-bsp-kirkwood/recipes/linux/linux.inc | 118 +
+ meta-bsp-kirkwood/recipes/u-boot/u-boot.inc | 67 +
+ meta-bsp-kirkwood/recipes/u-boot/u-boot_git.bb | 17 +
+ 24 files changed, 48469 insertions(+), 0 deletions(-)
+ create mode 100644 meta-bsp-kirkwood/conf/layer.conf
+ create mode 100644 meta-bsp-kirkwood/conf/machine/include/kirkwood.inc
+ create mode 100644 meta-bsp-kirkwood/conf/machine/sheevaplug.conf
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-ARM-Kirkwood-Sound-Sound-driver-added.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-OpenRD-Client-PCIe-Initialize-PCI-express-and-i2c.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0003-ARM-Kirkwood-Sound-Sound-driver-added.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-base-SD-UART1-selection.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/defconfig
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/fw.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/mvsdio.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/newer-arm-mach-types.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/defconfig
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/openrd-base-enable-pcie.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/0002-OpenRD-Client-Volari-Z11-driver-added.patch
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/defconfig
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood/sheevaplug/defconfig
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux-kirkwood_2.6.33-rc5.bb
+ create mode 100644 meta-bsp-kirkwood/recipes/linux/linux.inc
+ create mode 100644 meta-bsp-kirkwood/recipes/u-boot/u-boot.inc
+ create mode 100644 meta-bsp-kirkwood/recipes/u-boot/u-boot_git.bb
+
+diff --git a/meta-bsp-kirkwood/conf/layer.conf b/meta-bsp-kirkwood/conf/layer.conf
+new file mode 100644
+index 0000000..8e6ca58
+--- /dev/null
++++ b/meta-bsp-kirkwood/conf/layer.conf
+@@ -0,0 +1,10 @@
++# We have a conf and classes directory, add to BBPATH
++BBPATH := "${BBPATH}:${LAYERDIR}"
++
++# We have a packages directory, add to BBFILES
++BBFILES := "${BBFILES} ${LAYERDIR}/recipes/*/*.bb \
++ ${LAYERDIR}/recipes/*/*.bbappend"
++
++BBFILE_COLLECTIONS += "bsp-kirkwood"
++BBFILE_PATTERN_bsp-kirkwood := "^${LAYERDIR}/"
++BBFILE_PRIORITY_bsp-kirkwood = "10"
+diff --git a/meta-bsp-kirkwood/conf/machine/include/kirkwood.inc b/meta-bsp-kirkwood/conf/machine/include/kirkwood.inc
+new file mode 100644
+index 0000000..ec3a8cf
+--- /dev/null
++++ b/meta-bsp-kirkwood/conf/machine/include/kirkwood.inc
+@@ -0,0 +1,25 @@
++#@TYPE: Machine
++#@DESCRIPTION: Machine configuration for various different Marvell Kirkwood based devices
++
++TARGET_ARCH = "arm"
++
++PACKAGE_EXTRA_ARCHS = "armv4 armv4t armv5te"
++MACHINE_FEATURES = "kernel26 usbhost ext2 vfat mmc"
++MACHINE_TASK_PROVIDER = "task-base"
++
++USE_DEVFS = "0"
++
++PREFERRED_PROVIDER_virtual/bootloader = "u-boot"
++PREFERRED_PROVIDER_virtual/kernel = "linux-kirkwood"
++
++MACHINE_KERNEL_PR = "r18"
++
++IMAGE_FSTYPES += "tar.gz ubi"
++SERIAL_CONSOLE = "ttyS0 115200"
++
++# Currently all the orion devices we support use uImage
++KERNEL_IMAGETYPE = "uImage"
++UBOOT_ENTRYPOINT = "0x00008000"
++UBOOT_LOADADDRESS = "0x00008000"
++
++require conf/machine/include/tune-arm926ejs.inc
+diff --git a/meta-bsp-kirkwood/conf/machine/sheevaplug.conf b/meta-bsp-kirkwood/conf/machine/sheevaplug.conf
+new file mode 100644
+index 0000000..4517312
+--- /dev/null
++++ b/meta-bsp-kirkwood/conf/machine/sheevaplug.conf
+@@ -0,0 +1,21 @@
++#@NAME: ARM based Marvell Sheevaplug
++
++MACHINE_EXTRA_RDEPENDS = "u-boot-utils"
++MACHINE_EXTRA_RRECOMMENDS = "kernel-modules"
++
++# do ubiattach /dev/ubi_ctrl -m 4
++# From dmesg:
++# UBI: smallest flash I/O unit: 2048
++# UBI: logical eraseblock size: 129024 bytes
++# from ubiattach stdout:
++# UBI device number 0, total 4096 LEBs
++MKUBIFS_ARGS = "-m 2048 -e 129024 -c 4096"
++
++# do ubiattach /dev/ubi_ctrl -m 4
++# from dmesg:
++# UBI: smallest flash I/O unit: 2048
++# UBI: physical eraseblock size: 131072 bytes (128 KiB)
++# UBI: sub-page size: 512
++UBINIZE_ARGS = "-m 2048 -p 128KiB -s 512"
++
++require conf/machine/include/kirkwood.inc
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
+new file mode 100644
+index 0000000..29e7851
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001--ARM-Kirkwood-CPU-idle-driver.patch
+@@ -0,0 +1,162 @@
++From 286f96f0b2e1ee5a124effba59a01f8d4bf69ddf Mon Sep 17 00:00:00 2001
++From: Rabeeh Khoury <rabeeh@...>
++Date: Tue, 24 Mar 2009 16:10:15 +0200
++Subject: [PATCH] [ARM] Kirkwood: CPU idle driver
++
++The patch adds support for Kirkwood cpu idle.
++Two idle states are defined:
++1. Wait-for-interrupt (replacing default kirkwood wfi)
++2. Wait-for-interrupt and DDR self refresh
++
++Signed-off-by: Rabeeh Khoury <rabeeh@...>
++Signed-off-by: Nicolas Pitre <nico@...>
++---
++ arch/arm/configs/kirkwood_defconfig | 4 +-
++ arch/arm/mach-kirkwood/Makefile | 2 +
++ arch/arm/mach-kirkwood/cpuidle.c | 96 ++++++++++++++++++++++++
++ arch/arm/mach-kirkwood/include/mach/kirkwood.h | 1 +
++ 4 files changed, 102 insertions(+), 1 deletions(-)
++ create mode 100644 arch/arm/mach-kirkwood/cpuidle.c
++
++diff --git a/arch/arm/configs/kirkwood_defconfig b/arch/arm/configs/kirkwood_defconfig
++index c367ae4..a99b3eb 100644
++--- a/arch/arm/configs/kirkwood_defconfig
+++++ b/arch/arm/configs/kirkwood_defconfig
++@@ -263,7 +263,9 @@ CONFIG_CMDLINE=""
++ #
++ # CPU Power Management
++ #
++-# CONFIG_CPU_IDLE is not set
+++CONFIG_CPU_IDLE=y
+++CONFIG_CPU_IDLE_GOV_LADDER=y
+++CONFIG_CPU_IDLE_GOV_MENU=y
++
++ #
++ # Floating point emulation
++diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
++index 8f03c9b..f21f35d 100644
++--- a/arch/arm/mach-kirkwood/Makefile
+++++ b/arch/arm/mach-kirkwood/Makefile
++@@ -5,3 +5,5 @@ obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o
++ obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o
++ obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o
++ obj-$(CONFIG_MACH_TS219) += ts219-setup.o
+++
+++obj-$(CONFIG_CPU_IDLE) += cpuidle.o
++diff --git a/arch/arm/mach-kirkwood/cpuidle.c b/arch/arm/mach-kirkwood/cpuidle.c
++new file mode 100644
++index 0000000..43052c7
++--- /dev/null
+++++ b/arch/arm/mach-kirkwood/cpuidle.c
++@@ -0,0 +1,96 @@
+++/*
+++ * arch/arm/mach-kirkwood/cpuidle.c
+++ *
+++ * CPU idle Marvell Kirkwood SoCs
+++ *
+++ * This file is licensed under the terms of the GNU General Public
+++ * License version 2. This program is licensed "as is" without any
+++ * warranty of any kind, whether express or implied.
+++ *
+++ * The cpu idle uses wait-for-interrupt and DDR self refresh in order
+++ * to implement two idle states -
+++ * #1 wait-for-interrupt
+++ * #2 wait-for-interrupt and DDR self refresh
+++ */
+++
+++#include <linux/kernel.h>
+++#include <linux/init.h>
+++#include <linux/platform_device.h>
+++#include <linux/cpuidle.h>
+++#include <asm/io.h>
+++#include <asm/proc-fns.h>
+++#include <mach/kirkwood.h>
+++
+++#define KIRKWOOD_MAX_STATES 2
+++
+++static struct cpuidle_driver kirkwood_idle_driver = {
+++ .name = "kirkwood_idle",
+++ .owner = THIS_MODULE,
+++};
+++
+++static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
+++
+++/* Actual code that puts the SoC in different idle states */
+++static int kirkwood_enter_idle(struct cpuidle_device *dev,
+++ struct cpuidle_state *state)
+++{
+++ struct timeval before, after;
+++ int idle_time;
+++
+++ local_irq_disable();
+++ do_gettimeofday(&before);
+++ if (state == &dev->states[0])
+++ /* Wait for interrupt state */
+++ cpu_do_idle();
+++ else if (state == &dev->states[1]) {
+++ /*
+++ * Following write will put DDR in self refresh.
+++ * Note that we have 256 cycles before DDR puts it
+++ * self in self-refresh, so the wait-for-interrupt
+++ * call afterwards won't get the DDR from self refresh
+++ * mode.
+++ */
+++ writel(0x7, DDR_OPERATION_BASE);
+++ cpu_do_idle();
+++ }
+++ do_gettimeofday(&after);
+++ local_irq_enable();
+++ idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
+++ (after.tv_usec - before.tv_usec);
+++ return idle_time;
+++}
+++
+++/* Initialize CPU idle by registering the idle states */
+++static int kirkwood_init_cpuidle(void)
+++{
+++ struct cpuidle_device *device;
+++
+++ cpuidle_register_driver(&kirkwood_idle_driver);
+++
+++ device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
+++ device->state_count = KIRKWOOD_MAX_STATES;
+++
+++ /* Wait for interrupt state */
+++ device->states[0].enter = kirkwood_enter_idle;
+++ device->states[0].exit_latency = 1;
+++ device->states[0].target_residency = 10000;
+++ device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
+++ strcpy(device->states[0].name, "WFI");
+++ strcpy(device->states[0].desc, "Wait for interrupt");
+++
+++ /* Wait for interrupt and DDR self refresh state */
+++ device->states[1].enter = kirkwood_enter_idle;
+++ device->states[1].exit_latency = 10;
+++ device->states[1].target_residency = 10000;
+++ device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
+++ strcpy(device->states[1].name, "DDR SR");
+++ strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
+++
+++ if (cpuidle_register_device(device)) {
+++ printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
+++ return -EIO;
+++ }
+++ return 0;
+++}
+++
+++device_initcall(kirkwood_init_cpuidle);
++diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++index 38c9868..e9ae73d 100644
++--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++@@ -86,6 +86,7 @@
++ */
++ #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
++ #define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500)
+++#define DDR_OPERATION_BASE (DDR_VIRT_BASE | 0x1418)
++
++ #define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
++ #define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000)
++--
++1.6.0.4
++
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-ARM-Kirkwood-Sound-Sound-driver-added.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-ARM-Kirkwood-Sound-Sound-driver-added.patch
+new file mode 100644
+index 0000000..fc17a08
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-ARM-Kirkwood-Sound-Sound-driver-added.patch
+@@ -0,0 +1,3514 @@
++From 89aa6dd15306a1ce11da0f2cb67bda74999e178e Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Tue, 24 Nov 2009 21:49:24 +0530
++Subject: [PATCH] ARM: Kirkwood: Sound: Sound driver added
++
++The driver is based on the Marvell kirkwood sound driver available in
++2.6.22.18 kernel.
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ arch/arm/mach-kirkwood/common.c | 39 +
++ arch/arm/mach-kirkwood/common.h | 2 +
++ arch/arm/mach-kirkwood/include/mach/kirkwood.h | 3 +
++ arch/arm/mach-kirkwood/openrd_client-setup.c | 27 +
++ include/linux/mv88fx_audio.h | 111 ++
++ sound/soc/Kconfig | 1 +
++ sound/soc/Makefile | 1 +
++ sound/soc/kirkwood/Kconfig | 29 +
++ sound/soc/kirkwood/Makefile | 7 +
++ sound/soc/kirkwood/cs42l51.c | 304 +++++
++ sound/soc/kirkwood/cs42l51.h | 59 +
++ sound/soc/kirkwood/kirkwood_audio_hal.c | 821 +++++++++++++
++ sound/soc/kirkwood/kirkwood_audio_hal.h | 109 ++
++ sound/soc/kirkwood/kirkwood_audio_regs.h | 310 +++++
++ sound/soc/kirkwood/kirkwood_pcm.c | 1505 ++++++++++++++++++++++++
++ 15 files changed, 3328 insertions(+), 0 deletions(-)
++ create mode 100644 include/linux/mv88fx_audio.h
++ create mode 100644 sound/soc/kirkwood/Kconfig
++ create mode 100644 sound/soc/kirkwood/Makefile
++ create mode 100644 sound/soc/kirkwood/cs42l51.c
++ create mode 100644 sound/soc/kirkwood/cs42l51.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_hal.c
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_hal.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_regs.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_pcm.c
++
++diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
++index 0acb61f..4d66c06 100644
++--- a/arch/arm/mach-kirkwood/common.c
+++++ b/arch/arm/mach-kirkwood/common.c
++@@ -15,6 +15,7 @@
++ #include <linux/mbus.h>
++ #include <linux/mv643xx_eth.h>
++ #include <linux/mv643xx_i2c.h>
+++#include <linux/mv88fx_audio.h>
++ #include <linux/ata_platform.h>
++ #include <linux/mtd/nand.h>
++ #include <linux/spi/orion_spi.h>
++@@ -969,3 +970,41 @@ static int __init kirkwood_clock_gate(void)
++ return 0;
++ }
++ late_initcall(kirkwood_clock_gate);
+++
+++/*****************************************************************************
+++ * Audio
+++ ****************************************************************************/
+++
+++static struct resource kirkwood_audio_resources[] = {
+++ [0] = {
+++ .start = AUDIO_PHYS_BASE,
+++ .end = AUDIO_PHYS_BASE + SZ_16K - 1,
+++ .flags = IORESOURCE_MEM,
+++ },
+++ [1] = {
+++ .start = IRQ_KIRKWOOD_I2S,
+++ .end = IRQ_KIRKWOOD_I2S,
+++ .flags = IORESOURCE_IRQ,
+++ },
+++};
+++
+++static u64 kirkwood_audio_dmamask = 0xFFFFFFFFUL;
+++
+++static struct platform_device kirkwood_audio = {
+++ .name = MV88FX_AUDIO_NAME,
+++ .id = -1,
+++ .num_resources = ARRAY_SIZE(kirkwood_audio_resources),
+++ .resource = kirkwood_audio_resources,
+++ .dev = {
+++ .dma_mask = &kirkwood_audio_dmamask,
+++ .coherent_dma_mask = 0xffffffff,
+++ },
+++};
+++
+++void __init kirkwood_audio_init(struct mv88fx_snd_platform_data *audio_data)
+++{
+++ kirkwood_clk_ctrl |= CGC_AUDIO;
+++ kirkwood_audio.dev.platform_data = audio_data;
+++
+++ platform_device_register(&kirkwood_audio);
+++}
++diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
++index d7de434..b79a25c 100644
++--- a/arch/arm/mach-kirkwood/common.h
+++++ b/arch/arm/mach-kirkwood/common.h
++@@ -16,6 +16,7 @@ struct mv643xx_eth_platform_data;
++ struct mv_sata_platform_data;
++ struct mvsdio_platform_data;
++ struct mtd_partition;
+++struct mv88fx_snd_platform_data;
++
++ /*
++ * Basic Kirkwood init functions used early by machine-setup.
++@@ -41,6 +42,7 @@ void kirkwood_i2c_init(void);
++ void kirkwood_uart0_init(void);
++ void kirkwood_uart1_init(void);
++ void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
+++void kirkwood_audio_init(struct mv88fx_snd_platform_data *audio_data);
++
++ extern int kirkwood_tclk;
++ extern struct sys_timer kirkwood_timer;
++diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++index 54c1327..90ced65 100644
++--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++@@ -95,6 +95,9 @@
++
++ #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
++
+++#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0xA0000)
+++#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0xA0000)
+++
++ /*
++ * Supported devices and revisions.
++ */
++diff --git a/arch/arm/mach-kirkwood/openrd_client-setup.c b/arch/arm/mach-kirkwood/openrd_client-setup.c
++index a55a1bc..72acc22 100644
++--- a/arch/arm/mach-kirkwood/openrd_client-setup.c
+++++ b/arch/arm/mach-kirkwood/openrd_client-setup.c
++@@ -14,11 +14,13 @@
++ #include <linux/mtd/partitions.h>
++ #include <linux/ata_platform.h>
++ #include <linux/mv643xx_eth.h>
+++#include <linux/mv88fx_audio.h>
++ #include <linux/gpio.h>
++ #include <asm/mach-types.h>
++ #include <asm/mach/arch.h>
++ #include <mach/kirkwood.h>
++ #include <plat/mvsdio.h>
+++#include <linux/autoconf.h>
++ #include "common.h"
++ #include "mpp.h"
++
++@@ -59,6 +61,21 @@ static unsigned int openrd_client_mpp_config[] __initdata = {
++ 0
++ };
++
+++static struct mv88fx_snd_platform_data openrd_client_audio_data = {
+++ .i2c_bus_no = 0,
+++ .i2c_address = 0x4A,
+++/* 0 - NA, 1 - mono, 2 - stereo */
+++#ifdef CONFIG_SND_MV88FX_SOC_I2S
+++ .i2s_rec = 1,
+++ .i2s_play = 2,
+++#else
+++ .spdif_rec = 1,
+++ .spdif_play = 2,
+++#endif
+++ .dram = &kirkwood_mbus_dram_info,
+++ .base_offset = AUDIO_PHYS_BASE - KIRKWOOD_REGS_PHYS_BASE,
+++};
+++
++ static void __init openrd_client_init(void)
++ {
++ /*
++@@ -78,6 +95,16 @@ static void __init openrd_client_init(void)
++
++ kirkwood_sata_init(&openrd_client_sata_data);
++ kirkwood_sdio_init(&openrd_client_mvsdio_data);
+++
+++ /* initialize i2c */
+++ kirkwood_i2c_init();
+++
+++#if defined(CONFIG_SND_MV88FX_SOC) || defined(CONFIG_SND_MV88FX_SOC_MODULE)
+++ /* If built as a part of kernel or as a module
+++ * initialize audio */
+++ openrd_client_audio_data.tclk = kirkwood_tclk,
+++ kirkwood_audio_init(&openrd_client_audio_data);
+++#endif
++ }
++
++ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
++diff --git a/include/linux/mv88fx_audio.h b/include/linux/mv88fx_audio.h
++new file mode 100644
++index 0000000..6d36a3f
++--- /dev/null
+++++ b/include/linux/mv88fx_audio.h
++@@ -0,0 +1,111 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++
+++#ifndef __LINUX_MV88FX_SND_H
+++#define __LINUX_MV88FX_SND_H
+++
+++#include <linux/mbus.h>
+++
+++#define MV88FX_AUDIO_NAME "mv88fx_snd"
+++
+++#undef MV88FX_SND_DEBUG
+++#ifdef MV88FX_SND_DEBUG
+++#define mv88fx_snd_debug(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
+++#else
+++ #define mv88fx_snd_debug(a...)
+++#endif
+++
+++#define MV_AUDIO_MAX_ADDR_DECODE_WIN 2
+++#define MV_AUDIO_RECORD_WIN_NUM 0
+++#define MV_AUDIO_PLAYBACK_WIN_NUM 1
+++
+++#define MV_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
+++#define MV_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
+++
+++struct mv88fx_snd_platform_data {
+++ u8 i2c_bus_no;
+++ u16 i2c_address;
+++ u32 spdif_rec;
+++ u32 spdif_play;
+++ u32 i2s_rec;
+++ u32 i2s_play;
+++ u32 tclk;
+++ u32 base_offset;
+++ struct mbus_dram_target_info *dram;
+++};
+++
+++struct mv88fx_snd_stream {
+++ struct snd_pcm_substream *substream;
+++ struct device *dev;
+++ int direction; /* playback or capture */
+++ #define PLAYBACK 0
+++ #define CAPTURE 1
+++ unsigned int dig_mode; /* i2s,spdif,both */
+++ #define I2S 1
+++ #define SPDIF 2
+++ int stereo; /* mono, stereo */
+++ int mono_mode; /* both mono, left mono, right mono */
+++ #define MONO_BOTH 0
+++ #define MONO_LEFT 1
+++ #define MONO_RIGHT 2
+++ int clock_src;
+++ #define DCO_CLOCK 0
+++ #define SPCR_CLOCK 1
+++ #define EXTERN_CLOCK 2
+++ int rate;
+++ int stat_mem; /* Channel status source*/
+++ int format;
+++ #define SAMPLE_32IN32 0
+++ #define SAMPLE_24IN32 1
+++ #define SAMPLE_20IN32 2
+++ #define SAMPLE_16IN32 3
+++ #define SAMPLE_16IN16 4
+++ unsigned int dma_addr;
+++ unsigned int dma_size;
+++ unsigned int period_size;
+++ unsigned int spdif_status[4]; /* SPDIF status */
+++ unsigned char *area; /* virtual pointer */
+++ dma_addr_t addr; /* physical address */
+++};
+++
+++struct mv88fx_snd_chip {
+++ struct mv88fx_snd_stream *stream[2]; /* run time values*/
+++ struct mv88fx_snd_stream *stream_defaults[2]; /* default values*/
+++ spinlock_t reg_lock; /* Register access spinlock */
+++ struct resource *res; /* resource for IRQ and base*/
+++ void __iomem *base; /* Audio base address of the host */
+++ unsigned int audio_offset; /* Offset to audio base register
+++ * from internal base register */
+++ int irq;
+++ int loopback; /* When Loopback is enabled, playback
+++ * data is looped back to be recorded */
+++ int ch_stat_valid; /* Playback SPDIF channel validity bit
+++ * value when REG selected */
+++ int burst; /* DMA Burst Size */
+++
+++ #define SPDIF_MEM_STAT 0
+++ #define SPDIF_REG_STAT 1
+++ unsigned int dco_ctrl_offst;
+++ int pcm_mode; /* pcm, nonpcm*/
+++ #define PCM 0
+++ #define NON_PCM 1
+++ int stereo;
+++};
+++
+++#define MV88FX_SND_MIN_PERIODS 8
+++#define MV88FX_SND_MAX_PERIODS 16
+++#define MV88FX_SND_MIN_PERIOD_BYTES 0x4000
+++#define MV88FX_SND_MAX_PERIOD_BYTES 0x4000
+++
+++#endif /* __LINUX_MV88FX_SND_H */
++diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
++index b1749bc..9fc88d8 100644
++--- a/sound/soc/Kconfig
+++++ b/sound/soc/Kconfig
++@@ -36,6 +36,7 @@ source "sound/soc/s3c24xx/Kconfig"
++ source "sound/soc/s6000/Kconfig"
++ source "sound/soc/sh/Kconfig"
++ source "sound/soc/txx9/Kconfig"
+++source "sound/soc/kirkwood/Kconfig"
++
++ # Supported codecs
++ source "sound/soc/codecs/Kconfig"
++diff --git a/sound/soc/Makefile b/sound/soc/Makefile
++index 0c5eac0..664850d 100644
++--- a/sound/soc/Makefile
+++++ b/sound/soc/Makefile
++@@ -14,3 +14,4 @@ obj-$(CONFIG_SND_SOC) += s3c24xx/
++ obj-$(CONFIG_SND_SOC) += s6000/
++ obj-$(CONFIG_SND_SOC) += sh/
++ obj-$(CONFIG_SND_SOC) += txx9/
+++obj-$(CONFIG_SND_SOC) += kirkwood/
++diff --git a/sound/soc/kirkwood/Kconfig b/sound/soc/kirkwood/Kconfig
++new file mode 100644
++index 0000000..d6a7e2f
++--- /dev/null
+++++ b/sound/soc/kirkwood/Kconfig
++@@ -0,0 +1,29 @@
+++config SND_MV88FX_SOC
+++ tristate "SoC Audio for the Marvell 88FX chip"
+++ depends on ARCH_KIRKWOOD
+++ help
+++ Say Y or M if you want to add support for codecs attached to
+++ the MV88FX I2S or SPD interface. You will also need
+++ to select the audio interfaces to support below.
+++
+++choice
+++ prompt "Audio Interface"
+++ default SND_MV88FX_SOC_I2S
+++ depends on SND_MV88FX_SOC
+++
+++config SND_MV88FX_SOC_I2S
+++ bool "I2S"
+++
+++config SND_MV88FX_SOC_SPDIF
+++ bool "SPDIF"
+++
+++endchoice
+++
+++choice
+++ prompt "Codec IC"
+++ default SND_SOC_CS42L51
+++ depends on SND_MV88FX_SOC
+++
+++config SND_SOC_CS42L51
+++ bool "CS42L51"
+++endchoice
++diff --git a/sound/soc/kirkwood/Makefile b/sound/soc/kirkwood/Makefile
++new file mode 100644
++index 0000000..57674ad
++--- /dev/null
+++++ b/sound/soc/kirkwood/Makefile
++@@ -0,0 +1,7 @@
+++
+++snd-soc-kirkwood-objs := kirkwood_pcm.o kirkwood_audio_hal.o
+++ifdef CONFIG_SND_SOC_CS42L51
+++snd-soc-kirkwood-objs += cs42l51.o
+++endif
+++
+++obj-$(CONFIG_SND_MV88FX_SOC) += snd-soc-kirkwood.o
++diff --git a/sound/soc/kirkwood/cs42l51.c b/sound/soc/kirkwood/cs42l51.c
++new file mode 100644
++index 0000000..f5a22f9
++--- /dev/null
+++++ b/sound/soc/kirkwood/cs42l51.c
++@@ -0,0 +1,304 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++#include <linux/ioport.h>
+++#include <linux/platform_device.h>
+++#include <linux/init.h>
+++#include <linux/slab.h>
+++#include <linux/version.h>
+++#include <linux/i2c.h>
+++#include <sound/core.h>
+++#include <sound/initval.h>
+++#include <sound/control.h>
+++#include <sound/pcm.h>
+++#include <sound/asoundef.h>
+++#include <sound/asound.h>
+++
+++#include "cs42l51.h"
+++
+++/* FIXME: This code is not written in driver module style. This is written as
+++ * helper for SOC driver */
+++
+++struct i2c_client *client;
+++
+++static int cs42l51_add_i2c_device(unsigned char i2c_bus_no,
+++ unsigned short i2c_add)
+++{
+++ struct i2c_board_info info;
+++ struct i2c_adapter *adapter;
+++
+++ memset(&info, 0, sizeof(struct i2c_board_info));
+++ info.addr = i2c_add;
+++ strlcpy(info.type, "cs42l51", I2C_NAME_SIZE);
+++
+++ adapter = i2c_get_adapter(i2c_bus_no);
+++ if (!adapter) {
+++ snd_printk("can't get i2c adapter\n");
+++ return -ENODEV;
+++ }
+++
+++ client = i2c_new_device(adapter, &info);
+++ i2c_put_adapter(adapter);
+++ if (!client) {
+++ snd_printk("can't add i2c device\n");
+++ return -ENODEV;
+++ }
+++
+++ return 0;
+++}
+++
+++void cs42l51_del_i2c_device(void)
+++{
+++ if (client)
+++ i2c_unregister_device(client);
+++ client = NULL;
+++}
+++
+++/*
+++ * offset: Register offset to start reading with
+++ * buf : Pointer to the buffer to store the read data
+++ * num : Number of registers to read
+++ *
+++ * Returns -ve errorno else number of registers read
+++ */
+++
+++int cs42l51_reg_read(unsigned char offset, unsigned char *buf, int num)
+++{
+++ int ret = 0;
+++
+++ /* Set autoincrement bit */
+++ offset |= CODEC_INCR_ADDR;
+++
+++ /* Send register offset */
+++ ret = i2c_master_send(client, &offset, 1);
+++ if (ret != 1) {
+++ snd_printd("Could not write register offset\n");
+++ return 0;
+++ }
+++
+++ return i2c_master_recv(client, buf, num);
+++}
+++
+++/*
+++ * offset: Register offset to write
+++ * data : Data to be written
+++ *
+++ * Returns -ve errorno else number of registers written (=1)
+++ */
+++
+++int cs42l51_reg_write(unsigned char offset, unsigned char data)
+++{
+++ int ret = 0;
+++ unsigned char buf[2];
+++
+++ buf[0] = offset;
+++ buf[1] = data;
+++
+++ /* Send register offset & data */
+++ ret = i2c_master_send(client, &buf[0], 2);
+++
+++ return (ret == 2) ? 1 : ret;
+++}
+++
+++int codec_init(int adc_mode, int digital_if_format,
+++ unsigned char i2c_bus_no, unsigned short i2c_add)
+++{
+++ unsigned char reg_data;
+++
+++ if (cs42l51_add_i2c_device(i2c_bus_no, i2c_add))
+++ return 1;
+++
+++ if (cs42l51_reg_read(CODEC_ID_REG, &reg_data, 1) < 0)
+++ goto codec_init_error;
+++
+++ if (CODEC_CHIP_ID != (reg_data >> 3) ||
+++ CODEC_REV_ID != (reg_data & 0x7)) {
+++ snd_printd("Error: Invalid Cirrus Logic chip/rev ID!\n");
+++ return 1;
+++ }
+++
+++ if (cs42l51_reg_read(CODEC_IF_CTRL_REG, &reg_data, 1) < 0)
+++ goto codec_init_error;
+++
+++ reg_data = (reg_data & ~(0x7<<3)) | (digital_if_format << 3);
+++
+++ if (LEFT_JUSTIFIED_MODE == adc_mode)
+++ reg_data &= (~0x4);
+++ else
+++ reg_data |= 0x4;
+++
+++ if (cs42l51_reg_write(CODEC_IF_CTRL_REG, reg_data) < 0)
+++ goto codec_init_error;
+++
+++ return 0;
+++
+++codec_init_error:
+++ snd_printd("I2C error\n");
+++ return 1;
+++}
+++
+++/*
+++ * Initialize the audio decoder.
+++ */
+++
+++int cs42l51_init(int adc_mode, int digital_if_format, int rec,
+++ unsigned char i2c_bus_no, unsigned short i2c_add)
+++{
+++ if (codec_init(adc_mode, digital_if_format, i2c_bus_no, i2c_add)) {
+++ snd_printk("Error: Audio Codec init failed\n");
+++ return 1;
+++ }
+++
+++ /* Use the signal processor */
+++ if (cs42l51_reg_write(0x9, 0x40) < 0)
+++ goto error;
+++
+++ /* Unmute PCM-A & PCM-B and set default */
+++ if (cs42l51_reg_write(0x10, 0x60) < 0)
+++ goto error;
+++ if (cs42l51_reg_write(0x11, 0x60) < 0)
+++ goto error;
+++
+++ /* default for AOUTx */
+++ if (cs42l51_reg_write(0x16, 0x05) < 0)
+++ goto error;
+++ if (cs42l51_reg_write(0x17, 0x05) < 0)
+++ goto error;
+++
+++ /* swap channels */
+++ if (cs42l51_reg_write(0x18, 0xff) < 0)
+++ goto error;
+++
+++ /* MIC Power Control: power down mIC in channel B, power on channel A
+++ * Recommended seq. in datasheet:
+++ * 1. Enable the PDN bit
+++ * 2. Enable power-down for the selected channels
+++ * 3. Disable the PDN bit */
+++
+++ /* Note: Tested for mono recording only */
+++ if (!rec) {
+++ /* Enable power down */
+++ if (cs42l51_reg_write(0x2, 0x11) < 0)
+++ goto error;
+++
+++ /* No record - Power down both channels */
+++ if (cs42l51_reg_write(0x2, 0x17) < 0)
+++ goto error;
+++
+++ /* Disable power down */
+++ if (cs42l51_reg_write(0x2, 0x16) < 0)
+++ goto error;
+++ } else {
+++ if (rec == 2) {
+++ /* Setreo recording - by default both channels are up */
+++
+++ /* MIC In channel selection - Select channel 3
+++ * unmute both channels */
+++ if (cs42l51_reg_write(0x7, 0xF0) < 0)
+++ goto error;
+++
+++ /* Power up mic pre-amplifier for both channels */
+++ if (cs42l51_reg_write(0x3, 0xA0) < 0)
+++ goto error;
+++ } else {
+++ /* Enable power down */
+++ if (cs42l51_reg_write(0x2, 0x11) < 0)
+++ goto error;
+++
+++ /* Mono recording - Power down Channel B */
+++ if (cs42l51_reg_write(0x2, 0x15) < 0)
+++ goto error;
+++
+++ /* Disable power down */
+++ if (cs42l51_reg_write(0x2, 0x14) < 0)
+++ goto error;
+++
+++ /* MIC In channel selection - Select channel 3
+++ * Mute Channel B */
+++ if (cs42l51_reg_write(0x7, 0xF2) < 0)
+++ goto error;
+++
+++ /* Power down mic pre-amplifier for Channel B*/
+++ if (cs42l51_reg_write(0x3, 0xA8) < 0)
+++ goto error;
+++ }
+++ }
+++
+++ return 0;
+++error:
+++ snd_printk("I2C error\n");
+++ return 1;
+++}
+++
+++#define AUD_NUM_VOLUME_STEPS (40)
+++static unsigned char auddec_volume_mapping[AUD_NUM_VOLUME_STEPS] =
+++{
+++ 0x19, 0xB2, 0xB7, 0xBD, 0xC3, 0xC9, 0xCF, 0xD5,
+++ 0xD8, 0xE1, 0xE7, 0xED, 0xF3, 0xF9, 0xFF, 0x00,
+++ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+++ 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+++ 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
+++};
+++
+++
+++/*
+++ * Get the audio decoder volume for both channels.
+++ * 0 is lowest volume, AUD_NUM_VOLUME_STEPS-1 is the highest volume.
+++ */
+++
+++void cs42l51_vol_get(unsigned char *vol_list)
+++{
+++ unsigned char reg_data[2];
+++ unsigned char i, vol_idx = 0;
+++
+++ if (cs42l51_reg_read(0x16 + vol_idx, reg_data, 2) < 0) {
+++ snd_printd("I2C error\n");
+++ snd_printk("Couldn't get volume\n");
+++ return;
+++ }
+++
+++ for (; vol_idx < 2; vol_idx++) {
+++ /* Look for the index that mapps to this dB value. */
+++ for (i = 0; i < AUD_NUM_VOLUME_STEPS; i++) {
+++ if (reg_data[vol_idx] == auddec_volume_mapping[i])
+++ break;
+++ if ((auddec_volume_mapping[i] >
+++ auddec_volume_mapping[AUD_NUM_VOLUME_STEPS-1])
+++ && (reg_data[vol_idx] > auddec_volume_mapping[i])
+++ && (reg_data[vol_idx] < auddec_volume_mapping[i+1]))
+++ break;
+++ }
+++ vol_list[vol_idx] = i;
+++ }
+++}
+++
+++/*
+++ * Set the audio decoder volume for both channels.
+++ * 0 is lowest volume, AUD_NUM_VOLUME_STEPS-1 is the highest volume.
+++ */
+++void cs42l51_vol_set(unsigned char *vol_list)
+++{
+++ unsigned int vol_idx;
+++
+++ for (vol_idx = 0; vol_idx < 2; vol_idx++) {
+++ if (vol_list[vol_idx] >= AUD_NUM_VOLUME_STEPS)
+++ vol_list[vol_idx] = AUD_NUM_VOLUME_STEPS - 1;
+++
+++ if (cs42l51_reg_write(0x16 + vol_idx,
+++ auddec_volume_mapping[vol_list[vol_idx]]) < 0) {
+++ snd_printd("I2C error\n");
+++ snd_printk("Couldn't set volume\n");
+++ return;
+++ }
+++ }
+++}
++diff --git a/sound/soc/kirkwood/cs42l51.h b/sound/soc/kirkwood/cs42l51.h
++new file mode 100644
++index 0000000..f4e7951
++--- /dev/null
+++++ b/sound/soc/kirkwood/cs42l51.h
++@@ -0,0 +1,59 @@
+++/*
+++ * Audio codec CS42L51 data definition file
+++ */
+++
+++#ifndef _CS42L51_H_
+++#define _CS42L51_H_
+++
+++#define CODEC_CHIP_ID 0x1B
+++#define CODEC_REV_ID 0x1
+++
+++#define CODEC_ID_REG 0x1
+++#define CODEC_IF_CTRL_REG 0x4
+++#define CODEC_ADC_INPUT_INV_MUTE_REG 0x7
+++#define CODEC_DAC_OUTPUT_CTRL_REG 0x8
+++#define CODEC_DAC_CTRL_REG 0x9
+++#define CODEC_PGAA_VOL_CTRL_REG 0xa
+++#define CODEC_TONE_CTRL_REG 0x15
+++#define CODEC_VOL_OUTA_CTRL_REG 0x16
+++
+++/* Set bit # 7 to 1 to get into auto incremental addressing mode */
+++#define CODEC_INCR_ADDR 0x80
+++
+++#define FALSE 0
+++#define TRUE 1
+++
+++/* Selects the digital interface format used for the data in on SDIN. */
+++enum dac_digital_if_format {
+++ L_JUSTIFIED_UP_TO_24_BIT,
+++ I2S_UP_TO_24_BIT,
+++ R_JUSTIFIED_UP_TO_24_BIT,
+++ R_JUSTIFIED_20_BIT,
+++ R_JUSTIFIED_18_BIT,
+++ R_JUSTIFIED_16_BIT
+++
+++};
+++
+++/* Selects either the I2S or Left-Justified digital interface format for the
+++ data on SDOUT. */
+++enum adc_mode {
+++ LEFT_JUSTIFIED_MODE,
+++ I2S_MODE
+++};
+++
+++/* Initialize the Cirrus Logic device */
+++int cs42l51_init(int adc_mode, int digital_if_format, int rec,
+++ unsigned char i2c_bus_no, unsigned short i2c_add);
+++
+++/* Function to control output volume (playback) */
+++void cs42l51_vol_get(unsigned char *vol_list);
+++void cs42l51_vol_set(unsigned char *vol_list);
+++
+++/* Function to access the Cirrus Logic CODEC registers */
+++int cs42l51_reg_read(unsigned char offset, unsigned char *buf, int num);
+++int cs42l51_reg_write(unsigned char offset, unsigned char data);
+++
+++
+++void cs42l51_del_i2c_device(void);
+++#endif /* _CS42L51_H_ */
+++
++diff --git a/sound/soc/kirkwood/kirkwood_audio_hal.c b/sound/soc/kirkwood/kirkwood_audio_hal.c
++new file mode 100644
++index 0000000..28305e3
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_hal.c
++@@ -0,0 +1,821 @@
+++/*
+++ * Sound driver for Marvell Kirkwood family SOCs
+++ *
+++ * This program is free software; you can redistribute it and/or
+++ * modify it under the terms of the GNU General Public License
+++ * as published by the Free Software Foundation; either version 2
+++ * of the License, or (at your option) any later version.
+++ *
+++ * This program is distributed in the hope that it will be useful,
+++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++ * GNU General Public License for more details.
+++ *
+++ * You should have received a copy of the GNU General Public License
+++ * along with this program; if not, write to the Free Software
+++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+++ */
+++
+++#include <linux/io.h>
+++#include <sound/core.h>
+++#include <sound/pcm.h>
+++#include <linux/spinlock.h>
+++#include <linux/mv88fx_audio.h>
+++#include "kirkwood_audio_hal.h"
+++
+++static void mv_audio_init(void __iomem *base);
+++static void audio_setup_wins(void __iomem *base,
+++ struct mbus_dram_target_info *dram);
+++static int set_window_as_per_baseadd(void __iomem *base, unsigned int baseadd,
+++ unsigned int audio_offset, int win_num);
+++
+++/* Clocks Control and Status related*/
+++static int mv_audio_dco_ctrl_set(struct mv_audio_freq_data *dcoCtrl,
+++ void __iomem *base);
+++
+++/* Audio PlayBack related*/
+++static int mv_audio_playback_control_set(void __iomem *base, unsigned int
+++ audio_offset, struct mv_audio_playback_ctrl *ctrl);
+++
+++/* Audio SPDIF PlayBack related*/
+++static void mv_spdif_playback_ctrl_set(void __iomem *base,
+++ struct mv_spdif_playback_ctrl *ctrl);
+++
+++/* Audio I2S PlayBack related*/
+++static int mv_i2s_playback_ctrl_set(void __iomem *base,
+++ struct mv_i2s_playback_ctrl *ctrl);
+++
+++/* Audio Recording*/
+++static int mv_audio_record_control_set(struct mv_audio_record_ctrl *ctrl,
+++ unsigned int audio_offset, void __iomem *base);
+++
+++/* SPDIF Recording Related*/
+++static int spdif_record_tclock_set(void __iomem *base, unsigned int tclk);
+++
+++/* I2S Recording Related*/
+++static int mv_i2s_record_cntrl_set(struct mv_i2s_record_ctrl *ctrl,
+++ void __iomem *base);
+++
+++static inline int audio_burst_bytes_num_get(int burst)
+++{
+++ switch (burst) {
+++ case AUDIO_32BYTE_BURST:
+++ return 32;
+++ case AUDIO_128BYTE_BURST:
+++ return 128;
+++ default:
+++ return 0xffffffff;
+++ }
+++}
+++
+++int mv88fx_snd_hw_init(struct snd_card *card)
+++{
+++ void __iomem *base = chip->base;
+++ struct mv88fx_snd_platform_data *platform_data =
+++ card->dev->platform_data;
+++
+++ if (platform_data->i2s_rec || platform_data->i2s_play)
+++ if (codec_init(I2S_MODE, I2S_UP_TO_24_BIT,
+++ platform_data->i2s_rec, platform_data->i2c_bus_no,
+++ platform_data->i2c_address)) {
+++ snd_printk("Initializing CS42L51 failed\n");
+++ return 1;
+++ }
+++
+++ writel(0xffffffff, (base + MV_AUDIO_INT_CAUSE_REG));
+++ writel(0, (base + MV_AUDIO_INT_MASK_REG));
+++ writel(0, (base + MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG));
+++
+++ mv_audio_init(base);
+++
+++ audio_setup_wins(base, platform_data->dram);
+++
+++ /* Disable all playback/recording */
+++ writel(readl(base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ (~(APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK)),
+++ (base + MV_AUDIO_PLAYBACK_CTRL_REG));
+++
+++ writel(readl(base + MV_AUDIO_RECORD_CTRL_REG) &
+++ (~(ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK)),
+++ (base + MV_AUDIO_RECORD_CTRL_REG));
+++
+++ if (spdif_record_tclock_set(base, platform_data->tclk)) {
+++ snd_printk("Marvell ALSA driver ERR. SPDIF clock set failed\n");
+++ return 1;
+++ }
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip *chip)
+++{
+++ struct mv88fx_snd_stream *audio_stream = chip->stream[PLAYBACK];
+++ struct snd_pcm_substream *substream = audio_stream->substream;
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv_audio_playback_ctrl pcm_play_ctrl;
+++ struct mv_i2s_playback_ctrl i2s_play_ctrl;
+++ struct mv_spdif_playback_ctrl spdif_play_ctrl;
+++ struct mv_audio_freq_data dco_ctrl;
+++
+++ dco_ctrl.offset = chip->dco_ctrl_offst;
+++
+++ switch (audio_stream->rate) {
+++ case 44100:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+++ break;
+++ case 48000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+++ break;
+++ case 96000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+++ break;
+++ default:
+++ snd_printk("Requested rate %d is not supported\n",
+++ runtime->rate); return -1;
+++ }
+++
+++ pcm_play_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+++ AUDIO_32BYTE_BURST;
+++
+++ pcm_play_ctrl.loopBack = chip->loopback;
+++
+++ if (audio_stream->stereo) {
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_MONO_OFF;
+++ } else {
+++ switch (audio_stream->mono_mode) {
+++ case MONO_LEFT:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_LEFT_MONO;
+++ break;
+++ case MONO_RIGHT:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_RIGHT_MONO;
+++ break;
+++ case MONO_BOTH:
+++ default:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_BOTH_MONO;
+++ break;
+++ }
+++ }
+++
+++ if (audio_stream->format == SAMPLE_16IN16) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_16BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_16BIT;
+++ } else if (audio_stream->format == SAMPLE_24IN32) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_24BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_24BIT;
+++ } else if (audio_stream->format == SAMPLE_32IN32) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_32BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_32BIT;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ pcm_play_ctrl.bufferPhyBase = audio_stream->dma_addr;
+++ pcm_play_ctrl.bufferSize = audio_stream->dma_size;
+++ pcm_play_ctrl.intByteCount = audio_stream->period_size;
+++
+++ /* I2S playback streem stuff */
+++ /*i2s_play_ctrl.sampleSize = pcm_play_ctrl.sampleSize;*/
+++ i2s_play_ctrl.justification = I2S_JUSTIFIED;
+++ i2s_play_ctrl.sendLastFrame = 0;
+++
+++ spdif_play_ctrl.nonPcm = FALSE;
+++
+++ spdif_play_ctrl.validity = chip->ch_stat_valid;
+++
+++ if (audio_stream->stat_mem) {
+++ spdif_play_ctrl.userBitsFromMemory = TRUE;
+++ spdif_play_ctrl.validityFromMemory = TRUE;
+++ spdif_play_ctrl.blockStartInternally = FALSE;
+++ } else {
+++ spdif_play_ctrl.userBitsFromMemory = FALSE;
+++ spdif_play_ctrl.validityFromMemory = FALSE;
+++ spdif_play_ctrl.blockStartInternally = TRUE;
+++ }
+++
+++ /* If this is non-PCM sound, mute I2S channel */
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ if (!(readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ (APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK))) {
+++
+++ if (mv_audio_dco_ctrl_set(&dco_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize DCO clock control.\n");
+++ goto error;
+++ }
+++ }
+++
+++ if (audio_stream->clock_src == DCO_CLOCK)
+++ while ((readl(chip->base + MV_AUDIO_SPCR_DCO_STATUS_REG) &
+++ ASDSR_DCO_LOCK_MASK) == 0)
+++ cpu_relax();
+++ else if (audio_stream->clock_src == SPCR_CLOCK)
+++ while ((readl(chip->base + MV_AUDIO_SPCR_DCO_STATUS_REG) &
+++ ASDSR_SPCR_LOCK_MASK) == 0)
+++ cpu_relax();
+++
+++ if (mv_audio_playback_control_set(chip->base, chip->audio_offset,
+++ &pcm_play_ctrl)) {
+++ snd_printk("Failed to initialize PCM playback control.\n");
+++ goto error;
+++ }
+++
+++ if (mv_i2s_playback_ctrl_set(chip->base, &i2s_play_ctrl)) {
+++ snd_printk("Failed to initialize I2S playback control.\n");
+++ goto error;
+++ }
+++
+++ mv_spdif_playback_ctrl_set(chip->base, &spdif_play_ctrl);
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++error:
+++ spin_unlock_irq(&chip->reg_lock);
+++ return -1;
+++}
+++
+++int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip *chip)
+++{
+++ struct mv88fx_snd_stream *audio_stream = chip->stream[CAPTURE];
+++ struct snd_pcm_substream *substream = audio_stream->substream;
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv_audio_record_ctrl pcm_rec_ctrl;
+++ struct mv_i2s_record_ctrl i2s_rec_ctrl;
+++ struct mv_audio_freq_data dco_ctrl;
+++
+++ dco_ctrl.offset = chip->dco_ctrl_offst;
+++
+++ switch (audio_stream->rate) {
+++ case 44100:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+++ break;
+++ case 48000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+++ break;
+++ case 96000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+++ break;
+++ default:
+++ snd_printk("Requested rate %d is not supported\n",
+++ runtime->rate); return -1;
+++ }
+++
+++ pcm_rec_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+++ AUDIO_32BYTE_BURST;
+++
+++ if (audio_stream->format == SAMPLE_16IN16) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_16BIT;
+++ } else if (audio_stream->format == SAMPLE_24IN32) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_24BIT;
+++ } else if (audio_stream->format == SAMPLE_32IN32) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_32BIT;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* If request for tereo record comes on the boards that doesn't
+++ * support stereo recording */
+++ if ((!chip->stereo) && audio_stream->stereo) {
+++ snd_printk("Stereo recording is not supported\n");
+++ return -1;
+++ }
+++
+++ pcm_rec_ctrl.mono = (audio_stream->stereo) ? FALSE : TRUE;
+++
+++ if (pcm_rec_ctrl.mono) {
+++ switch (audio_stream->mono_mode) {
+++ case MONO_LEFT:
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+++ break;
+++ default:
+++ case MONO_RIGHT:
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_RIGHT_MONO;
+++ break;
+++ }
+++
+++ } else {
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+++ }
+++
+++
+++ pcm_rec_ctrl.bufferPhyBase = audio_stream->dma_addr;
+++ pcm_rec_ctrl.bufferSize = audio_stream->dma_size;
+++
+++ pcm_rec_ctrl.intByteCount = audio_stream->period_size;
+++
+++ /* I2S record streem stuff */
+++ i2s_rec_ctrl.sample = pcm_rec_ctrl.sampleSize;
+++ i2s_rec_ctrl.justf = I2S_JUSTIFIED;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ /* set clock only if record is not enabled*/
+++ if (!(readl(chip->base + MV_AUDIO_RECORD_CTRL_REG) &
+++ (ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK))) {
+++
+++ if (mv_audio_dco_ctrl_set(&dco_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize DCO clock control.\n");
+++ return -1;
+++ }
+++ }
+++
+++ if (mv_audio_record_control_set(&pcm_rec_ctrl, chip->audio_offset,
+++ chip->base)) {
+++ snd_printk("Failed to initialize PCM record control.\n");
+++ return -1;
+++ }
+++
+++ if (mv_i2s_record_cntrl_set(&i2s_rec_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize I2S record control.\n");
+++ return -1;
+++ }
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++}
+++
+++static void mv_audio_init(void __iomem *base)
+++{
+++ int timeout = 10000000;
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + 0x1200);
+++ reg_data &= (~(0x333FF8));
+++ reg_data |= 0x111D18;
+++
+++ writel(reg_data, base + 0x1200);
+++
+++ do {
+++ timeout--;
+++ } while (timeout);
+++
+++ reg_data = readl(base + 0x1200);
+++ reg_data &= (~(0x333FF8));
+++ reg_data |= 0x111D18;
+++
+++ writel(reg_data, base + 0x1200);
+++}
+++
+++static void audio_setup_wins(void __iomem *base,
+++ struct mbus_dram_target_info *dram)
+++{
+++ int win_num;
+++
+++ /* First disable and clear windows */
+++ for (win_num = 0; win_num < MV_AUDIO_MAX_ADDR_DECODE_WIN; win_num++) {
+++ writel(0, base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ writel(0, base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ }
+++
+++ /* Setup windows for DDR */
+++ for (win_num = 0; win_num < MV_AUDIO_MAX_ADDR_DECODE_WIN; win_num++) {
+++ /* We will set the Window to DRAM_CS1 in default */
+++ struct mbus_dram_window *cs = &dram->cs[1];
+++
+++ writel(cs->base & 0xffff0000,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ writel(((cs->size - 1) & 0xffff0000) |
+++ (cs->mbus_attr << 8) |
+++ (dram->mbus_dram_target_id << 4) | 1,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ }
+++}
+++
+++#define MV_BOARD_TCLK_133MHZ 133333333
+++#define MV_BOARD_TCLK_150MHZ 150000000
+++#define MV_BOARD_TCLK_166MHZ 166666667
+++#define MV_BOARD_TCLK_200MHZ 200000000
+++
+++static int spdif_record_tclock_set(void __iomem *base, unsigned int tclk)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_SPDIF_REC_GEN_REG);
+++
+++ switch (tclk) {
+++ case MV_BOARD_TCLK_133MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_133MHZ;
+++ break;
+++ case MV_BOARD_TCLK_150MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_150MHZ;
+++ break;
+++ case MV_BOARD_TCLK_166MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_166MHZ;
+++ break;
+++ case MV_BOARD_TCLK_200MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_200MHZ;
+++ break;
+++ default:
+++ snd_printk("Not supported core clock %d\n", tclk);
+++ return 1;
+++ }
+++
+++ writel(reg_data, base + MV_AUDIO_SPDIF_REC_GEN_REG);
+++
+++ return 0;
+++}
+++
+++static int mv_audio_record_control_set(struct mv_audio_record_ctrl *ctrl,
+++ unsigned int audio_offset, void __iomem *base)
+++{
+++ unsigned int reg, buff_start, buff_end;
+++ unsigned int win_base, win_size;
+++
+++ if (ctrl->monoChannel > AUDIO_REC_RIGHT_MONO) {
+++ snd_printk("Error: Illegal monoChannel %x\n",
+++ ctrl->monoChannel);
+++
+++ return 1;
+++ }
+++
+++ if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+++ (ctrl->burst != AUDIO_128BYTE_BURST)) {
+++ snd_printk("Error: Illegal burst %x\n",
+++ ctrl->burst);
+++
+++ return 1;
+++ }
+++
+++ if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1)) {
+++ snd_printk("Error bufferPhyBase is not aligned to 0x%x"\
+++ " bytes\n", MV_AUDIO_BUFFER_MIN_ALIGN);
+++
+++ return 1;
+++ }
+++
+++ if ((ctrl->bufferSize <= audio_burst_bytes_num_get(ctrl->burst)) |
+++ (ctrl->bufferSize & (audio_burst_bytes_num_get(ctrl->burst) - 1)) ||
+++ (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))) {
+++ snd_printk("Error bufferSize smaller than or not multiple "\
+++ "of 0x%x bytes or larger than 0x%x\n",
+++ audio_burst_bytes_num_get(ctrl->burst),
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg &= ~(ARCR_RECORD_BURST_SIZE_MASK | ARCR_RECORDED_MONO_CHNL_MASK |
+++ ARCR_RECORD_SAMPLE_SIZE_MASK);
+++
+++ switch (ctrl->sampleSize) {
+++ case SAMPLE_16BIT:
+++ case SAMPLE_16BIT_NON_COMPACT:
+++ case SAMPLE_20BIT:
+++ case SAMPLE_24BIT:
+++ case SAMPLE_32BIT:
+++ reg |= ctrl->sampleSize << ARCR_RECORD_SAMPLE_SIZE_OFFS;
+++ break;
+++ default:
+++ snd_printk("Error: Illegal sampleSize %x\n",
+++ ctrl->sampleSize);
+++
+++ return 1;
+++ }
+++
+++ reg |= ctrl->burst << ARCR_RECORD_BURST_SIZE_OFFS;
+++ reg |= ctrl->monoChannel << ARCR_RECORDED_MONO_CHNL_OFFS;
+++
+++ if (ctrl->mono)
+++ reg |= ARCR_RECORD_MONO_MASK;
+++ else
+++ reg &= (~ARCR_RECORD_MONO_MASK);
+++
+++ writel(reg, base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* Get the details of the Record address window*/
+++ win_base = readl(base + MV_AUDIO_WIN_BASE_REG(MV_AUDIO_RECORD_WIN_NUM));
+++ win_size = readl(base + MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_RECORD_WIN_NUM));
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ win_size = ((win_size >> 16) + 1) << 16;
+++
+++ buff_start = ctrl->bufferPhyBase;
+++ buff_end = buff_start + ctrl->bufferSize - 1;
+++
+++ /* If buffer address is not within window boundries then try to set a
+++ * new value to the Record window by geting the target of where the
+++ * buffer exist, if the buffer is within the window of the new target
+++ * then set the Record window to that target else return Fail
+++ */
+++
+++ if (!(((buff_start >= win_base) &&
+++ (buff_start <= (win_base + win_size - 1))) ||
+++ ((buff_end >= win_base) &&
+++ (buff_end <= (win_base + win_size - 1))))) {
+++ snd_printd("Audio record buffer is not within window");
+++
+++ /* Set the window for the buffer that user require
+++ for the palyback\recording window to the target window */
+++ if (set_window_as_per_baseadd(base, ctrl->bufferPhyBase,
+++ audio_offset, MV_AUDIO_RECORD_WIN_NUM)) {
+++ snd_printk("Playback buffer (%#x) is not "
+++ "within a valid target\n",
+++ ctrl->bufferPhyBase);
+++ return 1;
+++ }
+++ }
+++
+++ /* Set the interrupt byte count */
+++ reg = ctrl->intByteCount & ARBCI_BYTE_COUNT_MASK;
+++ writel(reg, base + MV_AUDIO_RECORD_BYTE_CNTR_INT_REG);
+++
+++ writel(ctrl->bufferPhyBase, base + MV_AUDIO_RECORD_START_ADDR_REG);
+++ writel(AUDIO_SIZE_TO_REG(ctrl->bufferSize),
+++ base + MV_AUDIO_RECORD_BUFF_SIZE_REG);
+++
+++
+++ return 0;
+++}
+++
+++static int mv_i2s_record_cntrl_set(struct mv_i2s_record_ctrl *ctrl,
+++ void __iomem *base)
+++{
+++ unsigned int reg;
+++
+++ reg = readl(base + MV_AUDIO_I2S_REC_CTRL_REG);
+++ reg &= ~(AIRCR_I2S_RECORD_JUSTF_MASK|AIRCR_I2S_SAMPLE_SIZE_MASK);
+++
+++ switch (ctrl->justf) {
+++ case I2S_JUSTIFIED:
+++ case LEFT_JUSTIFIED:
+++ case RIGHT_JUSTIFIED:
+++ case RISE_BIT_CLCK_JUSTIFIED:
+++ reg |= ctrl->justf << AIRCR_I2S_RECORD_JUSTF_OFFS;
+++ break;
+++ default:
+++ return 1;
+++ }
+++
+++ reg |= ctrl->sample << AIRCR_I2S_SAMPLE_SIZE_OFFS;
+++
+++ writel(reg, base + MV_AUDIO_I2S_REC_CTRL_REG);
+++ return 0;
+++}
+++
+++/* We trust the value set in the window registers and don't check them.
+++ * As there is some value already present in the register, we assume
+++ * base and size are aligned */
+++
+++static int set_window_as_per_baseadd(void __iomem *base, unsigned int baseadd,
+++ unsigned int audio_offset, int win_num)
+++{
+++ int dram_cs, win;
+++ unsigned int win_base, win_size, size;
+++ unsigned char dram_attr[4] = {0x0E, 0x0D, 0x0B, 0x07};
+++
+++ /* Base passed is Audio base address. Audio base address is
+++ * Internal register base address + audio_offset */
+++ void __iomem *internal_reg_base = base - audio_offset;
+++
+++ for (dram_cs = 0; dram_cs < 4; dram_cs++) {
+++ win_base = readl(internal_reg_base + 0x1500 + (8 * dram_cs));
+++ win_size = readl(internal_reg_base + 0x1504 + (8 * dram_cs));
+++
+++ /* skip if window is disabled */
+++ if (!(win_size & 1))
+++ continue;
+++
+++ /* Window size bits are 31:24. Where size =
+++ * (2 ^ no of ones) * 16 MB. e.g. 0x0F says 256MB */
+++ size = ((win_size >> 24) + 1) << 24;
+++
+++ if ((baseadd >= win_base) && (baseadd < (win_base + size))) {
+++ snd_printd("DRAM window %d set for %s window",
+++ dram_cs, win_num ? "plaback" : "record");
+++ writel(win_base,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++
+++ /* DRAM window ctrl regs are bit different than Audio
+++ * Set size, attribute and target ID */
+++ win_size = ((size - 1) & 0xffff0000) | 1;
+++ win_size |= (dram_attr[dram_cs] << 8); /* Atribute */
+++ win_size &= (~(0xF << 4)); /* Target ID */
+++
+++ writel(win_size,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ snd_printd("win_base 0x%08x\twin_size 0x%08x",
+++ win_base, win_size);
+++ return 0;
+++ }
+++ }
+++
+++ for (win = 0; win < 8; win++) {
+++ win_base = readl(internal_reg_base + 0x2004 + (0x10 * win));
+++ win_size = readl(internal_reg_base + 0x2008 + (0x10 * win));
+++
+++ /* skip if window is disabled */
+++ if (!(win_size & 1))
+++ continue;
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ size = ((win_size >> 16) + 1) << 16;
+++ if ((baseadd >= win_base) && (baseadd < (win_base + size))) {
+++ snd_printd("CPU window %d set for %s window",
+++ win_base, win_num ? "plaback" : "record");
+++ writel(win_base,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ writel(win_size,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ return 0;
+++ }
+++ }
+++
+++ return 1;
+++}
+++
+++static int mv_audio_playback_control_set(void __iomem *base, unsigned int
+++ audio_offset, struct mv_audio_playback_ctrl *ctrl)
+++{
+++ unsigned int reg, buff_start, buff_end;
+++ unsigned int win_base, win_size;
+++
+++ if (ctrl->monoMode >= AUDIO_PLAY_OTHER_MONO) {
+++ snd_printk("Error: Illegal monoMode %x\n", ctrl->monoMode);
+++ return 1;
+++ }
+++
+++ if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+++ (ctrl->burst != AUDIO_128BYTE_BURST)) {
+++ snd_printk("Error: Illegal burst %x\n", ctrl->burst);
+++ return 1;
+++ }
+++
+++ if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1)) {
+++ snd_printk("Error, bufferPhyBase is not aligned to 0x%x "\
+++ "bytes\n", MV_AUDIO_BUFFER_MIN_ALIGN);
+++ return 1;
+++ }
+++
+++ if ((ctrl->bufferSize <= audio_burst_bytes_num_get(ctrl->burst)) ||
+++ (ctrl->bufferSize & (audio_burst_bytes_num_get(ctrl->burst) - 1)) ||
+++ (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))) {
+++ snd_printk("Error, bufferSize smaller than or not multiple "\
+++ "of 0x%x bytes or larger than 0x%x",
+++ audio_burst_bytes_num_get(ctrl->burst),
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg &= ~(APCR_PLAY_BURST_SIZE_MASK | APCR_LOOPBACK_MASK |
+++ APCR_PLAY_MONO_MASK | APCR_PLAY_SAMPLE_SIZE_MASK);
+++ reg |= ctrl->burst << APCR_PLAY_BURST_SIZE_OFFS;
+++ reg |= ctrl->loopBack << APCR_LOOPBACK_OFFS;
+++ reg |= ctrl->monoMode << APCR_PLAY_MONO_OFFS;
+++ reg |= ctrl->sampleSize << APCR_PLAY_SAMPLE_SIZE_OFFS;
+++ writel(reg, base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* Get the details of the Playback address window*/
+++ win_base = readl(base +
+++ MV_AUDIO_WIN_BASE_REG(MV_AUDIO_PLAYBACK_WIN_NUM));
+++ win_size = readl(base +
+++ MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_PLAYBACK_WIN_NUM));
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ win_size = ((win_size >> 16) + 1) << 16;
+++
+++ buff_start = ctrl->bufferPhyBase;
+++ buff_end = buff_start + ctrl->bufferSize - 1;
+++
+++ /* If Playback window is not enabled or buffer address is not within
+++ * window boundries then try to set a new value to the Playback window*/
+++
+++ if (!(((buff_start >= win_base) &&
+++ (buff_start <= (win_base + win_size - 1))) ||
+++ ((buff_end >= win_base) &&
+++ (buff_end <= (win_base + win_size - 1))))) {
+++ snd_printd("Audio playback buffer is not within window\n");
+++
+++ /* Set the window for the buffer that user require
+++ for the palyback\recording window to the target window */
+++ if (set_window_as_per_baseadd(base, ctrl->bufferPhyBase,
+++ audio_offset, MV_AUDIO_PLAYBACK_WIN_NUM)) {
+++ snd_printk("Record buffer (%#x) is not "
+++ "within a valid target\n",
+++ ctrl->bufferPhyBase);
+++ return 1;
+++ }
+++ }
+++
+++ /* Set the interrupt byte count */
+++ reg = ctrl->intByteCount & APBCI_BYTE_COUNT_MASK;
+++ writel(reg, base + MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG);
+++
+++ writel(ctrl->bufferPhyBase,
+++ base + MV_AUDIO_PLAYBACK_BUFF_START_REG);
+++ writel(AUDIO_SIZE_TO_REG(ctrl->bufferSize),
+++ base + MV_AUDIO_PLAYBACK_BUFF_SIZE_REG);
+++
+++ return 0;
+++}
+++
+++static int mv_i2s_playback_ctrl_set(void __iomem *base,
+++ struct mv_i2s_playback_ctrl *ctrl)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_I2S_PLAY_CTRL_REG);
+++ reg_data &= ~(AIPCR_I2S_PB_JUSTF_MASK | AIPCR_I2S_PB_SAMPLE_SIZE_MASK);
+++
+++ if (ctrl->sampleSize > SAMPLE_16BIT) {
+++ snd_printk("Illigal sample size\n");
+++ return 1;
+++ }
+++
+++ reg_data |= ctrl->sampleSize << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS;
+++
+++ if (ctrl->sendLastFrame)
+++ reg_data |= AIPCR_I2S_SEND_LAST_FRM_MASK;
+++ else
+++ reg_data &= ~AIPCR_I2S_SEND_LAST_FRM_MASK;
+++
+++ switch (ctrl->justification) {
+++ case I2S_JUSTIFIED:
+++ case LEFT_JUSTIFIED:
+++ case RIGHT_JUSTIFIED:
+++ reg_data |= ctrl->justification << AIPCR_I2S_PB_JUSTF_OFFS;
+++ break;
+++ default:
+++ snd_printk("Illigal justification value\n");
+++ return 1;
+++ }
+++
+++ writel(reg_data, base + MV_AUDIO_I2S_PLAY_CTRL_REG);
+++
+++ return 0;
+++}
+++
+++static void mv_spdif_playback_ctrl_set(void __iomem *base,
+++ struct mv_spdif_playback_ctrl *ctrl)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_SPDIF_PLAY_CTRL_REG);
+++
+++ if (ctrl->blockStartInternally)
+++ reg_data |= ASPCR_SPDIF_BLOCK_START_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_BLOCK_START_MASK;
+++
+++ if (ctrl->validityFromMemory)
+++ reg_data |= ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK;
+++
+++ if (ctrl->userBitsFromMemory)
+++ reg_data |= ASPCR_SPDIF_PB_MEM_USR_EN_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_MEM_USR_EN_MASK;
+++
+++ if (ctrl->validity)
+++ reg_data |= ASPCR_SPDIF_PB_REG_VALIDITY_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_REG_VALIDITY_MASK;
+++
+++ if (ctrl->nonPcm)
+++ reg_data |= ASPCR_SPDIF_PB_NONPCM_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_NONPCM_MASK;
+++
+++ writel(reg_data, base + MV_AUDIO_SPDIF_PLAY_CTRL_REG);
+++}
+++
+++static int mv_audio_dco_ctrl_set(struct mv_audio_freq_data *dcoCtrl,
+++ void __iomem *base)
+++{
+++ unsigned int reg;
+++
+++ /* Check parameters*/
+++ if (dcoCtrl->baseFreq > AUDIO_FREQ_96KH) {
+++ snd_printk("dcoCtrl->baseFreq value (0x%x) invalid\n",
+++ dcoCtrl->baseFreq);
+++ return 1;
+++ }
+++
+++ if ((dcoCtrl->offset > 0xFD0) || (dcoCtrl->offset < 0x20)) {
+++ snd_printk("dcoCtrl->offset value (0x%x) invalid\n",
+++ dcoCtrl->baseFreq);
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_DCO_CTRL_REG);
+++
+++ reg &= ~(ADCR_DCO_CTRL_FS_MASK | ADCR_DCO_CTRL_OFFSET_MASK);
+++ reg |= ((dcoCtrl->baseFreq << ADCR_DCO_CTRL_FS_OFFS) |
+++ (dcoCtrl->offset << ADCR_DCO_CTRL_OFFSET_OFFS));
+++
+++ writel(reg, base + MV_AUDIO_DCO_CTRL_REG);
+++
+++ return 0;
+++}
++diff --git a/sound/soc/kirkwood/kirkwood_audio_hal.h b/sound/soc/kirkwood/kirkwood_audio_hal.h
++new file mode 100644
++index 0000000..ce08102
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_hal.h
++@@ -0,0 +1,109 @@
+++/*
+++ * Sound driver data definition file for Marvell Kirkwood family SOCs
+++ */
+++
+++#ifndef __AUDIO_HAL_H
+++#define __AUDIO_HAL_H
+++
+++#include "kirkwood_audio_regs.h"
+++
+++#ifdef CONFIG_SND_SOC_CS42L51
+++#include "cs42l51.h"
+++
+++#define codec_init cs42l51_init
+++#define codec_vol_get cs42l51_vol_get
+++#define codec_vol_set cs42l51_vol_set
+++#define codec_del_i2c_device cs42l51_del_i2c_device
+++#endif
+++
+++#define CODEC_I2C_BUS_NO 0
+++#define CODEC_I2C_ADD 0x4A
+++
+++/*********************************/
+++/* General enums and structures */
+++/*******************************/
+++/* Type of Audio operations*/
+++enum mv_audio_operation {
+++ AUDIO_PLAYBACK = 0,
+++ AUDIO_RECORD = 1
+++};
+++
+++struct mv_audio_freq_data{
+++ int baseFreq; /* Control FS, selects the base frequency
+++ * of the DCO */
+++ u32 offset; /* Offset control in which each step equals to
+++ * 0.9536 ppm */
+++};
+++
+++
+++/***********************************/
+++/* Play Back related structures */
+++/*********************************/
+++
+++struct mv_audio_playback_ctrl {
+++ int burst; /* Specifies the Burst Size of the DMA */
+++ bool loopBack; /* When Loopback is enabled, playback data
+++ * is looped back to be recorded */
+++ int monoMode; /* Mono Mode is used */
+++ unsigned int bufferPhyBase; /* Physical Address of DMA buffer */
+++ unsigned int bufferSize; /* Size of DMA buffer */
+++ unsigned int intByteCount; /* Number of bytes after which an
+++ * interrupt will be issued.*/
+++ int sampleSize; /* Playback Sample Size*/
+++};
+++
+++struct mv_spdif_playback_ctrl {
+++ bool nonPcm; /* PCM or non-PCM mode*/
+++ bool validity; /* Validity bit value when using
+++ * registers (userBitsFromMemory=0) */
+++ bool underrunData; /* If true send last frame on mute/pause/
+++ * underrun otherwise send 24 binary */
+++ bool userBitsFromMemory; /* otherwise from intenal registers */
+++ bool validityFromMemory; /* otherwise from internal registers */
+++ bool blockStartInternally; /* When user and valid bits are form
+++ * registers then this bit should be zero */
+++};
+++
+++struct mv_i2s_playback_ctrl {
+++ int sampleSize;
+++ int justification;
+++ bool sendLastFrame; /* If true send last frame on
+++ * mute/pause/underrun
+++ * otherwise send 64 binary*/
+++};
+++
+++
+++/*********************************/
+++/* Recording related structures */
+++/*********************************/
+++
+++struct mv_audio_record_ctrl {
+++ int burst; /* Recording DMA Burst Size */
+++ int sampleSize; /*Recording Sample Size */
+++ bool mono; /* If true then recording mono else
+++ * recording stereo */
+++ int monoChannel; /* Left or right moono */
+++ u32 bufferPhyBase; /* Physical Address of DMA buffer */
+++ u32 bufferSize; /* Size of DMA buffer */
+++
+++ u32 intByteCount; /* Number of bytes after which an
+++ * interrupt will be issued.*/
+++
+++};
+++
+++struct mv_i2s_record_ctrl {
+++ int sample; /* I2S Recording Sample Size*/
+++ int justf;
+++};
+++
+++/******************/
+++/* Functions API */
+++/****************/
+++
+++extern struct mv88fx_snd_chip *chip;
+++
+++int mv88fx_snd_hw_init(struct snd_card *card);
+++int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip *chip);
+++int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip *chip);
+++
+++#endif
++diff --git a/sound/soc/kirkwood/kirkwood_audio_regs.h b/sound/soc/kirkwood/kirkwood_audio_regs.h
++new file mode 100644
++index 0000000..1d3df15
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_regs.h
++@@ -0,0 +1,310 @@
+++/*
+++ * Audio registers for Marvell Kirkwood family SOCs
+++ */
+++
+++#ifndef __KW_AUDIO_REGS_H
+++#define __KW_AUDIO_REGS_H
+++
+++enum mv_audio_freq {
+++ AUDIO_FREQ_44_1KH = 0, /* 11.2896Mhz */
+++ AUDIO_FREQ_48KH = 1, /* 12.288Mhz */
+++ AUDIO_FREQ_96KH = 2, /* 24.576Mhz */
+++ AUDIO_FREQ_LOWER_44_1KH = 3 , /* Lower than 11.2896MHz */
+++ AUDIO_FREQ_HIGHER_96KH = 4, /* Higher than 24.576MHz */
+++ AUDIO_FREQ_OTHER = 7, /* Other frequency */
+++};
+++
+++enum mv_audio_burst_size {
+++ AUDIO_32BYTE_BURST = 1,
+++ AUDIO_128BYTE_BURST = 2,
+++};
+++
+++enum mv_audio_playback_mono {
+++ AUDIO_PLAY_MONO_OFF = 0,
+++ AUDIO_PLAY_LEFT_MONO = 1,
+++ AUDIO_PLAY_RIGHT_MONO = 2,
+++ AUDIO_PLAY_BOTH_MONO = 3,
+++ AUDIO_PLAY_OTHER_MONO = 4
+++};
+++
+++enum mv_audio_record_mono {
+++ AUDIO_REC_LEFT_MONO = 0,
+++ AUDIO_REC_RIGHT_MONO = 1,
+++};
+++
+++enum mv_audio_sample_size {
+++ SAMPLE_32BIT = 0,
+++ SAMPLE_24BIT = 1,
+++ SAMPLE_20BIT = 2,
+++ SAMPLE_16BIT = 3,
+++ SAMPLE_16BIT_NON_COMPACT = 7
+++};
+++
+++enum mv_audio_i2s_justification {
+++ LEFT_JUSTIFIED = 0,
+++ I2S_JUSTIFIED = 5,
+++ RISE_BIT_CLCK_JUSTIFIED = 7,
+++ RIGHT_JUSTIFIED = 8,
+++};
+++
+++#define APBBCR_SIZE_MAX 0x3FFFFF
+++#define APBBCR_SIZE_SHIFT 0x2
+++
+++#define AUDIO_REG_TO_SIZE(reg) (((reg) + 1) << APBBCR_SIZE_SHIFT)
+++#define AUDIO_SIZE_TO_REG(size) (((size) >> APBBCR_SIZE_SHIFT) - 1)
+++
+++#define MV_AUDIO_BUFFER_MIN_ALIGN 0x8
+++
+++/********************/
+++/* Clocking Control*/
+++/*******************/
+++
+++#define MV_AUDIO_DCO_CTRL_REG 0x1204
+++#define MV_AUDIO_SPCR_DCO_STATUS_REG 0x120c
+++#define MV_AUDIO_SAMPLE_CNTR_CTRL_REG 0x1220
+++#define MV_AUDIO_PLAYBACK_SAMPLE_CNTR_REG 0x1224
+++#define MV_AUDIO_RECORD_SAMPLE_CNTR_REG 0x1228
+++#define MV_AUDIO_CLOCK_CTRL_REG 0x1230
+++
+++/* MV_AUDIO_DCO_CTRL_REG */
+++#define ADCR_DCO_CTRL_FS_OFFS 0
+++#define ADCR_DCO_CTRL_FS_MASK (0x3 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_44_1KHZ (0x0 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_48KHZ (0x1 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_96KHZ (0x2 << ADCR_DCO_CTRL_FS_OFFS)
+++
+++
+++#define ADCR_DCO_CTRL_OFFSET_OFFS 2
+++#define ADCR_DCO_CTRL_OFFSET_MASK (0xfff << ADCR_DCO_CTRL_OFFSET_OFFS)
+++
+++/* MV_AUDIO_SPCR_DCO_STATUS_REG */
+++#define ASDSR_SPCR_CTRLFS_OFFS 0
+++#define ASDSR_SPCR_CTRLFS_MASK (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_44_1KHZ (0x0 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_48KHZ (0x1 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_96KHZ (0x2 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_44_1KHZ_LESS (0x3 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_96KHZ_MORE (0x4 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_OTHER (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+++
+++
+++#define ASDSR_SPCR_CTRLOFFSET_OFFS 3
+++#define ASDSR_SPCR_CTRLOFFSET_MASK (0xfff << ASDSR_SPCR_CTRLOFFSET_OFFS)
+++
+++#define ASDSR_SPCR_LOCK_OFFS 15
+++#define ASDSR_SPCR_LOCK_MASK (0x1 << ASDSR_SPCR_LOCK_OFFS)
+++
+++#define ASDSR_DCO_LOCK_OFFS 16
+++#define ASDSR_DCO_LOCK_MASK (0x1 << ASDSR_DCO_LOCK_OFFS)
+++
+++#define ASDSR_PLL_LOCK_OFFS 17
+++#define ASDSR_PLL_LOCK_MASK (0x1 << ASDSR_PLL_LOCK_OFFS)
+++
+++/*MV_AUDIO_SAMPLE_CNTR_CTRL_REG */
+++
+++#define ASCCR_CLR_PLAY_CNTR_OFFS 9
+++#define ASCCR_CLR_PLAY_CNTR_MASK (0x1 << ASCCR_CLR_PLAY_CNTR_OFFS)
+++
+++#define ASCCR_CLR_REC_CNTR_OFFS 8
+++#define ASCCR_CLR_REC_CNTR_MASK (0x1 << ASCCR_CLR_REC_CNTR_OFFS)
+++
+++#define ASCCR_ACTIVE_PLAY_CNTR_OFFS 1
+++#define ASCCR_ACTIVE_PLAY_CNTR_MASK (0x1 << ASCCR_ACTIVE_PLAY_CNTR_OFFS)
+++
+++#define ASCCR_ACTIVE_REC_CNTR_OFFS 0
+++#define ASCCR_ACTIVE_REC_CNTR_MASK (0x1 << ASCCR_ACTIVE_REC_CNTR_OFFS)
+++
+++/* MV_AUDIO_CLOCK_CTRL_REG */
+++#define ACCR_MCLK_SOURCE_OFFS 0
+++#define ACCR_MCLK_SOURCE_MASK (0x3 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_DCO (0x0 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_SPCR (0x2 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_EXT (0x3 << ACCR_MCLK_SOURCE_OFFS)
+++
+++
+++/*********************/
+++/* Interrupts */
+++/*******************/
+++#define MV_AUDIO_ERROR_CAUSE_REG 0x1300
+++#define MV_AUDIO_ERROR_MASK_REG 0x1304
+++#define MV_AUDIO_INT_CAUSE_REG 0x1308
+++#define MV_AUDIO_INT_MASK_REG 0x130C
+++#define MV_AUDIO_RECORD_BYTE_CNTR_INT_REG 0x1310
+++#define MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG 0x1314
+++
+++/* MV_AUDIO_INT_CAUSE_REG*/
+++#define AICR_RECORD_BYTES_INT (0x1 << 13)
+++#define AICR_PLAY_BYTES_INT (0x1 << 14)
+++
+++#define ARBCI_BYTE_COUNT_MASK 0xFFFFFF
+++#define APBCI_BYTE_COUNT_MASK 0xFFFFFF
+++
+++/*********************/
+++/* Audio Playback */
+++/*******************/
+++/* General */
+++#define MV_AUDIO_PLAYBACK_CTRL_REG 0x1100
+++#define MV_AUDIO_PLAYBACK_BUFF_START_REG 0x1104
+++#define MV_AUDIO_PLAYBACK_BUFF_SIZE_REG 0x1108
+++#define MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG 0x110c
+++
+++/* SPDIF */
+++#define MV_AUDIO_SPDIF_PLAY_CTRL_REG 0x2204
+++#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(ind) \
+++ (0x2280 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(ind) \
+++ (0x22a0 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(ind) \
+++ (0x22c0 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(ind) \
+++ (0x22e0 + (ind << 2))
+++
+++/* I2S */
+++#define MV_AUDIO_I2S_PLAY_CTRL_REG 0x2508
+++
+++
+++/* MV_AUDIO_PLAYBACK_CTRL_REG */
+++#define APCR_PLAY_SAMPLE_SIZE_OFFS 0
+++#define APCR_PLAY_SAMPLE_SIZE_MASK (0x7 << APCR_PLAY_SAMPLE_SIZE_OFFS)
+++
+++#define APCR_PLAY_I2S_ENABLE_OFFS 3
+++#define APCR_PLAY_I2S_ENABLE_MASK (0x1 << APCR_PLAY_I2S_ENABLE_OFFS)
+++
+++#define APCR_PLAY_SPDIF_ENABLE_OFFS 4
+++#define APCR_PLAY_SPDIF_ENABLE_MASK (0x1 << APCR_PLAY_SPDIF_ENABLE_OFFS)
+++
+++#define APCR_PLAY_MONO_OFFS 5
+++#define APCR_PLAY_MONO_MASK (0x3 << APCR_PLAY_MONO_OFFS)
+++
+++#define APCR_PLAY_I2S_MUTE_OFFS 7
+++#define APCR_PLAY_I2S_MUTE_MASK (0x1 << APCR_PLAY_I2S_MUTE_OFFS)
+++
+++#define APCR_PLAY_SPDIF_MUTE_OFFS 8
+++#define APCR_PLAY_SPDIF_MUTE_MASK (0x1 << APCR_PLAY_SPDIF_MUTE_OFFS)
+++
+++#define APCR_PLAY_PAUSE_OFFS 9
+++#define APCR_PLAY_PAUSE_MASK (0x1 << APCR_PLAY_PAUSE_OFFS)
+++
+++#define APCR_LOOPBACK_OFFS 10
+++#define APCR_LOOPBACK_MASK (0x1 << APCR_LOOPBACK_OFFS)
+++
+++#define APCR_PLAY_BURST_SIZE_OFFS 11
+++#define APCR_PLAY_BURST_SIZE_MASK (0x3 << APCR_PLAY_BURST_SIZE_OFFS)
+++
+++#define APCR_PLAY_BUSY_OFFS 16
+++#define APCR_PLAY_BUSY_MASK (0x1 << APCR_PLAY_BUSY_OFFS)
+++
+++/* MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG */
+++#define APBBCR_SIZE_MAX 0x3FFFFF
+++#define APBBCR_SIZE_SHIFT 0x2
+++
+++
+++/* MV_AUDIO_SPDIF_PLAY_CTRL_REG */
+++#define ASPCR_SPDIF_BLOCK_START_OFFS 0x0
+++#define ASPCR_SPDIF_BLOCK_START_MASK (0x1 << ASPCR_SPDIF_BLOCK_START_OFFS)
+++
+++#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS 0x1
+++#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK (0x1 << \
+++ ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS)
+++
+++#define ASPCR_SPDIF_PB_MEM_USR_EN_OFFS 0x2
+++#define ASPCR_SPDIF_PB_MEM_USR_EN_MASK (0x1 << ASPCR_SPDIF_PB_MEM_USR_EN_OFFS)
+++
+++#define ASPCR_SPDIF_UNDERRUN_DATA_OFFS 0x5
+++#define ASPCR_SPDIF_UNDERRUN_DATA_MASK (0x1 << ASPCR_SPDIF_UNDERRUN_DATA_OFFS)
+++
+++#define ASPCR_SPDIF_PB_REG_VALIDITY_OFFS 16
+++#define ASPCR_SPDIF_PB_REG_VALIDITY_MASK (0x1 << \
+++ ASPCR_SPDIF_PB_REG_VALIDITY_OFFS)
+++
+++#define ASPCR_SPDIF_PB_NONPCM_OFFS 17
+++#define ASPCR_SPDIF_PB_NONPCM_MASK (0x1 << ASPCR_SPDIF_PB_NONPCM_OFFS)
+++
+++
+++/* MV_AUDIO_I2S_PLAY_CTRL_REG */
+++#define AIPCR_I2S_SEND_LAST_FRM_OFFS 23
+++#define AIPCR_I2S_SEND_LAST_FRM_MASK (1 << AIPCR_I2S_SEND_LAST_FRM_OFFS)
+++
+++#define AIPCR_I2S_PB_JUSTF_OFFS 26
+++#define AIPCR_I2S_PB_JUSTF_MASK (0xf << AIPCR_I2S_PB_JUSTF_OFFS)
+++
+++#define AIPCR_I2S_PB_SAMPLE_SIZE_OFFS 30
+++#define AIPCR_I2S_PB_SAMPLE_SIZE_MASK (0x3 << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS)
+++
+++/*********************/
+++/* Audio Recordnig */
+++/*******************/
+++/* General */
+++#define MV_AUDIO_RECORD_CTRL_REG 0x1000
+++#define MV_AUDIO_RECORD_START_ADDR_REG 0x1004
+++#define MV_AUDIO_RECORD_BUFF_SIZE_REG 0x1008
+++#define MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG 0x100C
+++
+++/* SPDIF */
+++#define MV_AUDIO_SPDIF_REC_GEN_REG 0x2004
+++#define MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG 0x2008
+++#define MV_AUDIO_SPDIF_REC_CH_STATUS_LEFT_REG(ind) \
+++ (0x2180 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_CH_STATUS_RIGHT_REG(ind) \
+++ (0x21a0 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_USR_BITS_LEFT_REG(ind) \
+++ (0x21c0 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_USR_BITS_RIGHT_REG(ind) \
+++ (0x21e0 + ((ind) << 2))
+++
+++/* I2S */
+++#define MV_AUDIO_I2S_REC_CTRL_REG 0x2408
+++
+++
+++/* MV_AUDIO_RECORD_CTRL_REG*/
+++#define ARCR_RECORD_SAMPLE_SIZE_OFFS 0
+++#define ARCR_RECORD_SAMPLE_SIZE_MASK (0x7 << ARCR_RECORD_SAMPLE_SIZE_OFFS)
+++
+++#define ARCR_RECORDED_MONO_CHNL_OFFS 3
+++#define ARCR_RECORDED_MONO_CHNL_MASK (0x1 << ARCR_RECORDED_MONO_CHNL_OFFS)
+++
+++#define ARCR_RECORD_MONO_OFFS 4
+++#define ARCR_RECORD_MONO_MASK (0x1 << ARCR_RECORD_MONO_OFFS)
+++
+++#define ARCR_RECORD_BURST_SIZE_OFFS 5
+++#define ARCR_RECORD_BURST_SIZE_MASK (0x3 << ARCR_RECORD_BURST_SIZE_OFFS)
+++
+++#define ARCR_RECORD_MUTE_OFFS 8
+++#define ARCR_RECORD_MUTE_MASK (0x1 << ARCR_RECORD_MUTE_OFFS)
+++
+++#define ARCR_RECORD_PAUSE_OFFS 9
+++#define ARCR_RECORD_PAUSE_MASK (0x1 << ARCR_RECORD_PAUSE_OFFS)
+++
+++#define ARCR_RECORD_I2S_EN_OFFS 10
+++#define ARCR_RECORD_I2S_EN_MASK (0x1 << ARCR_RECORD_I2S_EN_OFFS)
+++
+++#define ARCR_RECORD_SPDIF_EN_OFFS 11
+++#define ARCR_RECORD_SPDIF_EN_MASK (0x1 << ARCR_RECORD_SPDIF_EN_OFFS)
+++
+++
+++/* MV_AUDIO_SPDIF_REC_GEN_REG*/
+++#define ASRGR_CORE_CLK_FREQ_OFFS 1
+++#define ASRGR_CORE_CLK_FREQ_MASK (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_133MHZ (0x0 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_150MHZ (0x1 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_166MHZ (0x2 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_200MHZ (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+++
+++#define ASRGR_VALID_PCM_INFO_OFFS 7
+++#define ASRGR_VALID_PCM_INFO_MASK (0x1 << ASRGR_VALID_PCM_INFO_OFFS)
+++
+++#define ASRGR_SAMPLE_FREQ_OFFS 8
+++#define ASRGR_SAMPLE_FREQ_MASK (0xf << ASRGR_SAMPLE_FREQ_OFFS)
+++
+++#define ASRGR_NON_PCM_OFFS 14
+++#define ASRGR_NON_PCM_MASK (1 << ASRGR_NON_PCM_OFFS)
+++
+++/* MV_AUDIO_I2S_REC_CTRL_REG*/
+++#define AIRCR_I2S_RECORD_JUSTF_OFFS 26
+++#define AIRCR_I2S_RECORD_JUSTF_MASK (0xf << AIRCR_I2S_RECORD_JUSTF_OFFS)
+++
+++#define AIRCR_I2S_SAMPLE_SIZE_OFFS 30
+++#define AIRCR_I2S_SAMPLE_SIZE_MASK (0x3 << AIRCR_I2S_SAMPLE_SIZE_OFFS)
+++
+++#endif /* __KW_AUDIO_REGS_H */
+++
++diff --git a/sound/soc/kirkwood/kirkwood_pcm.c b/sound/soc/kirkwood/kirkwood_pcm.c
++new file mode 100644
++index 0000000..ed35851
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_pcm.c
++@@ -0,0 +1,1505 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++
+++#include <linux/interrupt.h>
+++#include <linux/dma-mapping.h>
+++#include <linux/platform_device.h>
+++#include <linux/mv88fx_audio.h>
+++
+++#include <sound/core.h>
+++#include <sound/control.h>
+++#include <sound/pcm.h>
+++#include <sound/asoundef.h>
+++
+++#include "kirkwood_audio_hal.h"
+++
+++struct mv88fx_snd_chip *chip;
+++
+++static int test_memory(struct mbus_dram_target_info *dram_info,
+++ unsigned int base, unsigned int size)
+++{
+++ unsigned int i;
+++
+++ for (i = 0; i <= dram_info->num_cs; i++) {
+++
+++ /* check if we get to end */
+++ if ((dram_info->cs[i].base == 0) &&
+++ (dram_info->cs[i].size == 0))
+++ break;
+++
+++ /* check if we fit into one memory window only */
+++ if ((base >= dram_info->cs[i].base) &&
+++ ((base + size) <= dram_info->cs[i].base +
+++ dram_info->cs[i].size))
+++ return 1;
+++ }
+++
+++ return 0;
+++}
+++
+++static void devdma_hw_free(struct device *dev, struct snd_pcm_substream
+++ *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+++
+++ if (runtime->dma_area == NULL)
+++ return;
+++
+++ if (buf != &substream->dma_buffer)
+++ kfree(runtime->dma_buffer_p);
+++
+++ snd_pcm_set_runtime_buffer(substream, NULL);
+++}
+++
+++static int devdma_hw_alloc(struct device *dev, struct snd_pcm_substream
+++ *substream, size_t size)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ int ret = 0;
+++
+++ if (buf) {
+++ if (buf->bytes >= size) {
+++ snd_printd("buf->bytes >= size\n");
+++ goto out;
+++ }
+++ devdma_hw_free(dev, substream);
+++ }
+++
+++ if (substream->dma_buffer.area != NULL &&
+++ substream->dma_buffer.bytes >= size) {
+++ buf = &substream->dma_buffer;
+++ } else {
+++ buf = kmalloc(sizeof(struct snd_dma_buffer), GFP_KERNEL);
+++ if (!buf) {
+++ snd_printk("buf == NULL\n");
+++ goto nomem;
+++ }
+++
+++ buf->dev.type = SNDRV_DMA_TYPE_DEV;
+++ buf->dev.dev = dev;
+++ buf->area = audio_stream->area;
+++ buf->addr = audio_stream->addr;
+++ buf->bytes = size;
+++ buf->private_data = NULL;
+++
+++ if (!buf->area) {
+++ snd_printk("buf->area == NULL\n");
+++ goto free;
+++ }
+++ }
+++
+++ snd_pcm_set_runtime_buffer(substream, buf);
+++ ret = 1;
+++out:
+++ runtime->dma_bytes = size;
+++ return ret;
+++
+++free:
+++ kfree(buf);
+++nomem:
+++ return -ENOMEM;
+++}
+++
+++static int devdma_mmap(struct device *dev, struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ return dma_mmap_coherent(dev, vma, runtime->dma_area,
+++ runtime->dma_addr, runtime->dma_bytes);
+++}
+++
+++/*
+++ * hw preparation for spdif
+++ */
+++
+++static int mv88fx_snd_spdif_mask_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_mask_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ ucontrol->value.iec958.status[0] = 0xff;
+++ ucontrol->value.iec958.status[1] = 0xff;
+++ ucontrol->value.iec958.status[2] = 0xff;
+++ ucontrol->value.iec958.status[3] = 0xff;
+++ return 0;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_spdif_mask = {
+++ .access = SNDRV_CTL_ELEM_ACCESS_READ,
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
+++ .info = mv88fx_snd_spdif_mask_info,
+++ .get = mv88fx_snd_spdif_mask_get,
+++};
+++
+++static int mv88fx_snd_spdif_stream_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_stream_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ chip->stream[PLAYBACK]->spdif_status[word] =
+++ readl(chip->base +
+++ MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ for (i = 0; i < 4; i++)
+++ ucontrol->value.iec958.status[word + i] =
+++ (chip->stream[PLAYBACK]->spdif_status[word] >>
+++ (i * 8)) & 0xff;
+++ }
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_stream_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, change = 0, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ for (i = 0; i < 4; i++) {
+++ chip->stream[PLAYBACK]->spdif_status[word] |=
+++ ucontrol->value.iec958.status[word + i] << (i * 8);
+++ }
+++
+++ writel(chip->stream[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ writel(chip->stream[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(word));
+++ }
+++
+++ if (chip->stream[PLAYBACK]->spdif_status[0] & IEC958_AES0_NONAUDIO)
+++ chip->pcm_mode = NON_PCM;
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return change;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_spdif_stream = {
+++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
+++ SNDRV_CTL_ELEM_ACCESS_INACTIVE,
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
+++ .info = mv88fx_snd_spdif_stream_info,
+++ .get = mv88fx_snd_spdif_stream_get,
+++ .put = mv88fx_snd_spdif_stream_put
+++};
+++
+++
+++static int mv88fx_snd_spdif_default_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_default_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[word] =
+++ readl(chip->base +
+++ MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ for (i = 0; i < 4; i++)
+++ ucontrol->value.iec958.status[word + i] =
+++ (chip->stream_defaults[PLAYBACK]->spdif_status[word] >>
+++ (i * 8)) & 0xff;
+++ }
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_default_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, change = 0, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[word] |=
+++ ucontrol->value.iec958.status[word + i] << (i * 8);
+++ }
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(word));
+++ }
+++
+++ if (chip->stream_defaults[PLAYBACK]->spdif_status[0] &
+++ IEC958_AES0_NONAUDIO)
+++ chip->pcm_mode = NON_PCM;
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return change;
+++}
+++
+++/* static struct snd_kcontrol_new mv88fx_snd_spdif_default __devinitdata = */
+++static struct snd_kcontrol_new mv88fx_snd_spdif_default = {
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
+++ .info = mv88fx_snd_spdif_default_info,
+++ .get = mv88fx_snd_spdif_default_get,
+++ .put = mv88fx_snd_spdif_default_put
+++};
+++
+++unsigned char mv88fx_snd_vol[2];
+++
+++static int mv88fx_snd_mixer_vol_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+++ uinfo->count = 2;
+++ uinfo->value.integer.min = 0;
+++ uinfo->value.integer.max = 39;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_vol_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ codec_vol_get(mv88fx_snd_vol);
+++
+++ ucontrol->value.integer.value[0] = (long)mv88fx_snd_vol[0];
+++ ucontrol->value.integer.value[1] = (long)mv88fx_snd_vol[1];
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_vol_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ mv88fx_snd_vol[0] = (unsigned char)ucontrol->value.integer.value[0];
+++ mv88fx_snd_vol[1] = (unsigned char)ucontrol->value.integer.value[1];
+++
+++ codec_vol_set(mv88fx_snd_vol);
+++
+++ return 0;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_dac_vol = {
+++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+++ .name = "Playback DAC Volume",
+++ .info = mv88fx_snd_mixer_vol_info,
+++ .get = mv88fx_snd_mixer_vol_get,
+++ .put = mv88fx_snd_mixer_vol_put
+++};
+++
+++struct mv88fx_snd_mixer_enum {
+++ char **names; /* enum names*/
+++ int *values; /* values to be updated*/
+++ int count; /* number of elements */
+++ void *rec; /* field to be updated*/
+++};
+++
+++int mv88fx_snd_mixer_enum_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+++ uinfo->count = 1;
+++ uinfo->value.enumerated.items = mixer_enum->count;
+++
+++ if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
+++ uinfo->value.enumerated.item--;
+++
+++ strcpy(uinfo->value.enumerated.name,
+++ mixer_enum->names[uinfo->value.enumerated.item]);
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_mixer_enum_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++ int i;
+++ unsigned int val;
+++
+++ val = *(unsigned int *)mixer_enum->rec;
+++
+++ for (i = 0; i < mixer_enum->count; i++) {
+++
+++ if (val == (unsigned int)mixer_enum->values[i]) {
+++ ucontrol->value.enumerated.item[0] = i;
+++ break;
+++ }
+++ }
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_mixer_enum_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ unsigned int val, *rec;
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++ int i;
+++
+++ rec = (unsigned int *)mixer_enum->rec;
+++ val = ucontrol->value.enumerated.item[0];
+++
+++ if (val < 0)
+++ val = 0;
+++ if (val > mixer_enum->count)
+++ val = mixer_enum->count;
+++
+++ for (i = 0; i < mixer_enum->count; i++) {
+++
+++ if (val == i) {
+++ *rec = (unsigned int)mixer_enum->values[i];
+++ break;
+++ }
+++ }
+++
+++ return 0;
+++}
+++
+++#define MV88FX_PCM_MIXER_ENUM(xname, xindex, value) \
+++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
+++ .name = xname, \
+++ .index = xindex, \
+++ .info = mv88fx_snd_mixer_enum_info, \
+++ .get = mv88fx_snd_mixer_enum_get, \
+++ .put = mv88fx_snd_mixer_enum_put, \
+++ .private_value = (unsigned long)value, \
+++}
+++
+++char *playback_src_mixer_names[] = {"SPDIF", "I2S", "SPDIF And I2S"};
+++int playback_src_mixer_values[] = { SPDIF, I2S, (SPDIF | I2S)};
+++
+++struct mv88fx_snd_mixer_enum playback_src_mixer = {
+++ .names = playback_src_mixer_names,
+++ .values = playback_src_mixer_values,
+++ .count = 3,
+++};
+++
+++char *playback_mono_mixer_names[] = {"Mono Both", "Mono Left", "Mono Right"};
+++int playback_mono_mixer_values[] = { MONO_BOTH, MONO_LEFT, MONO_RIGHT};
+++
+++struct mv88fx_snd_mixer_enum playback_mono_mixer = {
+++ .names = playback_mono_mixer_names,
+++ .values = playback_mono_mixer_values,
+++ .count = 3,
+++};
+++
+++char *capture_src_mixer_names[] = {"SPDIF", "I2S"};
+++int capture_src_mixer_values[] = { SPDIF, I2S};
+++
+++struct mv88fx_snd_mixer_enum capture_src_mixer = {
+++ .names = capture_src_mixer_names,
+++ .values = capture_src_mixer_values,
+++ .count = 2,
+++};
+++
+++char *capture_mono_mixer_names[] = {"Mono Left", "Mono Right"};
+++int capture_mono_mixer_values[] = { MONO_LEFT, MONO_RIGHT};
+++
+++struct mv88fx_snd_mixer_enum capture_mono_mixer = {
+++ .names = capture_mono_mixer_names,
+++ .values = capture_mono_mixer_values,
+++ .count = 2,
+++};
+++
+++static struct snd_kcontrol_new mv88fx_snd_mixers[] = {
+++ MV88FX_PCM_MIXER_ENUM("Playback output type", 0, &playback_src_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Playback mono type", 0, &playback_mono_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Capture input Type", 0, &capture_src_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Capture mono type", 0, &capture_mono_mixer),
+++};
+++
+++#define PLAYBACK_MIX_INDX 0
+++#define PLAYBACK_MONO_MIX_INDX 1
+++#define CAPTURE_MIX_INDX 2
+++#define CAPTURE_MONO_MIX_INDX 3
+++
+++static int mv88fx_snd_ctrl_new(struct snd_card *card)
+++{
+++ struct mv88fx_snd_platform_data *pdata = card->dev->platform_data;
+++ int err = 0;
+++
+++ playback_src_mixer.rec = &chip->stream_defaults[PLAYBACK]->dig_mode;
+++ playback_mono_mixer.rec = &chip->stream_defaults[PLAYBACK]->mono_mode;
+++
+++ capture_src_mixer.rec = &chip->stream_defaults[CAPTURE]->dig_mode;
+++ capture_mono_mixer.rec = &chip->stream_defaults[CAPTURE]->mono_mode;
+++
+++ if ((pdata->i2s_play) && (pdata->spdif_play)) {
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[PLAYBACK_MIX_INDX],
+++ chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[PLAYBACK_MONO_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++
+++ if ((pdata->i2s_rec) && (pdata->spdif_rec)) {
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[CAPTURE_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(
+++ &mv88fx_snd_mixers[CAPTURE_MONO_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++
+++ if (pdata->i2s_play) {
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_dac_vol,
+++ chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_mask,
+++ chip));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_default,
+++ chip));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_stream,
+++ chip));
+++ return err;
+++}
+++
+++static struct snd_pcm_hardware mv88fx_snd_capture_hw = {
+++ .info = (SNDRV_PCM_INFO_INTERLEAVED |
+++ SNDRV_PCM_INFO_MMAP |
+++ SNDRV_PCM_INFO_MMAP_VALID |
+++ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+++ SNDRV_PCM_INFO_PAUSE),
+++
+++ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+++ SNDRV_PCM_FMTBIT_S24_LE |
+++ SNDRV_PCM_FMTBIT_S32_LE),
+++
+++ .rates = (SNDRV_PCM_RATE_44100 |
+++ SNDRV_PCM_RATE_48000 |
+++ SNDRV_PCM_RATE_96000),
+++
+++ .rate_min = 44100,
+++ .rate_max = 96000,
+++ .channels_min = 1,
+++ .channels_max = 2,
+++ .buffer_bytes_max = (16*1024*1024),
+++ .period_bytes_min = MV88FX_SND_MIN_PERIOD_BYTES,
+++ .period_bytes_max = MV88FX_SND_MAX_PERIOD_BYTES,
+++ .periods_min = MV88FX_SND_MIN_PERIODS,
+++ .periods_max = MV88FX_SND_MAX_PERIODS,
+++ .fifo_size = 0,
+++};
+++
+++static int mv88fx_snd_capture_open(struct snd_pcm_substream *substream)
+++{
+++ int err;
+++
+++ chip->stream_defaults[CAPTURE]->substream = substream;
+++ chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+++ substream->private_data = chip->stream_defaults[CAPTURE];
+++ substream->runtime->hw = mv88fx_snd_capture_hw;
+++
+++ if (chip->stream_defaults[CAPTURE]->dig_mode & SPDIF)
+++ substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+++
+++ /* check if playback is already running with specific rate */
+++ if (chip->stream[PLAYBACK]->rate) {
+++ switch (chip->stream[PLAYBACK]->rate) {
+++ case 44100:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+++ break;
+++ case 48000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+++ break;
+++ case 96000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+++ break;
+++ }
+++ }
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst * 2,
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS,
+++ MV88FX_SND_MIN_PERIODS,
+++ MV88FX_SND_MAX_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_integer(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_close(struct snd_pcm_substream *substream)
+++{
+++ chip->stream_defaults[CAPTURE]->substream = NULL;
+++ memset(chip->stream[CAPTURE], 0, sizeof(struct mv88fx_snd_stream));
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_hw_params(struct snd_pcm_substream *substream,
+++ struct snd_pcm_hw_params *params)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ return devdma_hw_alloc(audio_stream->dev, substream,
+++ params_buffer_bytes(params));
+++}
+++
+++static int mv88fx_snd_capture_hw_free(struct snd_pcm_substream *substream)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ /*
+++ * Clear out the DMA and any allocated buffers.
+++ */
+++ devdma_hw_free(audio_stream->dev, substream);
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_prepare(struct snd_pcm_substream *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ audio_stream->rate = runtime->rate;
+++ audio_stream->stereo = (runtime->channels == 1) ? 0 : 1;
+++
+++ if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+++ audio_stream->format = SAMPLE_16IN16;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+++ audio_stream->format = SAMPLE_24IN32;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+++ audio_stream->format = SAMPLE_32IN32;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ audio_stream->dma_addr = runtime->dma_addr;
+++ audio_stream->dma_size = frames_to_bytes(runtime, runtime->buffer_size);
+++ audio_stream->period_size =
+++ frames_to_bytes(runtime, runtime->period_size);
+++
+++ memcpy(chip->stream[CAPTURE], chip->stream_defaults[CAPTURE],
+++ sizeof(struct mv88fx_snd_stream));
+++
+++ return mv88fx_snd_hw_capture_set(chip);
+++}
+++
+++static int mv88fx_snd_capture_trigger(struct snd_pcm_substream *substream,
+++ int cmd)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++ int result = 0;
+++ unsigned int reg_data;
+++
+++ spin_lock(chip->reg_lock);
+++ switch (cmd) {
+++ case SNDRV_PCM_TRIGGER_START:
+++ /* FIXME: should check if busy before */
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* enable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data |= AICR_RECORD_BYTES_INT;
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* enable dma */
+++ if (audio_stream->dig_mode & I2S)
+++ reg_data |= ARCR_RECORD_I2S_EN_MASK;
+++
+++ if (audio_stream->dig_mode & SPDIF)
+++ reg_data |= ARCR_RECORD_SPDIF_EN_MASK;
+++
+++ /* start dma */
+++ reg_data &= (~ARCR_RECORD_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_STOP:
+++
+++ /* make sure the dma in pause state */
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* disable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data &= (~AICR_RECORD_BYTES_INT);
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* always stop both I2S and SPDIF */
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data &= (~(ARCR_RECORD_I2S_EN_MASK |
+++ ARCR_RECORD_SPDIF_EN_MASK));
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* FIXME: should check if busy after */
+++
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+++ case SNDRV_PCM_TRIGGER_SUSPEND:
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_RESUME:
+++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data &= (~ARCR_RECORD_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ default:
+++ result = -EINVAL;
+++ break;
+++ }
+++
+++ spin_unlock(&chip->reg_lock);
+++ return result;
+++}
+++
+++static snd_pcm_uframes_t mv88fx_snd_capture_pointer(struct snd_pcm_substream
+++ *substream)
+++{
+++ return bytes_to_frames(substream->runtime,
+++ (ssize_t)readl(chip->base + MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG));
+++}
+++
+++int mv88fx_snd_capture_mmap(struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ return devdma_mmap(NULL, substream, vma);
+++}
+++
+++static struct snd_pcm_ops mv88fx_snd_capture_ops = {
+++ .open = mv88fx_snd_capture_open,
+++ .close = mv88fx_snd_capture_close,
+++ .ioctl = snd_pcm_lib_ioctl,
+++ .hw_params = mv88fx_snd_capture_hw_params,
+++ .hw_free = mv88fx_snd_capture_hw_free,
+++ .prepare = mv88fx_snd_capture_prepare,
+++ .trigger = mv88fx_snd_capture_trigger,
+++ .pointer = mv88fx_snd_capture_pointer,
+++ .mmap = mv88fx_snd_capture_mmap,
+++};
+++
+++struct snd_pcm_hardware mv88fx_snd_playback_hw = {
+++ .info = (SNDRV_PCM_INFO_INTERLEAVED |
+++ SNDRV_PCM_INFO_MMAP |
+++ SNDRV_PCM_INFO_MMAP_VALID |
+++ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+++ SNDRV_PCM_INFO_PAUSE),
+++ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+++ SNDRV_PCM_FMTBIT_S24_LE |
+++ SNDRV_PCM_FMTBIT_S32_LE),
+++ .rates = (SNDRV_PCM_RATE_44100 |
+++ SNDRV_PCM_RATE_48000 |
+++ SNDRV_PCM_RATE_96000),
+++
+++ .rate_min = 44100,
+++ .rate_max = 96000,
+++ .channels_min = 1,
+++ .channels_max = 2,
+++ .buffer_bytes_max = (16*1024*1024),
+++ .period_bytes_min = MV88FX_SND_MIN_PERIOD_BYTES,
+++ .period_bytes_max = MV88FX_SND_MAX_PERIOD_BYTES,
+++ .periods_min = MV88FX_SND_MIN_PERIODS,
+++ .periods_max = MV88FX_SND_MAX_PERIODS,
+++ .fifo_size = 0,
+++};
+++
+++int mv88fx_snd_playback_open(struct snd_pcm_substream *substream)
+++{
+++ int err = 0;
+++
+++ chip->stream_defaults[PLAYBACK]->substream = substream;
+++ chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+++ substream->private_data = chip->stream_defaults[PLAYBACK];
+++ substream->runtime->hw = mv88fx_snd_playback_hw;
+++
+++ if (chip->stream_defaults[PLAYBACK]->dig_mode & SPDIF)
+++ substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+++
+++ /* check if capture is already running with specific rate */
+++ if (chip->stream[CAPTURE]->rate) {
+++ switch (chip->stream[CAPTURE]->rate) {
+++ case 44100:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+++ break;
+++ case 48000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+++ break;
+++ case 96000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+++ break;
+++
+++ }
+++ }
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst * 2,
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS,
+++ MV88FX_SND_MIN_PERIODS,
+++ MV88FX_SND_MAX_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_integer(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS);
+++
+++ if (err < 0)
+++ return err;
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_playback_close(struct snd_pcm_substream *substream)
+++{
+++ int i;
+++
+++ chip->stream_defaults[PLAYBACK]->substream = NULL;
+++ chip->pcm_mode = PCM;
+++
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+++ chip->stream[PLAYBACK]->spdif_status[i] = 0;
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(i));
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(i));
+++ }
+++
+++ memset(chip->stream[PLAYBACK], 0, sizeof(struct mv88fx_snd_stream));
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_playback_hw_params(struct snd_pcm_substream *substream,
+++ struct snd_pcm_hw_params *params)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ return devdma_hw_alloc(audio_stream->dev, substream,
+++ params_buffer_bytes(params));
+++}
+++
+++int mv88fx_snd_playback_hw_free(struct snd_pcm_substream *substream)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ /*
+++ * Clear out the DMA and any allocated buffers.
+++ */
+++ devdma_hw_free(audio_stream->dev, substream);
+++ return 0;
+++}
+++
+++int mv88fx_snd_playback_prepare(struct snd_pcm_substream *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ if ((audio_stream->dig_mode == I2S) &&
+++ (chip->pcm_mode == NON_PCM))
+++ return -1;
+++
+++ audio_stream->rate = runtime->rate;
+++ audio_stream->stereo = (runtime->channels == 1) ? 0 : 1;
+++
+++ if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+++ audio_stream->format = SAMPLE_16IN16;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+++ audio_stream->format = SAMPLE_24IN32;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+++ audio_stream->format = SAMPLE_32IN32;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ audio_stream->dma_addr = runtime->dma_addr;
+++ audio_stream->dma_size = frames_to_bytes(runtime, runtime->buffer_size);
+++ audio_stream->period_size =
+++ frames_to_bytes(runtime, runtime->period_size);
+++
+++ memcpy(chip->stream[PLAYBACK], chip->stream_defaults[PLAYBACK],
+++ sizeof(struct mv88fx_snd_stream));
+++
+++ return mv88fx_snd_hw_playback_set(chip);
+++}
+++
+++int mv88fx_snd_playback_trigger(struct snd_pcm_substream *substream,
+++ int cmd)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++ int result = 0;
+++ unsigned int reg_data;
+++
+++ spin_lock(chip->reg_lock);
+++ switch (cmd) {
+++ case SNDRV_PCM_TRIGGER_START:
+++ /* enable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data |= AICR_PLAY_BYTES_INT;
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* enable dma */
+++ if ((audio_stream->dig_mode & I2S) &&
+++ (chip->pcm_mode == PCM))
+++ reg_data |= APCR_PLAY_I2S_ENABLE_MASK;
+++
+++ if (audio_stream->dig_mode & SPDIF)
+++ reg_data |= APCR_PLAY_SPDIF_ENABLE_MASK;
+++
+++ /* start dma */
+++ reg_data &= (~APCR_PLAY_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_STOP:
+++
+++ /* disable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data &= (~AICR_PLAY_BYTES_INT);
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++
+++ /* always stop both I2S and SPDIF*/
+++ reg_data &= (~(APCR_PLAY_I2S_ENABLE_MASK |
+++ APCR_PLAY_SPDIF_ENABLE_MASK));
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* check if busy twice*/
+++ while (readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ APCR_PLAY_BUSY_MASK)
+++ cpu_relax();
+++ while (readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ APCR_PLAY_BUSY_MASK)
+++ cpu_relax();
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+++ case SNDRV_PCM_TRIGGER_SUSPEND:
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_RESUME:
+++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data &= (~APCR_PLAY_PAUSE_MASK);
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ break;
+++
+++ default:
+++ result = -EINVAL;
+++ }
+++
+++ spin_unlock(&chip->reg_lock);
+++ return result;
+++}
+++
+++
+++snd_pcm_uframes_t mv88fx_snd_playback_pointer(struct snd_pcm_substream
+++ *substream)
+++{
+++ return bytes_to_frames(substream->runtime,
+++ (ssize_t)readl(chip->base + MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG));
+++}
+++
+++int mv88fx_snd_playback_mmap(struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ return devdma_mmap(NULL, substream, vma);
+++}
+++
+++
+++struct snd_pcm_ops mv88fx_snd_playback_ops = {
+++ .open = mv88fx_snd_playback_open,
+++ .close = mv88fx_snd_playback_close,
+++ .ioctl = snd_pcm_lib_ioctl,
+++ .hw_params = mv88fx_snd_playback_hw_params,
+++ .hw_free = mv88fx_snd_playback_hw_free,
+++ .prepare = mv88fx_snd_playback_prepare,
+++ .trigger = mv88fx_snd_playback_trigger,
+++ .pointer = mv88fx_snd_playback_pointer,
+++ .mmap = mv88fx_snd_playback_mmap,
+++};
+++
+++int __init mv88fx_snd_pcm_new(struct snd_card *card)
+++{
+++ struct snd_pcm *pcm;
+++ struct mv88fx_snd_platform_data *pdata = card->dev->platform_data;
+++ int err, i;
+++
+++ snd_printd("card->dev=0x%x\n", (unsigned int)card->dev);
+++
+++ err = snd_pcm_new(card, "Marvell mv88fx_snd IEC958 and I2S", 0, 1, 1,
+++ &pcm);
+++ if (err < 0)
+++ return err;
+++
+++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
+++ &mv88fx_snd_playback_ops);
+++
+++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
+++ &mv88fx_snd_capture_ops);
+++
+++ if ((pdata->i2s_play) && (pdata->spdif_play))
+++ chip->stream_defaults[PLAYBACK]->dig_mode = (SPDIF | I2S);
+++ else if (pdata->i2s_play)
+++ chip->stream_defaults[PLAYBACK]->dig_mode = I2S;
+++ else if (pdata->spdif_play)
+++ chip->stream_defaults[PLAYBACK]->dig_mode = SPDIF;
+++ else
+++ chip->stream_defaults[PLAYBACK]->dig_mode = 0;
+++
+++ chip->stream_defaults[PLAYBACK]->mono_mode = MONO_BOTH;
+++ chip->pcm_mode = PCM;
+++ chip->stream_defaults[PLAYBACK]->stat_mem = 0;
+++ chip->stream_defaults[PLAYBACK]->clock_src = DCO_CLOCK;
+++
+++ if (pdata->i2s_rec)
+++ chip->stream_defaults[CAPTURE]->dig_mode = I2S;
+++ else if (pdata->spdif_rec)
+++ chip->stream_defaults[CAPTURE]->dig_mode = SPDIF;
+++ else
+++ chip->stream_defaults[CAPTURE]->dig_mode = 0;
+++
+++ chip->stream_defaults[CAPTURE]->mono_mode = MONO_LEFT;
+++ chip->pcm_mode = PCM;
+++ chip->stream_defaults[CAPTURE]->stat_mem = 0;
+++ chip->stream_defaults[CAPTURE]->clock_src = DCO_CLOCK;
+++
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+++ chip->stream[PLAYBACK]->spdif_status[i] = 0;
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(i));
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(i));
+++
+++ writel(0, chip->base +
+++ MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(i));
+++
+++ writel(0, chip->base +
+++ MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(i));
+++ }
+++
+++ pcm->private_data = chip;
+++ pcm->info_flags = 0;
+++ strcpy(pcm->name, "Marvell mv88fx_snd IEC958 and I2S");
+++
+++ return 0;
+++}
+++
+++irqreturn_t mv88fx_snd_interrupt(int irq, void *dev_id)
+++{
+++ struct mv88fx_snd_chip *chip = dev_id;
+++ struct mv88fx_snd_stream *play_stream = chip->stream_defaults[PLAYBACK];
+++ struct mv88fx_snd_stream *capture_stream =
+++ chip->stream_defaults[CAPTURE];
+++
+++ unsigned int status, mask;
+++
+++ spin_lock(&chip->reg_lock);
+++
+++ /* read the active interrupt */
+++ mask = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ status = readl(chip->base + MV_AUDIO_INT_CAUSE_REG) & mask;
+++
+++ do {
+++ if (status & ~(AICR_RECORD_BYTES_INT|AICR_PLAY_BYTES_INT)) {
+++ spin_unlock(&chip->reg_lock);
+++ snd_BUG(); /* FIXME: should enable error interrupts*/
+++ return IRQ_NONE;
+++ }
+++
+++ /* acknowledge interrupt */
+++ writel(status, chip->base + MV_AUDIO_INT_CAUSE_REG);
+++
+++ /* This is record event */
+++ if (status & AICR_RECORD_BYTES_INT)
+++ snd_pcm_period_elapsed(capture_stream->substream);
+++
+++ /* This is play event */
+++ if (status & AICR_PLAY_BYTES_INT)
+++ snd_pcm_period_elapsed(play_stream->substream);
+++
+++ /* read the active interrupt */
+++ mask = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ status = readl(chip->base + MV_AUDIO_INT_CAUSE_REG) & mask;
+++ } while (status);
+++
+++ spin_unlock(&chip->reg_lock);
+++
+++ return IRQ_HANDLED;
+++}
+++
+++void mv88fx_snd_free(struct snd_card *card)
+++{
+++ struct mv88fx_snd_chip *chip = card->private_data;
+++
+++ /* free irq */
+++ free_irq(chip->irq, (void *)chip);
+++
+++ snd_printd("chip->res =0x%x\n", (unsigned int)chip->res);
+++
+++ if (chip->base)
+++ iounmap(chip->base);
+++
+++ if (chip->res)
+++ release_resource(chip->res);
+++
+++ chip->res = NULL;
+++
+++ /* Free memory allocated for streems */
+++ if (chip->stream_defaults[PLAYBACK]->area)
+++ dma_free_coherent(card->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ chip->stream_defaults[PLAYBACK]->area,
+++ chip->stream_defaults[PLAYBACK]->addr);
+++
+++ if (chip->stream_defaults[CAPTURE]->area)
+++ dma_free_coherent(card->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ chip->stream_defaults[CAPTURE]->area,
+++ chip->stream_defaults[CAPTURE]->addr);
+++
+++ kfree(chip->stream_defaults[PLAYBACK]);
+++ chip->stream_defaults[PLAYBACK] = NULL;
+++
+++ kfree(chip->stream[PLAYBACK]);
+++ chip->stream[PLAYBACK] = NULL;
+++
+++ kfree(chip->stream_defaults[CAPTURE]);
+++ chip->stream_defaults[CAPTURE] = NULL;
+++
+++ kfree(chip->stream[CAPTURE]);
+++ chip->stream[CAPTURE] = NULL;
+++
+++ chip = NULL;
+++}
+++
+++int mv88fx_snd_probe(struct platform_device *dev)
+++{
+++ int err = 0, irq = NO_IRQ;
+++ struct snd_card *card = NULL;
+++ struct resource *r = NULL;
+++ static struct snd_device_ops ops = {
+++ .dev_free = NULL,
+++ };
+++ struct mv88fx_snd_platform_data *pdata = NULL;
+++
+++ err = snd_card_create(-1, "mv88fx_snd", THIS_MODULE,
+++ sizeof(struct mv88fx_snd_chip), &card);
+++
+++ if (err) {
+++ snd_printk("snd_card_create failed\n");
+++ return err;
+++ }
+++
+++ card->dev = &dev->dev;
+++ chip = card->private_data;
+++ card->private_free = mv88fx_snd_free;
+++
+++ pdata = (struct mv88fx_snd_platform_data *)dev->dev.platform_data;
+++
+++ if (pdata->i2s_rec == 2 || pdata->spdif_rec == 2)
+++ chip->stereo = 1;
+++ else
+++ chip->stereo = 0;
+++
+++ chip->audio_offset = pdata->base_offset;
+++
+++ r = platform_get_resource(dev, IORESOURCE_MEM, 0);
+++ if (!r) {
+++ snd_printk("platform_get_resource failed\n");
+++ err = -ENXIO;
+++ goto error;
+++ }
+++
+++ snd_printd("chip->res =0x%x\n", (unsigned int)chip->res);
+++
+++ r = request_mem_region(r->start, SZ_16K, MV88FX_AUDIO_NAME);
+++ if (!r) {
+++ snd_printk("request_mem_region failed\n");
+++ err = -EBUSY;
+++ goto error;
+++ }
+++ chip->res = r;
+++
+++ chip->base = ioremap(r->start, SZ_16K);
+++
+++ if (!chip->base) {
+++ snd_printk("ioremap failed\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ snd_printd("chip->base=0x%x r->start0x%x\n",
+++ (unsigned int)chip->base, r->start);
+++
+++ irq = platform_get_irq(dev, 0);
+++ if (irq == NO_IRQ) {
+++ snd_printk("platform_get_irq failed\n");
+++ err = -ENXIO;
+++ goto error;
+++ }
+++
+++ snd_printd("card = 0x%x dev 0x%x\n",
+++ (unsigned int)card, (unsigned int)dev);
+++ strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
+++
+++ /* Allocate memory for our device */
+++ chip->stream_defaults[PLAYBACK] =
+++ kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+++
+++ if (chip->stream_defaults[PLAYBACK] == NULL) {
+++ snd_printk("kzalloc failed for default playback\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+++ chip->stream_defaults[PLAYBACK]->dev = card->dev;
+++
+++ chip->stream[PLAYBACK] = kzalloc(sizeof(struct mv88fx_snd_stream),
+++ GFP_KERNEL);
+++
+++ if (chip->stream[PLAYBACK] == NULL) {
+++ snd_printk("kzalloc failed for runtime playback\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE] =
+++ kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+++
+++ if (chip->stream_defaults[CAPTURE] == NULL) {
+++ snd_printk("kzalloc failed for capture\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+++ chip->stream_defaults[CAPTURE]->dev = card->dev;
+++
+++ chip->stream[CAPTURE] = kzalloc(sizeof(struct mv88fx_snd_stream),
+++ GFP_KERNEL);
+++
+++ if (chip->stream[CAPTURE] == NULL) {
+++ snd_printk("kzalloc failed for runtime capture\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->irq = irq;
+++ chip->stream_defaults[PLAYBACK]->area =
+++ dma_alloc_coherent(&dev->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ &chip->stream_defaults[PLAYBACK]->addr,
+++ GFP_KERNEL);
+++
+++ if (!chip->stream_defaults[PLAYBACK]->area) {
+++ snd_printk("dma_alloc_coherent failed for playback buffer\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (0 == test_memory(pdata->dram,
+++ (unsigned int)chip->stream_defaults[PLAYBACK]->addr,
+++ (unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+++
+++ snd_printk("error: playback buffer not in one memory window\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE]->area =
+++ dma_alloc_coherent(&dev->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ &chip->stream_defaults[CAPTURE]->addr,
+++ GFP_KERNEL);
+++
+++ if (!chip->stream_defaults[CAPTURE]->area) {
+++ snd_printk("dma_alloc_coherent failed for capture buffer\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (0 == test_memory(pdata->dram,
+++ (unsigned int)chip->stream_defaults[CAPTURE]->addr,
+++ (unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+++
+++ snd_printk("error: playback buffer not in one memory window\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (request_irq(chip->irq, mv88fx_snd_interrupt, 0, MV88FX_AUDIO_NAME,
+++ (void *)chip)) {
+++
+++ snd_printk("Unable to grab IRQ %d\n", chip->irq);
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->ch_stat_valid = 1;
+++ chip->burst = 128;
+++ chip->loopback = 0;
+++ chip->dco_ctrl_offst = 0x800;
+++
+++ err = mv88fx_snd_hw_init(card);
+++ if (err) {
+++ snd_printk("mv88fx_snd_hw_init failed\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* Set default values */
+++ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
+++ if (err < 0) {
+++ snd_printk("Creating chip device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* create pcm devices */
+++ err = mv88fx_snd_pcm_new(card);
+++ if (err < 0) {
+++ snd_printk("Creating PCM device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++ /* create controll interfaces & switches */
+++ err = mv88fx_snd_ctrl_new(card);
+++ if (err < 0) {
+++ snd_printk("Creating non-PCM device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ strcpy(card->driver, "mv88fx_snd");
+++ strcpy(card->shortname, "Marvell mv88fx_snd");
+++ sprintf(card->longname, "Marvell mv88fx_snd ALSA driver");
+++
+++ err = snd_card_register(card);
+++ if (err < 0) {
+++ snd_printk("Card registeration failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* if (dma_set_mask(&dev->dev, 0xFFFFFFUL) < 0) { */
+++ if (dma_set_mask(&dev->dev, 0xFFFFFFFFUL) < 0) {
+++ snd_printk("Could not set DMA mask\n");
+++ goto error;
+++ }
+++
+++ platform_set_drvdata(dev, card);
+++ return 0;
+++error:
+++ if (card)
+++ snd_card_free(card);
+++ platform_set_drvdata(dev, NULL);
+++ return err;
+++}
+++
+++int mv88fx_snd_remove(struct platform_device *dev)
+++{
+++ struct snd_card *card = platform_get_drvdata(dev);
+++
+++ if (card)
+++ snd_card_free(card);
+++
+++ /* FIXME: Once "../codecs/cs42l51.c" is fixed to behave as a module
+++ * this should be removed */
+++ codec_del_i2c_device();
+++
+++ platform_set_drvdata(dev, NULL);
+++ return 0;
+++}
+++
+++#define mv88fx_snd_resume NULL
+++#define mv88fx_snd_suspend NULL
+++
+++struct platform_driver mv88fx_snd_driver = {
+++ .probe = mv88fx_snd_probe,
+++ .remove = mv88fx_snd_remove,
+++ .suspend = mv88fx_snd_suspend,
+++ .resume = mv88fx_snd_resume,
+++ .driver = { .name = MV88FX_AUDIO_NAME,},
+++};
+++
+++int __init mv88fx_snd_init(void)
+++{
+++ return platform_driver_register(&mv88fx_snd_driver);
+++}
+++
+++void __exit mv88fx_snd_exit(void)
+++{
+++ platform_driver_unregister(&mv88fx_snd_driver);
+++}
+++
+++MODULE_AUTHOR("Maen Suleiman <maen@...>");
+++MODULE_DESCRIPTION("Marvell MV88Fx Alsa Sound driver");
+++MODULE_LICENSE("GPL");
+++
+++module_init(mv88fx_snd_init);
+++module_exit(mv88fx_snd_exit);
+++
++--
++1.6.5.2
++
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-OpenRD-Client-PCIe-Initialize-PCI-express-and-i2c.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-OpenRD-Client-PCIe-Initialize-PCI-express-and-i2c.patch
+new file mode 100644
+index 0000000..07d4e6b
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0001-OpenRD-Client-PCIe-Initialize-PCI-express-and-i2c.patch
+@@ -0,0 +1,36 @@
++From 266f0b9c7aeb95c7ad9b212b9d42a23435bbfcf6 Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Tue, 1 Dec 2009 17:01:51 +0530
++Subject: [PATCH 1/2] OpenRD-Client: PCIe: Initialize PCI express and i2c
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ arch/arm/mach-kirkwood/openrd_client-setup.c | 11 +++++++++++
++ 1 files changed, 11 insertions(+), 0 deletions(-)
++
++diff --git a/arch/arm/mach-kirkwood/openrd_client-setup.c b/arch/arm/mach-kirkwood/openrd_client-setup.c
++index a55a1bc..63b4a2c 100644
++--- a/arch/arm/mach-kirkwood/openrd_client-setup.c
+++++ b/arch/arm/mach-kirkwood/openrd_client-setup.c
++@@ -78,7 +78,18 @@ static void __init openrd_client_init(void)
++
++ kirkwood_sata_init(&openrd_client_sata_data);
++ kirkwood_sdio_init(&openrd_client_mvsdio_data);
+++
+++ kirkwood_i2c_init();
+++}
+++
+++static int __init openrd_client_pcie_init(void)
+++{
+++ if (machine_is_openrd_client())
+++ kirkwood_pcie_init();
+++
+++ return 0;
++ }
+++subsys_initcall(openrd_client_pcie_init);
++
++ MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board")
++ /* Maintainer: Dhaval Vasa <dhaval.vasa@...> */
++--
++1.6.5.2
++
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch
+new file mode 100644
+index 0000000..b1c7f7c
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0002--ARM-Kirkwood-peripherals-clock-gating-for-power-m.patch
+@@ -0,0 +1,131 @@
++From 17589962c1787310e6373478a9fcb7641184cd91 Mon Sep 17 00:00:00 2001
++From: Rabeeh Khoury <rabeeh@...>
++Date: Sun, 22 Mar 2009 17:30:32 +0200
++Subject: [PATCH] [ARM] Kirkwood: peripherals clock gating for power management
++
++1. Enabling clock gating of unused peripherals
++2. PLL and PHY of the units are also disabled (when possible.
++
++Signed-off-by: Rabeeh Khoury <rabeeh@...>
++
++[ This needs to be revisited to make power handling dynamic and
++ per device. -- Nico ]
++---
++ arch/arm/mach-kirkwood/common.c | 32 ++++++++++++++++++++++++
++ arch/arm/mach-kirkwood/common.h | 1 +
++ arch/arm/mach-kirkwood/include/mach/kirkwood.h | 23 +++++++++++++++++
++ arch/arm/mach-kirkwood/sheevaplug-setup.c | 2 +
++ 4 files changed, 58 insertions(+), 0 deletions(-)
++
++Index: git/arch/arm/mach-kirkwood/common.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/common.c
+++++ git/arch/arm/mach-kirkwood/common.c
++@@ -779,6 +779,38 @@ static void __init kirkwood_l2_init(void
++ #endif
++ }
++
+++void __init kirkwood_clock_gate(u32 reg)
+++{
+++ printk(KERN_INFO "Kirkwood: Gating clock using mask 0x%x\n", reg);
+++ /* First make sure that the units are accessible */
+++ writel(readl(CLOCK_GATING_CTRL) | reg, CLOCK_GATING_CTRL);
+++ /* For SATA first shutdown the phy */
+++ if (reg & CGC_SATA0) {
+++ /* Disable PLL and IVREF */
+++ writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
+++ /* Disable PHY */
+++ writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
+++ }
+++ if (reg & CGC_SATA1) {
+++ /* Disable PLL and IVREF */
+++ writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
+++ /* Disable PHY */
+++ writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
+++ }
+++ /* For PCI-E first shutdown the phy */
+++ if (reg & CGC_PEX0) {
+++ writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
+++ while (1) {
+++ if (readl(PCIE_STATUS) & 0x1)
+++ break;
+++ }
+++ writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
+++ }
+++ /* Now gate clock the required units */
+++ writel(readl(CLOCK_GATING_CTRL) & ~reg, CLOCK_GATING_CTRL);
+++ return;
+++}
+++
++ void __init kirkwood_init(void)
++ {
++ printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
++Index: git/arch/arm/mach-kirkwood/common.h
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/common.h
+++++ git/arch/arm/mach-kirkwood/common.h
++@@ -22,6 +22,7 @@ struct mvsdio_platform_data;
++ void kirkwood_map_io(void);
++ void kirkwood_init(void);
++ void kirkwood_init_irq(void);
+++void __init kirkwood_clock_gate(u32 reg);
++
++ extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
++ void kirkwood_setup_cpu_mbus(void);
++Index: git/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++++ git/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++@@ -65,6 +65,8 @@
++ #define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
++
++ #define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000)
+++#define PCIE_LINK_CTRL (PCIE_VIRT_BASE | 0x70)
+++#define PCIE_STATUS (PCIE_VIRT_BASE | 0x1a04)
++
++ #define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
++
++@@ -81,9 +83,30 @@
++ #define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
++
++ #define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000)
+++#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x80000)
+++#define SATA0_IF_CTRL (SATA_VIRT_BASE | 0x2050)
+++#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE | 0x2330)
+++#define SATA1_IF_CTRL (SATA_VIRT_BASE | 0x4050)
+++#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE | 0x4330)
++
++ #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
++
+++#define CLOCK_GATING_CTRL (BRIDGE_VIRT_BASE | 0x11c)
+++#define CGC_GE0 0x1
+++#define CGC_PEX0 0x4
+++#define CGC_USB0 0x8
+++#define CGC_SDIO 0x10
+++#define CGC_TSU 0x20
+++#define CGC_NAND_SPI 0x80
+++#define CGC_XOR0 0x100
+++#define CGC_AUDIO 0x200
+++#define CGC_SATA0 0x4000
+++#define CGC_SATA1 0x8000
+++#define CGC_XOR1 0x10000
+++#define CGC_CRYPTO 0x20000
+++#define CGC_GE1 0x80000
+++#define CGC_TDM 0x100000
+++
++ /*
++ * Supported devices and revisions.
++ */
++Index: git/arch/arm/mach-kirkwood/sheevaplug-setup.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/sheevaplug-setup.c
+++++ git/arch/arm/mach-kirkwood/sheevaplug-setup.c
++@@ -122,6 +122,8 @@ static void __init sheevaplug_init(void)
++
++ platform_device_register(&sheevaplug_nand_flash);
++ platform_device_register(&sheevaplug_leds);
+++ kirkwood_clock_gate(CGC_PEX0 | CGC_TSU | CGC_AUDIO | CGC_SATA0 |\
+++ CGC_SATA1 | CGC_CRYPTO | CGC_GE1 | CGC_TDM);
++ }
++
++ MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board")
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0003-ARM-Kirkwood-Sound-Sound-driver-added.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0003-ARM-Kirkwood-Sound-Sound-driver-added.patch
+new file mode 100644
+index 0000000..2fa1df3
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0003-ARM-Kirkwood-Sound-Sound-driver-added.patch
+@@ -0,0 +1,3498 @@
++From f2830dc0470513c5daa22360c63129bf9f578e59 Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Tue, 24 Nov 2009 21:49:24 +0530
++Subject: [PATCH] ARM: Kirkwood: Sound: Sound driver added
++
++The driver is based on the Marvell kirkwood sound driver available in
++2.6.22.18 kernel.
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ arch/arm/mach-kirkwood/common.c | 39 +
++ arch/arm/mach-kirkwood/common.h | 2 +
++ arch/arm/mach-kirkwood/include/mach/kirkwood.h | 3 +
++ arch/arm/mach-kirkwood/openrd_client-setup.c | 24 +
++ include/linux/mv88fx_audio.h | 111 ++
++ sound/soc/Kconfig | 1 +
++ sound/soc/Makefile | 1 +
++ sound/soc/kirkwood/Kconfig | 37 +
++ sound/soc/kirkwood/Makefile | 7 +
++ sound/soc/kirkwood/cs42l51.c | 303 +++++
++ sound/soc/kirkwood/cs42l51.h | 54 +
++ sound/soc/kirkwood/kirkwood_audio_hal.c | 821 +++++++++++++
++ sound/soc/kirkwood/kirkwood_audio_hal.h | 109 ++
++ sound/soc/kirkwood/kirkwood_audio_regs.h | 310 +++++
++ sound/soc/kirkwood/kirkwood_pcm.c | 1495 ++++++++++++++++++++++++
++ 15 files changed, 3317 insertions(+), 0 deletions(-)
++ create mode 100644 include/linux/mv88fx_audio.h
++ create mode 100644 sound/soc/kirkwood/Kconfig
++ create mode 100644 sound/soc/kirkwood/Makefile
++ create mode 100644 sound/soc/kirkwood/cs42l51.c
++ create mode 100644 sound/soc/kirkwood/cs42l51.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_hal.c
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_hal.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_audio_regs.h
++ create mode 100644 sound/soc/kirkwood/kirkwood_pcm.c
++
++diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
++index 242dd07..606514f 100644
++--- a/arch/arm/mach-kirkwood/common.c
+++++ b/arch/arm/mach-kirkwood/common.c
++@@ -15,6 +15,7 @@
++ #include <linux/mbus.h>
++ #include <linux/mv643xx_eth.h>
++ #include <linux/mv643xx_i2c.h>
+++#include <linux/mv88fx_audio.h>
++ #include <linux/ata_platform.h>
++ #include <linux/mtd/nand.h>
++ #include <linux/spi/orion_spi.h>
++@@ -977,3 +978,41 @@ static int __init kirkwood_clock_gate(void)
++ return 0;
++ }
++ late_initcall(kirkwood_clock_gate);
+++
+++/*****************************************************************************
+++ * Audio
+++ ****************************************************************************/
+++
+++static struct resource kirkwood_audio_resources[] = {
+++ [0] = {
+++ .start = AUDIO_PHYS_BASE,
+++ .end = AUDIO_PHYS_BASE + SZ_16K - 1,
+++ .flags = IORESOURCE_MEM,
+++ },
+++ [1] = {
+++ .start = IRQ_KIRKWOOD_I2S,
+++ .end = IRQ_KIRKWOOD_I2S,
+++ .flags = IORESOURCE_IRQ,
+++ },
+++};
+++
+++static u64 kirkwood_audio_dmamask = 0xFFFFFFFFUL;
+++
+++static struct platform_device kirkwood_audio = {
+++ .name = MV88FX_AUDIO_NAME,
+++ .id = -1,
+++ .num_resources = ARRAY_SIZE(kirkwood_audio_resources),
+++ .resource = kirkwood_audio_resources,
+++ .dev = {
+++ .dma_mask = &kirkwood_audio_dmamask,
+++ .coherent_dma_mask = 0xffffffff,
+++ },
+++};
+++
+++void __init kirkwood_audio_init(struct mv88fx_snd_platform_data *audio_data)
+++{
+++ kirkwood_clk_ctrl |= CGC_AUDIO;
+++ kirkwood_audio.dev.platform_data = audio_data;
+++
+++ platform_device_register(&kirkwood_audio);
+++}
++diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
++index d7de434..b79a25c 100644
++--- a/arch/arm/mach-kirkwood/common.h
+++++ b/arch/arm/mach-kirkwood/common.h
++@@ -16,6 +16,7 @@ struct mv643xx_eth_platform_data;
++ struct mv_sata_platform_data;
++ struct mvsdio_platform_data;
++ struct mtd_partition;
+++struct mv88fx_snd_platform_data;
++
++ /*
++ * Basic Kirkwood init functions used early by machine-setup.
++@@ -41,6 +42,7 @@ void kirkwood_i2c_init(void);
++ void kirkwood_uart0_init(void);
++ void kirkwood_uart1_init(void);
++ void kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, int delay);
+++void kirkwood_audio_init(struct mv88fx_snd_platform_data *audio_data);
++
++ extern int kirkwood_tclk;
++ extern struct sys_timer kirkwood_timer;
++diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++index a15cf0e..838151d 100644
++--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
++@@ -96,6 +96,9 @@
++
++ #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000)
++
+++#define AUDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0xA0000)
+++#define AUDIO_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0xA0000)
+++
++ /*
++ * Supported devices and revisions.
++ */
++diff --git a/arch/arm/mach-kirkwood/openrd_client-setup.c b/arch/arm/mach-kirkwood/openrd_client-setup.c
++index 63b4a2c..2ed080b 100644
++--- a/arch/arm/mach-kirkwood/openrd_client-setup.c
+++++ b/arch/arm/mach-kirkwood/openrd_client-setup.c
++@@ -14,6 +14,7 @@
++ #include <linux/mtd/partitions.h>
++ #include <linux/ata_platform.h>
++ #include <linux/mv643xx_eth.h>
+++#include <linux/mv88fx_audio.h>
++ #include <linux/gpio.h>
++ #include <asm/mach-types.h>
++ #include <asm/mach/arch.h>
++@@ -59,6 +60,23 @@ static unsigned int openrd_client_mpp_config[] __initdata = {
++ 0
++ };
++
+++#if defined(CONFIG_SND_MV88FX_SOC) || defined(CONFIG_SND_MV88FX_SOC_MODULE)
+++static struct mv88fx_snd_platform_data openrd_client_audio_data = {
+++ .i2c_bus_no = 0,
+++ .i2c_address = 0x4A,
+++/* 0 - NA, 1 - mono, 2 - stereo */
+++#ifdef CONFIG_SND_MV88FX_SOC_I2S
+++ .i2s_rec = 1,
+++ .i2s_play = 2,
+++#else
+++ .spdif_rec = 1,
+++ .spdif_play = 2,
+++#endif
+++ .dram = &kirkwood_mbus_dram_info,
+++ .base_offset = AUDIO_PHYS_BASE - KIRKWOOD_REGS_PHYS_BASE,
+++};
+++#endif
+++
++ static void __init openrd_client_init(void)
++ {
++ /*
++@@ -80,6 +98,12 @@ static void __init openrd_client_init(void)
++ kirkwood_sdio_init(&openrd_client_mvsdio_data);
++
++ kirkwood_i2c_init();
+++#if defined(CONFIG_SND_MV88FX_SOC) || defined(CONFIG_SND_MV88FX_SOC_MODULE)
+++ /* If built as a part of kernel or as a module
+++ * initialize audio */
+++ openrd_client_audio_data.tclk = kirkwood_tclk,
+++ kirkwood_audio_init(&openrd_client_audio_data);
+++#endif
++ }
++
++ static int __init openrd_client_pcie_init(void)
++diff --git a/include/linux/mv88fx_audio.h b/include/linux/mv88fx_audio.h
++new file mode 100644
++index 0000000..6d36a3f
++--- /dev/null
+++++ b/include/linux/mv88fx_audio.h
++@@ -0,0 +1,111 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++
+++#ifndef __LINUX_MV88FX_SND_H
+++#define __LINUX_MV88FX_SND_H
+++
+++#include <linux/mbus.h>
+++
+++#define MV88FX_AUDIO_NAME "mv88fx_snd"
+++
+++#undef MV88FX_SND_DEBUG
+++#ifdef MV88FX_SND_DEBUG
+++#define mv88fx_snd_debug(fmt, arg...) printk(KERN_DEBUG fmt, ##arg)
+++#else
+++ #define mv88fx_snd_debug(a...)
+++#endif
+++
+++#define MV_AUDIO_MAX_ADDR_DECODE_WIN 2
+++#define MV_AUDIO_RECORD_WIN_NUM 0
+++#define MV_AUDIO_PLAYBACK_WIN_NUM 1
+++
+++#define MV_AUDIO_WIN_CTRL_REG(win) (0xA04 + ((win)<<3))
+++#define MV_AUDIO_WIN_BASE_REG(win) (0xA00 + ((win)<<3))
+++
+++struct mv88fx_snd_platform_data {
+++ u8 i2c_bus_no;
+++ u16 i2c_address;
+++ u32 spdif_rec;
+++ u32 spdif_play;
+++ u32 i2s_rec;
+++ u32 i2s_play;
+++ u32 tclk;
+++ u32 base_offset;
+++ struct mbus_dram_target_info *dram;
+++};
+++
+++struct mv88fx_snd_stream {
+++ struct snd_pcm_substream *substream;
+++ struct device *dev;
+++ int direction; /* playback or capture */
+++ #define PLAYBACK 0
+++ #define CAPTURE 1
+++ unsigned int dig_mode; /* i2s,spdif,both */
+++ #define I2S 1
+++ #define SPDIF 2
+++ int stereo; /* mono, stereo */
+++ int mono_mode; /* both mono, left mono, right mono */
+++ #define MONO_BOTH 0
+++ #define MONO_LEFT 1
+++ #define MONO_RIGHT 2
+++ int clock_src;
+++ #define DCO_CLOCK 0
+++ #define SPCR_CLOCK 1
+++ #define EXTERN_CLOCK 2
+++ int rate;
+++ int stat_mem; /* Channel status source*/
+++ int format;
+++ #define SAMPLE_32IN32 0
+++ #define SAMPLE_24IN32 1
+++ #define SAMPLE_20IN32 2
+++ #define SAMPLE_16IN32 3
+++ #define SAMPLE_16IN16 4
+++ unsigned int dma_addr;
+++ unsigned int dma_size;
+++ unsigned int period_size;
+++ unsigned int spdif_status[4]; /* SPDIF status */
+++ unsigned char *area; /* virtual pointer */
+++ dma_addr_t addr; /* physical address */
+++};
+++
+++struct mv88fx_snd_chip {
+++ struct mv88fx_snd_stream *stream[2]; /* run time values*/
+++ struct mv88fx_snd_stream *stream_defaults[2]; /* default values*/
+++ spinlock_t reg_lock; /* Register access spinlock */
+++ struct resource *res; /* resource for IRQ and base*/
+++ void __iomem *base; /* Audio base address of the host */
+++ unsigned int audio_offset; /* Offset to audio base register
+++ * from internal base register */
+++ int irq;
+++ int loopback; /* When Loopback is enabled, playback
+++ * data is looped back to be recorded */
+++ int ch_stat_valid; /* Playback SPDIF channel validity bit
+++ * value when REG selected */
+++ int burst; /* DMA Burst Size */
+++
+++ #define SPDIF_MEM_STAT 0
+++ #define SPDIF_REG_STAT 1
+++ unsigned int dco_ctrl_offst;
+++ int pcm_mode; /* pcm, nonpcm*/
+++ #define PCM 0
+++ #define NON_PCM 1
+++ int stereo;
+++};
+++
+++#define MV88FX_SND_MIN_PERIODS 8
+++#define MV88FX_SND_MAX_PERIODS 16
+++#define MV88FX_SND_MIN_PERIOD_BYTES 0x4000
+++#define MV88FX_SND_MAX_PERIOD_BYTES 0x4000
+++
+++#endif /* __LINUX_MV88FX_SND_H */
++diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
++index b1749bc..9fc88d8 100644
++--- a/sound/soc/Kconfig
+++++ b/sound/soc/Kconfig
++@@ -36,6 +36,7 @@ source "sound/soc/s3c24xx/Kconfig"
++ source "sound/soc/s6000/Kconfig"
++ source "sound/soc/sh/Kconfig"
++ source "sound/soc/txx9/Kconfig"
+++source "sound/soc/kirkwood/Kconfig"
++
++ # Supported codecs
++ source "sound/soc/codecs/Kconfig"
++diff --git a/sound/soc/Makefile b/sound/soc/Makefile
++index 1470141..6c39266 100644
++--- a/sound/soc/Makefile
+++++ b/sound/soc/Makefile
++@@ -14,3 +14,4 @@ obj-$(CONFIG_SND_SOC) += s3c24xx/
++ obj-$(CONFIG_SND_SOC) += s6000/
++ obj-$(CONFIG_SND_SOC) += sh/
++ obj-$(CONFIG_SND_SOC) += txx9/
+++obj-$(CONFIG_SND_SOC) += kirkwood/
++diff --git a/sound/soc/kirkwood/Kconfig b/sound/soc/kirkwood/Kconfig
++new file mode 100644
++index 0000000..df4d527
++--- /dev/null
+++++ b/sound/soc/kirkwood/Kconfig
++@@ -0,0 +1,37 @@
+++config SND_MV88FX_SOC
+++ tristate "SoC Audio for the Marvell 88FX chip"
+++ depends on ARCH_KIRKWOOD
+++ help
+++ Say Y or M if you want to add audio support for Marvell 88FX SoCs:
+++ 88F6180, 88F6192 and 88F6281
+++
+++choice
+++ prompt "Audio Interface"
+++ default SND_MV88FX_SOC_I2S
+++ depends on SND_MV88FX_SOC
+++
+++config SND_MV88FX_SOC_I2S
+++ bool "I2S"
+++ help
+++ Select this option if your board uses I2S interface to communicate
+++ with the audio codec
+++
+++config SND_MV88FX_SOC_SPDIF
+++ bool "SPDIF"
+++ help
+++ Select this option if your board uses SPDIF interface to communicate
+++ with the audio codec
+++
+++endchoice
+++
+++choice
+++ prompt "Codec IC"
+++ default SND_SOC_CS42L51
+++ depends on SND_MV88FX_SOC
+++
+++config SND_SOC_CS42L51
+++ bool "CS42L51"
+++ help
+++ Select this option if your board has audio codec CS42L51
+++
+++endchoice
++diff --git a/sound/soc/kirkwood/Makefile b/sound/soc/kirkwood/Makefile
++new file mode 100644
++index 0000000..57674ad
++--- /dev/null
+++++ b/sound/soc/kirkwood/Makefile
++@@ -0,0 +1,7 @@
+++
+++snd-soc-kirkwood-objs := kirkwood_pcm.o kirkwood_audio_hal.o
+++ifdef CONFIG_SND_SOC_CS42L51
+++snd-soc-kirkwood-objs += cs42l51.o
+++endif
+++
+++obj-$(CONFIG_SND_MV88FX_SOC) += snd-soc-kirkwood.o
++diff --git a/sound/soc/kirkwood/cs42l51.c b/sound/soc/kirkwood/cs42l51.c
++new file mode 100644
++index 0000000..08d3028
++--- /dev/null
+++++ b/sound/soc/kirkwood/cs42l51.c
++@@ -0,0 +1,303 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++#include <linux/ioport.h>
+++#include <linux/platform_device.h>
+++#include <linux/init.h>
+++#include <linux/slab.h>
+++#include <linux/version.h>
+++#include <linux/i2c.h>
+++#include <sound/core.h>
+++#include <sound/initval.h>
+++#include <sound/control.h>
+++#include <sound/pcm.h>
+++#include <sound/asoundef.h>
+++#include <sound/asound.h>
+++
+++#include "cs42l51.h"
+++
+++/* FIXME: This code is not written in driver module style. This is written as
+++ * helper for SOC driver */
+++
+++static struct i2c_client *client;
+++
+++static int cs42l51_add_i2c_device(unsigned char i2c_bus_no,
+++ unsigned short i2c_add)
+++{
+++ struct i2c_board_info info;
+++ struct i2c_adapter *adapter;
+++
+++ memset(&info, 0, sizeof(struct i2c_board_info));
+++ info.addr = i2c_add;
+++ strlcpy(info.type, "cs42l51", I2C_NAME_SIZE);
+++
+++ adapter = i2c_get_adapter(i2c_bus_no);
+++ if (!adapter) {
+++ snd_printk("can't get i2c adapter\n");
+++ return -ENODEV;
+++ }
+++
+++ client = i2c_new_device(adapter, &info);
+++ i2c_put_adapter(adapter);
+++ if (!client) {
+++ snd_printk("can't add i2c device\n");
+++ return -ENODEV;
+++ }
+++
+++ return 0;
+++}
+++
+++void cs42l51_del_i2c_device(void)
+++{
+++ if (client)
+++ i2c_unregister_device(client);
+++ client = NULL;
+++}
+++
+++/*
+++ * offset: Register offset to start reading with
+++ * buf : Pointer to the buffer to store the read data
+++ * num : Number of registers to read
+++ *
+++ * Returns -ve errorno else number of registers read
+++ */
+++
+++static int cs42l51_reg_read(unsigned char offset, unsigned char *buf, int num)
+++{
+++ int ret = 0;
+++
+++ /* Set autoincrement bit */
+++ offset |= CODEC_INCR_ADDR;
+++
+++ /* Send register offset */
+++ ret = i2c_master_send(client, &offset, 1);
+++ if (ret != 1) {
+++ snd_printd("Could not write register offset\n");
+++ return 0;
+++ }
+++
+++ return i2c_master_recv(client, buf, num);
+++}
+++
+++/*
+++ * offset: Register offset to write
+++ * data : Data to be written
+++ *
+++ * Returns -ve errorno else number of registers written (=1)
+++ */
+++
+++static int cs42l51_reg_write(unsigned char offset, unsigned char data)
+++{
+++ int ret = 0;
+++ unsigned char buf[2];
+++
+++ buf[0] = offset;
+++ buf[1] = data;
+++
+++ /* Send register offset & data */
+++ ret = i2c_master_send(client, &buf[0], 2);
+++
+++ return (ret == 2) ? 1 : ret;
+++}
+++
+++static int codec_init(int adc_mode, int digital_if_format,
+++ unsigned char i2c_bus_no, unsigned short i2c_add)
+++{
+++ unsigned char reg_data;
+++
+++ if (cs42l51_add_i2c_device(i2c_bus_no, i2c_add))
+++ return 1;
+++
+++ if (cs42l51_reg_read(CODEC_ID_REG, &reg_data, 1) < 0)
+++ goto codec_init_error;
+++
+++ if (CODEC_CHIP_ID != (reg_data >> 3) ||
+++ CODEC_REV_ID != (reg_data & 0x7)) {
+++ snd_printd("Error: Invalid Cirrus Logic chip/rev ID!\n");
+++ return 1;
+++ }
+++
+++ if (cs42l51_reg_read(CODEC_IF_CTRL_REG, &reg_data, 1) < 0)
+++ goto codec_init_error;
+++
+++ reg_data = (reg_data & ~(0x7<<3)) | (digital_if_format << 3);
+++
+++ if (LEFT_JUSTIFIED_MODE == adc_mode)
+++ reg_data &= (~0x4);
+++ else
+++ reg_data |= 0x4;
+++
+++ if (cs42l51_reg_write(CODEC_IF_CTRL_REG, reg_data) < 0)
+++ goto codec_init_error;
+++
+++ return 0;
+++
+++codec_init_error:
+++ snd_printd("I2C error\n");
+++ return 1;
+++}
+++
+++/*
+++ * Initialize the audio decoder.
+++ */
+++
+++int cs42l51_init(int adc_mode, int digital_if_format, int rec,
+++ unsigned char i2c_bus_no, unsigned short i2c_add)
+++{
+++ if (codec_init(adc_mode, digital_if_format, i2c_bus_no, i2c_add)) {
+++ snd_printk("Error: Audio Codec init failed\n");
+++ return 1;
+++ }
+++
+++ /* Use the signal processor */
+++ if (cs42l51_reg_write(0x9, 0x40) < 0)
+++ goto error;
+++
+++ /* Unmute PCM-A & PCM-B and set default */
+++ if (cs42l51_reg_write(0x10, 0x60) < 0)
+++ goto error;
+++ if (cs42l51_reg_write(0x11, 0x60) < 0)
+++ goto error;
+++
+++ /* default for AOUTx */
+++ if (cs42l51_reg_write(0x16, 0x05) < 0)
+++ goto error;
+++ if (cs42l51_reg_write(0x17, 0x05) < 0)
+++ goto error;
+++
+++ /* swap channels */
+++ if (cs42l51_reg_write(0x18, 0xff) < 0)
+++ goto error;
+++
+++ /* MIC Power Control: power down mIC in channel B, power on channel A
+++ * Recommended seq. in datasheet:
+++ * 1. Enable the PDN bit
+++ * 2. Enable power-down for the selected channels
+++ * 3. Disable the PDN bit */
+++
+++ /* Note: Tested for mono recording only */
+++ if (!rec) {
+++ /* Enable power down */
+++ if (cs42l51_reg_write(0x2, 0x11) < 0)
+++ goto error;
+++
+++ /* No record - Power down both channels */
+++ if (cs42l51_reg_write(0x2, 0x17) < 0)
+++ goto error;
+++
+++ /* Disable power down */
+++ if (cs42l51_reg_write(0x2, 0x16) < 0)
+++ goto error;
+++ } else {
+++ if (rec == 2) {
+++ /* Setreo recording - by default both channels are up */
+++
+++ /* MIC In channel selection - Select channel 3
+++ * unmute both channels */
+++ if (cs42l51_reg_write(0x7, 0xF0) < 0)
+++ goto error;
+++
+++ /* Power up mic pre-amplifier for both channels */
+++ if (cs42l51_reg_write(0x3, 0xA0) < 0)
+++ goto error;
+++ } else {
+++ /* Enable power down */
+++ if (cs42l51_reg_write(0x2, 0x11) < 0)
+++ goto error;
+++
+++ /* Mono recording - Power down Channel B */
+++ if (cs42l51_reg_write(0x2, 0x15) < 0)
+++ goto error;
+++
+++ /* Disable power down */
+++ if (cs42l51_reg_write(0x2, 0x14) < 0)
+++ goto error;
+++
+++ /* MIC In channel selection - Select channel 3
+++ * Mute Channel B */
+++ if (cs42l51_reg_write(0x7, 0xF2) < 0)
+++ goto error;
+++
+++ /* Power down mic pre-amplifier for Channel B*/
+++ if (cs42l51_reg_write(0x3, 0xA8) < 0)
+++ goto error;
+++ }
+++ }
+++
+++ return 0;
+++error:
+++ snd_printk("I2C error\n");
+++ return 1;
+++}
+++
+++#define AUD_NUM_VOLUME_STEPS (40)
+++static unsigned char auddec_volume_mapping[AUD_NUM_VOLUME_STEPS] = {
+++ 0x19, 0xB2, 0xB7, 0xBD, 0xC3, 0xC9, 0xCF, 0xD5,
+++ 0xD8, 0xE1, 0xE7, 0xED, 0xF3, 0xF9, 0xFF, 0x00,
+++ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+++ 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+++ 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18
+++};
+++
+++
+++/*
+++ * Get the audio decoder volume for both channels.
+++ * 0 is lowest volume, AUD_NUM_VOLUME_STEPS-1 is the highest volume.
+++ */
+++
+++void cs42l51_vol_get(unsigned char *vol_list)
+++{
+++ unsigned char reg_data[2];
+++ unsigned char i, vol_idx = 0;
+++
+++ if (cs42l51_reg_read(0x16 + vol_idx, reg_data, 2) < 0) {
+++ snd_printd("I2C error\n");
+++ snd_printk("Couldn't get volume\n");
+++ return;
+++ }
+++
+++ for (; vol_idx < 2; vol_idx++) {
+++ /* Look for the index that mapps to this dB value. */
+++ for (i = 0; i < AUD_NUM_VOLUME_STEPS; i++) {
+++ if (reg_data[vol_idx] == auddec_volume_mapping[i])
+++ break;
+++ if ((auddec_volume_mapping[i] >
+++ auddec_volume_mapping[AUD_NUM_VOLUME_STEPS-1])
+++ && (reg_data[vol_idx] > auddec_volume_mapping[i])
+++ && (reg_data[vol_idx] < auddec_volume_mapping[i+1]))
+++ break;
+++ }
+++ vol_list[vol_idx] = i;
+++ }
+++}
+++
+++/*
+++ * Set the audio decoder volume for both channels.
+++ * 0 is lowest volume, AUD_NUM_VOLUME_STEPS-1 is the highest volume.
+++ */
+++void cs42l51_vol_set(unsigned char *vol_list)
+++{
+++ unsigned int vol_idx;
+++
+++ for (vol_idx = 0; vol_idx < 2; vol_idx++) {
+++ if (vol_list[vol_idx] >= AUD_NUM_VOLUME_STEPS)
+++ vol_list[vol_idx] = AUD_NUM_VOLUME_STEPS - 1;
+++
+++ if (cs42l51_reg_write(0x16 + vol_idx,
+++ auddec_volume_mapping[vol_list[vol_idx]]) < 0) {
+++ snd_printd("I2C error\n");
+++ snd_printk("Couldn't set volume\n");
+++ return;
+++ }
+++ }
+++}
++diff --git a/sound/soc/kirkwood/cs42l51.h b/sound/soc/kirkwood/cs42l51.h
++new file mode 100644
++index 0000000..fbfca94
++--- /dev/null
+++++ b/sound/soc/kirkwood/cs42l51.h
++@@ -0,0 +1,54 @@
+++/*
+++ * Audio codec CS42L51 data definition file
+++ */
+++
+++#ifndef _CS42L51_H_
+++#define _CS42L51_H_
+++
+++#define CODEC_CHIP_ID 0x1B
+++#define CODEC_REV_ID 0x1
+++
+++#define CODEC_ID_REG 0x1
+++#define CODEC_IF_CTRL_REG 0x4
+++#define CODEC_ADC_INPUT_INV_MUTE_REG 0x7
+++#define CODEC_DAC_OUTPUT_CTRL_REG 0x8
+++#define CODEC_DAC_CTRL_REG 0x9
+++#define CODEC_PGAA_VOL_CTRL_REG 0xa
+++#define CODEC_TONE_CTRL_REG 0x15
+++#define CODEC_VOL_OUTA_CTRL_REG 0x16
+++
+++/* Set bit # 7 to 1 to get into auto incremental addressing mode */
+++#define CODEC_INCR_ADDR 0x80
+++
+++#define FALSE 0
+++#define TRUE 1
+++
+++/* Selects the digital interface format used for the data in on SDIN. */
+++enum dac_digital_if_format {
+++ L_JUSTIFIED_UP_TO_24_BIT,
+++ I2S_UP_TO_24_BIT,
+++ R_JUSTIFIED_UP_TO_24_BIT,
+++ R_JUSTIFIED_20_BIT,
+++ R_JUSTIFIED_18_BIT,
+++ R_JUSTIFIED_16_BIT
+++
+++};
+++
+++/* Selects either the I2S or Left-Justified digital interface format for the
+++ data on SDOUT. */
+++enum adc_mode {
+++ LEFT_JUSTIFIED_MODE,
+++ I2S_MODE
+++};
+++
+++/* Initialize the Cirrus Logic device */
+++int cs42l51_init(int adc_mode, int digital_if_format, int rec,
+++ unsigned char i2c_bus_no, unsigned short i2c_add);
+++
+++/* Function to control output volume (playback) */
+++void cs42l51_vol_get(unsigned char *vol_list);
+++void cs42l51_vol_set(unsigned char *vol_list);
+++
+++void cs42l51_del_i2c_device(void);
+++#endif /* _CS42L51_H_ */
+++
++diff --git a/sound/soc/kirkwood/kirkwood_audio_hal.c b/sound/soc/kirkwood/kirkwood_audio_hal.c
++new file mode 100644
++index 0000000..31d5144
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_hal.c
++@@ -0,0 +1,821 @@
+++/*
+++ * Sound driver for Marvell Kirkwood family SOCs
+++ *
+++ * This program is free software; you can redistribute it and/or
+++ * modify it under the terms of the GNU General Public License
+++ * as published by the Free Software Foundation; either version 2
+++ * of the License, or (at your option) any later version.
+++ *
+++ * This program is distributed in the hope that it will be useful,
+++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+++ * GNU General Public License for more details.
+++ *
+++ * You should have received a copy of the GNU General Public License
+++ * along with this program; if not, write to the Free Software
+++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+++ */
+++
+++#include <linux/io.h>
+++#include <sound/core.h>
+++#include <sound/pcm.h>
+++#include <linux/spinlock.h>
+++#include <linux/mv88fx_audio.h>
+++#include "kirkwood_audio_hal.h"
+++
+++static void mv_audio_init(void __iomem *base);
+++static void audio_setup_wins(void __iomem *base,
+++ struct mbus_dram_target_info *dram);
+++static int set_window_as_per_baseadd(void __iomem *base, unsigned int baseadd,
+++ unsigned int audio_offset, int win_num);
+++
+++/* Clocks Control and Status related*/
+++static int mv_audio_dco_ctrl_set(struct mv_audio_freq_data *dcoCtrl,
+++ void __iomem *base);
+++
+++/* Audio PlayBack related*/
+++static int mv_audio_playback_control_set(void __iomem *base, unsigned int
+++ audio_offset, struct mv_audio_playback_ctrl *ctrl);
+++
+++/* Audio SPDIF PlayBack related*/
+++static void mv_spdif_playback_ctrl_set(void __iomem *base,
+++ struct mv_spdif_playback_ctrl *ctrl);
+++
+++/* Audio I2S PlayBack related*/
+++static int mv_i2s_playback_ctrl_set(void __iomem *base,
+++ struct mv_i2s_playback_ctrl *ctrl);
+++
+++/* Audio Recording*/
+++static int mv_audio_record_control_set(struct mv_audio_record_ctrl *ctrl,
+++ unsigned int audio_offset, void __iomem *base);
+++
+++/* SPDIF Recording Related*/
+++static int spdif_record_tclock_set(void __iomem *base, unsigned int tclk);
+++
+++/* I2S Recording Related*/
+++static int mv_i2s_record_cntrl_set(struct mv_i2s_record_ctrl *ctrl,
+++ void __iomem *base);
+++
+++static inline unsigned int audio_burst_bytes_num_get(int burst)
+++{
+++ switch (burst) {
+++ case AUDIO_32BYTE_BURST:
+++ return 32;
+++ case AUDIO_128BYTE_BURST:
+++ return 128;
+++ default:
+++ return 0xffffffff;
+++ }
+++}
+++
+++int mv88fx_snd_hw_init(struct snd_card *card)
+++{
+++ void __iomem *base = chip->base;
+++ struct mv88fx_snd_platform_data *platform_data =
+++ card->dev->platform_data;
+++
+++ if (platform_data->i2s_rec || platform_data->i2s_play)
+++ if (codec_init(I2S_MODE, I2S_UP_TO_24_BIT,
+++ platform_data->i2s_rec, platform_data->i2c_bus_no,
+++ platform_data->i2c_address)) {
+++ snd_printk("Initializing CS42L51 failed\n");
+++ return 1;
+++ }
+++
+++ writel(0xffffffff, (base + MV_AUDIO_INT_CAUSE_REG));
+++ writel(0, (base + MV_AUDIO_INT_MASK_REG));
+++ writel(0, (base + MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG));
+++
+++ mv_audio_init(base);
+++
+++ audio_setup_wins(base, platform_data->dram);
+++
+++ /* Disable all playback/recording */
+++ writel(readl(base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ (~(APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK)),
+++ (base + MV_AUDIO_PLAYBACK_CTRL_REG));
+++
+++ writel(readl(base + MV_AUDIO_RECORD_CTRL_REG) &
+++ (~(ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK)),
+++ (base + MV_AUDIO_RECORD_CTRL_REG));
+++
+++ if (spdif_record_tclock_set(base, platform_data->tclk)) {
+++ snd_printk("Marvell ALSA driver ERR. SPDIF clock set failed\n");
+++ return 1;
+++ }
+++
+++ return 0;
+++}
+++
+++int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip *chip)
+++{
+++ struct mv88fx_snd_stream *audio_stream = chip->stream[PLAYBACK];
+++ struct snd_pcm_substream *substream = audio_stream->substream;
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv_audio_playback_ctrl pcm_play_ctrl;
+++ struct mv_i2s_playback_ctrl i2s_play_ctrl;
+++ struct mv_spdif_playback_ctrl spdif_play_ctrl;
+++ struct mv_audio_freq_data dco_ctrl;
+++
+++ dco_ctrl.offset = chip->dco_ctrl_offst;
+++
+++ switch (audio_stream->rate) {
+++ case 44100:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+++ break;
+++ case 48000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+++ break;
+++ case 96000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+++ break;
+++ default:
+++ snd_printk("Requested rate %d is not supported\n",
+++ runtime->rate); return -1;
+++ }
+++
+++ pcm_play_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+++ AUDIO_32BYTE_BURST;
+++
+++ pcm_play_ctrl.loopBack = chip->loopback;
+++
+++ if (audio_stream->stereo) {
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_MONO_OFF;
+++ } else {
+++ switch (audio_stream->mono_mode) {
+++ case MONO_LEFT:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_LEFT_MONO;
+++ break;
+++ case MONO_RIGHT:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_RIGHT_MONO;
+++ break;
+++ case MONO_BOTH:
+++ default:
+++ pcm_play_ctrl.monoMode = AUDIO_PLAY_BOTH_MONO;
+++ break;
+++ }
+++ }
+++
+++ if (audio_stream->format == SAMPLE_16IN16) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_16BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_16BIT;
+++ } else if (audio_stream->format == SAMPLE_24IN32) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_24BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_24BIT;
+++ } else if (audio_stream->format == SAMPLE_32IN32) {
+++ pcm_play_ctrl.sampleSize = SAMPLE_32BIT;
+++ i2s_play_ctrl.sampleSize = SAMPLE_32BIT;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ pcm_play_ctrl.bufferPhyBase = audio_stream->dma_addr;
+++ pcm_play_ctrl.bufferSize = audio_stream->dma_size;
+++ pcm_play_ctrl.intByteCount = audio_stream->period_size;
+++
+++ /* I2S playback streem stuff */
+++ /*i2s_play_ctrl.sampleSize = pcm_play_ctrl.sampleSize;*/
+++ i2s_play_ctrl.justification = I2S_JUSTIFIED;
+++ i2s_play_ctrl.sendLastFrame = 0;
+++
+++ spdif_play_ctrl.nonPcm = FALSE;
+++
+++ spdif_play_ctrl.validity = chip->ch_stat_valid;
+++
+++ if (audio_stream->stat_mem) {
+++ spdif_play_ctrl.userBitsFromMemory = TRUE;
+++ spdif_play_ctrl.validityFromMemory = TRUE;
+++ spdif_play_ctrl.blockStartInternally = FALSE;
+++ } else {
+++ spdif_play_ctrl.userBitsFromMemory = FALSE;
+++ spdif_play_ctrl.validityFromMemory = FALSE;
+++ spdif_play_ctrl.blockStartInternally = TRUE;
+++ }
+++
+++ /* If this is non-PCM sound, mute I2S channel */
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ if (!(readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ (APCR_PLAY_I2S_ENABLE_MASK | APCR_PLAY_SPDIF_ENABLE_MASK))) {
+++
+++ if (mv_audio_dco_ctrl_set(&dco_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize DCO clock control.\n");
+++ goto error;
+++ }
+++ }
+++
+++ if (audio_stream->clock_src == DCO_CLOCK)
+++ while ((readl(chip->base + MV_AUDIO_SPCR_DCO_STATUS_REG) &
+++ ASDSR_DCO_LOCK_MASK) == 0)
+++ cpu_relax();
+++ else if (audio_stream->clock_src == SPCR_CLOCK)
+++ while ((readl(chip->base + MV_AUDIO_SPCR_DCO_STATUS_REG) &
+++ ASDSR_SPCR_LOCK_MASK) == 0)
+++ cpu_relax();
+++
+++ if (mv_audio_playback_control_set(chip->base, chip->audio_offset,
+++ &pcm_play_ctrl)) {
+++ snd_printk("Failed to initialize PCM playback control.\n");
+++ goto error;
+++ }
+++
+++ if (mv_i2s_playback_ctrl_set(chip->base, &i2s_play_ctrl)) {
+++ snd_printk("Failed to initialize I2S playback control.\n");
+++ goto error;
+++ }
+++
+++ mv_spdif_playback_ctrl_set(chip->base, &spdif_play_ctrl);
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++error:
+++ spin_unlock_irq(&chip->reg_lock);
+++ return -1;
+++}
+++
+++int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip *chip)
+++{
+++ struct mv88fx_snd_stream *audio_stream = chip->stream[CAPTURE];
+++ struct snd_pcm_substream *substream = audio_stream->substream;
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv_audio_record_ctrl pcm_rec_ctrl;
+++ struct mv_i2s_record_ctrl i2s_rec_ctrl;
+++ struct mv_audio_freq_data dco_ctrl;
+++
+++ dco_ctrl.offset = chip->dco_ctrl_offst;
+++
+++ switch (audio_stream->rate) {
+++ case 44100:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_44_1KH;
+++ break;
+++ case 48000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_48KH;
+++ break;
+++ case 96000:
+++ dco_ctrl.baseFreq = AUDIO_FREQ_96KH;
+++ break;
+++ default:
+++ snd_printk("Requested rate %d is not supported\n",
+++ runtime->rate); return -1;
+++ }
+++
+++ pcm_rec_ctrl.burst = (chip->burst == 128) ? AUDIO_128BYTE_BURST :
+++ AUDIO_32BYTE_BURST;
+++
+++ if (audio_stream->format == SAMPLE_16IN16) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_16BIT;
+++ } else if (audio_stream->format == SAMPLE_24IN32) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_24BIT;
+++ } else if (audio_stream->format == SAMPLE_32IN32) {
+++ pcm_rec_ctrl.sampleSize = SAMPLE_32BIT;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* If request for tereo record comes on the boards that doesn't
+++ * support stereo recording */
+++ if ((!chip->stereo) && audio_stream->stereo) {
+++ snd_printk("Stereo recording is not supported\n");
+++ return -1;
+++ }
+++
+++ pcm_rec_ctrl.mono = (audio_stream->stereo) ? FALSE : TRUE;
+++
+++ if (pcm_rec_ctrl.mono) {
+++ switch (audio_stream->mono_mode) {
+++ case MONO_LEFT:
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+++ break;
+++ default:
+++ case MONO_RIGHT:
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_RIGHT_MONO;
+++ break;
+++ }
+++
+++ } else {
+++ pcm_rec_ctrl.monoChannel = AUDIO_REC_LEFT_MONO;
+++ }
+++
+++
+++ pcm_rec_ctrl.bufferPhyBase = audio_stream->dma_addr;
+++ pcm_rec_ctrl.bufferSize = audio_stream->dma_size;
+++
+++ pcm_rec_ctrl.intByteCount = audio_stream->period_size;
+++
+++ /* I2S record streem stuff */
+++ i2s_rec_ctrl.sample = pcm_rec_ctrl.sampleSize;
+++ i2s_rec_ctrl.justf = I2S_JUSTIFIED;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ /* set clock only if record is not enabled*/
+++ if (!(readl(chip->base + MV_AUDIO_RECORD_CTRL_REG) &
+++ (ARCR_RECORD_SPDIF_EN_MASK | ARCR_RECORD_I2S_EN_MASK))) {
+++
+++ if (mv_audio_dco_ctrl_set(&dco_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize DCO clock control.\n");
+++ return -1;
+++ }
+++ }
+++
+++ if (mv_audio_record_control_set(&pcm_rec_ctrl, chip->audio_offset,
+++ chip->base)) {
+++ snd_printk("Failed to initialize PCM record control.\n");
+++ return -1;
+++ }
+++
+++ if (mv_i2s_record_cntrl_set(&i2s_rec_ctrl, chip->base)) {
+++ snd_printk("Failed to initialize I2S record control.\n");
+++ return -1;
+++ }
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++}
+++
+++static void mv_audio_init(void __iomem *base)
+++{
+++ int timeout = 10000000;
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + 0x1200);
+++ reg_data &= (~(0x333FF8));
+++ reg_data |= 0x111D18;
+++
+++ writel(reg_data, base + 0x1200);
+++
+++ do {
+++ timeout--;
+++ } while (timeout);
+++
+++ reg_data = readl(base + 0x1200);
+++ reg_data &= (~(0x333FF8));
+++ reg_data |= 0x111D18;
+++
+++ writel(reg_data, base + 0x1200);
+++}
+++
+++static void audio_setup_wins(void __iomem *base,
+++ struct mbus_dram_target_info *dram)
+++{
+++ int win_num;
+++
+++ /* First disable and clear windows */
+++ for (win_num = 0; win_num < MV_AUDIO_MAX_ADDR_DECODE_WIN; win_num++) {
+++ writel(0, base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ writel(0, base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ }
+++
+++ /* Setup windows for DDR */
+++ for (win_num = 0; win_num < MV_AUDIO_MAX_ADDR_DECODE_WIN; win_num++) {
+++ /* We will set the Window to DRAM_CS1 in default */
+++ struct mbus_dram_window *cs = &dram->cs[1];
+++
+++ writel(cs->base & 0xffff0000,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ writel(((cs->size - 1) & 0xffff0000) |
+++ (cs->mbus_attr << 8) |
+++ (dram->mbus_dram_target_id << 4) | 1,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ }
+++}
+++
+++#define MV_BOARD_TCLK_133MHZ 133333333
+++#define MV_BOARD_TCLK_150MHZ 150000000
+++#define MV_BOARD_TCLK_166MHZ 166666667
+++#define MV_BOARD_TCLK_200MHZ 200000000
+++
+++static int spdif_record_tclock_set(void __iomem *base, unsigned int tclk)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_SPDIF_REC_GEN_REG);
+++
+++ switch (tclk) {
+++ case MV_BOARD_TCLK_133MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_133MHZ;
+++ break;
+++ case MV_BOARD_TCLK_150MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_150MHZ;
+++ break;
+++ case MV_BOARD_TCLK_166MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_166MHZ;
+++ break;
+++ case MV_BOARD_TCLK_200MHZ:
+++ reg_data |= ASRGR_CORE_CLK_FREQ_200MHZ;
+++ break;
+++ default:
+++ snd_printk("Not supported core clock %d\n", tclk);
+++ return 1;
+++ }
+++
+++ writel(reg_data, base + MV_AUDIO_SPDIF_REC_GEN_REG);
+++
+++ return 0;
+++}
+++
+++static int mv_audio_record_control_set(struct mv_audio_record_ctrl *ctrl,
+++ unsigned int audio_offset, void __iomem *base)
+++{
+++ unsigned int reg, buff_start, buff_end;
+++ unsigned int win_base, win_size;
+++
+++ if (ctrl->monoChannel > AUDIO_REC_RIGHT_MONO) {
+++ snd_printk("Error: Illegal monoChannel %x\n",
+++ ctrl->monoChannel);
+++
+++ return 1;
+++ }
+++
+++ if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+++ (ctrl->burst != AUDIO_128BYTE_BURST)) {
+++ snd_printk("Error: Illegal burst %x\n",
+++ ctrl->burst);
+++
+++ return 1;
+++ }
+++
+++ if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1)) {
+++ snd_printk("Error bufferPhyBase is not aligned to 0x%x"\
+++ " bytes\n", MV_AUDIO_BUFFER_MIN_ALIGN);
+++
+++ return 1;
+++ }
+++
+++ if ((ctrl->bufferSize <= audio_burst_bytes_num_get(ctrl->burst)) |
+++ (ctrl->bufferSize & (audio_burst_bytes_num_get(ctrl->burst) - 1)) ||
+++ (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))) {
+++ snd_printk("Error bufferSize smaller than or not multiple "\
+++ "of 0x%x bytes or larger than 0x%x\n",
+++ audio_burst_bytes_num_get(ctrl->burst),
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg &= ~(ARCR_RECORD_BURST_SIZE_MASK | ARCR_RECORDED_MONO_CHNL_MASK |
+++ ARCR_RECORD_SAMPLE_SIZE_MASK);
+++
+++ switch (ctrl->sampleSize) {
+++ case SAMPLE_16BIT:
+++ case SAMPLE_16BIT_NON_COMPACT:
+++ case SAMPLE_20BIT:
+++ case SAMPLE_24BIT:
+++ case SAMPLE_32BIT:
+++ reg |= ctrl->sampleSize << ARCR_RECORD_SAMPLE_SIZE_OFFS;
+++ break;
+++ default:
+++ snd_printk("Error: Illegal sampleSize %x\n",
+++ ctrl->sampleSize);
+++
+++ return 1;
+++ }
+++
+++ reg |= ctrl->burst << ARCR_RECORD_BURST_SIZE_OFFS;
+++ reg |= ctrl->monoChannel << ARCR_RECORDED_MONO_CHNL_OFFS;
+++
+++ if (ctrl->mono)
+++ reg |= ARCR_RECORD_MONO_MASK;
+++ else
+++ reg &= (~ARCR_RECORD_MONO_MASK);
+++
+++ writel(reg, base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* Get the details of the Record address window*/
+++ win_base = readl(base + MV_AUDIO_WIN_BASE_REG(MV_AUDIO_RECORD_WIN_NUM));
+++ win_size = readl(base + MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_RECORD_WIN_NUM));
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ win_size = ((win_size >> 16) + 1) << 16;
+++
+++ buff_start = ctrl->bufferPhyBase;
+++ buff_end = buff_start + ctrl->bufferSize - 1;
+++
+++ /* If buffer address is not within window boundries then try to set a
+++ * new value to the Record window by geting the target of where the
+++ * buffer exist, if the buffer is within the window of the new target
+++ * then set the Record window to that target else return Fail
+++ */
+++
+++ if (!(((buff_start >= win_base) &&
+++ (buff_start <= (win_base + win_size - 1))) ||
+++ ((buff_end >= win_base) &&
+++ (buff_end <= (win_base + win_size - 1))))) {
+++ snd_printd("Audio record buffer is not within window");
+++
+++ /* Set the window for the buffer that user require
+++ for the palyback\recording window to the target window */
+++ if (set_window_as_per_baseadd(base, ctrl->bufferPhyBase,
+++ audio_offset, MV_AUDIO_RECORD_WIN_NUM)) {
+++ snd_printk("Playback buffer (%#x) is not "
+++ "within a valid target\n",
+++ ctrl->bufferPhyBase);
+++ return 1;
+++ }
+++ }
+++
+++ /* Set the interrupt byte count */
+++ reg = ctrl->intByteCount & ARBCI_BYTE_COUNT_MASK;
+++ writel(reg, base + MV_AUDIO_RECORD_BYTE_CNTR_INT_REG);
+++
+++ writel(ctrl->bufferPhyBase, base + MV_AUDIO_RECORD_START_ADDR_REG);
+++ writel(AUDIO_SIZE_TO_REG(ctrl->bufferSize),
+++ base + MV_AUDIO_RECORD_BUFF_SIZE_REG);
+++
+++
+++ return 0;
+++}
+++
+++static int mv_i2s_record_cntrl_set(struct mv_i2s_record_ctrl *ctrl,
+++ void __iomem *base)
+++{
+++ unsigned int reg;
+++
+++ reg = readl(base + MV_AUDIO_I2S_REC_CTRL_REG);
+++ reg &= ~(AIRCR_I2S_RECORD_JUSTF_MASK|AIRCR_I2S_SAMPLE_SIZE_MASK);
+++
+++ switch (ctrl->justf) {
+++ case I2S_JUSTIFIED:
+++ case LEFT_JUSTIFIED:
+++ case RIGHT_JUSTIFIED:
+++ case RISE_BIT_CLCK_JUSTIFIED:
+++ reg |= ctrl->justf << AIRCR_I2S_RECORD_JUSTF_OFFS;
+++ break;
+++ default:
+++ return 1;
+++ }
+++
+++ reg |= ctrl->sample << AIRCR_I2S_SAMPLE_SIZE_OFFS;
+++
+++ writel(reg, base + MV_AUDIO_I2S_REC_CTRL_REG);
+++ return 0;
+++}
+++
+++/* We trust the value set in the window registers and don't check them.
+++ * As there is some value already present in the register, we assume
+++ * base and size are aligned */
+++
+++static int set_window_as_per_baseadd(void __iomem *base, unsigned int baseadd,
+++ unsigned int audio_offset, int win_num)
+++{
+++ int dram_cs, win;
+++ unsigned int win_base, win_size, size;
+++ unsigned char dram_attr[4] = {0x0E, 0x0D, 0x0B, 0x07};
+++
+++ /* Base passed is Audio base address. Audio base address is
+++ * Internal register base address + audio_offset */
+++ void __iomem *internal_reg_base = base - audio_offset;
+++
+++ for (dram_cs = 0; dram_cs < 4; dram_cs++) {
+++ win_base = readl(internal_reg_base + 0x1500 + (8 * dram_cs));
+++ win_size = readl(internal_reg_base + 0x1504 + (8 * dram_cs));
+++
+++ /* skip if window is disabled */
+++ if (!(win_size & 1))
+++ continue;
+++
+++ /* Window size bits are 31:24. Where size =
+++ * (2 ^ no of ones) * 16 MB. e.g. 0x0F says 256MB */
+++ size = ((win_size >> 24) + 1) << 24;
+++
+++ if ((baseadd >= win_base) && (baseadd < (win_base + size))) {
+++ snd_printd("DRAM window %d set for %s window",
+++ dram_cs, win_num ? "plaback" : "record");
+++ writel(win_base,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++
+++ /* DRAM window ctrl regs are bit different than Audio
+++ * Set size, attribute and target ID */
+++ win_size = ((size - 1) & 0xffff0000) | 1;
+++ win_size |= (dram_attr[dram_cs] << 8); /* Atribute */
+++ win_size &= (~(0xF << 4)); /* Target ID */
+++
+++ writel(win_size,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ snd_printd("win_base 0x%08x\twin_size 0x%08x",
+++ win_base, win_size);
+++ return 0;
+++ }
+++ }
+++
+++ for (win = 0; win < 8; win++) {
+++ win_base = readl(internal_reg_base + 0x2004 + (0x10 * win));
+++ win_size = readl(internal_reg_base + 0x2008 + (0x10 * win));
+++
+++ /* skip if window is disabled */
+++ if (!(win_size & 1))
+++ continue;
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ size = ((win_size >> 16) + 1) << 16;
+++ if ((baseadd >= win_base) && (baseadd < (win_base + size))) {
+++ snd_printd("CPU window %d set for %s window",
+++ win_base, win_num ? "plaback" : "record");
+++ writel(win_base,
+++ base + MV_AUDIO_WIN_BASE_REG(win_num));
+++ writel(win_size,
+++ base + MV_AUDIO_WIN_CTRL_REG(win_num));
+++ return 0;
+++ }
+++ }
+++
+++ return 1;
+++}
+++
+++static int mv_audio_playback_control_set(void __iomem *base, unsigned int
+++ audio_offset, struct mv_audio_playback_ctrl *ctrl)
+++{
+++ unsigned int reg, buff_start, buff_end;
+++ unsigned int win_base, win_size;
+++
+++ if (ctrl->monoMode >= AUDIO_PLAY_OTHER_MONO) {
+++ snd_printk("Error: Illegal monoMode %x\n", ctrl->monoMode);
+++ return 1;
+++ }
+++
+++ if ((ctrl->burst != AUDIO_32BYTE_BURST) &&
+++ (ctrl->burst != AUDIO_128BYTE_BURST)) {
+++ snd_printk("Error: Illegal burst %x\n", ctrl->burst);
+++ return 1;
+++ }
+++
+++ if (ctrl->bufferPhyBase & (MV_AUDIO_BUFFER_MIN_ALIGN - 1)) {
+++ snd_printk("Error, bufferPhyBase is not aligned to 0x%x "\
+++ "bytes\n", MV_AUDIO_BUFFER_MIN_ALIGN);
+++ return 1;
+++ }
+++
+++ if ((ctrl->bufferSize <= audio_burst_bytes_num_get(ctrl->burst)) ||
+++ (ctrl->bufferSize & (audio_burst_bytes_num_get(ctrl->burst) - 1)) ||
+++ (ctrl->bufferSize > AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX))) {
+++ snd_printk("Error, bufferSize smaller than or not multiple "\
+++ "of 0x%x bytes or larger than 0x%x",
+++ audio_burst_bytes_num_get(ctrl->burst),
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg &= ~(APCR_PLAY_BURST_SIZE_MASK | APCR_LOOPBACK_MASK |
+++ APCR_PLAY_MONO_MASK | APCR_PLAY_SAMPLE_SIZE_MASK);
+++ reg |= ctrl->burst << APCR_PLAY_BURST_SIZE_OFFS;
+++ reg |= ctrl->loopBack << APCR_LOOPBACK_OFFS;
+++ reg |= ctrl->monoMode << APCR_PLAY_MONO_OFFS;
+++ reg |= ctrl->sampleSize << APCR_PLAY_SAMPLE_SIZE_OFFS;
+++ writel(reg, base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* Get the details of the Playback address window*/
+++ win_base = readl(base +
+++ MV_AUDIO_WIN_BASE_REG(MV_AUDIO_PLAYBACK_WIN_NUM));
+++ win_size = readl(base +
+++ MV_AUDIO_WIN_CTRL_REG(MV_AUDIO_PLAYBACK_WIN_NUM));
+++
+++ /* Window size bits are 31:16. Where size =
+++ * (2 ^ no of ones) * 64 KB. e.g. 0x0FF says 16MB */
+++ win_size = ((win_size >> 16) + 1) << 16;
+++
+++ buff_start = ctrl->bufferPhyBase;
+++ buff_end = buff_start + ctrl->bufferSize - 1;
+++
+++ /* If Playback window is not enabled or buffer address is not within
+++ * window boundries then try to set a new value to the Playback window*/
+++
+++ if (!(((buff_start >= win_base) &&
+++ (buff_start <= (win_base + win_size - 1))) ||
+++ ((buff_end >= win_base) &&
+++ (buff_end <= (win_base + win_size - 1))))) {
+++ snd_printd("Audio playback buffer is not within window\n");
+++
+++ /* Set the window for the buffer that user require
+++ for the palyback\recording window to the target window */
+++ if (set_window_as_per_baseadd(base, ctrl->bufferPhyBase,
+++ audio_offset, MV_AUDIO_PLAYBACK_WIN_NUM)) {
+++ snd_printk("Record buffer (%#x) is not "
+++ "within a valid target\n",
+++ ctrl->bufferPhyBase);
+++ return 1;
+++ }
+++ }
+++
+++ /* Set the interrupt byte count */
+++ reg = ctrl->intByteCount & APBCI_BYTE_COUNT_MASK;
+++ writel(reg, base + MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG);
+++
+++ writel(ctrl->bufferPhyBase,
+++ base + MV_AUDIO_PLAYBACK_BUFF_START_REG);
+++ writel(AUDIO_SIZE_TO_REG(ctrl->bufferSize),
+++ base + MV_AUDIO_PLAYBACK_BUFF_SIZE_REG);
+++
+++ return 0;
+++}
+++
+++static int mv_i2s_playback_ctrl_set(void __iomem *base,
+++ struct mv_i2s_playback_ctrl *ctrl)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_I2S_PLAY_CTRL_REG);
+++ reg_data &= ~(AIPCR_I2S_PB_JUSTF_MASK | AIPCR_I2S_PB_SAMPLE_SIZE_MASK);
+++
+++ if (ctrl->sampleSize > SAMPLE_16BIT) {
+++ snd_printk("Illigal sample size\n");
+++ return 1;
+++ }
+++
+++ reg_data |= ctrl->sampleSize << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS;
+++
+++ if (ctrl->sendLastFrame)
+++ reg_data |= AIPCR_I2S_SEND_LAST_FRM_MASK;
+++ else
+++ reg_data &= ~AIPCR_I2S_SEND_LAST_FRM_MASK;
+++
+++ switch (ctrl->justification) {
+++ case I2S_JUSTIFIED:
+++ case LEFT_JUSTIFIED:
+++ case RIGHT_JUSTIFIED:
+++ reg_data |= ctrl->justification << AIPCR_I2S_PB_JUSTF_OFFS;
+++ break;
+++ default:
+++ snd_printk("Illigal justification value\n");
+++ return 1;
+++ }
+++
+++ writel(reg_data, base + MV_AUDIO_I2S_PLAY_CTRL_REG);
+++
+++ return 0;
+++}
+++
+++static void mv_spdif_playback_ctrl_set(void __iomem *base,
+++ struct mv_spdif_playback_ctrl *ctrl)
+++{
+++ unsigned int reg_data;
+++
+++ reg_data = readl(base + MV_AUDIO_SPDIF_PLAY_CTRL_REG);
+++
+++ if (ctrl->blockStartInternally)
+++ reg_data |= ASPCR_SPDIF_BLOCK_START_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_BLOCK_START_MASK;
+++
+++ if (ctrl->validityFromMemory)
+++ reg_data |= ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK;
+++
+++ if (ctrl->userBitsFromMemory)
+++ reg_data |= ASPCR_SPDIF_PB_MEM_USR_EN_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_MEM_USR_EN_MASK;
+++
+++ if (ctrl->validity)
+++ reg_data |= ASPCR_SPDIF_PB_REG_VALIDITY_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_REG_VALIDITY_MASK;
+++
+++ if (ctrl->nonPcm)
+++ reg_data |= ASPCR_SPDIF_PB_NONPCM_MASK;
+++ else
+++ reg_data &= ~ASPCR_SPDIF_PB_NONPCM_MASK;
+++
+++ writel(reg_data, base + MV_AUDIO_SPDIF_PLAY_CTRL_REG);
+++}
+++
+++static int mv_audio_dco_ctrl_set(struct mv_audio_freq_data *dcoCtrl,
+++ void __iomem *base)
+++{
+++ unsigned int reg;
+++
+++ /* Check parameters*/
+++ if (dcoCtrl->baseFreq > AUDIO_FREQ_96KH) {
+++ snd_printk("dcoCtrl->baseFreq value (0x%x) invalid\n",
+++ dcoCtrl->baseFreq);
+++ return 1;
+++ }
+++
+++ if ((dcoCtrl->offset > 0xFD0) || (dcoCtrl->offset < 0x20)) {
+++ snd_printk("dcoCtrl->offset value (0x%x) invalid\n",
+++ dcoCtrl->baseFreq);
+++ return 1;
+++ }
+++
+++ reg = readl(base + MV_AUDIO_DCO_CTRL_REG);
+++
+++ reg &= ~(ADCR_DCO_CTRL_FS_MASK | ADCR_DCO_CTRL_OFFSET_MASK);
+++ reg |= ((dcoCtrl->baseFreq << ADCR_DCO_CTRL_FS_OFFS) |
+++ (dcoCtrl->offset << ADCR_DCO_CTRL_OFFSET_OFFS));
+++
+++ writel(reg, base + MV_AUDIO_DCO_CTRL_REG);
+++
+++ return 0;
+++}
++diff --git a/sound/soc/kirkwood/kirkwood_audio_hal.h b/sound/soc/kirkwood/kirkwood_audio_hal.h
++new file mode 100644
++index 0000000..ce08102
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_hal.h
++@@ -0,0 +1,109 @@
+++/*
+++ * Sound driver data definition file for Marvell Kirkwood family SOCs
+++ */
+++
+++#ifndef __AUDIO_HAL_H
+++#define __AUDIO_HAL_H
+++
+++#include "kirkwood_audio_regs.h"
+++
+++#ifdef CONFIG_SND_SOC_CS42L51
+++#include "cs42l51.h"
+++
+++#define codec_init cs42l51_init
+++#define codec_vol_get cs42l51_vol_get
+++#define codec_vol_set cs42l51_vol_set
+++#define codec_del_i2c_device cs42l51_del_i2c_device
+++#endif
+++
+++#define CODEC_I2C_BUS_NO 0
+++#define CODEC_I2C_ADD 0x4A
+++
+++/*********************************/
+++/* General enums and structures */
+++/*******************************/
+++/* Type of Audio operations*/
+++enum mv_audio_operation {
+++ AUDIO_PLAYBACK = 0,
+++ AUDIO_RECORD = 1
+++};
+++
+++struct mv_audio_freq_data{
+++ int baseFreq; /* Control FS, selects the base frequency
+++ * of the DCO */
+++ u32 offset; /* Offset control in which each step equals to
+++ * 0.9536 ppm */
+++};
+++
+++
+++/***********************************/
+++/* Play Back related structures */
+++/*********************************/
+++
+++struct mv_audio_playback_ctrl {
+++ int burst; /* Specifies the Burst Size of the DMA */
+++ bool loopBack; /* When Loopback is enabled, playback data
+++ * is looped back to be recorded */
+++ int monoMode; /* Mono Mode is used */
+++ unsigned int bufferPhyBase; /* Physical Address of DMA buffer */
+++ unsigned int bufferSize; /* Size of DMA buffer */
+++ unsigned int intByteCount; /* Number of bytes after which an
+++ * interrupt will be issued.*/
+++ int sampleSize; /* Playback Sample Size*/
+++};
+++
+++struct mv_spdif_playback_ctrl {
+++ bool nonPcm; /* PCM or non-PCM mode*/
+++ bool validity; /* Validity bit value when using
+++ * registers (userBitsFromMemory=0) */
+++ bool underrunData; /* If true send last frame on mute/pause/
+++ * underrun otherwise send 24 binary */
+++ bool userBitsFromMemory; /* otherwise from intenal registers */
+++ bool validityFromMemory; /* otherwise from internal registers */
+++ bool blockStartInternally; /* When user and valid bits are form
+++ * registers then this bit should be zero */
+++};
+++
+++struct mv_i2s_playback_ctrl {
+++ int sampleSize;
+++ int justification;
+++ bool sendLastFrame; /* If true send last frame on
+++ * mute/pause/underrun
+++ * otherwise send 64 binary*/
+++};
+++
+++
+++/*********************************/
+++/* Recording related structures */
+++/*********************************/
+++
+++struct mv_audio_record_ctrl {
+++ int burst; /* Recording DMA Burst Size */
+++ int sampleSize; /*Recording Sample Size */
+++ bool mono; /* If true then recording mono else
+++ * recording stereo */
+++ int monoChannel; /* Left or right moono */
+++ u32 bufferPhyBase; /* Physical Address of DMA buffer */
+++ u32 bufferSize; /* Size of DMA buffer */
+++
+++ u32 intByteCount; /* Number of bytes after which an
+++ * interrupt will be issued.*/
+++
+++};
+++
+++struct mv_i2s_record_ctrl {
+++ int sample; /* I2S Recording Sample Size*/
+++ int justf;
+++};
+++
+++/******************/
+++/* Functions API */
+++/****************/
+++
+++extern struct mv88fx_snd_chip *chip;
+++
+++int mv88fx_snd_hw_init(struct snd_card *card);
+++int mv88fx_snd_hw_capture_set(struct mv88fx_snd_chip *chip);
+++int mv88fx_snd_hw_playback_set(struct mv88fx_snd_chip *chip);
+++
+++#endif
++diff --git a/sound/soc/kirkwood/kirkwood_audio_regs.h b/sound/soc/kirkwood/kirkwood_audio_regs.h
++new file mode 100644
++index 0000000..1d3df15
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_audio_regs.h
++@@ -0,0 +1,310 @@
+++/*
+++ * Audio registers for Marvell Kirkwood family SOCs
+++ */
+++
+++#ifndef __KW_AUDIO_REGS_H
+++#define __KW_AUDIO_REGS_H
+++
+++enum mv_audio_freq {
+++ AUDIO_FREQ_44_1KH = 0, /* 11.2896Mhz */
+++ AUDIO_FREQ_48KH = 1, /* 12.288Mhz */
+++ AUDIO_FREQ_96KH = 2, /* 24.576Mhz */
+++ AUDIO_FREQ_LOWER_44_1KH = 3 , /* Lower than 11.2896MHz */
+++ AUDIO_FREQ_HIGHER_96KH = 4, /* Higher than 24.576MHz */
+++ AUDIO_FREQ_OTHER = 7, /* Other frequency */
+++};
+++
+++enum mv_audio_burst_size {
+++ AUDIO_32BYTE_BURST = 1,
+++ AUDIO_128BYTE_BURST = 2,
+++};
+++
+++enum mv_audio_playback_mono {
+++ AUDIO_PLAY_MONO_OFF = 0,
+++ AUDIO_PLAY_LEFT_MONO = 1,
+++ AUDIO_PLAY_RIGHT_MONO = 2,
+++ AUDIO_PLAY_BOTH_MONO = 3,
+++ AUDIO_PLAY_OTHER_MONO = 4
+++};
+++
+++enum mv_audio_record_mono {
+++ AUDIO_REC_LEFT_MONO = 0,
+++ AUDIO_REC_RIGHT_MONO = 1,
+++};
+++
+++enum mv_audio_sample_size {
+++ SAMPLE_32BIT = 0,
+++ SAMPLE_24BIT = 1,
+++ SAMPLE_20BIT = 2,
+++ SAMPLE_16BIT = 3,
+++ SAMPLE_16BIT_NON_COMPACT = 7
+++};
+++
+++enum mv_audio_i2s_justification {
+++ LEFT_JUSTIFIED = 0,
+++ I2S_JUSTIFIED = 5,
+++ RISE_BIT_CLCK_JUSTIFIED = 7,
+++ RIGHT_JUSTIFIED = 8,
+++};
+++
+++#define APBBCR_SIZE_MAX 0x3FFFFF
+++#define APBBCR_SIZE_SHIFT 0x2
+++
+++#define AUDIO_REG_TO_SIZE(reg) (((reg) + 1) << APBBCR_SIZE_SHIFT)
+++#define AUDIO_SIZE_TO_REG(size) (((size) >> APBBCR_SIZE_SHIFT) - 1)
+++
+++#define MV_AUDIO_BUFFER_MIN_ALIGN 0x8
+++
+++/********************/
+++/* Clocking Control*/
+++/*******************/
+++
+++#define MV_AUDIO_DCO_CTRL_REG 0x1204
+++#define MV_AUDIO_SPCR_DCO_STATUS_REG 0x120c
+++#define MV_AUDIO_SAMPLE_CNTR_CTRL_REG 0x1220
+++#define MV_AUDIO_PLAYBACK_SAMPLE_CNTR_REG 0x1224
+++#define MV_AUDIO_RECORD_SAMPLE_CNTR_REG 0x1228
+++#define MV_AUDIO_CLOCK_CTRL_REG 0x1230
+++
+++/* MV_AUDIO_DCO_CTRL_REG */
+++#define ADCR_DCO_CTRL_FS_OFFS 0
+++#define ADCR_DCO_CTRL_FS_MASK (0x3 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_44_1KHZ (0x0 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_48KHZ (0x1 << ADCR_DCO_CTRL_FS_OFFS)
+++#define ADCR_DCO_CTRL_FS_96KHZ (0x2 << ADCR_DCO_CTRL_FS_OFFS)
+++
+++
+++#define ADCR_DCO_CTRL_OFFSET_OFFS 2
+++#define ADCR_DCO_CTRL_OFFSET_MASK (0xfff << ADCR_DCO_CTRL_OFFSET_OFFS)
+++
+++/* MV_AUDIO_SPCR_DCO_STATUS_REG */
+++#define ASDSR_SPCR_CTRLFS_OFFS 0
+++#define ASDSR_SPCR_CTRLFS_MASK (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_44_1KHZ (0x0 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_48KHZ (0x1 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_96KHZ (0x2 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_44_1KHZ_LESS (0x3 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_96KHZ_MORE (0x4 << ASDSR_SPCR_CTRLFS_OFFS)
+++#define ASDSR_SPCR_CTRLFS_OTHER (0x7 << ASDSR_SPCR_CTRLFS_OFFS)
+++
+++
+++#define ASDSR_SPCR_CTRLOFFSET_OFFS 3
+++#define ASDSR_SPCR_CTRLOFFSET_MASK (0xfff << ASDSR_SPCR_CTRLOFFSET_OFFS)
+++
+++#define ASDSR_SPCR_LOCK_OFFS 15
+++#define ASDSR_SPCR_LOCK_MASK (0x1 << ASDSR_SPCR_LOCK_OFFS)
+++
+++#define ASDSR_DCO_LOCK_OFFS 16
+++#define ASDSR_DCO_LOCK_MASK (0x1 << ASDSR_DCO_LOCK_OFFS)
+++
+++#define ASDSR_PLL_LOCK_OFFS 17
+++#define ASDSR_PLL_LOCK_MASK (0x1 << ASDSR_PLL_LOCK_OFFS)
+++
+++/*MV_AUDIO_SAMPLE_CNTR_CTRL_REG */
+++
+++#define ASCCR_CLR_PLAY_CNTR_OFFS 9
+++#define ASCCR_CLR_PLAY_CNTR_MASK (0x1 << ASCCR_CLR_PLAY_CNTR_OFFS)
+++
+++#define ASCCR_CLR_REC_CNTR_OFFS 8
+++#define ASCCR_CLR_REC_CNTR_MASK (0x1 << ASCCR_CLR_REC_CNTR_OFFS)
+++
+++#define ASCCR_ACTIVE_PLAY_CNTR_OFFS 1
+++#define ASCCR_ACTIVE_PLAY_CNTR_MASK (0x1 << ASCCR_ACTIVE_PLAY_CNTR_OFFS)
+++
+++#define ASCCR_ACTIVE_REC_CNTR_OFFS 0
+++#define ASCCR_ACTIVE_REC_CNTR_MASK (0x1 << ASCCR_ACTIVE_REC_CNTR_OFFS)
+++
+++/* MV_AUDIO_CLOCK_CTRL_REG */
+++#define ACCR_MCLK_SOURCE_OFFS 0
+++#define ACCR_MCLK_SOURCE_MASK (0x3 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_DCO (0x0 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_SPCR (0x2 << ACCR_MCLK_SOURCE_OFFS)
+++#define ACCR_MCLK_SOURCE_EXT (0x3 << ACCR_MCLK_SOURCE_OFFS)
+++
+++
+++/*********************/
+++/* Interrupts */
+++/*******************/
+++#define MV_AUDIO_ERROR_CAUSE_REG 0x1300
+++#define MV_AUDIO_ERROR_MASK_REG 0x1304
+++#define MV_AUDIO_INT_CAUSE_REG 0x1308
+++#define MV_AUDIO_INT_MASK_REG 0x130C
+++#define MV_AUDIO_RECORD_BYTE_CNTR_INT_REG 0x1310
+++#define MV_AUDIO_PLAYBACK_BYTE_CNTR_INT_REG 0x1314
+++
+++/* MV_AUDIO_INT_CAUSE_REG*/
+++#define AICR_RECORD_BYTES_INT (0x1 << 13)
+++#define AICR_PLAY_BYTES_INT (0x1 << 14)
+++
+++#define ARBCI_BYTE_COUNT_MASK 0xFFFFFF
+++#define APBCI_BYTE_COUNT_MASK 0xFFFFFF
+++
+++/*********************/
+++/* Audio Playback */
+++/*******************/
+++/* General */
+++#define MV_AUDIO_PLAYBACK_CTRL_REG 0x1100
+++#define MV_AUDIO_PLAYBACK_BUFF_START_REG 0x1104
+++#define MV_AUDIO_PLAYBACK_BUFF_SIZE_REG 0x1108
+++#define MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG 0x110c
+++
+++/* SPDIF */
+++#define MV_AUDIO_SPDIF_PLAY_CTRL_REG 0x2204
+++#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(ind) \
+++ (0x2280 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(ind) \
+++ (0x22a0 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(ind) \
+++ (0x22c0 + (ind << 2))
+++#define MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(ind) \
+++ (0x22e0 + (ind << 2))
+++
+++/* I2S */
+++#define MV_AUDIO_I2S_PLAY_CTRL_REG 0x2508
+++
+++
+++/* MV_AUDIO_PLAYBACK_CTRL_REG */
+++#define APCR_PLAY_SAMPLE_SIZE_OFFS 0
+++#define APCR_PLAY_SAMPLE_SIZE_MASK (0x7 << APCR_PLAY_SAMPLE_SIZE_OFFS)
+++
+++#define APCR_PLAY_I2S_ENABLE_OFFS 3
+++#define APCR_PLAY_I2S_ENABLE_MASK (0x1 << APCR_PLAY_I2S_ENABLE_OFFS)
+++
+++#define APCR_PLAY_SPDIF_ENABLE_OFFS 4
+++#define APCR_PLAY_SPDIF_ENABLE_MASK (0x1 << APCR_PLAY_SPDIF_ENABLE_OFFS)
+++
+++#define APCR_PLAY_MONO_OFFS 5
+++#define APCR_PLAY_MONO_MASK (0x3 << APCR_PLAY_MONO_OFFS)
+++
+++#define APCR_PLAY_I2S_MUTE_OFFS 7
+++#define APCR_PLAY_I2S_MUTE_MASK (0x1 << APCR_PLAY_I2S_MUTE_OFFS)
+++
+++#define APCR_PLAY_SPDIF_MUTE_OFFS 8
+++#define APCR_PLAY_SPDIF_MUTE_MASK (0x1 << APCR_PLAY_SPDIF_MUTE_OFFS)
+++
+++#define APCR_PLAY_PAUSE_OFFS 9
+++#define APCR_PLAY_PAUSE_MASK (0x1 << APCR_PLAY_PAUSE_OFFS)
+++
+++#define APCR_LOOPBACK_OFFS 10
+++#define APCR_LOOPBACK_MASK (0x1 << APCR_LOOPBACK_OFFS)
+++
+++#define APCR_PLAY_BURST_SIZE_OFFS 11
+++#define APCR_PLAY_BURST_SIZE_MASK (0x3 << APCR_PLAY_BURST_SIZE_OFFS)
+++
+++#define APCR_PLAY_BUSY_OFFS 16
+++#define APCR_PLAY_BUSY_MASK (0x1 << APCR_PLAY_BUSY_OFFS)
+++
+++/* MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG */
+++#define APBBCR_SIZE_MAX 0x3FFFFF
+++#define APBBCR_SIZE_SHIFT 0x2
+++
+++
+++/* MV_AUDIO_SPDIF_PLAY_CTRL_REG */
+++#define ASPCR_SPDIF_BLOCK_START_OFFS 0x0
+++#define ASPCR_SPDIF_BLOCK_START_MASK (0x1 << ASPCR_SPDIF_BLOCK_START_OFFS)
+++
+++#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS 0x1
+++#define ASPCR_SPDIF_PB_EN_MEM_VALIDITY_MASK (0x1 << \
+++ ASPCR_SPDIF_PB_EN_MEM_VALIDITY_OFFS)
+++
+++#define ASPCR_SPDIF_PB_MEM_USR_EN_OFFS 0x2
+++#define ASPCR_SPDIF_PB_MEM_USR_EN_MASK (0x1 << ASPCR_SPDIF_PB_MEM_USR_EN_OFFS)
+++
+++#define ASPCR_SPDIF_UNDERRUN_DATA_OFFS 0x5
+++#define ASPCR_SPDIF_UNDERRUN_DATA_MASK (0x1 << ASPCR_SPDIF_UNDERRUN_DATA_OFFS)
+++
+++#define ASPCR_SPDIF_PB_REG_VALIDITY_OFFS 16
+++#define ASPCR_SPDIF_PB_REG_VALIDITY_MASK (0x1 << \
+++ ASPCR_SPDIF_PB_REG_VALIDITY_OFFS)
+++
+++#define ASPCR_SPDIF_PB_NONPCM_OFFS 17
+++#define ASPCR_SPDIF_PB_NONPCM_MASK (0x1 << ASPCR_SPDIF_PB_NONPCM_OFFS)
+++
+++
+++/* MV_AUDIO_I2S_PLAY_CTRL_REG */
+++#define AIPCR_I2S_SEND_LAST_FRM_OFFS 23
+++#define AIPCR_I2S_SEND_LAST_FRM_MASK (1 << AIPCR_I2S_SEND_LAST_FRM_OFFS)
+++
+++#define AIPCR_I2S_PB_JUSTF_OFFS 26
+++#define AIPCR_I2S_PB_JUSTF_MASK (0xf << AIPCR_I2S_PB_JUSTF_OFFS)
+++
+++#define AIPCR_I2S_PB_SAMPLE_SIZE_OFFS 30
+++#define AIPCR_I2S_PB_SAMPLE_SIZE_MASK (0x3 << AIPCR_I2S_PB_SAMPLE_SIZE_OFFS)
+++
+++/*********************/
+++/* Audio Recordnig */
+++/*******************/
+++/* General */
+++#define MV_AUDIO_RECORD_CTRL_REG 0x1000
+++#define MV_AUDIO_RECORD_START_ADDR_REG 0x1004
+++#define MV_AUDIO_RECORD_BUFF_SIZE_REG 0x1008
+++#define MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG 0x100C
+++
+++/* SPDIF */
+++#define MV_AUDIO_SPDIF_REC_GEN_REG 0x2004
+++#define MV_AUDIO_SPDIF_REC_INT_CAUSE_MASK_REG 0x2008
+++#define MV_AUDIO_SPDIF_REC_CH_STATUS_LEFT_REG(ind) \
+++ (0x2180 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_CH_STATUS_RIGHT_REG(ind) \
+++ (0x21a0 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_USR_BITS_LEFT_REG(ind) \
+++ (0x21c0 + ((ind) << 2))
+++#define MV_AUDIO_SPDIF_REC_USR_BITS_RIGHT_REG(ind) \
+++ (0x21e0 + ((ind) << 2))
+++
+++/* I2S */
+++#define MV_AUDIO_I2S_REC_CTRL_REG 0x2408
+++
+++
+++/* MV_AUDIO_RECORD_CTRL_REG*/
+++#define ARCR_RECORD_SAMPLE_SIZE_OFFS 0
+++#define ARCR_RECORD_SAMPLE_SIZE_MASK (0x7 << ARCR_RECORD_SAMPLE_SIZE_OFFS)
+++
+++#define ARCR_RECORDED_MONO_CHNL_OFFS 3
+++#define ARCR_RECORDED_MONO_CHNL_MASK (0x1 << ARCR_RECORDED_MONO_CHNL_OFFS)
+++
+++#define ARCR_RECORD_MONO_OFFS 4
+++#define ARCR_RECORD_MONO_MASK (0x1 << ARCR_RECORD_MONO_OFFS)
+++
+++#define ARCR_RECORD_BURST_SIZE_OFFS 5
+++#define ARCR_RECORD_BURST_SIZE_MASK (0x3 << ARCR_RECORD_BURST_SIZE_OFFS)
+++
+++#define ARCR_RECORD_MUTE_OFFS 8
+++#define ARCR_RECORD_MUTE_MASK (0x1 << ARCR_RECORD_MUTE_OFFS)
+++
+++#define ARCR_RECORD_PAUSE_OFFS 9
+++#define ARCR_RECORD_PAUSE_MASK (0x1 << ARCR_RECORD_PAUSE_OFFS)
+++
+++#define ARCR_RECORD_I2S_EN_OFFS 10
+++#define ARCR_RECORD_I2S_EN_MASK (0x1 << ARCR_RECORD_I2S_EN_OFFS)
+++
+++#define ARCR_RECORD_SPDIF_EN_OFFS 11
+++#define ARCR_RECORD_SPDIF_EN_MASK (0x1 << ARCR_RECORD_SPDIF_EN_OFFS)
+++
+++
+++/* MV_AUDIO_SPDIF_REC_GEN_REG*/
+++#define ASRGR_CORE_CLK_FREQ_OFFS 1
+++#define ASRGR_CORE_CLK_FREQ_MASK (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_133MHZ (0x0 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_150MHZ (0x1 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_166MHZ (0x2 << ASRGR_CORE_CLK_FREQ_OFFS)
+++#define ASRGR_CORE_CLK_FREQ_200MHZ (0x3 << ASRGR_CORE_CLK_FREQ_OFFS)
+++
+++#define ASRGR_VALID_PCM_INFO_OFFS 7
+++#define ASRGR_VALID_PCM_INFO_MASK (0x1 << ASRGR_VALID_PCM_INFO_OFFS)
+++
+++#define ASRGR_SAMPLE_FREQ_OFFS 8
+++#define ASRGR_SAMPLE_FREQ_MASK (0xf << ASRGR_SAMPLE_FREQ_OFFS)
+++
+++#define ASRGR_NON_PCM_OFFS 14
+++#define ASRGR_NON_PCM_MASK (1 << ASRGR_NON_PCM_OFFS)
+++
+++/* MV_AUDIO_I2S_REC_CTRL_REG*/
+++#define AIRCR_I2S_RECORD_JUSTF_OFFS 26
+++#define AIRCR_I2S_RECORD_JUSTF_MASK (0xf << AIRCR_I2S_RECORD_JUSTF_OFFS)
+++
+++#define AIRCR_I2S_SAMPLE_SIZE_OFFS 30
+++#define AIRCR_I2S_SAMPLE_SIZE_MASK (0x3 << AIRCR_I2S_SAMPLE_SIZE_OFFS)
+++
+++#endif /* __KW_AUDIO_REGS_H */
+++
++diff --git a/sound/soc/kirkwood/kirkwood_pcm.c b/sound/soc/kirkwood/kirkwood_pcm.c
++new file mode 100644
++index 0000000..5ed13bf
++--- /dev/null
+++++ b/sound/soc/kirkwood/kirkwood_pcm.c
++@@ -0,0 +1,1495 @@
+++/*
+++ *
+++ * Marvell Orion Alsa Sound driver
+++ *
+++ * Author: Maen Suleiman
+++ * Copyright (C) 2008 Marvell Ltd.
+++ *
+++ *
+++ * This program is free software; you can redistribute it and/or modify
+++ * it under the terms of the GNU General Public License version 2 as
+++ * published by the Free Software Foundation.
+++ *
+++ */
+++
+++#include <linux/interrupt.h>
+++#include <linux/dma-mapping.h>
+++#include <linux/platform_device.h>
+++#include <linux/mv88fx_audio.h>
+++
+++#include <sound/core.h>
+++#include <sound/control.h>
+++#include <sound/pcm.h>
+++#include <sound/asoundef.h>
+++
+++#include "kirkwood_audio_hal.h"
+++
+++struct mv88fx_snd_chip *chip;
+++
+++static int test_memory(struct mbus_dram_target_info *dram_info,
+++ unsigned int base, unsigned int size)
+++{
+++ int i;
+++
+++ for (i = 0; i <= dram_info->num_cs; i++) {
+++
+++ /* check if we get to end */
+++ if ((dram_info->cs[i].base == 0) &&
+++ (dram_info->cs[i].size == 0))
+++ break;
+++
+++ /* check if we fit into one memory window only */
+++ if ((base >= dram_info->cs[i].base) &&
+++ ((base + size) <= dram_info->cs[i].base +
+++ dram_info->cs[i].size))
+++ return 1;
+++ }
+++
+++ return 0;
+++}
+++
+++static void devdma_hw_free(struct snd_pcm_substream *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+++
+++ if (runtime->dma_area == NULL)
+++ return;
+++
+++ if (buf != &substream->dma_buffer)
+++ kfree(runtime->dma_buffer_p);
+++
+++ snd_pcm_set_runtime_buffer(substream, NULL);
+++}
+++
+++static int devdma_hw_alloc(struct device *dev, struct snd_pcm_substream
+++ *substream, size_t size)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ struct snd_dma_buffer *buf = runtime->dma_buffer_p;
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ int ret = 0;
+++
+++ if (buf) {
+++ if (buf->bytes >= size) {
+++ snd_printd("buf->bytes >= size\n");
+++ goto out;
+++ }
+++ devdma_hw_free(substream);
+++ }
+++
+++ if (substream->dma_buffer.area != NULL &&
+++ substream->dma_buffer.bytes >= size) {
+++ buf = &substream->dma_buffer;
+++ } else {
+++ buf = kmalloc(sizeof(struct snd_dma_buffer), GFP_KERNEL);
+++ if (!buf) {
+++ snd_printk("buf == NULL\n");
+++ goto nomem;
+++ }
+++
+++ buf->dev.type = SNDRV_DMA_TYPE_DEV;
+++ buf->dev.dev = dev;
+++ buf->area = audio_stream->area;
+++ buf->addr = audio_stream->addr;
+++ buf->bytes = size;
+++ buf->private_data = NULL;
+++
+++ if (!buf->area) {
+++ snd_printk("buf->area == NULL\n");
+++ goto free;
+++ }
+++ }
+++
+++ snd_pcm_set_runtime_buffer(substream, buf);
+++ ret = 1;
+++out:
+++ runtime->dma_bytes = size;
+++ return ret;
+++
+++free:
+++ kfree(buf);
+++nomem:
+++ return -ENOMEM;
+++}
+++
+++static int devdma_mmap(struct device *dev, struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++ return dma_mmap_coherent(dev, vma, runtime->dma_area,
+++ runtime->dma_addr, runtime->dma_bytes);
+++}
+++
+++/*
+++ * hw preparation for spdif
+++ */
+++
+++static int mv88fx_snd_spdif_mask_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_mask_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ ucontrol->value.iec958.status[0] = 0xff;
+++ ucontrol->value.iec958.status[1] = 0xff;
+++ ucontrol->value.iec958.status[2] = 0xff;
+++ ucontrol->value.iec958.status[3] = 0xff;
+++ return 0;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_spdif_mask = {
+++ .access = SNDRV_CTL_ELEM_ACCESS_READ,
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
+++ .info = mv88fx_snd_spdif_mask_info,
+++ .get = mv88fx_snd_spdif_mask_get,
+++};
+++
+++static int mv88fx_snd_spdif_stream_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_stream_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ chip->stream[PLAYBACK]->spdif_status[word] =
+++ readl(chip->base +
+++ MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ for (i = 0; i < 4; i++)
+++ ucontrol->value.iec958.status[word + i] =
+++ (chip->stream[PLAYBACK]->spdif_status[word] >>
+++ (i * 8)) & 0xff;
+++ }
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_stream_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, change = 0, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ for (i = 0; i < 4; i++) {
+++ chip->stream[PLAYBACK]->spdif_status[word] |=
+++ ucontrol->value.iec958.status[word + i] << (i * 8);
+++ }
+++
+++ writel(chip->stream[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ writel(chip->stream[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(word));
+++ }
+++
+++ if (chip->stream[PLAYBACK]->spdif_status[0] & IEC958_AES0_NONAUDIO)
+++ chip->pcm_mode = NON_PCM;
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return change;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_spdif_stream = {
+++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
+++ SNDRV_CTL_ELEM_ACCESS_INACTIVE,
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
+++ .info = mv88fx_snd_spdif_stream_info,
+++ .get = mv88fx_snd_spdif_stream_get,
+++ .put = mv88fx_snd_spdif_stream_put
+++};
+++
+++
+++static int mv88fx_snd_spdif_default_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+++ uinfo->count = 1;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_default_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[word] =
+++ readl(chip->base +
+++ MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ for (i = 0; i < 4; i++)
+++ ucontrol->value.iec958.status[word + i] =
+++ (chip->stream_defaults[PLAYBACK]->spdif_status[word] >>
+++ (i * 8)) & 0xff;
+++ }
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_spdif_default_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_chip *chip = snd_kcontrol_chip(kcontrol);
+++ int i, change = 0, word;
+++
+++ spin_lock_irq(&chip->reg_lock);
+++
+++ for (word = 0; word < 4; word++) {
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[word] |=
+++ ucontrol->value.iec958.status[word + i] << (i * 8);
+++ }
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(word));
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[word],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(word));
+++ }
+++
+++ if (chip->stream_defaults[PLAYBACK]->spdif_status[0] &
+++ IEC958_AES0_NONAUDIO)
+++ chip->pcm_mode = NON_PCM;
+++
+++ spin_unlock_irq(&chip->reg_lock);
+++
+++ return change;
+++}
+++
+++/* static struct snd_kcontrol_new mv88fx_snd_spdif_default __devinitdata = */
+++static struct snd_kcontrol_new mv88fx_snd_spdif_default = {
+++ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+++ .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
+++ .info = mv88fx_snd_spdif_default_info,
+++ .get = mv88fx_snd_spdif_default_get,
+++ .put = mv88fx_snd_spdif_default_put
+++};
+++
+++static unsigned char mv88fx_snd_vol[2];
+++
+++static int mv88fx_snd_mixer_vol_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+++ uinfo->count = 2;
+++ uinfo->value.integer.min = 0;
+++ uinfo->value.integer.max = 39;
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_vol_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ codec_vol_get(mv88fx_snd_vol);
+++
+++ ucontrol->value.integer.value[0] = (long)mv88fx_snd_vol[0];
+++ ucontrol->value.integer.value[1] = (long)mv88fx_snd_vol[1];
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_vol_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ mv88fx_snd_vol[0] = (unsigned char)ucontrol->value.integer.value[0];
+++ mv88fx_snd_vol[1] = (unsigned char)ucontrol->value.integer.value[1];
+++
+++ codec_vol_set(mv88fx_snd_vol);
+++
+++ return 0;
+++}
+++
+++static struct snd_kcontrol_new mv88fx_snd_dac_vol = {
+++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+++ .name = "Playback DAC Volume",
+++ .info = mv88fx_snd_mixer_vol_info,
+++ .get = mv88fx_snd_mixer_vol_get,
+++ .put = mv88fx_snd_mixer_vol_put
+++};
+++
+++struct mv88fx_snd_mixer_enum {
+++ char **names; /* enum names*/
+++ int *values; /* values to be updated*/
+++ unsigned int count; /* number of elements */
+++ void *rec; /* field to be updated*/
+++};
+++
+++static int mv88fx_snd_mixer_enum_info(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_info *uinfo)
+++{
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++
+++ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+++ uinfo->count = 1;
+++ uinfo->value.enumerated.items = mixer_enum->count;
+++
+++ if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
+++ uinfo->value.enumerated.item--;
+++
+++ strcpy(uinfo->value.enumerated.name,
+++ mixer_enum->names[uinfo->value.enumerated.item]);
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_enum_get(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++ unsigned int val, i;
+++
+++ val = *(unsigned int *)mixer_enum->rec;
+++
+++ for (i = 0; i < mixer_enum->count; i++) {
+++
+++ if (val == (unsigned int)mixer_enum->values[i]) {
+++ ucontrol->value.enumerated.item[0] = i;
+++ break;
+++ }
+++ }
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_mixer_enum_put(struct snd_kcontrol *kcontrol,
+++ struct snd_ctl_elem_value *ucontrol)
+++{
+++ unsigned int val, *rec, i;
+++ struct mv88fx_snd_mixer_enum *mixer_enum =
+++ (struct mv88fx_snd_mixer_enum *)kcontrol->private_value;
+++
+++ rec = (unsigned int *)mixer_enum->rec;
+++ val = ucontrol->value.enumerated.item[0];
+++
+++ if (val > mixer_enum->count)
+++ val = mixer_enum->count;
+++
+++ for (i = 0; i < mixer_enum->count; i++) {
+++
+++ if (val == i) {
+++ *rec = (unsigned int)mixer_enum->values[i];
+++ break;
+++ }
+++ }
+++
+++ return 0;
+++}
+++
+++#define MV88FX_PCM_MIXER_ENUM(xname, xindex, value) \
+++{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
+++ .name = xname, \
+++ .index = xindex, \
+++ .info = mv88fx_snd_mixer_enum_info, \
+++ .get = mv88fx_snd_mixer_enum_get, \
+++ .put = mv88fx_snd_mixer_enum_put, \
+++ .private_value = (unsigned long)value, \
+++}
+++
+++static char *playback_src_mixer_names[] = {"SPDIF", "I2S", "SPDIF And I2S"};
+++static int playback_src_mixer_values[] = { SPDIF, I2S, (SPDIF | I2S)};
+++
+++static struct mv88fx_snd_mixer_enum playback_src_mixer = {
+++ .names = playback_src_mixer_names,
+++ .values = playback_src_mixer_values,
+++ .count = 3,
+++};
+++
+++static char *playback_mono_mixer_names[] = {"Mono Both", "Mono Left",
+++ "Mono Right"};
+++static int playback_mono_mixer_values[] = { MONO_BOTH, MONO_LEFT, MONO_RIGHT};
+++
+++static struct mv88fx_snd_mixer_enum playback_mono_mixer = {
+++ .names = playback_mono_mixer_names,
+++ .values = playback_mono_mixer_values,
+++ .count = 3,
+++};
+++
+++static char *capture_src_mixer_names[] = {"SPDIF", "I2S"};
+++static int capture_src_mixer_values[] = { SPDIF, I2S};
+++
+++static struct mv88fx_snd_mixer_enum capture_src_mixer = {
+++ .names = capture_src_mixer_names,
+++ .values = capture_src_mixer_values,
+++ .count = 2,
+++};
+++
+++static char *capture_mono_mixer_names[] = {"Mono Left", "Mono Right"};
+++static int capture_mono_mixer_values[] = { MONO_LEFT, MONO_RIGHT};
+++
+++static struct mv88fx_snd_mixer_enum capture_mono_mixer = {
+++ .names = capture_mono_mixer_names,
+++ .values = capture_mono_mixer_values,
+++ .count = 2,
+++};
+++
+++static struct snd_kcontrol_new mv88fx_snd_mixers[] = {
+++ MV88FX_PCM_MIXER_ENUM("Playback output type", 0, &playback_src_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Playback mono type", 0, &playback_mono_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Capture input Type", 0, &capture_src_mixer),
+++
+++ MV88FX_PCM_MIXER_ENUM("Capture mono type", 0, &capture_mono_mixer),
+++};
+++
+++#define PLAYBACK_MIX_INDX 0
+++#define PLAYBACK_MONO_MIX_INDX 1
+++#define CAPTURE_MIX_INDX 2
+++#define CAPTURE_MONO_MIX_INDX 3
+++
+++static int mv88fx_snd_ctrl_new(struct snd_card *card)
+++{
+++ struct mv88fx_snd_platform_data *pdata = card->dev->platform_data;
+++ int err = 0;
+++
+++ playback_src_mixer.rec = &chip->stream_defaults[PLAYBACK]->dig_mode;
+++ playback_mono_mixer.rec = &chip->stream_defaults[PLAYBACK]->mono_mode;
+++
+++ capture_src_mixer.rec = &chip->stream_defaults[CAPTURE]->dig_mode;
+++ capture_mono_mixer.rec = &chip->stream_defaults[CAPTURE]->mono_mode;
+++
+++ if ((pdata->i2s_play) && (pdata->spdif_play)) {
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[PLAYBACK_MIX_INDX],
+++ chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[PLAYBACK_MONO_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++
+++ if ((pdata->i2s_rec) && (pdata->spdif_rec)) {
+++ err = snd_ctl_add(card,
+++ snd_ctl_new1(&mv88fx_snd_mixers[CAPTURE_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(
+++ &mv88fx_snd_mixers[CAPTURE_MONO_MIX_INDX], chip));
+++ if (err < 0)
+++ return err;
+++
+++ if (pdata->i2s_play) {
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_dac_vol,
+++ chip));
+++ if (err < 0)
+++ return err;
+++ }
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_mask,
+++ chip));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_default,
+++ chip));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_ctl_add(card, snd_ctl_new1(&mv88fx_snd_spdif_stream,
+++ chip));
+++ return err;
+++}
+++
+++static struct snd_pcm_hardware mv88fx_snd_capture_hw = {
+++ .info = (SNDRV_PCM_INFO_INTERLEAVED |
+++ SNDRV_PCM_INFO_MMAP |
+++ SNDRV_PCM_INFO_MMAP_VALID |
+++ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+++ SNDRV_PCM_INFO_PAUSE),
+++
+++ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+++ SNDRV_PCM_FMTBIT_S24_LE |
+++ SNDRV_PCM_FMTBIT_S32_LE),
+++
+++ .rates = (SNDRV_PCM_RATE_44100 |
+++ SNDRV_PCM_RATE_48000 |
+++ SNDRV_PCM_RATE_96000),
+++
+++ .rate_min = 44100,
+++ .rate_max = 96000,
+++ .channels_min = 1,
+++ .channels_max = 2,
+++ .buffer_bytes_max = (16*1024*1024),
+++ .period_bytes_min = MV88FX_SND_MIN_PERIOD_BYTES,
+++ .period_bytes_max = MV88FX_SND_MAX_PERIOD_BYTES,
+++ .periods_min = MV88FX_SND_MIN_PERIODS,
+++ .periods_max = MV88FX_SND_MAX_PERIODS,
+++ .fifo_size = 0,
+++};
+++
+++static int mv88fx_snd_capture_open(struct snd_pcm_substream *substream)
+++{
+++ int err;
+++
+++ chip->stream_defaults[CAPTURE]->substream = substream;
+++ chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+++ substream->private_data = chip->stream_defaults[CAPTURE];
+++ substream->runtime->hw = mv88fx_snd_capture_hw;
+++
+++ if (chip->stream_defaults[CAPTURE]->dig_mode & SPDIF)
+++ substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+++
+++ /* check if playback is already running with specific rate */
+++ if (chip->stream[PLAYBACK]->rate) {
+++ switch (chip->stream[PLAYBACK]->rate) {
+++ case 44100:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+++ break;
+++ case 48000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+++ break;
+++ case 96000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+++ break;
+++ }
+++ }
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst * 2,
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS,
+++ MV88FX_SND_MIN_PERIODS,
+++ MV88FX_SND_MAX_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_integer(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_close(struct snd_pcm_substream *substream)
+++{
+++ chip->stream_defaults[CAPTURE]->substream = NULL;
+++ memset(chip->stream[CAPTURE], 0, sizeof(struct mv88fx_snd_stream));
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_hw_params(struct snd_pcm_substream *substream,
+++ struct snd_pcm_hw_params *params)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ return devdma_hw_alloc(audio_stream->dev, substream,
+++ params_buffer_bytes(params));
+++}
+++
+++static int mv88fx_snd_capture_hw_free(struct snd_pcm_substream *substream)
+++{
+++ /*
+++ * Clear out the DMA and any allocated buffers.
+++ */
+++ devdma_hw_free(substream);
+++ return 0;
+++}
+++
+++static int mv88fx_snd_capture_prepare(struct snd_pcm_substream *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ audio_stream->rate = runtime->rate;
+++ audio_stream->stereo = (runtime->channels == 1) ? 0 : 1;
+++
+++ if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+++ audio_stream->format = SAMPLE_16IN16;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+++ audio_stream->format = SAMPLE_24IN32;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+++ audio_stream->format = SAMPLE_32IN32;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ audio_stream->dma_addr = runtime->dma_addr;
+++ audio_stream->dma_size = frames_to_bytes(runtime, runtime->buffer_size);
+++ audio_stream->period_size =
+++ frames_to_bytes(runtime, runtime->period_size);
+++
+++ memcpy(chip->stream[CAPTURE], chip->stream_defaults[CAPTURE],
+++ sizeof(struct mv88fx_snd_stream));
+++
+++ return mv88fx_snd_hw_capture_set(chip);
+++}
+++
+++static int mv88fx_snd_capture_trigger(struct snd_pcm_substream *substream,
+++ int cmd)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++ int result = 0;
+++ unsigned int reg_data;
+++
+++ spin_lock(&chip->reg_lock);
+++ switch (cmd) {
+++ case SNDRV_PCM_TRIGGER_START:
+++ /* FIXME: should check if busy before */
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* enable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data |= AICR_RECORD_BYTES_INT;
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* enable dma */
+++ if (audio_stream->dig_mode & I2S)
+++ reg_data |= ARCR_RECORD_I2S_EN_MASK;
+++
+++ if (audio_stream->dig_mode & SPDIF)
+++ reg_data |= ARCR_RECORD_SPDIF_EN_MASK;
+++
+++ /* start dma */
+++ reg_data &= (~ARCR_RECORD_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_STOP:
+++
+++ /* make sure the dma in pause state */
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* disable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data &= (~AICR_RECORD_BYTES_INT);
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* always stop both I2S and SPDIF */
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data &= (~(ARCR_RECORD_I2S_EN_MASK |
+++ ARCR_RECORD_SPDIF_EN_MASK));
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++
+++ /* FIXME: should check if busy after */
+++
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+++ case SNDRV_PCM_TRIGGER_SUSPEND:
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data |= ARCR_RECORD_PAUSE_MASK;
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_RESUME:
+++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+++ reg_data = readl(chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ reg_data &= (~ARCR_RECORD_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_RECORD_CTRL_REG);
+++ break;
+++
+++ default:
+++ result = -EINVAL;
+++ break;
+++ }
+++
+++ spin_unlock(&chip->reg_lock);
+++ return result;
+++}
+++
+++static snd_pcm_uframes_t mv88fx_snd_capture_pointer(struct snd_pcm_substream
+++ *substream)
+++{
+++ return bytes_to_frames(substream->runtime,
+++ (ssize_t)readl(chip->base + MV_AUDIO_RECORD_BUF_BYTE_CNTR_REG));
+++}
+++
+++static int mv88fx_snd_capture_mmap(struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ return devdma_mmap(NULL, substream, vma);
+++}
+++
+++static struct snd_pcm_ops mv88fx_snd_capture_ops = {
+++ .open = mv88fx_snd_capture_open,
+++ .close = mv88fx_snd_capture_close,
+++ .ioctl = snd_pcm_lib_ioctl,
+++ .hw_params = mv88fx_snd_capture_hw_params,
+++ .hw_free = mv88fx_snd_capture_hw_free,
+++ .prepare = mv88fx_snd_capture_prepare,
+++ .trigger = mv88fx_snd_capture_trigger,
+++ .pointer = mv88fx_snd_capture_pointer,
+++ .mmap = mv88fx_snd_capture_mmap,
+++};
+++
+++static struct snd_pcm_hardware mv88fx_snd_playback_hw = {
+++ .info = (SNDRV_PCM_INFO_INTERLEAVED |
+++ SNDRV_PCM_INFO_MMAP |
+++ SNDRV_PCM_INFO_MMAP_VALID |
+++ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+++ SNDRV_PCM_INFO_PAUSE),
+++ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
+++ SNDRV_PCM_FMTBIT_S24_LE |
+++ SNDRV_PCM_FMTBIT_S32_LE),
+++ .rates = (SNDRV_PCM_RATE_44100 |
+++ SNDRV_PCM_RATE_48000 |
+++ SNDRV_PCM_RATE_96000),
+++
+++ .rate_min = 44100,
+++ .rate_max = 96000,
+++ .channels_min = 1,
+++ .channels_max = 2,
+++ .buffer_bytes_max = (16*1024*1024),
+++ .period_bytes_min = MV88FX_SND_MIN_PERIOD_BYTES,
+++ .period_bytes_max = MV88FX_SND_MAX_PERIOD_BYTES,
+++ .periods_min = MV88FX_SND_MIN_PERIODS,
+++ .periods_max = MV88FX_SND_MAX_PERIODS,
+++ .fifo_size = 0,
+++};
+++
+++static int mv88fx_snd_playback_open(struct snd_pcm_substream *substream)
+++{
+++ int err = 0;
+++
+++ chip->stream_defaults[PLAYBACK]->substream = substream;
+++ chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+++ substream->private_data = chip->stream_defaults[PLAYBACK];
+++ substream->runtime->hw = mv88fx_snd_playback_hw;
+++
+++ if (chip->stream_defaults[PLAYBACK]->dig_mode & SPDIF)
+++ substream->runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
+++
+++ /* check if capture is already running with specific rate */
+++ if (chip->stream[CAPTURE]->rate) {
+++ switch (chip->stream[CAPTURE]->rate) {
+++ case 44100:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_44100;
+++ break;
+++ case 48000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_48000;
+++ break;
+++ case 96000:
+++ substream->runtime->hw.rates = SNDRV_PCM_RATE_96000;
+++ break;
+++
+++ }
+++ }
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst * 2,
+++ AUDIO_REG_TO_SIZE(APBBCR_SIZE_MAX));
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_step(substream->runtime, 0,
+++ SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
+++ chip->burst);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_minmax(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS,
+++ MV88FX_SND_MIN_PERIODS,
+++ MV88FX_SND_MAX_PERIODS);
+++ if (err < 0)
+++ return err;
+++
+++ err = snd_pcm_hw_constraint_integer(substream->runtime,
+++ SNDRV_PCM_HW_PARAM_PERIODS);
+++
+++ if (err < 0)
+++ return err;
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_playback_close(struct snd_pcm_substream *substream)
+++{
+++ int i;
+++
+++ chip->stream_defaults[PLAYBACK]->substream = NULL;
+++ chip->pcm_mode = PCM;
+++
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+++ chip->stream[PLAYBACK]->spdif_status[i] = 0;
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(i));
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(i));
+++ }
+++
+++ memset(chip->stream[PLAYBACK], 0, sizeof(struct mv88fx_snd_stream));
+++
+++ return 0;
+++}
+++
+++static int mv88fx_snd_playback_hw_params(struct snd_pcm_substream *substream,
+++ struct snd_pcm_hw_params *params)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ return devdma_hw_alloc(audio_stream->dev, substream,
+++ params_buffer_bytes(params));
+++}
+++
+++static int mv88fx_snd_playback_hw_free(struct snd_pcm_substream *substream)
+++{
+++ /*
+++ * Clear out the DMA and any allocated buffers.
+++ */
+++ devdma_hw_free(substream);
+++ return 0;
+++}
+++
+++static int mv88fx_snd_playback_prepare(struct snd_pcm_substream *substream)
+++{
+++ struct snd_pcm_runtime *runtime = substream->runtime;
+++
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++
+++ if ((audio_stream->dig_mode == I2S) &&
+++ (chip->pcm_mode == NON_PCM))
+++ return -1;
+++
+++ audio_stream->rate = runtime->rate;
+++ audio_stream->stereo = (runtime->channels == 1) ? 0 : 1;
+++
+++ if (runtime->format == SNDRV_PCM_FORMAT_S16_LE) {
+++ audio_stream->format = SAMPLE_16IN16;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S24_LE) {
+++ audio_stream->format = SAMPLE_24IN32;
+++ } else if (runtime->format == SNDRV_PCM_FORMAT_S32_LE) {
+++ audio_stream->format = SAMPLE_32IN32;
+++ } else {
+++ snd_printk("Requested format %d is not supported\n",
+++ runtime->format);
+++ return -1;
+++ }
+++
+++ /* buffer and period sizes in frame */
+++ audio_stream->dma_addr = runtime->dma_addr;
+++ audio_stream->dma_size = frames_to_bytes(runtime, runtime->buffer_size);
+++ audio_stream->period_size =
+++ frames_to_bytes(runtime, runtime->period_size);
+++
+++ memcpy(chip->stream[PLAYBACK], chip->stream_defaults[PLAYBACK],
+++ sizeof(struct mv88fx_snd_stream));
+++
+++ return mv88fx_snd_hw_playback_set(chip);
+++}
+++
+++static int mv88fx_snd_playback_trigger(struct snd_pcm_substream *substream,
+++ int cmd)
+++{
+++ struct mv88fx_snd_stream *audio_stream =
+++ snd_pcm_substream_chip(substream);
+++ int result = 0;
+++ unsigned int reg_data;
+++
+++ spin_lock(&chip->reg_lock);
+++ switch (cmd) {
+++ case SNDRV_PCM_TRIGGER_START:
+++ /* enable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data |= AICR_PLAY_BYTES_INT;
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* enable dma */
+++ if ((audio_stream->dig_mode & I2S) &&
+++ (chip->pcm_mode == PCM))
+++ reg_data |= APCR_PLAY_I2S_ENABLE_MASK;
+++
+++ if (audio_stream->dig_mode & SPDIF)
+++ reg_data |= APCR_PLAY_SPDIF_ENABLE_MASK;
+++
+++ /* start dma */
+++ reg_data &= (~APCR_PLAY_PAUSE_MASK);
+++ writel(reg_data, chip->base + MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_STOP:
+++
+++ /* disable interrupt */
+++ reg_data = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ reg_data &= (~AICR_PLAY_BYTES_INT);
+++ writel(reg_data, chip->base + MV_AUDIO_INT_MASK_REG);
+++
+++ /* make sure the dma in pause state*/
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++
+++ /* always stop both I2S and SPDIF*/
+++ reg_data &= (~(APCR_PLAY_I2S_ENABLE_MASK |
+++ APCR_PLAY_SPDIF_ENABLE_MASK));
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ /* check if busy twice*/
+++ while (readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ APCR_PLAY_BUSY_MASK)
+++ cpu_relax();
+++ while (readl(chip->base + MV_AUDIO_PLAYBACK_CTRL_REG) &
+++ APCR_PLAY_BUSY_MASK)
+++ cpu_relax();
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+++ case SNDRV_PCM_TRIGGER_SUSPEND:
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data |= APCR_PLAY_PAUSE_MASK;
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ break;
+++
+++ case SNDRV_PCM_TRIGGER_RESUME:
+++ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+++ reg_data = readl(chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++ reg_data &= (~APCR_PLAY_PAUSE_MASK);
+++ writel(reg_data, chip->base +
+++ MV_AUDIO_PLAYBACK_CTRL_REG);
+++
+++ break;
+++
+++ default:
+++ result = -EINVAL;
+++ }
+++
+++ spin_unlock(&chip->reg_lock);
+++ return result;
+++}
+++
+++
+++static snd_pcm_uframes_t mv88fx_snd_playback_pointer(struct snd_pcm_substream
+++ *substream)
+++{
+++ return bytes_to_frames(substream->runtime,
+++ (ssize_t)readl(chip->base + MV_AUDIO_PLAYBACK_BUFF_BYTE_CNTR_REG));
+++}
+++
+++static int mv88fx_snd_playback_mmap(struct snd_pcm_substream *substream,
+++ struct vm_area_struct *vma)
+++{
+++ return devdma_mmap(NULL, substream, vma);
+++}
+++
+++
+++static struct snd_pcm_ops mv88fx_snd_playback_ops = {
+++ .open = mv88fx_snd_playback_open,
+++ .close = mv88fx_snd_playback_close,
+++ .ioctl = snd_pcm_lib_ioctl,
+++ .hw_params = mv88fx_snd_playback_hw_params,
+++ .hw_free = mv88fx_snd_playback_hw_free,
+++ .prepare = mv88fx_snd_playback_prepare,
+++ .trigger = mv88fx_snd_playback_trigger,
+++ .pointer = mv88fx_snd_playback_pointer,
+++ .mmap = mv88fx_snd_playback_mmap,
+++};
+++
+++static int __init mv88fx_snd_pcm_new(struct snd_card *card)
+++{
+++ struct snd_pcm *pcm;
+++ struct mv88fx_snd_platform_data *pdata = card->dev->platform_data;
+++ int err, i;
+++
+++ snd_printd("card->dev=0x%x\n", (unsigned int)card->dev);
+++
+++ err = snd_pcm_new(card, "Marvell mv88fx_snd IEC958 and I2S", 0, 1, 1,
+++ &pcm);
+++ if (err < 0)
+++ return err;
+++
+++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
+++ &mv88fx_snd_playback_ops);
+++
+++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
+++ &mv88fx_snd_capture_ops);
+++
+++ if ((pdata->i2s_play) && (pdata->spdif_play))
+++ chip->stream_defaults[PLAYBACK]->dig_mode = (SPDIF | I2S);
+++ else if (pdata->i2s_play)
+++ chip->stream_defaults[PLAYBACK]->dig_mode = I2S;
+++ else if (pdata->spdif_play)
+++ chip->stream_defaults[PLAYBACK]->dig_mode = SPDIF;
+++ else
+++ chip->stream_defaults[PLAYBACK]->dig_mode = 0;
+++
+++ chip->stream_defaults[PLAYBACK]->mono_mode = MONO_BOTH;
+++ chip->pcm_mode = PCM;
+++ chip->stream_defaults[PLAYBACK]->stat_mem = 0;
+++ chip->stream_defaults[PLAYBACK]->clock_src = DCO_CLOCK;
+++
+++ if (pdata->i2s_rec)
+++ chip->stream_defaults[CAPTURE]->dig_mode = I2S;
+++ else if (pdata->spdif_rec)
+++ chip->stream_defaults[CAPTURE]->dig_mode = SPDIF;
+++ else
+++ chip->stream_defaults[CAPTURE]->dig_mode = 0;
+++
+++ chip->stream_defaults[CAPTURE]->mono_mode = MONO_LEFT;
+++ chip->pcm_mode = PCM;
+++ chip->stream_defaults[CAPTURE]->stat_mem = 0;
+++ chip->stream_defaults[CAPTURE]->clock_src = DCO_CLOCK;
+++
+++ for (i = 0; i < 4; i++) {
+++ chip->stream_defaults[PLAYBACK]->spdif_status[i] = 0;
+++ chip->stream[PLAYBACK]->spdif_status[i] = 0;
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_LEFT_REG(i));
+++
+++ writel(chip->stream_defaults[PLAYBACK]->spdif_status[i],
+++ chip->base + MV_AUDIO_SPDIF_PLAY_CH_STATUS_RIGHT_REG(i));
+++
+++ writel(0, chip->base +
+++ MV_AUDIO_SPDIF_PLAY_USR_BITS_LEFT_REG(i));
+++
+++ writel(0, chip->base +
+++ MV_AUDIO_SPDIF_PLAY_USR_BITS_RIGHT_REG(i));
+++ }
+++
+++ pcm->private_data = chip;
+++ pcm->info_flags = 0;
+++ strcpy(pcm->name, "Marvell mv88fx_snd IEC958 and I2S");
+++
+++ return 0;
+++}
+++
+++static irqreturn_t mv88fx_snd_interrupt(int irq, void *dev_id)
+++{
+++ struct mv88fx_snd_chip *chip = dev_id;
+++ struct mv88fx_snd_stream *play_stream = chip->stream_defaults[PLAYBACK];
+++ struct mv88fx_snd_stream *capture_stream =
+++ chip->stream_defaults[CAPTURE];
+++
+++ unsigned int status, mask;
+++
+++ spin_lock(&chip->reg_lock);
+++
+++ /* read the active interrupt */
+++ mask = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ status = readl(chip->base + MV_AUDIO_INT_CAUSE_REG) & mask;
+++
+++ do {
+++ if (status & ~(AICR_RECORD_BYTES_INT|AICR_PLAY_BYTES_INT)) {
+++ spin_unlock(&chip->reg_lock);
+++ snd_BUG(); /* FIXME: should enable error interrupts*/
+++ return IRQ_NONE;
+++ }
+++
+++ /* acknowledge interrupt */
+++ writel(status, chip->base + MV_AUDIO_INT_CAUSE_REG);
+++
+++ /* This is record event */
+++ if (status & AICR_RECORD_BYTES_INT)
+++ snd_pcm_period_elapsed(capture_stream->substream);
+++
+++ /* This is play event */
+++ if (status & AICR_PLAY_BYTES_INT)
+++ snd_pcm_period_elapsed(play_stream->substream);
+++
+++ /* read the active interrupt */
+++ mask = readl(chip->base + MV_AUDIO_INT_MASK_REG);
+++ status = readl(chip->base + MV_AUDIO_INT_CAUSE_REG) & mask;
+++ } while (status);
+++
+++ spin_unlock(&chip->reg_lock);
+++
+++ return IRQ_HANDLED;
+++}
+++
+++static void mv88fx_snd_free(struct snd_card *card)
+++{
+++ struct mv88fx_snd_chip *chip = card->private_data;
+++
+++ /* free irq */
+++ free_irq(chip->irq, (void *)chip);
+++
+++ snd_printd("chip->res =0x%x\n", (unsigned int)chip->res);
+++
+++ if (chip->base)
+++ iounmap(chip->base);
+++
+++ if (chip->res)
+++ release_resource(chip->res);
+++
+++ chip->res = NULL;
+++
+++ /* Free memory allocated for streems */
+++ if (chip->stream_defaults[PLAYBACK]->area)
+++ dma_free_coherent(card->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ chip->stream_defaults[PLAYBACK]->area,
+++ chip->stream_defaults[PLAYBACK]->addr);
+++
+++ if (chip->stream_defaults[CAPTURE]->area)
+++ dma_free_coherent(card->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ chip->stream_defaults[CAPTURE]->area,
+++ chip->stream_defaults[CAPTURE]->addr);
+++
+++ kfree(chip->stream_defaults[PLAYBACK]);
+++ chip->stream_defaults[PLAYBACK] = NULL;
+++
+++ kfree(chip->stream[PLAYBACK]);
+++ chip->stream[PLAYBACK] = NULL;
+++
+++ kfree(chip->stream_defaults[CAPTURE]);
+++ chip->stream_defaults[CAPTURE] = NULL;
+++
+++ kfree(chip->stream[CAPTURE]);
+++ chip->stream[CAPTURE] = NULL;
+++
+++ chip = NULL;
+++}
+++
+++static int mv88fx_snd_probe(struct platform_device *dev)
+++{
+++ int err = 0, irq = NO_IRQ;
+++ struct snd_card *card = NULL;
+++ struct resource *r = NULL;
+++ static struct snd_device_ops ops = {
+++ .dev_free = NULL,
+++ };
+++ struct mv88fx_snd_platform_data *pdata = NULL;
+++
+++ err = snd_card_create(-1, "mv88fx_snd", THIS_MODULE,
+++ sizeof(struct mv88fx_snd_chip), &card);
+++
+++ if (err) {
+++ snd_printk("snd_card_create failed\n");
+++ return err;
+++ }
+++
+++ card->dev = &dev->dev;
+++ chip = card->private_data;
+++ card->private_free = mv88fx_snd_free;
+++
+++ pdata = (struct mv88fx_snd_platform_data *)dev->dev.platform_data;
+++
+++ if (pdata->i2s_rec == 2 || pdata->spdif_rec == 2)
+++ chip->stereo = 1;
+++ else
+++ chip->stereo = 0;
+++
+++ chip->audio_offset = pdata->base_offset;
+++
+++ r = platform_get_resource(dev, IORESOURCE_MEM, 0);
+++ if (!r) {
+++ snd_printk("platform_get_resource failed\n");
+++ err = -ENXIO;
+++ goto error;
+++ }
+++
+++ snd_printd("chip->res =0x%x\n", (unsigned int)chip->res);
+++
+++ r = request_mem_region(r->start, SZ_16K, MV88FX_AUDIO_NAME);
+++ if (!r) {
+++ snd_printk("request_mem_region failed\n");
+++ err = -EBUSY;
+++ goto error;
+++ }
+++ chip->res = r;
+++
+++ chip->base = ioremap(r->start, SZ_16K);
+++
+++ if (!chip->base) {
+++ snd_printk("ioremap failed\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ snd_printd("chip->base=0x%x r->start0x%x\n",
+++ (unsigned int)chip->base, r->start);
+++
+++ irq = platform_get_irq(dev, 0);
+++ if (irq == NO_IRQ) {
+++ snd_printk("platform_get_irq failed\n");
+++ err = -ENXIO;
+++ goto error;
+++ }
+++
+++ snd_printd("card = 0x%x dev 0x%x\n",
+++ (unsigned int)card, (unsigned int)dev);
+++ strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
+++
+++ /* Allocate memory for our device */
+++ chip->stream_defaults[PLAYBACK] =
+++ kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+++
+++ if (chip->stream_defaults[PLAYBACK] == NULL) {
+++ snd_printk("kzalloc failed for default playback\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[PLAYBACK]->direction = PLAYBACK;
+++ chip->stream_defaults[PLAYBACK]->dev = card->dev;
+++
+++ chip->stream[PLAYBACK] = kzalloc(sizeof(struct mv88fx_snd_stream),
+++ GFP_KERNEL);
+++
+++ if (chip->stream[PLAYBACK] == NULL) {
+++ snd_printk("kzalloc failed for runtime playback\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE] =
+++ kzalloc(sizeof(struct mv88fx_snd_stream), GFP_KERNEL);
+++
+++ if (chip->stream_defaults[CAPTURE] == NULL) {
+++ snd_printk("kzalloc failed for capture\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE]->direction = CAPTURE;
+++ chip->stream_defaults[CAPTURE]->dev = card->dev;
+++
+++ chip->stream[CAPTURE] = kzalloc(sizeof(struct mv88fx_snd_stream),
+++ GFP_KERNEL);
+++
+++ if (chip->stream[CAPTURE] == NULL) {
+++ snd_printk("kzalloc failed for runtime capture\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->irq = irq;
+++ chip->stream_defaults[PLAYBACK]->area =
+++ dma_alloc_coherent(&dev->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ &chip->stream_defaults[PLAYBACK]->addr,
+++ GFP_KERNEL);
+++
+++ if (!chip->stream_defaults[PLAYBACK]->area) {
+++ snd_printk("dma_alloc_coherent failed for playback buffer\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (0 == test_memory(pdata->dram,
+++ (unsigned int)chip->stream_defaults[PLAYBACK]->addr,
+++ (unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+++
+++ snd_printk("error: playback buffer not in one memory window\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->stream_defaults[CAPTURE]->area =
+++ dma_alloc_coherent(&dev->dev,
+++ MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES,
+++ &chip->stream_defaults[CAPTURE]->addr,
+++ GFP_KERNEL);
+++
+++ if (!chip->stream_defaults[CAPTURE]->area) {
+++ snd_printk("dma_alloc_coherent failed for capture buffer\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (0 == test_memory(pdata->dram,
+++ (unsigned int)chip->stream_defaults[CAPTURE]->addr,
+++ (unsigned int)MV88FX_SND_MAX_PERIODS * MV88FX_SND_MAX_PERIOD_BYTES)) {
+++
+++ snd_printk("error: playback buffer not in one memory window\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ if (request_irq(chip->irq, mv88fx_snd_interrupt, 0, MV88FX_AUDIO_NAME,
+++ (void *)chip)) {
+++
+++ snd_printk("Unable to grab IRQ %d\n", chip->irq);
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ chip->ch_stat_valid = 1;
+++ chip->burst = 128;
+++ chip->loopback = 0;
+++ chip->dco_ctrl_offst = 0x800;
+++
+++ err = mv88fx_snd_hw_init(card);
+++ if (err) {
+++ snd_printk("mv88fx_snd_hw_init failed\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* Set default values */
+++ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
+++ if (err < 0) {
+++ snd_printk("Creating chip device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* create pcm devices */
+++ err = mv88fx_snd_pcm_new(card);
+++ if (err < 0) {
+++ snd_printk("Creating PCM device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++ /* create controll interfaces & switches */
+++ err = mv88fx_snd_ctrl_new(card);
+++ if (err < 0) {
+++ snd_printk("Creating non-PCM device failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ strcpy(card->driver, "mv88fx_snd");
+++ strcpy(card->shortname, "Marvell mv88fx_snd");
+++ sprintf(card->longname, "Marvell mv88fx_snd ALSA driver");
+++
+++ err = snd_card_register(card);
+++ if (err < 0) {
+++ snd_printk("Card registeration failed.\n");
+++ err = -ENOMEM;
+++ goto error;
+++ }
+++
+++ /* if (dma_set_mask(&dev->dev, 0xFFFFFFUL) < 0) { */
+++ if (dma_set_mask(&dev->dev, 0xFFFFFFFFUL) < 0) {
+++ snd_printk("Could not set DMA mask\n");
+++ goto error;
+++ }
+++
+++ platform_set_drvdata(dev, card);
+++ return 0;
+++error:
+++ if (card)
+++ snd_card_free(card);
+++ platform_set_drvdata(dev, NULL);
+++ return err;
+++}
+++
+++static int mv88fx_snd_remove(struct platform_device *dev)
+++{
+++ struct snd_card *card = platform_get_drvdata(dev);
+++
+++ if (card)
+++ snd_card_free(card);
+++
+++ /* FIXME: Once "../codecs/cs42l51.c" is fixed to behave as a module
+++ * this should be removed */
+++ codec_del_i2c_device();
+++
+++ platform_set_drvdata(dev, NULL);
+++ return 0;
+++}
+++
+++#define mv88fx_snd_resume NULL
+++#define mv88fx_snd_suspend NULL
+++
+++static struct platform_driver mv88fx_snd_driver = {
+++ .probe = mv88fx_snd_probe,
+++ .remove = mv88fx_snd_remove,
+++ .suspend = mv88fx_snd_suspend,
+++ .resume = mv88fx_snd_resume,
+++ .driver = { .name = MV88FX_AUDIO_NAME,},
+++};
+++
+++static int __init mv88fx_snd_init(void)
+++{
+++ return platform_driver_register(&mv88fx_snd_driver);
+++}
+++
+++static void __exit mv88fx_snd_exit(void)
+++{
+++ platform_driver_unregister(&mv88fx_snd_driver);
+++}
+++
+++MODULE_AUTHOR("Maen Suleiman <maen@...>");
+++MODULE_DESCRIPTION("Marvell MV88Fx Alsa Sound driver");
+++MODULE_LICENSE("GPL");
+++
+++module_init(mv88fx_snd_init);
+++module_exit(mv88fx_snd_exit);
+++
++--
++1.6.5.2
++
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch
+new file mode 100644
+index 0000000..1cb9304
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-SD-UART1-selection.patch
+@@ -0,0 +1,207 @@
++From 3423306f9b0aa3f9f4b41338565e18d9c3bf0bb2 Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Fri, 25 Dec 2009 15:02:12 +0530
++Subject: [PATCH] ARM: Kirkwood: OpenRD: SD/UART1 selection
++
++To select UART1, pass "uart=232" (for RS232) OR "uart=485" (for RS485) in the
++boot argument. To select SDIO lines pass "uart=no". SDIO lines will be selected
++by default in absence of this parameter.
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ arch/arm/mach-kirkwood/openrd_base-setup.c | 61 +++++++++++++++++++++++++-
++ arch/arm/mach-kirkwood/openrd_client-setup.c | 59 ++++++++++++++++++++++++-
++ 2 files changed, 117 insertions(+), 3 deletions(-)
++
++Index: git/arch/arm/mach-kirkwood/openrd_base-setup.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/openrd_base-setup.c
+++++ git/arch/arm/mach-kirkwood/openrd_base-setup.c
++@@ -15,6 +15,7 @@
++ #include <linux/ata_platform.h>
++ #include <linux/mv643xx_eth.h>
++ #include <linux/gpio.h>
+++#include <linux/io.h>
++ #include <asm/mach-types.h>
++ #include <asm/mach/arch.h>
++ #include <mach/kirkwood.h>
++@@ -51,16 +52,53 @@ static struct mvsdio_platform_data openr
++ };
++
++ static unsigned int openrd_base_mpp_config[] __initdata = {
++- MPP29_GPIO,
+++ MPP12_SD_CLK,
+++ MPP13_SD_CMD,
+++ MPP14_SD_D0,
+++ MPP15_SD_D1,
+++ MPP16_SD_D2,
+++ MPP17_SD_D3,
+++ MPP29_GPIO,
++ 0
++ };
++
+++static int uart1;
+++
+++static void sd_uart_selection(void)
+++{
+++ char *ptr = NULL;
+++
+++ /* Parse boot_command_line string uart=no/232/485 */
+++ ptr = strstr(boot_command_line, "uart=");
+++
+++ /* Default is SD. Change if required, for UART */
+++ if (ptr != NULL) {
+++ if (!strncmp(ptr + 5, "232", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_base_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_base_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 232;
+++ } else if (!strncmp(ptr + 5, "485", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_base_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_base_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 485;
+++ }
+++ }
+++}
+++
++ static void __init openrd_base_init(void)
++ {
++ /*
++ * Basic setup. Needs to be called early.
++ */
++ kirkwood_init();
+++
+++ /* This function modifies MPP config according to boot argument */
+++ sd_uart_selection();
+++
++ kirkwood_mpp_conf(openrd_base_mpp_config);
++
++ kirkwood_uart0_init();
++@@ -70,7 +108,26 @@ static void __init openrd_base_init(void
++
++ kirkwood_ge00_init(&openrd_base_ge00_data);
++ kirkwood_sata_init(&openrd_base_sata_data);
++- kirkwood_sdio_init(&openrd_base_mvsdio_data);
+++
+++ if (!uart1) {
+++ /* Select SD
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) | 4, GPIO_OUT(34));
+++
+++ kirkwood_sdio_init(&openrd_base_mvsdio_data);
+++ } else {
+++ /* Select UART1
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) & ~(4), GPIO_OUT(34));
+++
+++ /* Select RS232 OR RS485
+++ * Pin # 28: 0 => RS232, 1 => RS485 */
+++ if (uart1 == 232)
+++ writel(readl(GPIO_OUT(28)) & ~(0x10000000),
+++ GPIO_OUT(28));
+++ else
+++ writel(readl(GPIO_OUT(28)) | 0x10000000, GPIO_OUT(28));
+++ }
++
++ kirkwood_i2c_init();
++ }
++Index: git/arch/arm/mach-kirkwood/openrd_client-setup.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/openrd_client-setup.c
+++++ git/arch/arm/mach-kirkwood/openrd_client-setup.c
++@@ -16,6 +16,7 @@
++ #include <linux/mv643xx_eth.h>
++ #include <linux/mv88fx_audio.h>
++ #include <linux/gpio.h>
+++#include <linux/io.h>
++ #include <asm/mach-types.h>
++ #include <asm/mach/arch.h>
++ #include <mach/kirkwood.h>
++@@ -56,6 +57,12 @@ static struct mvsdio_platform_data openr
++ };
++
++ static unsigned int openrd_client_mpp_config[] __initdata = {
+++ MPP12_SD_CLK,
+++ MPP13_SD_CMD,
+++ MPP14_SD_D0,
+++ MPP15_SD_D1,
+++ MPP16_SD_D2,
+++ MPP17_SD_D3,
++ MPP29_GPIO,
++ 0
++ };
++@@ -77,12 +84,43 @@ static struct mv88fx_snd_platform_data o
++ };
++ #endif
++
+++static int uart1;
+++
+++static void sd_uart_selection(void)
+++{
+++ char *ptr = NULL;
+++
+++ /* Parse boot_command_line string uart=no/232/485 */
+++ ptr = strstr(boot_command_line, "uart=");
+++
+++ /* Default is SD. Change if required, for UART */
+++ if (ptr != NULL) {
+++ if (!strncmp(ptr + 5, "232", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_client_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_client_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 232;
+++ } else if (!strncmp(ptr + 5, "485", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_client_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_client_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 485;
+++ }
+++ }
+++}
+++
++ static void __init openrd_client_init(void)
++ {
++ /*
++ * Basic setup. Needs to be called early.
++ */
++ kirkwood_init();
+++
+++ /* This function modifies MPP config according to boot argument */
+++ sd_uart_selection();
+++
++ kirkwood_mpp_conf(openrd_client_mpp_config);
++
++ kirkwood_uart0_init();
++@@ -95,7 +133,26 @@ static void __init openrd_client_init(vo
++ kirkwood_ge01_init(&openrd_client_ge01_data);
++
++ kirkwood_sata_init(&openrd_client_sata_data);
++- kirkwood_sdio_init(&openrd_client_mvsdio_data);
+++
+++ if (!uart1) {
+++ /* Select SD
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) | 4, GPIO_OUT(34));
+++
+++ kirkwood_sdio_init(&openrd_client_mvsdio_data);
+++ } else {
+++ /* Select UART1
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) & ~(4), GPIO_OUT(34));
+++
+++ /* Select RS232 OR RS485
+++ * Pin # 28: 0 => RS232, 1 => RS485 */
+++ if (uart1 == 232)
+++ writel(readl(GPIO_OUT(28)) & ~(0x10000000),
+++ GPIO_OUT(28));
+++ else
+++ writel(readl(GPIO_OUT(28)) | 0x10000000, GPIO_OUT(28));
+++ }
++
++ kirkwood_i2c_init();
++ #if defined(CONFIG_SND_MV88FX_SOC) || defined(CONFIG_SND_MV88FX_SOC_MODULE)
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-base-SD-UART1-selection.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-base-SD-UART1-selection.patch
+new file mode 100644
+index 0000000..b846da9
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/0004-ARM-Kirkwood-OpenRD-base-SD-UART1-selection.patch
+@@ -0,0 +1,110 @@
++From 3423306f9b0aa3f9f4b41338565e18d9c3bf0bb2 Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Fri, 25 Dec 2009 15:02:12 +0530
++Subject: [PATCH] ARM: Kirkwood: OpenRD: SD/UART1 selection
++
++To select UART1, pass "uart=232" (for RS232) OR "uart=485" (for RS485) in the
++boot argument. To select SDIO lines pass "uart=no". SDIO lines will be selected
++by default in absence of this parameter.
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ arch/arm/mach-kirkwood/openrd_base-setup.c | 61 +++++++++++++++++++++++++-
++ arch/arm/mach-kirkwood/openrd_client-setup.c | 59 ++++++++++++++++++++++++-
++ 2 files changed, 117 insertions(+), 3 deletions(-)
++
++Index: git/arch/arm/mach-kirkwood/openrd_base-setup.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/openrd_base-setup.c
+++++ git/arch/arm/mach-kirkwood/openrd_base-setup.c
++@@ -15,6 +15,7 @@
++ #include <linux/ata_platform.h>
++ #include <linux/mv643xx_eth.h>
++ #include <linux/gpio.h>
+++#include <linux/io.h>
++ #include <asm/mach-types.h>
++ #include <asm/mach/arch.h>
++ #include <mach/kirkwood.h>
++@@ -51,16 +52,53 @@ static struct mvsdio_platform_data openr
++ };
++
++ static unsigned int openrd_base_mpp_config[] __initdata = {
++- MPP29_GPIO,
+++ MPP12_SD_CLK,
+++ MPP13_SD_CMD,
+++ MPP14_SD_D0,
+++ MPP15_SD_D1,
+++ MPP16_SD_D2,
+++ MPP17_SD_D3,
+++ MPP29_GPIO,
++ 0
++ };
++
+++static int uart1;
+++
+++static void sd_uart_selection(void)
+++{
+++ char *ptr = NULL;
+++
+++ /* Parse boot_command_line string uart=no/232/485 */
+++ ptr = strstr(boot_command_line, "uart=");
+++
+++ /* Default is SD. Change if required, for UART */
+++ if (ptr != NULL) {
+++ if (!strncmp(ptr + 5, "232", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_base_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_base_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 232;
+++ } else if (!strncmp(ptr + 5, "485", 3)) {
+++ /* Configure MPP for UART */
+++ openrd_base_mpp_config[1] = MPP13_UART1_TXD;
+++ openrd_base_mpp_config[2] = MPP14_UART1_RXD;
+++
+++ uart1 = 485;
+++ }
+++ }
+++}
+++
++ static void __init openrd_base_init(void)
++ {
++ /*
++ * Basic setup. Needs to be called early.
++ */
++ kirkwood_init();
+++
+++ /* This function modifies MPP config according to boot argument */
+++ sd_uart_selection();
+++
++ kirkwood_mpp_conf(openrd_base_mpp_config);
++
++ kirkwood_uart0_init();
++@@ -70,7 +108,26 @@ static void __init openrd_base_init(void
++
++ kirkwood_ge00_init(&openrd_base_ge00_data);
++ kirkwood_sata_init(&openrd_base_sata_data);
++- kirkwood_sdio_init(&openrd_base_mvsdio_data);
+++
+++ if (!uart1) {
+++ /* Select SD
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) | 4, GPIO_OUT(34));
+++
+++ kirkwood_sdio_init(&openrd_base_mvsdio_data);
+++ } else {
+++ /* Select UART1
+++ * Pin # 34: 0 => UART1, 1 => SD */
+++ writel(readl(GPIO_OUT(34)) & ~(4), GPIO_OUT(34));
+++
+++ /* Select RS232 OR RS485
+++ * Pin # 28: 0 => RS232, 1 => RS485 */
+++ if (uart1 == 232)
+++ writel(readl(GPIO_OUT(28)) & ~(0x10000000),
+++ GPIO_OUT(28));
+++ else
+++ writel(readl(GPIO_OUT(28)) | 0x10000000, GPIO_OUT(28));
+++ }
++
++ kirkwood_i2c_init();
++ }
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch
+new file mode 100644
+index 0000000..0f472d9
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/cpuidle-reenable-interrupts.patch
+@@ -0,0 +1,19 @@
++diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
++index ad41f19..12fdd39 100644
++--- a/drivers/cpuidle/cpuidle.c
+++++ b/drivers/cpuidle/cpuidle.c
++@@ -76,8 +76,11 @@ static void cpuidle_idle_call(void)
++ #endif
++ /* ask the governor for the next state */
++ next_state = cpuidle_curr_governor->select(dev);
++- if (need_resched())
+++ if (need_resched()) {
+++ local_irq_enable();
++ return;
+++ }
+++
++ target_state = &dev->states[next_state];
++
++ /* enter the state and update stats */
++
++
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/defconfig b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/defconfig
+new file mode 100644
+index 0000000..cddefb1
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/defconfig
+@@ -0,0 +1,2439 @@
++#
++# Automatically generated make config: don't edit
++# Linux kernel version: 2.6.29.5
++# Sun Jun 21 17:09:24 2009
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_MMU=y
++# CONFIG_NO_IOPORT is not set
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++# CONFIG_ARCH_HAS_ILOG2_U32 is not set
++# CONFIG_ARCH_HAS_ILOG2_U64 is not set
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_CLASSIC_RCU=y
++# CONFIG_TREE_RCU is not set
++# CONFIG_PREEMPT_RCU is not set
++# CONFIG_TREE_RCU_TRACE is not set
++# CONFIG_PREEMPT_RCU_TRACE is not set
++CONFIG_IKCONFIG=y
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=19
++# CONFIG_GROUP_SCHED is not set
++# CONFIG_CGROUPS is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++CONFIG_RELAY=y
++CONFIG_NAMESPACES=y
++# CONFIG_UTS_NS is not set
++# CONFIG_IPC_NS is not set
++# CONFIG_USER_NS is not set
++# CONFIG_PID_NS is not set
++# CONFIG_NET_NS is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++# CONFIG_EMBEDDED is not set
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_ALL is not set
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_PCI_QUIRKS=y
++CONFIG_SLUB_DEBUG=y
++CONFIG_COMPAT_BRK=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++CONFIG_PROFILING=y
++CONFIG_TRACEPOINTS=y
++# CONFIG_MARKERS is not set
++CONFIG_OPROFILE=y
++CONFIG_HAVE_OPROFILE=y
++CONFIG_KPROBES=y
++CONFIG_KRETPROBES=y
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_SLABINFO=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++CONFIG_MODULE_FORCE_LOAD=y
++CONFIG_MODULE_UNLOAD=y
++CONFIG_MODULE_FORCE_UNLOAD=y
++CONFIG_MODVERSIONS=y
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_BLOCK=y
++CONFIG_LBD=y
++CONFIG_BLK_DEV_IO_TRACE=y
++# CONFIG_BLK_DEV_BSG is not set
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++# CONFIG_FREEZER is not set
++
++#
++# System Type
++#
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_IMX is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++CONFIG_ARCH_KIRKWOOD=y
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_W90X900 is not set
++
++#
++# Marvell Kirkwood Implementations
++#
++CONFIG_MACH_DB88F6281_BP=y
++CONFIG_MACH_RD88F6192_NAS=y
++CONFIG_MACH_RD88F6281=y
++# CONFIG_MACH_MV88F6281GTW_GE is not set
++CONFIG_MACH_SHEEVAPLUG=y
++# CONFIG_MACH_TS219 is not set
++CONFIG_PLAT_ORION=y
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_FEROCEON=y
++# CONFIG_CPU_FEROCEON_OLD_ID is not set
++CONFIG_CPU_32v5=y
++CONFIG_CPU_ABRT_EV5T=y
++CONFIG_CPU_PABRT_NOIFAR=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_FEROCEON=y
++CONFIG_CPU_TLB_FEROCEON=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++CONFIG_OUTER_CACHE=y
++CONFIG_CACHE_FEROCEON_L2=y
++# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
++
++#
++# Bus support
++#
++CONFIG_PCI=y
++CONFIG_PCI_SYSCALL=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++# CONFIG_PCI_DEBUG is not set
++# CONFIG_PCI_STUB is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++CONFIG_PREEMPT=y
++CONFIG_HZ=100
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++CONFIG_ARCH_FLATMEM_HAS_HOLES=y
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_UNEVICTABLE_LRU=y
++CONFIG_ALIGNMENT_TRAP=y
++CONFIG_UACCESS_WITH_MEMCPY=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE=" debug "
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# CPU Power Management
++#
++CONFIG_CPU_IDLE=y
++CONFIG_CPU_IDLE_GOV_LADDER=y
++CONFIG_CPU_IDLE_GOV_MENU=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++# CONFIG_VFP is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++CONFIG_BINFMT_AOUT=m
++CONFIG_BINFMT_MISC=m
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_COMPAT_NET_DEV_OPS=y
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++# CONFIG_IP_ADVANCED_ROUTER is not set
++CONFIG_IP_FIB_HASH=y
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++# CONFIG_IP_PNP_RARP is not set
++# CONFIG_NET_IPIP is not set
++# CONFIG_NET_IPGRE is not set
++# CONFIG_IP_MROUTE is not set
++# CONFIG_ARPD is not set
++# CONFIG_SYN_COOKIES is not set
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++# CONFIG_INET_TUNNEL is not set
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++# CONFIG_INET_LRO is not set
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++# CONFIG_TCP_CONG_ADVANCED is not set
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++# CONFIG_NETFILTER is not set
++# CONFIG_IP_DCCP is not set
++# CONFIG_IP_SCTP is not set
++# CONFIG_TIPC is not set
++# CONFIG_ATM is not set
++# CONFIG_BRIDGE is not set
++CONFIG_NET_DSA=y
++# CONFIG_NET_DSA_TAG_DSA is not set
++CONFIG_NET_DSA_TAG_EDSA=y
++# CONFIG_NET_DSA_TAG_TRAILER is not set
++CONFIG_NET_DSA_MV88E6XXX=y
++# CONFIG_NET_DSA_MV88E6060 is not set
++# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
++# CONFIG_NET_DSA_MV88E6131 is not set
++CONFIG_NET_DSA_MV88E6123_61_65=y
++# CONFIG_VLAN_8021Q is not set
++# CONFIG_DECNET is not set
++# CONFIG_LLC2 is not set
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_NET_SCHED is not set
++# CONFIG_DCB is not set
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++# CONFIG_NET_TCPPROBE is not set
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++CONFIG_IRDA=m
++
++#
++# IrDA protocols
++#
++CONFIG_IRLAN=m
++# CONFIG_IRNET is not set
++CONFIG_IRCOMM=m
++CONFIG_IRDA_ULTRA=y
++
++#
++# IrDA options
++#
++# CONFIG_IRDA_CACHE_LAST_LSAP is not set
++# CONFIG_IRDA_FAST_RR is not set
++# CONFIG_IRDA_DEBUG is not set
++
++#
++# Infrared-port device drivers
++#
++
++#
++# SIR device drivers
++#
++CONFIG_IRTTY_SIR=m
++
++#
++# Dongle support
++#
++CONFIG_DONGLE=y
++CONFIG_ESI_DONGLE=m
++CONFIG_ACTISYS_DONGLE=m
++CONFIG_TEKRAM_DONGLE=m
++CONFIG_TOIM3232_DONGLE=m
++CONFIG_LITELINK_DONGLE=m
++CONFIG_MA600_DONGLE=m
++CONFIG_GIRBIL_DONGLE=m
++CONFIG_MCP2120_DONGLE=m
++CONFIG_OLD_BELKIN_DONGLE=m
++CONFIG_ACT200L_DONGLE=m
++CONFIG_KINGSUN_DONGLE=m
++CONFIG_KSDAZZLE_DONGLE=m
++CONFIG_KS959_DONGLE=m
++
++#
++# FIR device drivers
++#
++CONFIG_USB_IRDA=m
++# CONFIG_SIGMATEL_FIR is not set
++# CONFIG_TOSHIBA_FIR is not set
++# CONFIG_VLSI_FIR is not set
++CONFIG_MCS_FIR=m
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++CONFIG_BT_HCIBTUSB=m
++# CONFIG_BT_HCIBTSDIO is not set
++# CONFIG_BT_HCIUART is not set
++CONFIG_BT_HCIBCM203X=m
++CONFIG_BT_HCIBPA10X=m
++CONFIG_BT_HCIBFUSB=m
++CONFIG_BT_HCIVHCI=m
++# CONFIG_AF_RXRPC is not set
++# CONFIG_PHONET is not set
++CONFIG_WIRELESS=y
++CONFIG_CFG80211=y
++# CONFIG_CFG80211_REG_DEBUG is not set
++# CONFIG_NL80211 is not set
++CONFIG_WIRELESS_OLD_REGULATORY=y
++CONFIG_WIRELESS_EXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++CONFIG_LIB80211=y
++# CONFIG_LIB80211_DEBUG is not set
++CONFIG_MAC80211=y
++
++#
++# Rate control algorithm selection
++#
++CONFIG_MAC80211_RC_MINSTREL=y
++# CONFIG_MAC80211_RC_DEFAULT_PID is not set
++CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
++CONFIG_MAC80211_RC_DEFAULT="minstrel"
++# CONFIG_MAC80211_MESH is not set
++CONFIG_MAC80211_LEDS=y
++# CONFIG_MAC80211_DEBUGFS is not set
++# CONFIG_MAC80211_DEBUG_MENU is not set
++# CONFIG_WIMAX is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=y
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_DEBUG_DRIVER is not set
++# CONFIG_DEBUG_DEVRES is not set
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++# CONFIG_NFTL is not set
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++CONFIG_MTD_JEDECPROBE=y
++CONFIG_MTD_GEN_PROBE=y
++CONFIG_MTD_CFI_ADV_OPTIONS=y
++CONFIG_MTD_CFI_NOSWAP=y
++# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
++# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
++CONFIG_MTD_CFI_GEOMETRY=y
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_OTP is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++CONFIG_MTD_CFI_STAA=y
++CONFIG_MTD_CFI_UTIL=y
++# CONFIG_MTD_RAM is not set
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++# CONFIG_MTD_PHYSMAP_COMPAT is not set
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_IMPA7 is not set
++# CONFIG_MTD_INTEL_VR_NOR is not set
++# CONFIG_MTD_PLATRAM is not set
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_PMC551 is not set
++# CONFIG_MTD_DATAFLASH is not set
++CONFIG_MTD_M25P80=y
++CONFIG_M25PXX_USE_FAST_READ=y
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++# CONFIG_MTD_MTDRAM is not set
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_CAFE is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++CONFIG_MTD_NAND_ORION=y
++# CONFIG_MTD_ONENAND is not set
++
++#
++# LPDDR flash memory drivers
++#
++# CONFIG_MTD_LPDDR is not set
++
++#
++# UBI - Unsorted block images
++#
++CONFIG_MTD_UBI=y
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++
++#
++# UBI debugging options
++#
++# CONFIG_MTD_UBI_DEBUG is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++CONFIG_BLK_DEV_CRYPTOLOOP=y
++# CONFIG_BLK_DEV_NBD is not set
++# CONFIG_BLK_DEV_SX8 is not set
++# CONFIG_BLK_DEV_UB is not set
++# CONFIG_BLK_DEV_RAM is not set
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_CDROM_PKTCDVD_BUFFERS=8
++CONFIG_CDROM_PKTCDVD_WCACHE=y
++CONFIG_ATA_OVER_ETH=m
++# CONFIG_MISC_DEVICES is not set
++CONFIG_EEPROM_93CX6=m
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++CONFIG_RAID_ATTRS=m
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++# CONFIG_SCSI_PROC_FS is not set
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++# CONFIG_CHR_DEV_ST is not set
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=m
++# CONFIG_CHR_DEV_SCH is not set
++
++#
++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
++#
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++# CONFIG_SCSI_ISCSI_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++# CONFIG_ISCSI_TCP is not set
++# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
++# CONFIG_SCSI_3W_9XXX is not set
++# CONFIG_SCSI_ACARD is not set
++# CONFIG_SCSI_AACRAID is not set
++# CONFIG_SCSI_AIC7XXX is not set
++# CONFIG_SCSI_AIC7XXX_OLD is not set
++# CONFIG_SCSI_AIC79XX is not set
++# CONFIG_SCSI_AIC94XX is not set
++# CONFIG_SCSI_DPT_I2O is not set
++# CONFIG_SCSI_ADVANSYS is not set
++# CONFIG_SCSI_ARCMSR is not set
++# CONFIG_MEGARAID_NEWGEN is not set
++# CONFIG_MEGARAID_LEGACY is not set
++# CONFIG_MEGARAID_SAS is not set
++# CONFIG_SCSI_HPTIOP is not set
++# CONFIG_LIBFC is not set
++# CONFIG_FCOE is not set
++# CONFIG_SCSI_DMX3191D is not set
++# CONFIG_SCSI_FUTURE_DOMAIN is not set
++# CONFIG_SCSI_IPS is not set
++# CONFIG_SCSI_INITIO is not set
++# CONFIG_SCSI_INIA100 is not set
++# CONFIG_SCSI_MVSAS is not set
++# CONFIG_SCSI_STEX is not set
++# CONFIG_SCSI_SYM53C8XX_2 is not set
++# CONFIG_SCSI_IPR is not set
++# CONFIG_SCSI_QLOGIC_1280 is not set
++# CONFIG_SCSI_QLA_FC is not set
++# CONFIG_SCSI_QLA_ISCSI is not set
++# CONFIG_SCSI_LPFC is not set
++# CONFIG_SCSI_DC395x is not set
++# CONFIG_SCSI_DC390T is not set
++# CONFIG_SCSI_NSP32 is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_SRP is not set
++# CONFIG_SCSI_DH is not set
++CONFIG_ATA=y
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_SATA_PMP=y
++# CONFIG_SATA_AHCI is not set
++# CONFIG_SATA_SIL24 is not set
++CONFIG_ATA_SFF=y
++# CONFIG_SATA_SVW is not set
++# CONFIG_ATA_PIIX is not set
++CONFIG_SATA_MV=y
++# CONFIG_SATA_NV is not set
++# CONFIG_PDC_ADMA is not set
++# CONFIG_SATA_QSTOR is not set
++# CONFIG_SATA_PROMISE is not set
++# CONFIG_SATA_SX4 is not set
++# CONFIG_SATA_SIL is not set
++# CONFIG_SATA_SIS is not set
++# CONFIG_SATA_ULI is not set
++# CONFIG_SATA_VIA is not set
++# CONFIG_SATA_VITESSE is not set
++# CONFIG_SATA_INIC162X is not set
++# CONFIG_PATA_ALI is not set
++# CONFIG_PATA_AMD is not set
++# CONFIG_PATA_ARTOP is not set
++# CONFIG_PATA_ATIIXP is not set
++# CONFIG_PATA_CMD640_PCI is not set
++# CONFIG_PATA_CMD64X is not set
++# CONFIG_PATA_CS5520 is not set
++# CONFIG_PATA_CS5530 is not set
++# CONFIG_PATA_CYPRESS is not set
++# CONFIG_PATA_EFAR is not set
++# CONFIG_ATA_GENERIC is not set
++# CONFIG_PATA_HPT366 is not set
++# CONFIG_PATA_HPT37X is not set
++# CONFIG_PATA_HPT3X2N is not set
++# CONFIG_PATA_HPT3X3 is not set
++# CONFIG_PATA_IT821X is not set
++# CONFIG_PATA_IT8213 is not set
++# CONFIG_PATA_JMICRON is not set
++# CONFIG_PATA_TRIFLEX is not set
++# CONFIG_PATA_MARVELL is not set
++# CONFIG_PATA_MPIIX is not set
++# CONFIG_PATA_OLDPIIX is not set
++# CONFIG_PATA_NETCELL is not set
++# CONFIG_PATA_NINJA32 is not set
++# CONFIG_PATA_NS87410 is not set
++# CONFIG_PATA_NS87415 is not set
++# CONFIG_PATA_OPTI is not set
++# CONFIG_PATA_OPTIDMA is not set
++# CONFIG_PATA_PDC_OLD is not set
++# CONFIG_PATA_RADISYS is not set
++# CONFIG_PATA_RZ1000 is not set
++# CONFIG_PATA_SC1200 is not set
++# CONFIG_PATA_SERVERWORKS is not set
++# CONFIG_PATA_PDC2027X is not set
++# CONFIG_PATA_SIL680 is not set
++# CONFIG_PATA_SIS is not set
++# CONFIG_PATA_VIA is not set
++# CONFIG_PATA_WINBOND is not set
++# CONFIG_PATA_SCH is not set
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=m
++CONFIG_MD_LINEAR=m
++CONFIG_MD_RAID0=m
++CONFIG_MD_RAID1=m
++# CONFIG_MD_RAID10 is not set
++CONFIG_MD_RAID456=m
++CONFIG_MD_RAID5_RESHAPE=y
++CONFIG_MD_MULTIPATH=m
++# CONFIG_MD_FAULTY is not set
++CONFIG_BLK_DEV_DM=m
++# CONFIG_DM_DEBUG is not set
++CONFIG_DM_CRYPT=m
++CONFIG_DM_SNAPSHOT=m
++CONFIG_DM_MIRROR=m
++CONFIG_DM_ZERO=m
++CONFIG_DM_MULTIPATH=m
++# CONFIG_DM_DELAY is not set
++# CONFIG_DM_UEVENT is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# Enable only one of the two stacks, unless you know what you are doing
++#
++# CONFIG_FIREWIRE is not set
++# CONFIG_IEEE1394 is not set
++# CONFIG_I2O is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_ARCNET is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++CONFIG_MARVELL_PHY=y
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_NATIONAL_PHY is not set
++# CONFIG_STE10XP is not set
++# CONFIG_LSI_ET1011C_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++# CONFIG_NET_VENDOR_3COM is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_SMC911X is not set
++# CONFIG_SMSC911X is not set
++# CONFIG_DNET is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_HP100 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++CONFIG_NET_PCI=y
++# CONFIG_PCNET32 is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_B44 is not set
++# CONFIG_FORCEDETH is not set
++# CONFIG_E100 is not set
++# CONFIG_FEALNX is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_8139CP is not set
++# CONFIG_8139TOO is not set
++# CONFIG_R6040 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_EPIC100 is not set
++# CONFIG_SMSC9420 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_TLAN is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_SC92031 is not set
++# CONFIG_ATL2 is not set
++CONFIG_NETDEV_1000=y
++# CONFIG_ACENIC is not set
++# CONFIG_DL2K is not set
++# CONFIG_E1000 is not set
++# CONFIG_E1000E is not set
++# CONFIG_IP1000 is not set
++# CONFIG_IGB is not set
++# CONFIG_NS83820 is not set
++# CONFIG_HAMACHI is not set
++# CONFIG_YELLOWFIN is not set
++# CONFIG_R8169 is not set
++# CONFIG_SIS190 is not set
++# CONFIG_SKGE is not set
++# CONFIG_SKY2 is not set
++# CONFIG_VIA_VELOCITY is not set
++# CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
++CONFIG_MV643XX_ETH=y
++# CONFIG_MV643XX_ETH_LRO is not set
++# CONFIG_QLA3XXX is not set
++# CONFIG_ATL1 is not set
++# CONFIG_ATL1E is not set
++# CONFIG_ATL1C is not set
++# CONFIG_JME is not set
++# CONFIG_NETDEV_10000 is not set
++# CONFIG_TR is not set
++
++#
++# Wireless LAN
++#
++# CONFIG_WLAN_PRE80211 is not set
++CONFIG_WLAN_80211=y
++CONFIG_LIBERTAS=y
++CONFIG_LIBERTAS_USB=m
++CONFIG_LIBERTAS_SDIO=y
++# CONFIG_LIBERTAS_DEBUG is not set
++CONFIG_LIBERTAS_THINFIRM=m
++CONFIG_LIBERTAS_THINFIRM_USB=m
++# CONFIG_HERMES is not set
++# CONFIG_ATMEL is not set
++# CONFIG_PRISM54 is not set
++CONFIG_USB_ZD1201=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++# CONFIG_RTL8180 is not set
++CONFIG_RTL8187=m
++# CONFIG_ADM8211 is not set
++# CONFIG_MAC80211_HWSIM is not set
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++# CONFIG_P54_PCI is not set
++# CONFIG_ATH5K is not set
++# CONFIG_ATH9K is not set
++# CONFIG_IPW2100 is not set
++# CONFIG_IPW2200 is not set
++# CONFIG_IWLCORE is not set
++# CONFIG_IWLWIFI_LEDS is not set
++# CONFIG_IWLAGN is not set
++# CONFIG_IWL3945 is not set
++# CONFIG_HOSTAP is not set
++# CONFIG_B43 is not set
++# CONFIG_B43LEGACY is not set
++CONFIG_ZD1211RW=m
++# CONFIG_ZD1211RW_DEBUG is not set
++CONFIG_RT2X00=m
++# CONFIG_RT2400PCI is not set
++# CONFIG_RT2500PCI is not set
++# CONFIG_RT61PCI is not set
++CONFIG_RT2500USB=m
++CONFIG_RT73USB=m
++CONFIG_RT2X00_LIB_USB=m
++CONFIG_RT2X00_LIB=m
++CONFIG_RT2X00_LIB_FIRMWARE=y
++CONFIG_RT2X00_LIB_CRYPTO=y
++CONFIG_RT2X00_LIB_LEDS=y
++# CONFIG_RT2X00_DEBUG is not set
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=m
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_SMSC95XX=m
++# CONFIG_USB_NET_GL620A is not set
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++# CONFIG_USB_ALI_M5632 is not set
++# CONFIG_USB_AN2720 is not set
++CONFIG_USB_BELKIN=y
++CONFIG_USB_ARMLINUX=y
++# CONFIG_USB_EPSON2888 is not set
++# CONFIG_USB_KC2190 is not set
++CONFIG_USB_NET_ZAURUS=m
++# CONFIG_WAN is not set
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++CONFIG_PPP=m
++CONFIG_PPP_MULTILINK=y
++CONFIG_PPP_FILTER=y
++CONFIG_PPP_ASYNC=m
++CONFIG_PPP_SYNC_TTY=m
++CONFIG_PPP_DEFLATE=m
++CONFIG_PPP_BSDCOMP=m
++CONFIG_PPP_MPPE=m
++CONFIG_PPPOE=m
++CONFIG_PPPOL2TP=m
++CONFIG_SLIP=m
++# CONFIG_SLIP_COMPRESSED is not set
++CONFIG_SLHC=m
++# CONFIG_SLIP_SMART is not set
++# CONFIG_SLIP_MODE_SLIP6 is not set
++# CONFIG_NET_FC is not set
++# CONFIG_NETCONSOLE is not set
++# CONFIG_NETPOLL is not set
++# CONFIG_NET_POLL_CONTROLLER is not set
++# CONFIG_ISDN is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++# CONFIG_INPUT_JOYDEV is not set
++# CONFIG_INPUT_EVDEV is not set
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++# CONFIG_INPUT_KEYBOARD is not set
++# CONFIG_INPUT_MOUSE is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++# CONFIG_INPUT_MISC is not set
++
++#
++# Hardware I/O ports
++#
++# CONFIG_SERIO is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_DEVKMEM is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_PCI=y
++CONFIG_SERIAL_8250_NR_UARTS=4
++CONFIG_SERIAL_8250_RUNTIME_UARTS=2
++# CONFIG_SERIAL_8250_EXTENDED is not set
++
++#
++# Non-8250 serial port support
++#
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=16
++# CONFIG_IPMI_HANDLER is not set
++# CONFIG_HW_RANDOM is not set
++# CONFIG_R3964 is not set
++# CONFIG_APPLICOM is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# PC SMBus host controller drivers
++#
++# CONFIG_I2C_ALI1535 is not set
++# CONFIG_I2C_ALI1563 is not set
++# CONFIG_I2C_ALI15X3 is not set
++# CONFIG_I2C_AMD756 is not set
++# CONFIG_I2C_AMD8111 is not set
++# CONFIG_I2C_I801 is not set
++# CONFIG_I2C_ISCH is not set
++# CONFIG_I2C_PIIX4 is not set
++# CONFIG_I2C_NFORCE2 is not set
++# CONFIG_I2C_SIS5595 is not set
++# CONFIG_I2C_SIS630 is not set
++# CONFIG_I2C_SIS96X is not set
++# CONFIG_I2C_VIA is not set
++# CONFIG_I2C_VIAPRO is not set
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_GPIO is not set
++CONFIG_I2C_MV64XXX=y
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_SIMTEC is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Graphics adapter I2C/DDC channel drivers
++#
++# CONFIG_I2C_VOODOO3 is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_PCF8574 is not set
++# CONFIG_PCF8575 is not set
++# CONFIG_SENSORS_PCA9539 is not set
++# CONFIG_SENSORS_PCF8591 is not set
++# CONFIG_SENSORS_MAX6875 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++CONFIG_SPI=y
++# CONFIG_SPI_DEBUG is not set
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_BITBANG is not set
++# CONFIG_SPI_GPIO is not set
++CONFIG_SPI_ORION=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_THERMAL_HWMON is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++# CONFIG_SSB is not set
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_TWL4030_CORE is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM8350_I2C is not set
++# CONFIG_MFD_PCF50633 is not set
++
++#
++# Multimedia devices
++#
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=m
++CONFIG_VIDEO_V4L2_COMMON=m
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++CONFIG_DVB_CORE=m
++CONFIG_VIDEO_MEDIA=m
++
++#
++# Multimedia drivers
++#
++# CONFIG_MEDIA_ATTACH is not set
++CONFIG_MEDIA_TUNER=m
++# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
++CONFIG_MEDIA_TUNER_SIMPLE=m
++CONFIG_MEDIA_TUNER_TDA8290=m
++CONFIG_MEDIA_TUNER_TDA827X=m
++CONFIG_MEDIA_TUNER_TDA18271=m
++CONFIG_MEDIA_TUNER_TDA9887=m
++CONFIG_MEDIA_TUNER_TEA5761=m
++CONFIG_MEDIA_TUNER_TEA5767=m
++CONFIG_MEDIA_TUNER_MT20XX=m
++CONFIG_MEDIA_TUNER_MT2060=m
++CONFIG_MEDIA_TUNER_MT2266=m
++CONFIG_MEDIA_TUNER_QT1010=m
++CONFIG_MEDIA_TUNER_XC2028=m
++CONFIG_MEDIA_TUNER_XC5000=m
++CONFIG_MEDIA_TUNER_MXL5005S=m
++CONFIG_VIDEO_V4L2=m
++CONFIG_VIDEO_V4L1=m
++CONFIG_VIDEOBUF_GEN=m
++CONFIG_VIDEOBUF_VMALLOC=m
++CONFIG_VIDEOBUF_DVB=m
++CONFIG_VIDEO_IR=m
++CONFIG_VIDEO_TVEEPROM=m
++CONFIG_VIDEO_TUNER=m
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++CONFIG_VIDEO_IR_I2C=m
++CONFIG_VIDEO_MSP3400=m
++CONFIG_VIDEO_CS53L32A=m
++CONFIG_VIDEO_WM8775=m
++CONFIG_VIDEO_SAA711X=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_CX25840=m
++CONFIG_VIDEO_CX2341X=m
++CONFIG_VIDEO_VIVI=m
++# CONFIG_VIDEO_BT848 is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_SAA5246A is not set
++# CONFIG_VIDEO_SAA5249 is not set
++# CONFIG_VIDEO_STRADIS is not set
++# CONFIG_VIDEO_SAA7134 is not set
++# CONFIG_VIDEO_MXB is not set
++# CONFIG_VIDEO_HEXIUM_ORION is not set
++# CONFIG_VIDEO_HEXIUM_GEMINI is not set
++# CONFIG_VIDEO_CX88 is not set
++# CONFIG_VIDEO_CX23885 is not set
++# CONFIG_VIDEO_AU0828 is not set
++# CONFIG_VIDEO_IVTV is not set
++# CONFIG_VIDEO_CX18 is not set
++# CONFIG_VIDEO_CAFE_CCIC is not set
++# CONFIG_SOC_CAMERA is not set
++CONFIG_V4L_USB_DRIVERS=y
++CONFIG_USB_VIDEO_CLASS=m
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++CONFIG_USB_GSPCA=m
++CONFIG_USB_M5602=m
++CONFIG_USB_STV06XX=m
++CONFIG_USB_GSPCA_CONEX=m
++CONFIG_USB_GSPCA_ETOMS=m
++CONFIG_USB_GSPCA_FINEPIX=m
++CONFIG_USB_GSPCA_MARS=m
++CONFIG_USB_GSPCA_OV519=m
++CONFIG_USB_GSPCA_OV534=m
++CONFIG_USB_GSPCA_PAC207=m
++CONFIG_USB_GSPCA_PAC7311=m
++CONFIG_USB_GSPCA_SONIXB=m
++CONFIG_USB_GSPCA_SONIXJ=m
++CONFIG_USB_GSPCA_SPCA500=m
++CONFIG_USB_GSPCA_SPCA501=m
++CONFIG_USB_GSPCA_SPCA505=m
++CONFIG_USB_GSPCA_SPCA506=m
++CONFIG_USB_GSPCA_SPCA508=m
++CONFIG_USB_GSPCA_SPCA561=m
++CONFIG_USB_GSPCA_STK014=m
++CONFIG_USB_GSPCA_SUNPLUS=m
++CONFIG_USB_GSPCA_T613=m
++CONFIG_USB_GSPCA_TV8532=m
++CONFIG_USB_GSPCA_VC032X=m
++CONFIG_USB_GSPCA_ZC3XX=m
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_PVRUSB2_SYSFS=y
++CONFIG_VIDEO_PVRUSB2_DVB=y
++# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++CONFIG_VIDEO_EM28XX_DVB=m
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_USBVIDEO=m
++CONFIG_USB_VICAM=m
++CONFIG_USB_IBMCAM=m
++CONFIG_USB_KONICAWC=m
++CONFIG_USB_QUICKCAM_MESSENGER=m
++CONFIG_USB_ET61X251=m
++CONFIG_VIDEO_OVCAMCHIP=m
++CONFIG_USB_W9968CF=m
++CONFIG_USB_OV511=m
++CONFIG_USB_SE401=m
++CONFIG_USB_SN9C102=m
++CONFIG_USB_STV680=m
++CONFIG_USB_ZC0301=m
++CONFIG_USB_PWC=m
++CONFIG_USB_PWC_DEBUG=y
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_RADIO_ADAPTERS=y
++# CONFIG_RADIO_GEMTEK_PCI is not set
++# CONFIG_RADIO_MAXIRADIO is not set
++# CONFIG_RADIO_MAESTRO is not set
++CONFIG_USB_DSBR=m
++# CONFIG_USB_SI470X is not set
++CONFIG_USB_MR800=m
++# CONFIG_RADIO_TEA5764 is not set
++CONFIG_DVB_DYNAMIC_MINORS=y
++CONFIG_DVB_CAPTURE_DRIVERS=y
++
++#
++# Supported SAA7146 based PCI Adapters
++#
++# CONFIG_TTPCI_EEPROM is not set
++# CONFIG_DVB_AV7110 is not set
++# CONFIG_DVB_BUDGET_CORE is not set
++
++#
++# Supported USB Adapters
++#
++CONFIG_DVB_USB=m
++# CONFIG_DVB_USB_DEBUG is not set
++CONFIG_DVB_USB_A800=m
++CONFIG_DVB_USB_DIBUSB_MB=m
++# CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set
++CONFIG_DVB_USB_DIBUSB_MC=m
++CONFIG_DVB_USB_DIB0700=m
++CONFIG_DVB_USB_UMT_010=m
++CONFIG_DVB_USB_CXUSB=m
++CONFIG_DVB_USB_M920X=m
++CONFIG_DVB_USB_GL861=m
++CONFIG_DVB_USB_AU6610=m
++CONFIG_DVB_USB_DIGITV=m
++CONFIG_DVB_USB_VP7045=m
++CONFIG_DVB_USB_VP702X=m
++CONFIG_DVB_USB_GP8PSK=m
++CONFIG_DVB_USB_NOVA_T_USB2=m
++CONFIG_DVB_USB_TTUSB2=m
++CONFIG_DVB_USB_DTT200U=m
++CONFIG_DVB_USB_OPERA1=m
++CONFIG_DVB_USB_AF9005=m
++CONFIG_DVB_USB_AF9005_REMOTE=m
++CONFIG_DVB_USB_DW2102=m
++CONFIG_DVB_USB_CINERGY_T2=m
++CONFIG_DVB_USB_ANYSEE=m
++CONFIG_DVB_USB_DTV5100=m
++# CONFIG_DVB_USB_AF9015 is not set
++CONFIG_DVB_TTUSB_BUDGET=m
++CONFIG_DVB_TTUSB_DEC=m
++CONFIG_DVB_SIANO_SMS1XXX=m
++CONFIG_DVB_SIANO_SMS1XXX_SMS_IDS=y
++
++#
++# Supported FlexCopII (B2C2) Adapters
++#
++# CONFIG_DVB_B2C2_FLEXCOP is not set
++
++#
++# Supported BT878 Adapters
++#
++
++#
++# Supported Pluto2 Adapters
++#
++# CONFIG_DVB_PLUTO2 is not set
++
++#
++# Supported SDMC DM1105 Adapters
++#
++# CONFIG_DVB_DM1105 is not set
++
++#
++# Supported DVB Frontends
++#
++
++#
++# Customise DVB Frontends
++#
++# CONFIG_DVB_FE_CUSTOMISE is not set
++
++#
++# Multistandard (satellite) frontends
++#
++CONFIG_DVB_STB0899=m
++CONFIG_DVB_STB6100=m
++
++#
++# DVB-S (satellite) frontends
++#
++CONFIG_DVB_CX24110=m
++CONFIG_DVB_CX24123=m
++CONFIG_DVB_MT312=m
++CONFIG_DVB_S5H1420=m
++CONFIG_DVB_STV0288=m
++CONFIG_DVB_STB6000=m
++CONFIG_DVB_STV0299=m
++CONFIG_DVB_TDA8083=m
++CONFIG_DVB_TDA10086=m
++CONFIG_DVB_TDA8261=m
++CONFIG_DVB_VES1X93=m
++# CONFIG_DVB_TUNER_ITD1000 is not set
++CONFIG_DVB_TUNER_CX24113=m
++CONFIG_DVB_TDA826X=m
++CONFIG_DVB_TUA6100=m
++CONFIG_DVB_CX24116=m
++CONFIG_DVB_SI21XX=m
++
++#
++# DVB-T (terrestrial) frontends
++#
++CONFIG_DVB_SP8870=m
++CONFIG_DVB_SP887X=m
++CONFIG_DVB_CX22700=m
++CONFIG_DVB_CX22702=m
++CONFIG_DVB_DRX397XD=m
++CONFIG_DVB_L64781=m
++CONFIG_DVB_TDA1004X=m
++CONFIG_DVB_NXT6000=m
++CONFIG_DVB_MT352=m
++CONFIG_DVB_ZL10353=m
++CONFIG_DVB_DIB3000MB=m
++CONFIG_DVB_DIB3000MC=m
++CONFIG_DVB_DIB7000M=m
++CONFIG_DVB_DIB7000P=m
++CONFIG_DVB_TDA10048=m
++
++#
++# DVB-C (cable) frontends
++#
++CONFIG_DVB_VES1820=m
++# CONFIG_DVB_TDA10021 is not set
++CONFIG_DVB_TDA10023=m
++CONFIG_DVB_STV0297=m
++
++#
++# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
++#
++CONFIG_DVB_NXT200X=m
++CONFIG_DVB_OR51211=m
++CONFIG_DVB_OR51132=m
++CONFIG_DVB_BCM3510=m
++CONFIG_DVB_LGDT330X=m
++CONFIG_DVB_LGDT3304=m
++CONFIG_DVB_S5H1409=m
++CONFIG_DVB_AU8522=m
++CONFIG_DVB_S5H1411=m
++
++#
++# ISDB-T (terrestrial) frontends
++#
++CONFIG_DVB_S921=m
++
++#
++# Digital terrestrial only tuners/PLL
++#
++CONFIG_DVB_PLL=m
++CONFIG_DVB_TUNER_DIB0070=m
++
++#
++# SEC control devices for DVB-S
++#
++CONFIG_DVB_LNBP21=m
++CONFIG_DVB_ISL6405=m
++CONFIG_DVB_ISL6421=m
++CONFIG_DVB_LGS8GL5=m
++
++#
++# Tools to develop new frontends
++#
++CONFIG_DVB_DUMMY_FE=m
++CONFIG_DVB_AF9013=m
++CONFIG_DAB=y
++CONFIG_USB_DABUSB=m
++
++#
++# Graphics support
++#
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=m
++CONFIG_FIRMWARE_EDID=y
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++CONFIG_FB_CFB_FILLRECT=m
++CONFIG_FB_CFB_COPYAREA=m
++CONFIG_FB_CFB_IMAGEBLIT=m
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++CONFIG_FB_SYS_FILLRECT=m
++CONFIG_FB_SYS_COPYAREA=m
++CONFIG_FB_SYS_IMAGEBLIT=m
++CONFIG_FB_FOREIGN_ENDIAN=y
++CONFIG_FB_BOTH_ENDIAN=y
++# CONFIG_FB_BIG_ENDIAN is not set
++# CONFIG_FB_LITTLE_ENDIAN is not set
++CONFIG_FB_SYS_FOPS=m
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++CONFIG_FB_MODE_HELPERS=y
++CONFIG_FB_TILEBLITTING=y
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++CONFIG_FB_RADEON=m
++# CONFIG_FB_RADEON_I2C is not set
++# CONFIG_FB_RADEON_BACKLIGHT is not set
++# CONFIG_FB_RADEON_DEBUG is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++# CONFIG_FB_SIS is not set
++# CONFIG_FB_VIA is not set
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++CONFIG_FB_VIRTUAL=m
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_MB862XX is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE is not set
++CONFIG_FONT_8x16=y
++# CONFIG_LOGO is not set
++CONFIG_SOUND=m
++CONFIG_SOUND_OSS_CORE=y
++CONFIG_SND=m
++CONFIG_SND_TIMER=m
++CONFIG_SND_PCM=m
++CONFIG_SND_HWDEP=m
++CONFIG_SND_RAWMIDI=m
++CONFIG_SND_SEQUENCER=m
++CONFIG_SND_SEQ_DUMMY=m
++CONFIG_SND_OSSEMUL=y
++CONFIG_SND_MIXER_OSS=m
++CONFIG_SND_PCM_OSS=m
++CONFIG_SND_PCM_OSS_PLUGINS=y
++CONFIG_SND_SEQUENCER_OSS=y
++CONFIG_SND_HRTIMER=m
++CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++# CONFIG_SND_VERBOSE_PRINTK is not set
++# CONFIG_SND_DEBUG is not set
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_VIRMIDI is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_OXYGEN is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HIFIER is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++# CONFIG_SND_VIA82XX is not set
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++CONFIG_SND_ARM=y
++CONFIG_SND_SPI=y
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=m
++CONFIG_SND_USB_CAIAQ=m
++CONFIG_SND_USB_CAIAQ_INPUT=y
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HID_DEBUG is not set
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# Special HID drivers
++#
++CONFIG_HID_COMPAT=y
++CONFIG_HID_A4TECH=y
++CONFIG_HID_APPLE=y
++CONFIG_HID_BELKIN=y
++CONFIG_HID_CHERRY=y
++CONFIG_HID_CHICONY=y
++CONFIG_HID_CYPRESS=y
++CONFIG_HID_EZKEY=y
++CONFIG_HID_GYRATION=y
++CONFIG_HID_LOGITECH=y
++# CONFIG_LOGITECH_FF is not set
++# CONFIG_LOGIRUMBLEPAD2_FF is not set
++CONFIG_HID_MICROSOFT=y
++CONFIG_HID_MONTEREY=y
++CONFIG_HID_NTRIG=y
++CONFIG_HID_PANTHERLORD=y
++# CONFIG_PANTHERLORD_FF is not set
++CONFIG_HID_PETALYNX=y
++CONFIG_HID_SAMSUNG=y
++CONFIG_HID_SONY=y
++CONFIG_HID_SUNPLUS=y
++# CONFIG_GREENASIA_FF is not set
++CONFIG_HID_TOPSEED=y
++# CONFIG_THRUSTMASTER_FF is not set
++# CONFIG_ZEROPLUS_FF is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++CONFIG_USB_EHCI_TT_NEWSCHED=y
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_OHCI_HCD is not set
++# CONFIG_USB_UHCI_HCD is not set
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_WHCI_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_GADGET_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++CONFIG_USB_ACM=m
++CONFIG_USB_PRINTER=m
++CONFIG_USB_WDM=m
++CONFIG_USB_TMC=m
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
++#
++
++#
++# see USB_STORAGE Help for more information
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++CONFIG_USB_STORAGE_ISD200=y
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++CONFIG_USB_STORAGE_ALAUDA=y
++CONFIG_USB_STORAGE_ONETOUCH=y
++CONFIG_USB_STORAGE_KARMA=y
++CONFIG_USB_STORAGE_CYPRESS_ATACB=y
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++CONFIG_USB_MDC800=m
++CONFIG_USB_MICROTEK=m
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++CONFIG_USB_EZUSB=y
++# CONFIG_USB_SERIAL_GENERIC is not set
++CONFIG_USB_SERIAL_AIRCABLE=m
++CONFIG_USB_SERIAL_ARK3116=m
++CONFIG_USB_SERIAL_BELKIN=m
++CONFIG_USB_SERIAL_CH341=m
++CONFIG_USB_SERIAL_WHITEHEAT=m
++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
++CONFIG_USB_SERIAL_CP2101=m
++CONFIG_USB_SERIAL_CYPRESS_M8=m
++CONFIG_USB_SERIAL_EMPEG=m
++CONFIG_USB_SERIAL_FTDI_SIO=m
++CONFIG_USB_SERIAL_FUNSOFT=m
++CONFIG_USB_SERIAL_VISOR=m
++CONFIG_USB_SERIAL_IPAQ=m
++CONFIG_USB_SERIAL_IR=m
++CONFIG_USB_SERIAL_EDGEPORT=m
++CONFIG_USB_SERIAL_EDGEPORT_TI=m
++CONFIG_USB_SERIAL_GARMIN=m
++CONFIG_USB_SERIAL_IPW=m
++CONFIG_USB_SERIAL_IUU=m
++CONFIG_USB_SERIAL_KEYSPAN_PDA=m
++CONFIG_USB_SERIAL_KEYSPAN=m
++CONFIG_USB_SERIAL_KEYSPAN_MPR=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
++CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19=y
++CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
++CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
++CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
++CONFIG_USB_SERIAL_KLSI=m
++CONFIG_USB_SERIAL_KOBIL_SCT=m
++CONFIG_USB_SERIAL_MCT_U232=m
++CONFIG_USB_SERIAL_MOS7720=m
++CONFIG_USB_SERIAL_MOS7840=m
++CONFIG_USB_SERIAL_MOTOROLA=m
++CONFIG_USB_SERIAL_NAVMAN=m
++CONFIG_USB_SERIAL_PL2303=m
++CONFIG_USB_SERIAL_OTI6858=m
++CONFIG_USB_SERIAL_SPCP8X5=m
++CONFIG_USB_SERIAL_HP4X=m
++CONFIG_USB_SERIAL_SAFE=m
++CONFIG_USB_SERIAL_SAFE_PADDED=y
++CONFIG_USB_SERIAL_SIEMENS_MPI=m
++CONFIG_USB_SERIAL_SIERRAWIRELESS=m
++CONFIG_USB_SERIAL_TI=m
++CONFIG_USB_SERIAL_CYBERJACK=m
++CONFIG_USB_SERIAL_XIRCOM=m
++CONFIG_USB_SERIAL_OPTION=m
++CONFIG_USB_SERIAL_OMNINET=m
++CONFIG_USB_SERIAL_OPTICON=m
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++CONFIG_USB_EMI62=m
++CONFIG_USB_EMI26=m
++CONFIG_USB_ADUTUX=m
++CONFIG_USB_SEVSEG=m
++CONFIG_USB_RIO500=m
++CONFIG_USB_LEGOTOWER=m
++CONFIG_USB_LCD=m
++CONFIG_USB_BERRY_CHARGE=m
++CONFIG_USB_LED=m
++CONFIG_USB_CYPRESS_CY7C63=m
++CONFIG_USB_CYTHERM=m
++# CONFIG_USB_PHIDGET is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++CONFIG_USB_SISUSBVGA=m
++CONFIG_USB_SISUSBVGA_CON=y
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++# CONFIG_USB_TEST is not set
++# CONFIG_USB_ISIGHTFW is not set
++CONFIG_USB_VST=m
++CONFIG_USB_GADGET=m
++# CONFIG_USB_GADGET_DEBUG is not set
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++# CONFIG_USB_GADGET_DEBUG_FS is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_PXA25X is not set
++# CONFIG_USB_GADGET_PXA27X is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_IMX is not set
++CONFIG_USB_GADGET_M66592=y
++CONFIG_USB_M66592=m
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_FSL_QE is not set
++# CONFIG_USB_GADGET_CI13XXX is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++# CONFIG_USB_ZERO is not set
++# CONFIG_USB_ETH is not set
++# CONFIG_USB_GADGETFS is not set
++# CONFIG_USB_FILE_STORAGE is not set
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++
++#
++# OTG and related infrastructure
++#
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_UWB is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++CONFIG_MMC_UNSAFE_RESUME=y
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++CONFIG_SDIO_UART=y
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++# CONFIG_MMC_SDHCI is not set
++# CONFIG_MMC_TIFM_SD is not set
++CONFIG_MMC_MVSDIO=y
++# CONFIG_MMC_SPI is not set
++# CONFIG_MEMSTICK is not set
++# CONFIG_ACCESSIBILITY is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++# CONFIG_LEDS_PCA9532 is not set
++CONFIG_LEDS_GPIO=y
++# CONFIG_LEDS_PCA955X is not set
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++# CONFIG_RTC_DRV_S35390A is not set
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_MV=y
++CONFIG_DMADEVICES=y
++
++#
++# DMA Devices
++#
++CONFIG_MV_XOR=y
++CONFIG_DMA_ENGINE=y
++
++#
++# DMA Clients
++#
++# CONFIG_NET_DMA is not set
++# CONFIG_DMATEST is not set
++# CONFIG_REGULATOR is not set
++# CONFIG_UIO is not set
++CONFIG_STAGING=y
++# CONFIG_STAGING_EXCLUDE_BUILD is not set
++# CONFIG_ET131X is not set
++# CONFIG_ME4000 is not set
++# CONFIG_MEILHAUS is not set
++# CONFIG_VIDEO_GO7007 is not set
++CONFIG_USB_IP_COMMON=m
++CONFIG_USB_IP_VHCI_HCD=m
++CONFIG_USB_IP_HOST=m
++CONFIG_W35UND=m
++CONFIG_PRISM2_USB=m
++# CONFIG_ECHO is not set
++# CONFIG_USB_ATMEL is not set
++# CONFIG_AGNX is not set
++CONFIG_OTUS=m
++# CONFIG_COMEDI is not set
++# CONFIG_ASUS_OLED is not set
++# CONFIG_ALTERA_PCIE_CHDMA is not set
++# CONFIG_RTL8187SE is not set
++# CONFIG_INPUT_MIMIO is not set
++# CONFIG_TRANZPORT is not set
++
++#
++# Android
++#
++# CONFIG_ANDROID is not set
++# CONFIG_ANDROID_BINDER_IPC is not set
++# CONFIG_ANDROID_LOGGER is not set
++# CONFIG_ANDROID_RAM_CONSOLE is not set
++# CONFIG_ANDROID_TIMED_GPIO is not set
++# CONFIG_ANDROID_LOW_MEMORY_KILLER is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++CONFIG_EXT2_FS_XATTR=y
++CONFIG_EXT2_FS_POSIX_ACL=y
++CONFIG_EXT2_FS_SECURITY=y
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++CONFIG_EXT3_FS_XATTR=y
++CONFIG_EXT3_FS_POSIX_ACL=y
++CONFIG_EXT3_FS_SECURITY=y
++CONFIG_EXT4_FS=y
++# CONFIG_EXT4DEV_COMPAT is not set
++CONFIG_EXT4_FS_XATTR=y
++CONFIG_EXT4_FS_POSIX_ACL=y
++CONFIG_EXT4_FS_SECURITY=y
++CONFIG_JBD=y
++# CONFIG_JBD_DEBUG is not set
++CONFIG_JBD2=y
++# CONFIG_JBD2_DEBUG is not set
++CONFIG_FS_MBCACHE=y
++CONFIG_REISERFS_FS=m
++# CONFIG_REISERFS_CHECK is not set
++# CONFIG_REISERFS_PROC_INFO is not set
++# CONFIG_REISERFS_FS_XATTR is not set
++CONFIG_JFS_FS=m
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_FILE_LOCKING=y
++CONFIG_XFS_FS=m
++# CONFIG_XFS_QUOTA is not set
++CONFIG_XFS_POSIX_ACL=y
++# CONFIG_XFS_RT is not set
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_BTRFS_FS is not set
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++# CONFIG_FUSE_FS is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++# CONFIG_NTFS_FS is not set
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++# CONFIG_CONFIGFS_FS is not set
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++# CONFIG_JFFS2_SUMMARY is not set
++# CONFIG_JFFS2_FS_XATTR is not set
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_UBIFS_FS=y
++CONFIG_UBIFS_FS_XATTR=y
++CONFIG_UBIFS_FS_ADVANCED_COMPR=y
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++CONFIG_CRAMFS=y
++# CONFIG_SQUASHFS is not set
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++CONFIG_ROOT_NFS=y
++# CONFIG_NFSD is not set
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++# CONFIG_SUNRPC_REGISTER_V4 is not set
++# CONFIG_RPCSEC_GSS_KRB5 is not set
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++# CONFIG_CIFS is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++CONFIG_MAC_PARTITION=y
++CONFIG_MSDOS_PARTITION=y
++CONFIG_BSD_DISKLABEL=y
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++CONFIG_LDM_PARTITION=y
++# CONFIG_LDM_DEBUG is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++# CONFIG_EFI_PARTITION is not set
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="iso8859-1"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=y
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_2=y
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=y
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++# CONFIG_PRINTK_TIME is not set
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_UNUSED_SYMBOLS is not set
++CONFIG_DEBUG_FS=y
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_DEBUG_PREEMPT is not set
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++CONFIG_STACKTRACE=y
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++CONFIG_DEBUG_MEMORY_INIT=y
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++# CONFIG_DEBUG_NOTIFIERS is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_RCU_CPU_STALL_DETECTOR is not set
++# CONFIG_KPROBES_SANITY_TEST is not set
++# CONFIG_BACKTRACE_SELF_TEST is not set
++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
++# CONFIG_LKDTM is not set
++# CONFIG_FAULT_INJECTION is not set
++# CONFIG_LATENCYTOP is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++CONFIG_NOP_TRACER=y
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_RING_BUFFER=y
++CONFIG_TRACING=y
++
++#
++# Tracers
++#
++# CONFIG_FUNCTION_TRACER is not set
++# CONFIG_IRQSOFF_TRACER is not set
++# CONFIG_PREEMPT_TRACER is not set
++# CONFIG_SCHED_TRACER is not set
++# CONFIG_CONTEXT_SWITCH_TRACER is not set
++# CONFIG_BOOT_TRACER is not set
++# CONFIG_TRACE_BRANCH_PROFILING is not set
++# CONFIG_STACK_TRACER is not set
++# CONFIG_FTRACE_STARTUP_TEST is not set
++# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++# CONFIG_KGDB is not set
++CONFIG_ARM_UNWIND=y
++CONFIG_DEBUG_USER=y
++CONFIG_DEBUG_ERRORS=y
++# CONFIG_DEBUG_STACK_USAGE is not set
++CONFIG_DEBUG_LL=y
++# CONFIG_DEBUG_ICEDCC is not set
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_XOR_BLOCKS=m
++CONFIG_ASYNC_CORE=m
++CONFIG_ASYNC_MEMCPY=m
++CONFIG_ASYNC_XOR=m
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++# CONFIG_CRYPTO_FIPS is not set
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++# CONFIG_CRYPTO_GF128MUL is not set
++# CONFIG_CRYPTO_NULL is not set
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++CONFIG_CRYPTO_PCBC=m
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++# CONFIG_CRYPTO_HMAC is not set
++# CONFIG_CRYPTO_XCBC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=y
++# CONFIG_CRYPTO_MD4 is not set
++# CONFIG_CRYPTO_MD5 is not set
++# CONFIG_CRYPTO_MICHAEL_MIC is not set
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=m
++# CONFIG_CRYPTO_SHA256 is not set
++# CONFIG_CRYPTO_SHA512 is not set
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_ANUBIS is not set
++CONFIG_CRYPTO_ARC4=y
++# CONFIG_CRYPTO_BLOWFISH is not set
++# CONFIG_CRYPTO_CAMELLIA is not set
++# CONFIG_CRYPTO_CAST5 is not set
++# CONFIG_CRYPTO_CAST6 is not set
++# CONFIG_CRYPTO_DES is not set
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++# CONFIG_CRYPTO_TEA is not set
++# CONFIG_CRYPTO_TWOFISH is not set
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=y
++CONFIG_CRYPTO_LZO=y
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_GENERIC_FIND_LAST_BIT=y
++CONFIG_CRC_CCITT=y
++CONFIG_CRC16=y
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_LZO_COMPRESS=y
++CONFIG_LZO_DECOMPRESS=y
++CONFIG_PLIST=y
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/fw.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/fw.patch
+new file mode 100644
+index 0000000..9f1eda7
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/fw.patch
+@@ -0,0 +1,36 @@
++diff -urN linux-2.6.27.7.old//arch/powerpc/boot/Makefile linux-2.6.27.7//arch/powerpc/boot/Makefile
++--- linux-2.6.27.7.old//arch/powerpc/boot/Makefile 2008-11-20 23:02:37.000000000 +0000
+++++ linux-2.6.27.7//arch/powerpc/boot/Makefile 2008-11-22 21:02:13.456791583 +0000
++@@ -376,16 +376,16 @@
++ cmd_mkdir = mkdir -p $@
++
++ quiet_cmd_install = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,%,$@)
++- cmd_install = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@
+++ cmd_install = $(INSTALL) -m 0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@
++
++ quiet_cmd_install_dts = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,dts/%,$@)
++- cmd_install_dts = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@
+++ cmd_install_dts = $(INSTALL) -m 0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@
++
++ quiet_cmd_install_exe = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
++- cmd_install_exe = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@
+++ cmd_install_exe = $(INSTALL) -m 0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@
++
++ quiet_cmd_install_wrapper = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
++- cmd_install_wrapper = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\
+++ cmd_install_wrapper = $(INSTALL) -m 0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\
++ sed -i $@ -e 's%^object=.*%object=$(WRAPPER_OBJDIR)%' \
++ -e 's%^objbin=.*%objbin=$(WRAPPER_BINDIR)%' \
++
++diff -urN linux-2.6.27.7.old//scripts/Makefile.fwinst linux-2.6.27.7//scripts/Makefile.fwinst
++--- linux-2.6.27.7.old//scripts/Makefile.fwinst 2008-11-20 23:02:37.000000000 +0000
+++++ linux-2.6.27.7//scripts/Makefile.fwinst 2008-11-22 21:01:50.870504646 +0000
++@@ -37,7 +37,7 @@
++ @true
++
++ quiet_cmd_install = INSTALL $(subst $(srctree)/,,$@)
++- cmd_install = $(INSTALL) -m0644 $< $@
+++ cmd_install = $(INSTALL) -m 0644 $< $@
++
++ $(installed-fw-dirs):
++ $(call cmd,mkdir)
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/mvsdio.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/mvsdio.patch
+new file mode 100644
+index 0000000..e4ba675
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/mvsdio.patch
+@@ -0,0 +1,46 @@
++Patch obtained from http://www.computingplugs.com/index.php/Fixing_SDHC_access_in_the_Orion/Mainline_kernel
++
++--- a/drivers/mmc/host/mvsdio.c.orig 2009-04-14 20:51:48.000000000 +0000
+++++ b/drivers/mmc/host/mvsdio.c 2009-04-19 15:58:42.261724324 +0000
++@@ -21,6 +21,7 @@
++ #include <linux/irq.h>
++ #include <linux/gpio.h>
++ #include <linux/mmc/host.h>
+++#include <linux/mmc/sd.h>
++
++ #include <asm/sizes.h>
++ #include <asm/unaligned.h>
++@@ -123,6 +124,7 @@
++
++ dev_dbg(host->dev, "cmd %d (hw state 0x%04x)\n",
++ cmd->opcode, mvsd_read(MVSD_HW_STATE));
+++ if (cmd->opcode == SD_SWITCH) mdelay(1); /* Voodoo */
++
++ cmdreg = MVSD_CMD_INDEX(cmd->opcode);
++
++@@ -620,9 +622,11 @@
++ if (ios->bus_width == MMC_BUS_WIDTH_4)
++ ctrl_reg |= MVSD_HOST_CTRL_DATA_WIDTH_4_BITS;
++
+++#if 0
++ if (ios->timing == MMC_TIMING_MMC_HS ||
++ ios->timing == MMC_TIMING_SD_HS)
++ ctrl_reg |= MVSD_HOST_CTRL_HI_SPEED_EN;
+++#endif
++
++ host->ctrl = ctrl_reg;
++ mvsd_write(MVSD_HOST_CTRL, ctrl_reg);
++--- kernel/drivers/mmc/core/core.c.orig 2009-04-14 20:51:48.000000000 +0000
+++++ kernel/drivers/mmc/core/core.c 2009-04-19 17:36:35.985746917 +0000
++@@ -286,9 +286,9 @@
++ * The limit is really 250 ms, but that is
++ * insufficient for some crappy cards.
++ */
++- limit_us = 300000;
+++ limit_us = 500000;
++ else
++- limit_us = 100000;
+++ limit_us = 200000;
++
++ /*
++ * SDHC cards always use these fixed values.
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/newer-arm-mach-types.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/newer-arm-mach-types.patch
+new file mode 100644
+index 0000000..f03308e
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/newer-arm-mach-types.patch
+@@ -0,0 +1,181 @@
++Index: git/arch/arm/tools/mach-types
++===================================================================
++--- git.orig/arch/arm/tools/mach-types 2009-09-14 22:09:58.000000000 +0200
+++++ git/arch/arm/tools/mach-types 2009-09-14 22:10:15.000000000 +0200
++@@ -12,7 +12,7 @@
++ #
++ # http://www.arm.linux.org.uk/developer/machines/?action=new
++ #
++-# Last update: Sat Jun 20 22:28:39 2009
+++# Last update: Sun Sep 13 23:04:38 2009
++ #
++ # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
++ #
++@@ -1769,7 +1769,7 @@
++ mi424wr MACH_MI424WR MI424WR 1778
++ axs_ultrax MACH_AXS_ULTRAX AXS_ULTRAX 1779
++ at572d940deb MACH_AT572D940DEB AT572D940DEB 1780
++-davinci_da8xx_evm MACH_DAVINCI_DA8XX_EVM DAVINCI_DA8XX_EVM 1781
+++davinci_da830_evm MACH_DAVINCI_DA830_EVM DAVINCI_DA830_EVM 1781
++ ep9302 MACH_EP9302 EP9302 1782
++ at572d940hfek MACH_AT572D940HFEB AT572D940HFEB 1783
++ cybook3 MACH_CYBOOK3 CYBOOK3 1784
++@@ -1962,7 +1962,7 @@
++ arm11 MACH_ARM11 ARM11 1972
++ cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
++ cpupxa255 MACH_CPUPXA255 CPUPXA255 1974
++-cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
+++eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975
++ cheflux MACH_CHEFLUX CHEFLUX 1976
++ eb_cpux9k2 MACH_EB_CPUX9K2 EB_CPUX9K2 1977
++ opcotec MACH_OPCOTEC OPCOTEC 1978
++@@ -2249,14 +2249,14 @@
++ darwin MACH_DARWIN DARWIN 2262
++ oratiscomu MACH_ORATISCOMU ORATISCOMU 2263
++ rtsbc20 MACH_RTSBC20 RTSBC20 2264
++-i780 MACH_I780 I780 2265
+++sgh_i780 MACH_I780 I780 2265
++ gemini324 MACH_GEMINI324 GEMINI324 2266
++ oratislan MACH_ORATISLAN ORATISLAN 2267
++ oratisalog MACH_ORATISALOG ORATISALOG 2268
++ oratismadi MACH_ORATISMADI ORATISMADI 2269
++ oratisot16 MACH_ORATISOT16 ORATISOT16 2270
++ oratisdesk MACH_ORATISDESK ORATISDESK 2271
++-v2p_ca9 MACH_V2P_CA9 V2P_CA9 2272
+++v2_ca9 MACH_V2P_CA9 V2P_CA9 2272
++ sintexo MACH_SINTEXO SINTEXO 2273
++ cm3389 MACH_CM3389 CM3389 2274
++ omap3_cio MACH_OMAP3_CIO OMAP3_CIO 2275
++@@ -2280,3 +2280,132 @@
++ htctopaz MACH_HTCTOPAZ HTCTOPAZ 2293
++ matrix504 MACH_MATRIX504 MATRIX504 2294
++ mrfsa MACH_MRFSA MRFSA 2295
+++sc_p270 MACH_SC_P270 SC_P270 2296
+++atlas5_evb MACH_ATLAS5_EVB ATLAS5_EVB 2297
+++pelco_lobox MACH_PELCO_LOBOX PELCO_LOBOX 2298
+++dilax_pcu200 MACH_DILAX_PCU200 DILAX_PCU200 2299
+++leonardo MACH_LEONARDO LEONARDO 2300
+++zoran_approach7 MACH_ZORAN_APPROACH7 ZORAN_APPROACH7 2301
+++dp6xx MACH_DP6XX DP6XX 2302
+++bcm2153_vesper MACH_BCM2153_VESPER BCM2153_VESPER 2303
+++mahimahi MACH_MAHIMAHI MAHIMAHI 2304
+++clickc MACH_CLICKC CLICKC 2305
+++zb_gateway MACH_ZB_GATEWAY ZB_GATEWAY 2306
+++tazcard MACH_TAZCARD TAZCARD 2307
+++tazdev MACH_TAZDEV TAZDEV 2308
+++annax_cb_arm MACH_ANNAX_CB_ARM ANNAX_CB_ARM 2309
+++annax_dm3 MACH_ANNAX_DM3 ANNAX_DM3 2310
+++cerebric MACH_CEREBRIC CEREBRIC 2311
+++orca MACH_ORCA ORCA 2312
+++pc9260 MACH_PC9260 PC9260 2313
+++ems285a MACH_EMS285A EMS285A 2314
+++gec2410 MACH_GEC2410 GEC2410 2315
+++gec2440 MACH_GEC2440 GEC2440 2316
+++mw903 MACH_ARCH_MW903 ARCH_MW903 2317
+++mw2440 MACH_MW2440 MW2440 2318
+++ecac2378 MACH_ECAC2378 ECAC2378 2319
+++tazkiosk MACH_TAZKIOSK TAZKIOSK 2320
+++whiterabbit_mch MACH_WHITERABBIT_MCH WHITERABBIT_MCH 2321
+++sbox9263 MACH_SBOX9263 SBOX9263 2322
+++oreo MACH_OREO OREO 2323
+++smdk6442 MACH_SMDK6442 SMDK6442 2324
+++openrd_base MACH_OPENRD_BASE OPENRD_BASE 2325
+++incredible MACH_INCREDIBLE INCREDIBLE 2326
+++incrediblec MACH_INCREDIBLEC INCREDIBLEC 2327
+++heroct MACH_HEROCT HEROCT 2328
+++mmnet1000 MACH_MMNET1000 MMNET1000 2329
+++devkit8000 MACH_DEVKIT8000 DEVKIT8000 2330
+++devkit9000 MACH_DEVKIT9000 DEVKIT9000 2331
+++mx31txtr MACH_MX31TXTR MX31TXTR 2332
+++u380 MACH_U380 U380 2333
+++oamp3_hualu MACH_HUALU_BOARD HUALU_BOARD 2334
+++npcmx50 MACH_NPCMX50 NPCMX50 2335
+++mx51_lange51 MACH_MX51_LANGE51 MX51_LANGE51 2336
+++mx51_lange52 MACH_MX51_LANGE52 MX51_LANGE52 2337
+++riom MACH_RIOM RIOM 2338
+++comcas MACH_COMCAS COMCAS 2339
+++wsi_mx27 MACH_WSI_MX27 WSI_MX27 2340
+++cm_t35 MACH_CM_T35 CM_T35 2341
+++net2big MACH_NET2BIG NET2BIG 2342
+++motorola_a1600 MACH_MOTOROLA_A1600 MOTOROLA_A1600 2343
+++igep0020 MACH_IGEP0020 IGEP0020 2344
+++igep0010 MACH_IGEP0010 IGEP0010 2345
+++mv6281gtwge2 MACH_MV6281GTWGE2 MV6281GTWGE2 2346
+++scat100 MACH_SCAT100 SCAT100 2347
+++sanmina MACH_SANMINA SANMINA 2348
+++momento MACH_MOMENTO MOMENTO 2349
+++nuc9xx MACH_NUC9XX NUC9XX 2350
+++nuc910evb MACH_NUC910EVB NUC910EVB 2351
+++nuc920evb MACH_NUC920EVB NUC920EVB 2352
+++nuc950evb MACH_NUC950EVB NUC950EVB 2353
+++nuc945evb MACH_NUC945EVB NUC945EVB 2354
+++nuc960evb MACH_NUC960EVB NUC960EVB 2355
+++nuc932evb MACH_NUC932EVB NUC932EVB 2356
+++nuc900 MACH_NUC900 NUC900 2357
+++sd1soc MACH_SD1SOC SD1SOC 2358
+++ln2440bc MACH_LN2440BC LN2440BC 2359
+++rsbc MACH_RSBC RSBC 2360
+++openrd_client MACH_OPENRD_CLIENT OPENRD_CLIENT 2361
+++hpipaq11x MACH_HPIPAQ11X HPIPAQ11X 2362
+++wayland MACH_WAYLAND WAYLAND 2363
+++acnbsx102 MACH_ACNBSX102 ACNBSX102 2364
+++hwat91 MACH_HWAT91 HWAT91 2365
+++at91sam9263cs MACH_AT91SAM9263CS AT91SAM9263CS 2366
+++csb732 MACH_CSB732 CSB732 2367
+++u8500 MACH_U8500 U8500 2368
+++huqiu MACH_HUQIU HUQIU 2369
+++mx51_kunlun MACH_MX51_KUNLUN MX51_KUNLUN 2370
+++pmt1g MACH_PMT1G PMT1G 2371
+++htcelf MACH_HTCELF HTCELF 2372
+++armadillo420 MACH_ARMADILLO420 ARMADILLO420 2373
+++armadillo440 MACH_ARMADILLO440 ARMADILLO440 2374
+++u_chip_dual_arm MACH_U_CHIP_DUAL_ARM U_CHIP_DUAL_ARM 2375
+++csr_bdb3 MACH_CSR_BDB3 CSR_BDB3 2376
+++dolby_cat1018 MACH_DOLBY_CAT1018 DOLBY_CAT1018 2377
+++hy9307 MACH_HY9307 HY9307 2378
+++aspire_easystore MACH_A_ES A_ES 2379
+++davinci_irif MACH_DAVINCI_IRIF DAVINCI_IRIF 2380
+++agama9263 MACH_AGAMA9263 AGAMA9263 2381
+++marvell_jasper MACH_MARVELL_JASPER MARVELL_JASPER 2382
+++flint MACH_FLINT FLINT 2383
+++tavorevb3 MACH_TAVOREVB3 TAVOREVB3 2384
+++sch_m490 MACH_SCH_M490 SCH_M490 2386
+++rbl01 MACH_RBL01 RBL01 2387
+++omnifi MACH_OMNIFI OMNIFI 2388
+++otavalo MACH_OTAVALO OTAVALO 2389
+++sienna MACH_SIENNA SIENNA 2390
+++htc_excalibur_s620 MACH_HTC_EXCALIBUR_S620 HTC_EXCALIBUR_S620 2391
+++htc_opal MACH_HTC_OPAL HTC_OPAL 2392
+++touchbook MACH_TOUCHBOOK TOUCHBOOK 2393
+++latte MACH_LATTE LATTE 2394
+++xa200 MACH_XA200 XA200 2395
+++nimrod MACH_NIMROD NIMROD 2396
+++cc9p9215_3g MACH_CC9P9215_3G CC9P9215_3G 2397
+++cc9p9215_3gjs MACH_CC9P9215_3GJS CC9P9215_3GJS 2398
+++tk71 MACH_TK71 TK71 2399
+++comham3525 MACH_COMHAM3525 COMHAM3525 2400
+++mx31erebus MACH_MX31EREBUS MX31EREBUS 2401
+++mcardmx27 MACH_MCARDMX27 MCARDMX27 2402
+++paradise MACH_PARADISE PARADISE 2403
+++tide MACH_TIDE TIDE 2404
+++wzl2440 MACH_WZL2440 WZL2440 2405
+++sdrdemo MACH_SDRDEMO SDRDEMO 2406
+++ethercan2 MACH_ETHERCAN2 ETHERCAN2 2407
+++ecmimg20 MACH_ECMIMG20 ECMIMG20 2408
+++omap_dragon MACH_OMAP_DRAGON OMAP_DRAGON 2409
+++halo MACH_HALO HALO 2410
+++huangshan MACH_HUANGSHAN HUANGSHAN 2411
+++vl_ma2sc MACH_VL_MA2SC VL_MA2SC 2412
+++raumfeld_rc MACH_RAUMFELD_RC RAUMFELD_RC 2413
+++raumfeld_connector MACH_RAUMFELD_CONNECTOR RAUMFELD_CONNECTOR 2414
+++raumfeld_speaker MACH_RAUMFELD_SPEAKER RAUMFELD_SPEAKER 2415
+++multibus_master MACH_MULTIBUS_MASTER MULTIBUS_MASTER 2416
+++multibus_pbk MACH_MULTIBUS_PBK MULTIBUS_PBK 2417
+++tnetv107x MACH_TNETV107X TNETV107X 2418
+++snake MACH_SNAKE SNAKE 2419
+++cwmx27 MACH_CWMX27 CWMX27 2420
+++sch_m480 MACH_SCH_M480 SCH_M480 2421
+++platypus MACH_PLATYPUS PLATYPUS 2422
+++pss2 MACH_PSS2 PSS2 2423
+++davinci_apm150 MACH_DAVINCI_APM150 DAVINCI_APM150 2424
+++str9100 MACH_STR9100 STR9100 2425
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/defconfig b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/defconfig
+new file mode 100644
+index 0000000..cb6fb6a
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/defconfig
+@@ -0,0 +1,2610 @@
++#
++# Automatically generated make config: don't edit
++#
++CONFIG_ARM=y
++CONFIG_SYS_SUPPORTS_APM_EMULATION=y
++CONFIG_GENERIC_GPIO=y
++CONFIG_GENERIC_TIME=y
++CONFIG_GENERIC_CLOCKEVENTS=y
++CONFIG_GENERIC_HARDIRQS=y
++CONFIG_STACKTRACE_SUPPORT=y
++CONFIG_HAVE_LATENCYTOP_SUPPORT=y
++CONFIG_LOCKDEP_SUPPORT=y
++CONFIG_TRACE_IRQFLAGS_SUPPORT=y
++CONFIG_HARDIRQS_SW_RESEND=y
++CONFIG_GENERIC_IRQ_PROBE=y
++CONFIG_RWSEM_GENERIC_SPINLOCK=y
++CONFIG_GENERIC_HWEIGHT=y
++CONFIG_GENERIC_CALIBRATE_DELAY=y
++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
++CONFIG_VECTORS_BASE=0xffff0000
++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
++CONFIG_CONSTRUCTORS=y
++
++#
++# General setup
++#
++CONFIG_EXPERIMENTAL=y
++CONFIG_BROKEN_ON_SMP=y
++CONFIG_LOCK_KERNEL=y
++CONFIG_INIT_ENV_ARG_LIMIT=32
++CONFIG_LOCALVERSION=""
++# CONFIG_LOCALVERSION_AUTO is not set
++CONFIG_SWAP=y
++CONFIG_SYSVIPC=y
++CONFIG_SYSVIPC_SYSCTL=y
++# CONFIG_POSIX_MQUEUE is not set
++# CONFIG_BSD_PROCESS_ACCT is not set
++# CONFIG_TASKSTATS is not set
++# CONFIG_AUDIT is not set
++
++#
++# RCU Subsystem
++#
++CONFIG_TREE_RCU=y
++# CONFIG_TREE_PREEMPT_RCU is not set
++# CONFIG_RCU_TRACE is not set
++CONFIG_RCU_FANOUT=32
++# CONFIG_RCU_FANOUT_EXACT is not set
++# CONFIG_TREE_RCU_TRACE is not set
++CONFIG_IKCONFIG=m
++CONFIG_IKCONFIG_PROC=y
++CONFIG_LOG_BUF_SHIFT=19
++# CONFIG_GROUP_SCHED is not set
++# CONFIG_CGROUPS is not set
++# CONFIG_SYSFS_DEPRECATED_V2 is not set
++# CONFIG_RELAY is not set
++# CONFIG_NAMESPACES is not set
++CONFIG_BLK_DEV_INITRD=y
++CONFIG_INITRAMFS_SOURCE=""
++CONFIG_RD_GZIP=y
++# CONFIG_RD_BZIP2 is not set
++# CONFIG_RD_LZMA is not set
++CONFIG_CC_OPTIMIZE_FOR_SIZE=y
++CONFIG_SYSCTL=y
++CONFIG_ANON_INODES=y
++CONFIG_EMBEDDED=y
++CONFIG_UID16=y
++CONFIG_SYSCTL_SYSCALL=y
++CONFIG_KALLSYMS=y
++# CONFIG_KALLSYMS_EXTRA_PASS is not set
++CONFIG_HOTPLUG=y
++CONFIG_PRINTK=y
++CONFIG_BUG=y
++CONFIG_ELF_CORE=y
++CONFIG_BASE_FULL=y
++CONFIG_FUTEX=y
++CONFIG_EPOLL=y
++CONFIG_SIGNALFD=y
++CONFIG_TIMERFD=y
++CONFIG_EVENTFD=y
++CONFIG_SHMEM=y
++CONFIG_AIO=y
++
++#
++# Kernel Performance Events And Counters
++#
++CONFIG_VM_EVENT_COUNTERS=y
++CONFIG_PCI_QUIRKS=y
++# CONFIG_SLUB_DEBUG is not set
++CONFIG_COMPAT_BRK=y
++# CONFIG_SLAB is not set
++CONFIG_SLUB=y
++# CONFIG_SLOB is not set
++# CONFIG_PROFILING is not set
++CONFIG_HAVE_OPROFILE=y
++# CONFIG_KPROBES is not set
++CONFIG_HAVE_KPROBES=y
++CONFIG_HAVE_KRETPROBES=y
++
++#
++# GCOV-based kernel profiling
++#
++CONFIG_SLOW_WORK=y
++CONFIG_HAVE_GENERIC_DMA_COHERENT=y
++CONFIG_RT_MUTEXES=y
++CONFIG_BASE_SMALL=0
++CONFIG_MODULES=y
++# CONFIG_MODULE_FORCE_LOAD is not set
++CONFIG_MODULE_UNLOAD=y
++# CONFIG_MODULE_FORCE_UNLOAD is not set
++# CONFIG_MODVERSIONS is not set
++# CONFIG_MODULE_SRCVERSION_ALL is not set
++CONFIG_BLOCK=y
++CONFIG_LBDAF=y
++CONFIG_BLK_DEV_BSG=y
++# CONFIG_BLK_DEV_INTEGRITY is not set
++
++#
++# IO Schedulers
++#
++CONFIG_IOSCHED_NOOP=y
++CONFIG_IOSCHED_AS=y
++CONFIG_IOSCHED_DEADLINE=y
++CONFIG_IOSCHED_CFQ=y
++# CONFIG_DEFAULT_AS is not set
++# CONFIG_DEFAULT_DEADLINE is not set
++CONFIG_DEFAULT_CFQ=y
++# CONFIG_DEFAULT_NOOP is not set
++CONFIG_DEFAULT_IOSCHED="cfq"
++# CONFIG_FREEZER is not set
++
++#
++# System Type
++#
++CONFIG_MMU=y
++# CONFIG_ARCH_AAEC2000 is not set
++# CONFIG_ARCH_INTEGRATOR is not set
++# CONFIG_ARCH_REALVIEW is not set
++# CONFIG_ARCH_VERSATILE is not set
++# CONFIG_ARCH_AT91 is not set
++# CONFIG_ARCH_CLPS711X is not set
++# CONFIG_ARCH_GEMINI is not set
++# CONFIG_ARCH_EBSA110 is not set
++# CONFIG_ARCH_EP93XX is not set
++# CONFIG_ARCH_FOOTBRIDGE is not set
++# CONFIG_ARCH_MXC is not set
++# CONFIG_ARCH_STMP3XXX is not set
++# CONFIG_ARCH_NETX is not set
++# CONFIG_ARCH_H720X is not set
++# CONFIG_ARCH_NOMADIK is not set
++# CONFIG_ARCH_IOP13XX is not set
++# CONFIG_ARCH_IOP32X is not set
++# CONFIG_ARCH_IOP33X is not set
++# CONFIG_ARCH_IXP23XX is not set
++# CONFIG_ARCH_IXP2000 is not set
++# CONFIG_ARCH_IXP4XX is not set
++# CONFIG_ARCH_L7200 is not set
++CONFIG_ARCH_KIRKWOOD=y
++# CONFIG_ARCH_LOKI is not set
++# CONFIG_ARCH_MV78XX0 is not set
++# CONFIG_ARCH_ORION5X is not set
++# CONFIG_ARCH_MMP is not set
++# CONFIG_ARCH_KS8695 is not set
++# CONFIG_ARCH_NS9XXX is not set
++# CONFIG_ARCH_W90X900 is not set
++# CONFIG_ARCH_PNX4008 is not set
++# CONFIG_ARCH_PXA is not set
++# CONFIG_ARCH_MSM is not set
++# CONFIG_ARCH_RPC is not set
++# CONFIG_ARCH_SA1100 is not set
++# CONFIG_ARCH_S3C2410 is not set
++# CONFIG_ARCH_S3C64XX is not set
++# CONFIG_ARCH_S5PC1XX is not set
++# CONFIG_ARCH_SHARK is not set
++# CONFIG_ARCH_LH7A40X is not set
++# CONFIG_ARCH_U300 is not set
++# CONFIG_ARCH_DAVINCI is not set
++# CONFIG_ARCH_OMAP is not set
++# CONFIG_ARCH_BCMRING is not set
++
++#
++# Marvell Kirkwood Implementations
++#
++CONFIG_MACH_DB88F6281_BP=y
++CONFIG_MACH_RD88F6192_NAS=y
++CONFIG_MACH_RD88F6281=y
++CONFIG_MACH_MV88F6281GTW_GE=y
++CONFIG_MACH_SHEEVAPLUG=y
++CONFIG_MACH_TS219=y
++CONFIG_MACH_OPENRD_BASE=y
++CONFIG_MACH_OPENRD_CLIENT=y
++CONFIG_PLAT_ORION=y
++
++#
++# Processor Type
++#
++CONFIG_CPU_32=y
++CONFIG_CPU_FEROCEON=y
++# CONFIG_CPU_FEROCEON_OLD_ID is not set
++CONFIG_CPU_32v5=y
++CONFIG_CPU_ABRT_EV5T=y
++CONFIG_CPU_PABRT_LEGACY=y
++CONFIG_CPU_CACHE_VIVT=y
++CONFIG_CPU_COPY_FEROCEON=y
++CONFIG_CPU_TLB_FEROCEON=y
++CONFIG_CPU_CP15=y
++CONFIG_CPU_CP15_MMU=y
++
++#
++# Processor Features
++#
++CONFIG_ARM_THUMB=y
++# CONFIG_CPU_ICACHE_DISABLE is not set
++# CONFIG_CPU_DCACHE_DISABLE is not set
++CONFIG_OUTER_CACHE=y
++CONFIG_CACHE_FEROCEON_L2=y
++# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
++CONFIG_ARM_L1_CACHE_SHIFT=5
++
++#
++# Bus support
++#
++CONFIG_PCI=y
++CONFIG_PCI_SYSCALL=y
++# CONFIG_ARCH_SUPPORTS_MSI is not set
++CONFIG_PCI_LEGACY=y
++# CONFIG_PCI_STUB is not set
++# CONFIG_PCI_IOV is not set
++# CONFIG_PCCARD is not set
++
++#
++# Kernel Features
++#
++CONFIG_TICK_ONESHOT=y
++CONFIG_NO_HZ=y
++CONFIG_HIGH_RES_TIMERS=y
++CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
++CONFIG_VMSPLIT_3G=y
++# CONFIG_VMSPLIT_2G is not set
++# CONFIG_VMSPLIT_1G is not set
++CONFIG_PAGE_OFFSET=0xC0000000
++# CONFIG_PREEMPT_NONE is not set
++# CONFIG_PREEMPT_VOLUNTARY is not set
++CONFIG_PREEMPT=y
++CONFIG_HZ=100
++CONFIG_AEABI=y
++# CONFIG_OABI_COMPAT is not set
++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
++# CONFIG_HIGHMEM is not set
++CONFIG_SELECT_MEMORY_MODEL=y
++CONFIG_FLATMEM_MANUAL=y
++# CONFIG_DISCONTIGMEM_MANUAL is not set
++# CONFIG_SPARSEMEM_MANUAL is not set
++CONFIG_FLATMEM=y
++CONFIG_FLAT_NODE_MEM_MAP=y
++CONFIG_PAGEFLAGS_EXTENDED=y
++CONFIG_SPLIT_PTLOCK_CPUS=4096
++# CONFIG_PHYS_ADDR_T_64BIT is not set
++CONFIG_ZONE_DMA_FLAG=0
++CONFIG_VIRT_TO_BUS=y
++CONFIG_HAVE_MLOCK=y
++CONFIG_HAVE_MLOCKED_PAGE_BIT=y
++# CONFIG_KSM is not set
++CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
++CONFIG_ALIGNMENT_TRAP=y
++CONFIG_UACCESS_WITH_MEMCPY=y
++
++#
++# Boot options
++#
++CONFIG_ZBOOT_ROM_TEXT=0x0
++CONFIG_ZBOOT_ROM_BSS=0x0
++CONFIG_CMDLINE=" debug "
++# CONFIG_XIP_KERNEL is not set
++CONFIG_KEXEC=y
++CONFIG_ATAGS_PROC=y
++
++#
++# CPU Power Management
++#
++CONFIG_CPU_IDLE=y
++CONFIG_CPU_IDLE_GOV_LADDER=y
++CONFIG_CPU_IDLE_GOV_MENU=y
++
++#
++# Floating point emulation
++#
++
++#
++# At least one emulation must be selected
++#
++# CONFIG_VFP is not set
++
++#
++# Userspace binary formats
++#
++CONFIG_BINFMT_ELF=y
++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
++CONFIG_HAVE_AOUT=y
++# CONFIG_BINFMT_AOUT is not set
++# CONFIG_BINFMT_MISC is not set
++
++#
++# Power management options
++#
++# CONFIG_PM is not set
++CONFIG_ARCH_SUSPEND_POSSIBLE=y
++CONFIG_NET=y
++
++#
++# Networking options
++#
++CONFIG_PACKET=y
++CONFIG_PACKET_MMAP=y
++CONFIG_UNIX=y
++CONFIG_XFRM=y
++# CONFIG_XFRM_USER is not set
++# CONFIG_XFRM_SUB_POLICY is not set
++# CONFIG_XFRM_MIGRATE is not set
++# CONFIG_XFRM_STATISTICS is not set
++# CONFIG_NET_KEY is not set
++CONFIG_INET=y
++CONFIG_IP_MULTICAST=y
++CONFIG_IP_ADVANCED_ROUTER=y
++CONFIG_ASK_IP_FIB_HASH=y
++# CONFIG_IP_FIB_TRIE is not set
++CONFIG_IP_FIB_HASH=y
++# CONFIG_IP_MULTIPLE_TABLES is not set
++# CONFIG_IP_ROUTE_MULTIPATH is not set
++# CONFIG_IP_ROUTE_VERBOSE is not set
++CONFIG_IP_PNP=y
++CONFIG_IP_PNP_DHCP=y
++CONFIG_IP_PNP_BOOTP=y
++# CONFIG_IP_PNP_RARP is not set
++CONFIG_NET_IPIP=m
++CONFIG_NET_IPGRE=m
++CONFIG_NET_IPGRE_BROADCAST=y
++CONFIG_IP_MROUTE=y
++# CONFIG_IP_PIMSM_V1 is not set
++# CONFIG_IP_PIMSM_V2 is not set
++# CONFIG_ARPD is not set
++CONFIG_SYN_COOKIES=y
++# CONFIG_INET_AH is not set
++# CONFIG_INET_ESP is not set
++# CONFIG_INET_IPCOMP is not set
++# CONFIG_INET_XFRM_TUNNEL is not set
++CONFIG_INET_TUNNEL=m
++CONFIG_INET_XFRM_MODE_TRANSPORT=y
++CONFIG_INET_XFRM_MODE_TUNNEL=y
++CONFIG_INET_XFRM_MODE_BEET=y
++CONFIG_INET_LRO=y
++CONFIG_INET_DIAG=y
++CONFIG_INET_TCP_DIAG=y
++CONFIG_TCP_CONG_ADVANCED=y
++CONFIG_TCP_CONG_BIC=m
++CONFIG_TCP_CONG_CUBIC=y
++CONFIG_TCP_CONG_WESTWOOD=m
++CONFIG_TCP_CONG_HTCP=m
++# CONFIG_TCP_CONG_HSTCP is not set
++# CONFIG_TCP_CONG_HYBLA is not set
++# CONFIG_TCP_CONG_VEGAS is not set
++# CONFIG_TCP_CONG_SCALABLE is not set
++# CONFIG_TCP_CONG_LP is not set
++# CONFIG_TCP_CONG_VENO is not set
++# CONFIG_TCP_CONG_YEAH is not set
++# CONFIG_TCP_CONG_ILLINOIS is not set
++# CONFIG_DEFAULT_BIC is not set
++CONFIG_DEFAULT_CUBIC=y
++# CONFIG_DEFAULT_HTCP is not set
++# CONFIG_DEFAULT_VEGAS is not set
++# CONFIG_DEFAULT_WESTWOOD is not set
++# CONFIG_DEFAULT_RENO is not set
++CONFIG_DEFAULT_TCP_CONG="cubic"
++# CONFIG_TCP_MD5SIG is not set
++# CONFIG_IPV6 is not set
++# CONFIG_NETWORK_SECMARK is not set
++CONFIG_NETFILTER=y
++CONFIG_NETFILTER_DEBUG=y
++CONFIG_NETFILTER_ADVANCED=y
++CONFIG_BRIDGE_NETFILTER=y
++
++#
++# Core Netfilter Configuration
++#
++CONFIG_NETFILTER_NETLINK=m
++CONFIG_NETFILTER_NETLINK_QUEUE=m
++CONFIG_NETFILTER_NETLINK_LOG=m
++CONFIG_NF_CONNTRACK=m
++CONFIG_NF_CT_ACCT=y
++CONFIG_NF_CONNTRACK_MARK=y
++# CONFIG_NF_CONNTRACK_EVENTS is not set
++CONFIG_NF_CT_PROTO_DCCP=m
++CONFIG_NF_CT_PROTO_GRE=m
++CONFIG_NF_CT_PROTO_SCTP=m
++# CONFIG_NF_CT_PROTO_UDPLITE is not set
++CONFIG_NF_CONNTRACK_AMANDA=m
++CONFIG_NF_CONNTRACK_FTP=m
++CONFIG_NF_CONNTRACK_H323=m
++CONFIG_NF_CONNTRACK_IRC=m
++CONFIG_NF_CONNTRACK_NETBIOS_NS=m
++CONFIG_NF_CONNTRACK_PPTP=m
++CONFIG_NF_CONNTRACK_SANE=m
++CONFIG_NF_CONNTRACK_SIP=m
++CONFIG_NF_CONNTRACK_TFTP=m
++CONFIG_NF_CT_NETLINK=m
++CONFIG_NETFILTER_TPROXY=m
++CONFIG_NETFILTER_XTABLES=m
++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
++CONFIG_NETFILTER_XT_TARGET_DSCP=m
++CONFIG_NETFILTER_XT_TARGET_HL=m
++CONFIG_NETFILTER_XT_TARGET_LED=m
++CONFIG_NETFILTER_XT_TARGET_MARK=m
++CONFIG_NETFILTER_XT_TARGET_NFLOG=m
++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
++CONFIG_NETFILTER_XT_TARGET_RATEEST=m
++# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
++CONFIG_NETFILTER_XT_TARGET_TRACE=m
++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m
++CONFIG_NETFILTER_XT_MATCH_COMMENT=m
++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
++CONFIG_NETFILTER_XT_MATCH_DCCP=m
++CONFIG_NETFILTER_XT_MATCH_DSCP=m
++CONFIG_NETFILTER_XT_MATCH_ESP=m
++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
++CONFIG_NETFILTER_XT_MATCH_HELPER=m
++CONFIG_NETFILTER_XT_MATCH_HL=m
++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
++CONFIG_NETFILTER_XT_MATCH_LENGTH=m
++CONFIG_NETFILTER_XT_MATCH_LIMIT=m
++CONFIG_NETFILTER_XT_MATCH_MAC=m
++CONFIG_NETFILTER_XT_MATCH_MARK=m
++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
++CONFIG_NETFILTER_XT_MATCH_OWNER=m
++CONFIG_NETFILTER_XT_MATCH_POLICY=m
++# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
++CONFIG_NETFILTER_XT_MATCH_QUOTA=m
++CONFIG_NETFILTER_XT_MATCH_RATEEST=m
++CONFIG_NETFILTER_XT_MATCH_REALM=m
++CONFIG_NETFILTER_XT_MATCH_RECENT=m
++# CONFIG_NETFILTER_XT_MATCH_RECENT_PROC_COMPAT is not set
++CONFIG_NETFILTER_XT_MATCH_SCTP=m
++# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
++CONFIG_NETFILTER_XT_MATCH_STATE=m
++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
++CONFIG_NETFILTER_XT_MATCH_STRING=m
++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
++CONFIG_NETFILTER_XT_MATCH_TIME=m
++CONFIG_NETFILTER_XT_MATCH_U32=m
++CONFIG_NETFILTER_XT_MATCH_OSF=m
++# CONFIG_IP_VS is not set
++
++#
++# IP: Netfilter Configuration
++#
++CONFIG_NF_DEFRAG_IPV4=m
++CONFIG_NF_CONNTRACK_IPV4=m
++CONFIG_NF_CONNTRACK_PROC_COMPAT=y
++# CONFIG_IP_NF_QUEUE is not set
++CONFIG_IP_NF_IPTABLES=m
++CONFIG_IP_NF_MATCH_ADDRTYPE=m
++CONFIG_IP_NF_MATCH_AH=m
++CONFIG_IP_NF_MATCH_ECN=m
++CONFIG_IP_NF_MATCH_TTL=m
++CONFIG_IP_NF_FILTER=m
++CONFIG_IP_NF_TARGET_REJECT=m
++CONFIG_IP_NF_TARGET_LOG=m
++CONFIG_IP_NF_TARGET_ULOG=m
++CONFIG_NF_NAT=m
++CONFIG_NF_NAT_NEEDED=y
++CONFIG_IP_NF_TARGET_MASQUERADE=m
++CONFIG_IP_NF_TARGET_NETMAP=m
++CONFIG_IP_NF_TARGET_REDIRECT=m
++CONFIG_NF_NAT_SNMP_BASIC=m
++CONFIG_NF_NAT_PROTO_DCCP=m
++CONFIG_NF_NAT_PROTO_GRE=m
++CONFIG_NF_NAT_PROTO_SCTP=m
++CONFIG_NF_NAT_FTP=m
++CONFIG_NF_NAT_IRC=m
++CONFIG_NF_NAT_TFTP=m
++CONFIG_NF_NAT_AMANDA=m
++CONFIG_NF_NAT_PPTP=m
++CONFIG_NF_NAT_H323=m
++CONFIG_NF_NAT_SIP=m
++CONFIG_IP_NF_MANGLE=m
++CONFIG_IP_NF_TARGET_CLUSTERIP=m
++CONFIG_IP_NF_TARGET_ECN=m
++CONFIG_IP_NF_TARGET_TTL=m
++CONFIG_IP_NF_RAW=m
++CONFIG_IP_NF_ARPTABLES=m
++CONFIG_IP_NF_ARPFILTER=m
++CONFIG_IP_NF_ARP_MANGLE=m
++# CONFIG_BRIDGE_NF_EBTABLES is not set
++CONFIG_IP_DCCP=m
++CONFIG_INET_DCCP_DIAG=m
++
++#
++# DCCP CCIDs Configuration (EXPERIMENTAL)
++#
++# CONFIG_IP_DCCP_CCID2_DEBUG is not set
++CONFIG_IP_DCCP_CCID3=y
++# CONFIG_IP_DCCP_CCID3_DEBUG is not set
++CONFIG_IP_DCCP_CCID3_RTO=100
++CONFIG_IP_DCCP_TFRC_LIB=y
++CONFIG_IP_SCTP=m
++# CONFIG_SCTP_DBG_MSG is not set
++# CONFIG_SCTP_DBG_OBJCNT is not set
++# CONFIG_SCTP_HMAC_NONE is not set
++# CONFIG_SCTP_HMAC_SHA1 is not set
++CONFIG_SCTP_HMAC_MD5=y
++CONFIG_RDS=m
++CONFIG_RDS_TCP=m
++# CONFIG_RDS_DEBUG is not set
++CONFIG_TIPC=m
++# CONFIG_TIPC_ADVANCED is not set
++# CONFIG_TIPC_DEBUG is not set
++# CONFIG_ATM is not set
++CONFIG_STP=m
++CONFIG_GARP=m
++CONFIG_BRIDGE=m
++CONFIG_NET_DSA=y
++# CONFIG_NET_DSA_TAG_DSA is not set
++CONFIG_NET_DSA_TAG_EDSA=y
++# CONFIG_NET_DSA_TAG_TRAILER is not set
++CONFIG_NET_DSA_MV88E6XXX=y
++# CONFIG_NET_DSA_MV88E6060 is not set
++# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
++# CONFIG_NET_DSA_MV88E6131 is not set
++CONFIG_NET_DSA_MV88E6123_61_65=y
++CONFIG_VLAN_8021Q=m
++CONFIG_VLAN_8021Q_GVRP=y
++# CONFIG_DECNET is not set
++CONFIG_LLC=m
++CONFIG_LLC2=m
++# CONFIG_IPX is not set
++# CONFIG_ATALK is not set
++# CONFIG_X25 is not set
++# CONFIG_LAPB is not set
++# CONFIG_ECONET is not set
++# CONFIG_WAN_ROUTER is not set
++# CONFIG_PHONET is not set
++# CONFIG_IEEE802154 is not set
++# CONFIG_NET_SCHED is not set
++CONFIG_NET_CLS_ROUTE=y
++# CONFIG_DCB is not set
++
++#
++# Network testing
++#
++CONFIG_NET_PKTGEN=m
++# CONFIG_HAMRADIO is not set
++# CONFIG_CAN is not set
++# CONFIG_IRDA is not set
++CONFIG_BT=m
++CONFIG_BT_L2CAP=m
++CONFIG_BT_SCO=m
++CONFIG_BT_RFCOMM=m
++CONFIG_BT_RFCOMM_TTY=y
++CONFIG_BT_BNEP=m
++CONFIG_BT_BNEP_MC_FILTER=y
++CONFIG_BT_BNEP_PROTO_FILTER=y
++CONFIG_BT_HIDP=m
++
++#
++# Bluetooth device drivers
++#
++# CONFIG_BT_HCIBTUSB is not set
++# CONFIG_BT_HCIBTSDIO is not set
++CONFIG_BT_HCIUART=m
++CONFIG_BT_HCIUART_H4=y
++CONFIG_BT_HCIUART_BCSP=y
++CONFIG_BT_HCIUART_LL=y
++# CONFIG_BT_HCIBCM203X is not set
++# CONFIG_BT_HCIBPA10X is not set
++# CONFIG_BT_HCIBFUSB is not set
++# CONFIG_BT_HCIVHCI is not set
++# CONFIG_BT_MRVL is not set
++# CONFIG_AF_RXRPC is not set
++CONFIG_WIRELESS=y
++CONFIG_CFG80211=y
++# CONFIG_NL80211_TESTMODE is not set
++# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
++# CONFIG_CFG80211_REG_DEBUG is not set
++CONFIG_CFG80211_DEFAULT_PS=y
++CONFIG_CFG80211_DEFAULT_PS_VALUE=1
++CONFIG_WIRELESS_OLD_REGULATORY=y
++CONFIG_WIRELESS_EXT=y
++CONFIG_WIRELESS_EXT_SYSFS=y
++CONFIG_LIB80211=y
++CONFIG_LIB80211_CRYPT_WEP=m
++CONFIG_LIB80211_CRYPT_CCMP=m
++CONFIG_LIB80211_CRYPT_TKIP=m
++# CONFIG_LIB80211_DEBUG is not set
++CONFIG_MAC80211=y
++# CONFIG_MAC80211_RC_PID is not set
++CONFIG_MAC80211_RC_MINSTREL=y
++# CONFIG_MAC80211_RC_DEFAULT_PID is not set
++CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
++CONFIG_MAC80211_RC_DEFAULT="minstrel"
++# CONFIG_MAC80211_MESH is not set
++CONFIG_MAC80211_LEDS=y
++# CONFIG_MAC80211_DEBUG_MENU is not set
++# CONFIG_WIMAX is not set
++# CONFIG_RFKILL is not set
++# CONFIG_NET_9P is not set
++
++#
++# Device Drivers
++#
++
++#
++# Generic Driver Options
++#
++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
++# CONFIG_DEVTMPFS is not set
++CONFIG_STANDALONE=y
++CONFIG_PREVENT_FIRMWARE_BUILD=y
++CONFIG_FW_LOADER=y
++CONFIG_FIRMWARE_IN_KERNEL=y
++CONFIG_EXTRA_FIRMWARE=""
++# CONFIG_SYS_HYPERVISOR is not set
++# CONFIG_CONNECTOR is not set
++CONFIG_MTD=y
++# CONFIG_MTD_DEBUG is not set
++# CONFIG_MTD_TESTS is not set
++# CONFIG_MTD_CONCAT is not set
++CONFIG_MTD_PARTITIONS=y
++# CONFIG_MTD_REDBOOT_PARTS is not set
++CONFIG_MTD_CMDLINE_PARTS=y
++# CONFIG_MTD_AFS_PARTS is not set
++# CONFIG_MTD_AR7_PARTS is not set
++
++#
++# User Modules And Translation Layers
++#
++CONFIG_MTD_CHAR=y
++CONFIG_MTD_BLKDEVS=y
++CONFIG_MTD_BLOCK=y
++# CONFIG_FTL is not set
++CONFIG_NFTL=y
++CONFIG_NFTL_RW=y
++# CONFIG_INFTL is not set
++# CONFIG_RFD_FTL is not set
++# CONFIG_SSFDC is not set
++# CONFIG_MTD_OOPS is not set
++
++#
++# RAM/ROM/Flash chip drivers
++#
++CONFIG_MTD_CFI=y
++CONFIG_MTD_JEDECPROBE=y
++CONFIG_MTD_GEN_PROBE=y
++CONFIG_MTD_CFI_ADV_OPTIONS=y
++CONFIG_MTD_CFI_NOSWAP=y
++# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
++# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
++CONFIG_MTD_CFI_GEOMETRY=y
++CONFIG_MTD_MAP_BANK_WIDTH_1=y
++CONFIG_MTD_MAP_BANK_WIDTH_2=y
++CONFIG_MTD_MAP_BANK_WIDTH_4=y
++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
++CONFIG_MTD_CFI_I1=y
++CONFIG_MTD_CFI_I2=y
++# CONFIG_MTD_CFI_I4 is not set
++# CONFIG_MTD_CFI_I8 is not set
++# CONFIG_MTD_OTP is not set
++CONFIG_MTD_CFI_INTELEXT=y
++# CONFIG_MTD_CFI_AMDSTD is not set
++CONFIG_MTD_CFI_STAA=y
++CONFIG_MTD_CFI_UTIL=y
++CONFIG_MTD_RAM=m
++# CONFIG_MTD_ROM is not set
++# CONFIG_MTD_ABSENT is not set
++
++#
++# Mapping drivers for chip access
++#
++# CONFIG_MTD_COMPLEX_MAPPINGS is not set
++CONFIG_MTD_PHYSMAP=y
++# CONFIG_MTD_PHYSMAP_COMPAT is not set
++# CONFIG_MTD_ARM_INTEGRATOR is not set
++# CONFIG_MTD_IMPA7 is not set
++# CONFIG_MTD_INTEL_VR_NOR is not set
++CONFIG_MTD_PLATRAM=m
++
++#
++# Self-contained MTD device drivers
++#
++# CONFIG_MTD_PMC551 is not set
++# CONFIG_MTD_DATAFLASH is not set
++CONFIG_MTD_M25P80=y
++CONFIG_M25PXX_USE_FAST_READ=y
++# CONFIG_MTD_SST25L is not set
++# CONFIG_MTD_SLRAM is not set
++# CONFIG_MTD_PHRAM is not set
++CONFIG_MTD_MTDRAM=m
++CONFIG_MTDRAM_TOTAL_SIZE=4096
++CONFIG_MTDRAM_ERASE_SIZE=128
++# CONFIG_MTD_BLOCK2MTD is not set
++
++#
++# Disk-On-Chip Device Drivers
++#
++# CONFIG_MTD_DOC2000 is not set
++# CONFIG_MTD_DOC2001 is not set
++# CONFIG_MTD_DOC2001PLUS is not set
++CONFIG_MTD_NAND=y
++# CONFIG_MTD_NAND_VERIFY_WRITE is not set
++# CONFIG_MTD_NAND_ECC_SMC is not set
++# CONFIG_MTD_NAND_MUSEUM_IDS is not set
++# CONFIG_MTD_NAND_GPIO is not set
++CONFIG_MTD_NAND_IDS=y
++# CONFIG_MTD_NAND_DISKONCHIP is not set
++# CONFIG_MTD_NAND_CAFE is not set
++# CONFIG_MTD_NAND_NANDSIM is not set
++# CONFIG_MTD_NAND_PLATFORM is not set
++# CONFIG_MTD_ALAUDA is not set
++CONFIG_MTD_NAND_ORION=y
++# CONFIG_MTD_ONENAND is not set
++
++#
++# LPDDR flash memory drivers
++#
++# CONFIG_MTD_LPDDR is not set
++
++#
++# UBI - Unsorted block images
++#
++CONFIG_MTD_UBI=y
++CONFIG_MTD_UBI_WL_THRESHOLD=4096
++CONFIG_MTD_UBI_BEB_RESERVE=1
++# CONFIG_MTD_UBI_GLUEBI is not set
++
++#
++# UBI debugging options
++#
++# CONFIG_MTD_UBI_DEBUG is not set
++# CONFIG_PARPORT is not set
++CONFIG_BLK_DEV=y
++# CONFIG_BLK_CPQ_DA is not set
++# CONFIG_BLK_CPQ_CISS_DA is not set
++# CONFIG_BLK_DEV_DAC960 is not set
++# CONFIG_BLK_DEV_UMEM is not set
++# CONFIG_BLK_DEV_COW_COMMON is not set
++CONFIG_BLK_DEV_LOOP=y
++# CONFIG_BLK_DEV_CRYPTOLOOP is not set
++CONFIG_BLK_DEV_NBD=m
++# CONFIG_BLK_DEV_SX8 is not set
++CONFIG_BLK_DEV_UB=m
++CONFIG_BLK_DEV_RAM=y
++CONFIG_BLK_DEV_RAM_COUNT=16
++CONFIG_BLK_DEV_RAM_SIZE=4096
++# CONFIG_BLK_DEV_XIP is not set
++CONFIG_CDROM_PKTCDVD=m
++CONFIG_CDROM_PKTCDVD_BUFFERS=8
++# CONFIG_CDROM_PKTCDVD_WCACHE is not set
++CONFIG_ATA_OVER_ETH=m
++# CONFIG_MG_DISK is not set
++CONFIG_MISC_DEVICES=y
++# CONFIG_PHANTOM is not set
++# CONFIG_SGI_IOC4 is not set
++# CONFIG_TIFM_CORE is not set
++# CONFIG_ICS932S401 is not set
++# CONFIG_ENCLOSURE_SERVICES is not set
++# CONFIG_HP_ILO is not set
++# CONFIG_ISL29003 is not set
++# CONFIG_C2PORT is not set
++
++#
++# EEPROM support
++#
++# CONFIG_EEPROM_AT24 is not set
++# CONFIG_EEPROM_AT25 is not set
++# CONFIG_EEPROM_LEGACY is not set
++# CONFIG_EEPROM_MAX6875 is not set
++CONFIG_EEPROM_93CX6=m
++# CONFIG_CB710_CORE is not set
++CONFIG_HAVE_IDE=y
++# CONFIG_IDE is not set
++
++#
++# SCSI device support
++#
++# CONFIG_RAID_ATTRS is not set
++CONFIG_SCSI=y
++CONFIG_SCSI_DMA=y
++# CONFIG_SCSI_TGT is not set
++# CONFIG_SCSI_NETLINK is not set
++CONFIG_SCSI_PROC_FS=y
++
++#
++# SCSI support type (disk, tape, CD-ROM)
++#
++CONFIG_BLK_DEV_SD=y
++CONFIG_CHR_DEV_ST=m
++# CONFIG_CHR_DEV_OSST is not set
++CONFIG_BLK_DEV_SR=m
++# CONFIG_BLK_DEV_SR_VENDOR is not set
++CONFIG_CHR_DEV_SG=y
++# CONFIG_CHR_DEV_SCH is not set
++CONFIG_SCSI_MULTI_LUN=y
++# CONFIG_SCSI_CONSTANTS is not set
++# CONFIG_SCSI_LOGGING is not set
++# CONFIG_SCSI_SCAN_ASYNC is not set
++CONFIG_SCSI_WAIT_SCAN=m
++
++#
++# SCSI Transports
++#
++# CONFIG_SCSI_SPI_ATTRS is not set
++# CONFIG_SCSI_FC_ATTRS is not set
++CONFIG_SCSI_ISCSI_ATTRS=m
++# CONFIG_SCSI_SAS_ATTRS is not set
++# CONFIG_SCSI_SAS_LIBSAS is not set
++# CONFIG_SCSI_SRP_ATTRS is not set
++CONFIG_SCSI_LOWLEVEL=y
++CONFIG_ISCSI_TCP=m
++# CONFIG_SCSI_BNX2_ISCSI is not set
++# CONFIG_BE2ISCSI is not set
++# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
++# CONFIG_SCSI_3W_9XXX is not set
++# CONFIG_SCSI_ACARD is not set
++# CONFIG_SCSI_AACRAID is not set
++# CONFIG_SCSI_AIC7XXX is not set
++# CONFIG_SCSI_AIC7XXX_OLD is not set
++# CONFIG_SCSI_AIC79XX is not set
++# CONFIG_SCSI_AIC94XX is not set
++# CONFIG_SCSI_MVSAS is not set
++# CONFIG_SCSI_DPT_I2O is not set
++# CONFIG_SCSI_ADVANSYS is not set
++# CONFIG_SCSI_ARCMSR is not set
++# CONFIG_MEGARAID_NEWGEN is not set
++# CONFIG_MEGARAID_LEGACY is not set
++# CONFIG_MEGARAID_SAS is not set
++# CONFIG_SCSI_MPT2SAS is not set
++# CONFIG_SCSI_HPTIOP is not set
++# CONFIG_LIBFC is not set
++# CONFIG_LIBFCOE is not set
++# CONFIG_FCOE is not set
++# CONFIG_SCSI_DMX3191D is not set
++# CONFIG_SCSI_FUTURE_DOMAIN is not set
++# CONFIG_SCSI_IPS is not set
++# CONFIG_SCSI_INITIO is not set
++# CONFIG_SCSI_INIA100 is not set
++# CONFIG_SCSI_STEX is not set
++# CONFIG_SCSI_SYM53C8XX_2 is not set
++# CONFIG_SCSI_IPR is not set
++# CONFIG_SCSI_QLOGIC_1280 is not set
++# CONFIG_SCSI_QLA_FC is not set
++# CONFIG_SCSI_QLA_ISCSI is not set
++# CONFIG_SCSI_LPFC is not set
++# CONFIG_SCSI_DC395x is not set
++# CONFIG_SCSI_DC390T is not set
++# CONFIG_SCSI_NSP32 is not set
++# CONFIG_SCSI_DEBUG is not set
++# CONFIG_SCSI_PMCRAID is not set
++# CONFIG_SCSI_SRP is not set
++# CONFIG_SCSI_BFA_FC is not set
++# CONFIG_SCSI_DH is not set
++# CONFIG_SCSI_OSD_INITIATOR is not set
++CONFIG_ATA=y
++# CONFIG_ATA_NONSTANDARD is not set
++CONFIG_ATA_VERBOSE_ERROR=y
++CONFIG_SATA_PMP=y
++CONFIG_SATA_AHCI=y
++# CONFIG_SATA_SIL24 is not set
++CONFIG_ATA_SFF=y
++# CONFIG_SATA_SVW is not set
++# CONFIG_ATA_PIIX is not set
++CONFIG_SATA_MV=y
++# CONFIG_SATA_NV is not set
++# CONFIG_PDC_ADMA is not set
++# CONFIG_SATA_QSTOR is not set
++# CONFIG_SATA_PROMISE is not set
++# CONFIG_SATA_SX4 is not set
++# CONFIG_SATA_SIL is not set
++# CONFIG_SATA_SIS is not set
++# CONFIG_SATA_ULI is not set
++# CONFIG_SATA_VIA is not set
++# CONFIG_SATA_VITESSE is not set
++# CONFIG_SATA_INIC162X is not set
++# CONFIG_PATA_ALI is not set
++# CONFIG_PATA_AMD is not set
++# CONFIG_PATA_ARTOP is not set
++# CONFIG_PATA_ATP867X is not set
++# CONFIG_PATA_ATIIXP is not set
++# CONFIG_PATA_CMD640_PCI is not set
++# CONFIG_PATA_CMD64X is not set
++# CONFIG_PATA_CS5520 is not set
++# CONFIG_PATA_CS5530 is not set
++# CONFIG_PATA_CYPRESS is not set
++# CONFIG_PATA_EFAR is not set
++# CONFIG_ATA_GENERIC is not set
++# CONFIG_PATA_HPT366 is not set
++# CONFIG_PATA_HPT37X is not set
++# CONFIG_PATA_HPT3X2N is not set
++# CONFIG_PATA_HPT3X3 is not set
++# CONFIG_PATA_IT821X is not set
++# CONFIG_PATA_IT8213 is not set
++# CONFIG_PATA_JMICRON is not set
++# CONFIG_PATA_TRIFLEX is not set
++# CONFIG_PATA_MARVELL is not set
++# CONFIG_PATA_MPIIX is not set
++# CONFIG_PATA_OLDPIIX is not set
++# CONFIG_PATA_NETCELL is not set
++# CONFIG_PATA_NINJA32 is not set
++# CONFIG_PATA_NS87410 is not set
++# CONFIG_PATA_NS87415 is not set
++# CONFIG_PATA_OPTI is not set
++# CONFIG_PATA_OPTIDMA is not set
++# CONFIG_PATA_PDC_OLD is not set
++# CONFIG_PATA_RADISYS is not set
++# CONFIG_PATA_RDC is not set
++# CONFIG_PATA_RZ1000 is not set
++# CONFIG_PATA_SC1200 is not set
++# CONFIG_PATA_SERVERWORKS is not set
++# CONFIG_PATA_PDC2027X is not set
++# CONFIG_PATA_SIL680 is not set
++# CONFIG_PATA_SIS is not set
++# CONFIG_PATA_VIA is not set
++# CONFIG_PATA_WINBOND is not set
++# CONFIG_PATA_PLATFORM is not set
++# CONFIG_PATA_SCH is not set
++CONFIG_MD=y
++CONFIG_BLK_DEV_MD=y
++CONFIG_MD_AUTODETECT=y
++CONFIG_MD_LINEAR=y
++CONFIG_MD_RAID0=y
++CONFIG_MD_RAID1=y
++# CONFIG_MD_RAID10 is not set
++CONFIG_MD_RAID456=y
++CONFIG_MD_RAID6_PQ=y
++# CONFIG_ASYNC_RAID6_TEST is not set
++# CONFIG_MD_MULTIPATH is not set
++# CONFIG_MD_FAULTY is not set
++CONFIG_BLK_DEV_DM=y
++# CONFIG_DM_DEBUG is not set
++CONFIG_DM_CRYPT=y
++# CONFIG_DM_SNAPSHOT is not set
++# CONFIG_DM_MIRROR is not set
++# CONFIG_DM_ZERO is not set
++# CONFIG_DM_MULTIPATH is not set
++# CONFIG_DM_DELAY is not set
++# CONFIG_DM_UEVENT is not set
++# CONFIG_FUSION is not set
++
++#
++# IEEE 1394 (FireWire) support
++#
++
++#
++# You can enable one or both FireWire driver stacks.
++#
++
++#
++# See the help texts for more information.
++#
++# CONFIG_FIREWIRE is not set
++# CONFIG_IEEE1394 is not set
++# CONFIG_I2O is not set
++CONFIG_NETDEVICES=y
++# CONFIG_DUMMY is not set
++# CONFIG_BONDING is not set
++# CONFIG_MACVLAN is not set
++# CONFIG_EQUALIZER is not set
++CONFIG_TUN=m
++# CONFIG_VETH is not set
++# CONFIG_ARCNET is not set
++CONFIG_PHYLIB=y
++
++#
++# MII PHY device drivers
++#
++CONFIG_MARVELL_PHY=y
++# CONFIG_DAVICOM_PHY is not set
++# CONFIG_QSEMI_PHY is not set
++# CONFIG_LXT_PHY is not set
++# CONFIG_CICADA_PHY is not set
++# CONFIG_VITESSE_PHY is not set
++# CONFIG_SMSC_PHY is not set
++# CONFIG_BROADCOM_PHY is not set
++# CONFIG_ICPLUS_PHY is not set
++# CONFIG_REALTEK_PHY is not set
++# CONFIG_NATIONAL_PHY is not set
++# CONFIG_STE10XP is not set
++# CONFIG_LSI_ET1011C_PHY is not set
++# CONFIG_FIXED_PHY is not set
++# CONFIG_MDIO_BITBANG is not set
++CONFIG_NET_ETHERNET=y
++CONFIG_MII=y
++# CONFIG_AX88796 is not set
++# CONFIG_HAPPYMEAL is not set
++# CONFIG_SUNGEM is not set
++# CONFIG_CASSINI is not set
++# CONFIG_NET_VENDOR_3COM is not set
++# CONFIG_SMC91X is not set
++# CONFIG_DM9000 is not set
++# CONFIG_ENC28J60 is not set
++# CONFIG_ETHOC is not set
++# CONFIG_SMC911X is not set
++# CONFIG_SMSC911X is not set
++# CONFIG_DNET is not set
++# CONFIG_NET_TULIP is not set
++# CONFIG_HP100 is not set
++# CONFIG_IBM_NEW_EMAC_ZMII is not set
++# CONFIG_IBM_NEW_EMAC_RGMII is not set
++# CONFIG_IBM_NEW_EMAC_TAH is not set
++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
++CONFIG_NET_PCI=y
++# CONFIG_PCNET32 is not set
++# CONFIG_AMD8111_ETH is not set
++# CONFIG_ADAPTEC_STARFIRE is not set
++# CONFIG_B44 is not set
++# CONFIG_FORCEDETH is not set
++CONFIG_E100=y
++# CONFIG_FEALNX is not set
++# CONFIG_NATSEMI is not set
++# CONFIG_NE2K_PCI is not set
++# CONFIG_8139CP is not set
++# CONFIG_8139TOO is not set
++# CONFIG_R6040 is not set
++# CONFIG_SIS900 is not set
++# CONFIG_EPIC100 is not set
++# CONFIG_SMSC9420 is not set
++# CONFIG_SUNDANCE is not set
++# CONFIG_TLAN is not set
++# CONFIG_KS8842 is not set
++# CONFIG_KS8851 is not set
++# CONFIG_KS8851_MLL is not set
++# CONFIG_VIA_RHINE is not set
++# CONFIG_SC92031 is not set
++# CONFIG_ATL2 is not set
++CONFIG_NETDEV_1000=y
++# CONFIG_ACENIC is not set
++# CONFIG_DL2K is not set
++CONFIG_E1000=y
++# CONFIG_E1000E is not set
++# CONFIG_IP1000 is not set
++# CONFIG_IGB is not set
++# CONFIG_IGBVF is not set
++# CONFIG_NS83820 is not set
++# CONFIG_HAMACHI is not set
++# CONFIG_YELLOWFIN is not set
++# CONFIG_R8169 is not set
++# CONFIG_SIS190 is not set
++# CONFIG_SKGE is not set
++# CONFIG_SKY2 is not set
++# CONFIG_VIA_VELOCITY is not set
++# CONFIG_TIGON3 is not set
++# CONFIG_BNX2 is not set
++# CONFIG_CNIC is not set
++CONFIG_MV643XX_ETH=y
++# CONFIG_QLA3XXX is not set
++# CONFIG_ATL1 is not set
++# CONFIG_ATL1E is not set
++# CONFIG_ATL1C is not set
++# CONFIG_JME is not set
++# CONFIG_NETDEV_10000 is not set
++# CONFIG_TR is not set
++CONFIG_WLAN=y
++# CONFIG_WLAN_PRE80211 is not set
++CONFIG_WLAN_80211=y
++CONFIG_LIBERTAS=y
++# CONFIG_LIBERTAS_USB is not set
++CONFIG_LIBERTAS_SDIO=y
++# CONFIG_LIBERTAS_SPI is not set
++# CONFIG_LIBERTAS_DEBUG is not set
++# CONFIG_LIBERTAS_THINFIRM is not set
++CONFIG_ATMEL=m
++CONFIG_PCI_ATMEL=m
++CONFIG_AT76C50X_USB=m
++CONFIG_PRISM54=m
++CONFIG_USB_ZD1201=m
++CONFIG_USB_NET_RNDIS_WLAN=m
++CONFIG_RTL8180=m
++CONFIG_RTL8187=m
++CONFIG_RTL8187_LEDS=y
++CONFIG_ADM8211=m
++CONFIG_MAC80211_HWSIM=m
++CONFIG_MWL8K=m
++CONFIG_P54_COMMON=m
++CONFIG_P54_USB=m
++CONFIG_P54_PCI=m
++CONFIG_P54_SPI=m
++CONFIG_P54_LEDS=y
++CONFIG_ATH_COMMON=m
++# CONFIG_ATH5K is not set
++# CONFIG_ATH9K is not set
++# CONFIG_AR9170_USB is not set
++CONFIG_IPW2100=m
++CONFIG_IPW2100_MONITOR=y
++# CONFIG_IPW2100_DEBUG is not set
++CONFIG_IPW2200=m
++CONFIG_IPW2200_MONITOR=y
++CONFIG_IPW2200_RADIOTAP=y
++CONFIG_IPW2200_PROMISCUOUS=y
++CONFIG_IPW2200_QOS=y
++# CONFIG_IPW2200_DEBUG is not set
++CONFIG_LIBIPW=m
++# CONFIG_LIBIPW_DEBUG is not set
++CONFIG_IWLWIFI=m
++CONFIG_IWLWIFI_LEDS=y
++# CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT is not set
++# CONFIG_IWLWIFI_DEBUG is not set
++CONFIG_IWLAGN=m
++# CONFIG_IWL4965 is not set
++# CONFIG_IWL5000 is not set
++CONFIG_IWL3945=m
++# CONFIG_IWL3945_SPECTRUM_MEASUREMENT is not set
++CONFIG_HOSTAP=m
++# CONFIG_HOSTAP_FIRMWARE is not set
++# CONFIG_HOSTAP_PLX is not set
++# CONFIG_HOSTAP_PCI is not set
++CONFIG_B43=m
++CONFIG_B43_PCI_AUTOSELECT=y
++CONFIG_B43_PCICORE_AUTOSELECT=y
++# CONFIG_B43_SDIO is not set
++CONFIG_B43_PHY_LP=y
++CONFIG_B43_LEDS=y
++CONFIG_B43_HWRNG=y
++# CONFIG_B43_DEBUG is not set
++CONFIG_B43LEGACY=m
++CONFIG_B43LEGACY_PCI_AUTOSELECT=y
++CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
++CONFIG_B43LEGACY_LEDS=y
++CONFIG_B43LEGACY_HWRNG=y
++CONFIG_B43LEGACY_DEBUG=y
++CONFIG_B43LEGACY_DMA=y
++CONFIG_B43LEGACY_PIO=y
++CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
++# CONFIG_B43LEGACY_DMA_MODE is not set
++# CONFIG_B43LEGACY_PIO_MODE is not set
++CONFIG_ZD1211RW=m
++# CONFIG_ZD1211RW_DEBUG is not set
++CONFIG_RT2X00=m
++# CONFIG_RT2400PCI is not set
++# CONFIG_RT2500PCI is not set
++# CONFIG_RT61PCI is not set
++CONFIG_RT2500USB=m
++CONFIG_RT73USB=m
++CONFIG_RT2800USB=m
++CONFIG_RT2X00_LIB_USB=m
++CONFIG_RT2X00_LIB=m
++CONFIG_RT2X00_LIB_HT=y
++CONFIG_RT2X00_LIB_FIRMWARE=y
++CONFIG_RT2X00_LIB_CRYPTO=y
++CONFIG_RT2X00_LIB_LEDS=y
++# CONFIG_RT2X00_DEBUG is not set
++CONFIG_HERMES=m
++CONFIG_HERMES_CACHE_FW_ON_INIT=y
++# CONFIG_PLX_HERMES is not set
++# CONFIG_TMD_HERMES is not set
++# CONFIG_NORTEL_HERMES is not set
++# CONFIG_PCI_HERMES is not set
++CONFIG_WL12XX=m
++# CONFIG_WL1251 is not set
++# CONFIG_WL1271 is not set
++CONFIG_IWM=m
++
++#
++# Enable WiMAX (Networking options) to see the WiMAX drivers
++#
++
++#
++# USB Network Adapters
++#
++CONFIG_USB_CATC=m
++CONFIG_USB_KAWETH=m
++CONFIG_USB_PEGASUS=m
++CONFIG_USB_RTL8150=m
++CONFIG_USB_USBNET=m
++CONFIG_USB_NET_AX8817X=m
++CONFIG_USB_NET_CDCETHER=m
++CONFIG_USB_NET_CDC_EEM=m
++CONFIG_USB_NET_DM9601=m
++CONFIG_USB_NET_SMSC95XX=m
++CONFIG_USB_NET_GL620A=m
++CONFIG_USB_NET_NET1080=m
++CONFIG_USB_NET_PLUSB=m
++CONFIG_USB_NET_MCS7830=m
++CONFIG_USB_NET_RNDIS_HOST=m
++CONFIG_USB_NET_CDC_SUBSET=m
++# CONFIG_USB_ALI_M5632 is not set
++# CONFIG_USB_AN2720 is not set
++# CONFIG_USB_BELKIN is not set
++CONFIG_USB_ARMLINUX=y
++# CONFIG_USB_EPSON2888 is not set
++# CONFIG_USB_KC2190 is not set
++CONFIG_USB_NET_ZAURUS=m
++CONFIG_USB_NET_INT51X1=m
++# CONFIG_WAN is not set
++# CONFIG_FDDI is not set
++# CONFIG_HIPPI is not set
++# CONFIG_PPP is not set
++# CONFIG_SLIP is not set
++# CONFIG_NET_FC is not set
++CONFIG_NETCONSOLE=m
++CONFIG_NETCONSOLE_DYNAMIC=y
++CONFIG_NETPOLL=y
++CONFIG_NETPOLL_TRAP=y
++CONFIG_NET_POLL_CONTROLLER=y
++# CONFIG_ISDN is not set
++CONFIG_PHONE=y
++# CONFIG_PHONE_IXJ is not set
++
++#
++# Input device support
++#
++CONFIG_INPUT=y
++# CONFIG_INPUT_FF_MEMLESS is not set
++# CONFIG_INPUT_POLLDEV is not set
++
++#
++# Userland interfaces
++#
++CONFIG_INPUT_MOUSEDEV=y
++CONFIG_INPUT_MOUSEDEV_PSAUX=y
++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
++CONFIG_INPUT_JOYDEV=m
++CONFIG_INPUT_EVDEV=y
++# CONFIG_INPUT_EVBUG is not set
++
++#
++# Input Device Drivers
++#
++CONFIG_INPUT_KEYBOARD=y
++# CONFIG_KEYBOARD_ADP5588 is not set
++CONFIG_KEYBOARD_ATKBD=y
++# CONFIG_QT2160 is not set
++# CONFIG_KEYBOARD_LKKBD is not set
++CONFIG_KEYBOARD_GPIO=y
++# CONFIG_KEYBOARD_MATRIX is not set
++# CONFIG_KEYBOARD_LM8323 is not set
++# CONFIG_KEYBOARD_MAX7359 is not set
++# CONFIG_KEYBOARD_NEWTON is not set
++# CONFIG_KEYBOARD_OPENCORES is not set
++# CONFIG_KEYBOARD_STOWAWAY is not set
++# CONFIG_KEYBOARD_SUNKBD is not set
++# CONFIG_KEYBOARD_XTKBD is not set
++CONFIG_INPUT_MOUSE=y
++CONFIG_MOUSE_PS2=y
++CONFIG_MOUSE_PS2_ALPS=y
++CONFIG_MOUSE_PS2_LOGIPS2PP=y
++CONFIG_MOUSE_PS2_SYNAPTICS=y
++CONFIG_MOUSE_PS2_TRACKPOINT=y
++# CONFIG_MOUSE_PS2_ELANTECH is not set
++# CONFIG_MOUSE_PS2_SENTELIC is not set
++# CONFIG_MOUSE_PS2_TOUCHKIT is not set
++CONFIG_MOUSE_SERIAL=m
++# CONFIG_MOUSE_APPLETOUCH is not set
++# CONFIG_MOUSE_BCM5974 is not set
++# CONFIG_MOUSE_VSXXXAA is not set
++# CONFIG_MOUSE_GPIO is not set
++# CONFIG_MOUSE_SYNAPTICS_I2C is not set
++# CONFIG_INPUT_JOYSTICK is not set
++# CONFIG_INPUT_TABLET is not set
++# CONFIG_INPUT_TOUCHSCREEN is not set
++CONFIG_INPUT_MISC=y
++CONFIG_INPUT_ATI_REMOTE=m
++CONFIG_INPUT_ATI_REMOTE2=m
++CONFIG_INPUT_KEYSPAN_REMOTE=m
++# CONFIG_INPUT_POWERMATE is not set
++CONFIG_INPUT_YEALINK=m
++CONFIG_INPUT_CM109=m
++CONFIG_INPUT_UINPUT=m
++# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
++
++#
++# Hardware I/O ports
++#
++CONFIG_SERIO=y
++CONFIG_SERIO_SERPORT=y
++# CONFIG_SERIO_PCIPS2 is not set
++CONFIG_SERIO_LIBPS2=y
++# CONFIG_SERIO_RAW is not set
++# CONFIG_GAMEPORT is not set
++
++#
++# Character devices
++#
++CONFIG_VT=y
++CONFIG_CONSOLE_TRANSLATIONS=y
++CONFIG_VT_CONSOLE=y
++CONFIG_HW_CONSOLE=y
++# CONFIG_VT_HW_CONSOLE_BINDING is not set
++# CONFIG_DEVKMEM is not set
++# CONFIG_SERIAL_NONSTANDARD is not set
++# CONFIG_NOZOMI is not set
++
++#
++# Serial drivers
++#
++CONFIG_SERIAL_8250=y
++CONFIG_SERIAL_8250_CONSOLE=y
++CONFIG_SERIAL_8250_PCI=y
++CONFIG_SERIAL_8250_NR_UARTS=4
++CONFIG_SERIAL_8250_RUNTIME_UARTS=2
++# CONFIG_SERIAL_8250_EXTENDED is not set
++
++#
++# Non-8250 serial port support
++#
++# CONFIG_SERIAL_MAX3100 is not set
++CONFIG_SERIAL_CORE=y
++CONFIG_SERIAL_CORE_CONSOLE=y
++# CONFIG_SERIAL_JSM is not set
++CONFIG_UNIX98_PTYS=y
++# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
++CONFIG_LEGACY_PTYS=y
++CONFIG_LEGACY_PTY_COUNT=16
++# CONFIG_IPMI_HANDLER is not set
++CONFIG_HW_RANDOM=m
++# CONFIG_HW_RANDOM_TIMERIOMEM is not set
++# CONFIG_R3964 is not set
++# CONFIG_APPLICOM is not set
++# CONFIG_RAW_DRIVER is not set
++# CONFIG_TCG_TPM is not set
++CONFIG_DEVPORT=y
++CONFIG_I2C=y
++CONFIG_I2C_BOARDINFO=y
++CONFIG_I2C_COMPAT=y
++CONFIG_I2C_CHARDEV=y
++CONFIG_I2C_HELPER_AUTO=y
++
++#
++# I2C Hardware Bus support
++#
++
++#
++# PC SMBus host controller drivers
++#
++# CONFIG_I2C_ALI1535 is not set
++# CONFIG_I2C_ALI1563 is not set
++# CONFIG_I2C_ALI15X3 is not set
++# CONFIG_I2C_AMD756 is not set
++# CONFIG_I2C_AMD8111 is not set
++# CONFIG_I2C_I801 is not set
++# CONFIG_I2C_ISCH is not set
++# CONFIG_I2C_PIIX4 is not set
++# CONFIG_I2C_NFORCE2 is not set
++# CONFIG_I2C_SIS5595 is not set
++# CONFIG_I2C_SIS630 is not set
++# CONFIG_I2C_SIS96X is not set
++# CONFIG_I2C_VIA is not set
++# CONFIG_I2C_VIAPRO is not set
++
++#
++# I2C system bus drivers (mostly embedded / system-on-chip)
++#
++# CONFIG_I2C_GPIO is not set
++CONFIG_I2C_MV64XXX=y
++# CONFIG_I2C_OCORES is not set
++# CONFIG_I2C_SIMTEC is not set
++
++#
++# External I2C/SMBus adapter drivers
++#
++# CONFIG_I2C_PARPORT_LIGHT is not set
++# CONFIG_I2C_TAOS_EVM is not set
++# CONFIG_I2C_TINY_USB is not set
++
++#
++# Graphics adapter I2C/DDC channel drivers
++#
++# CONFIG_I2C_VOODOO3 is not set
++
++#
++# Other I2C/SMBus bus drivers
++#
++# CONFIG_I2C_PCA_PLATFORM is not set
++# CONFIG_I2C_STUB is not set
++
++#
++# Miscellaneous I2C Chip support
++#
++# CONFIG_DS1682 is not set
++# CONFIG_SENSORS_TSL2550 is not set
++# CONFIG_I2C_DEBUG_CORE is not set
++# CONFIG_I2C_DEBUG_ALGO is not set
++# CONFIG_I2C_DEBUG_BUS is not set
++# CONFIG_I2C_DEBUG_CHIP is not set
++CONFIG_SPI=y
++CONFIG_SPI_MASTER=y
++
++#
++# SPI Master Controller Drivers
++#
++# CONFIG_SPI_BITBANG is not set
++# CONFIG_SPI_GPIO is not set
++CONFIG_SPI_ORION=y
++
++#
++# SPI Protocol Masters
++#
++# CONFIG_SPI_SPIDEV is not set
++# CONFIG_SPI_TLE62X0 is not set
++
++#
++# PPS support
++#
++# CONFIG_PPS is not set
++CONFIG_ARCH_REQUIRE_GPIOLIB=y
++CONFIG_GPIOLIB=y
++# CONFIG_GPIO_SYSFS is not set
++
++#
++# Memory mapped GPIO expanders:
++#
++
++#
++# I2C GPIO expanders:
++#
++# CONFIG_GPIO_MAX732X is not set
++# CONFIG_GPIO_PCA953X is not set
++# CONFIG_GPIO_PCF857X is not set
++
++#
++# PCI GPIO expanders:
++#
++# CONFIG_GPIO_BT8XX is not set
++# CONFIG_GPIO_LANGWELL is not set
++
++#
++# SPI GPIO expanders:
++#
++# CONFIG_GPIO_MAX7301 is not set
++# CONFIG_GPIO_MCP23S08 is not set
++# CONFIG_GPIO_MC33880 is not set
++
++#
++# AC97 GPIO expanders:
++#
++# CONFIG_W1 is not set
++# CONFIG_POWER_SUPPLY is not set
++# CONFIG_HWMON is not set
++# CONFIG_THERMAL is not set
++# CONFIG_WATCHDOG is not set
++CONFIG_SSB_POSSIBLE=y
++
++#
++# Sonics Silicon Backplane
++#
++CONFIG_SSB=m
++CONFIG_SSB_SPROM=y
++CONFIG_SSB_PCIHOST_POSSIBLE=y
++CONFIG_SSB_PCIHOST=y
++CONFIG_SSB_B43_PCI_BRIDGE=y
++CONFIG_SSB_SDIOHOST_POSSIBLE=y
++# CONFIG_SSB_SDIOHOST is not set
++# CONFIG_SSB_SILENT is not set
++# CONFIG_SSB_DEBUG is not set
++CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
++CONFIG_SSB_DRIVER_PCICORE=y
++
++#
++# Multifunction device drivers
++#
++# CONFIG_MFD_CORE is not set
++# CONFIG_MFD_SM501 is not set
++# CONFIG_MFD_ASIC3 is not set
++# CONFIG_HTC_EGPIO is not set
++# CONFIG_HTC_PASIC3 is not set
++# CONFIG_TPS65010 is not set
++# CONFIG_TWL4030_CORE is not set
++# CONFIG_MFD_TMIO is not set
++# CONFIG_MFD_TC6393XB is not set
++# CONFIG_PMIC_DA903X is not set
++# CONFIG_MFD_WM8400 is not set
++# CONFIG_MFD_WM831X is not set
++# CONFIG_MFD_WM8350_I2C is not set
++# CONFIG_MFD_PCF50633 is not set
++# CONFIG_MFD_MC13783 is not set
++# CONFIG_AB3100_CORE is not set
++# CONFIG_EZX_PCAP is not set
++# CONFIG_REGULATOR is not set
++CONFIG_MEDIA_SUPPORT=m
++
++#
++# Multimedia core support
++#
++CONFIG_VIDEO_DEV=m
++CONFIG_VIDEO_V4L2_COMMON=m
++CONFIG_VIDEO_ALLOW_V4L1=y
++CONFIG_VIDEO_V4L1_COMPAT=y
++# CONFIG_DVB_CORE is not set
++CONFIG_VIDEO_MEDIA=m
++
++#
++# Multimedia drivers
++#
++CONFIG_MEDIA_ATTACH=y
++CONFIG_MEDIA_TUNER=m
++CONFIG_MEDIA_TUNER_CUSTOMISE=y
++CONFIG_MEDIA_TUNER_SIMPLE=m
++CONFIG_MEDIA_TUNER_TDA8290=m
++CONFIG_MEDIA_TUNER_TDA827X=m
++CONFIG_MEDIA_TUNER_TDA18271=m
++CONFIG_MEDIA_TUNER_TDA9887=m
++CONFIG_MEDIA_TUNER_TEA5761=m
++CONFIG_MEDIA_TUNER_TEA5767=m
++CONFIG_MEDIA_TUNER_MT20XX=m
++CONFIG_MEDIA_TUNER_MT2060=m
++CONFIG_MEDIA_TUNER_MT2266=m
++CONFIG_MEDIA_TUNER_MT2131=m
++CONFIG_MEDIA_TUNER_QT1010=m
++CONFIG_MEDIA_TUNER_XC2028=m
++CONFIG_MEDIA_TUNER_XC5000=m
++CONFIG_MEDIA_TUNER_MXL5005S=m
++CONFIG_MEDIA_TUNER_MXL5007T=m
++CONFIG_MEDIA_TUNER_MC44S803=m
++CONFIG_VIDEO_V4L2=m
++CONFIG_VIDEO_V4L1=m
++CONFIG_VIDEOBUF_GEN=m
++CONFIG_VIDEOBUF_VMALLOC=m
++CONFIG_VIDEO_IR=m
++CONFIG_VIDEO_TVEEPROM=m
++CONFIG_VIDEO_TUNER=m
++CONFIG_VIDEO_CAPTURE_DRIVERS=y
++# CONFIG_VIDEO_ADV_DEBUG is not set
++# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
++CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
++CONFIG_VIDEO_IR_I2C=m
++CONFIG_VIDEO_MSP3400=m
++CONFIG_VIDEO_CS53L32A=m
++CONFIG_VIDEO_WM8775=m
++CONFIG_VIDEO_MT9V011=m
++CONFIG_VIDEO_SAA711X=m
++CONFIG_VIDEO_TVP5150=m
++CONFIG_VIDEO_CX25840=m
++CONFIG_VIDEO_CX2341X=m
++# CONFIG_VIDEO_VIVI is not set
++# CONFIG_VIDEO_BT848 is not set
++# CONFIG_VIDEO_CPIA is not set
++# CONFIG_VIDEO_CPIA2 is not set
++# CONFIG_VIDEO_SAA5246A is not set
++# CONFIG_VIDEO_SAA5249 is not set
++# CONFIG_VIDEO_STRADIS is not set
++# CONFIG_VIDEO_SAA7134 is not set
++# CONFIG_VIDEO_MXB is not set
++# CONFIG_VIDEO_HEXIUM_ORION is not set
++# CONFIG_VIDEO_HEXIUM_GEMINI is not set
++# CONFIG_VIDEO_CX88 is not set
++# CONFIG_VIDEO_IVTV is not set
++# CONFIG_VIDEO_CAFE_CCIC is not set
++# CONFIG_SOC_CAMERA is not set
++CONFIG_V4L_USB_DRIVERS=y
++# CONFIG_USB_VIDEO_CLASS is not set
++CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
++CONFIG_USB_GSPCA=m
++# CONFIG_USB_M5602 is not set
++# CONFIG_USB_STV06XX is not set
++# CONFIG_USB_GL860 is not set
++# CONFIG_USB_GSPCA_CONEX is not set
++# CONFIG_USB_GSPCA_ETOMS is not set
++# CONFIG_USB_GSPCA_FINEPIX is not set
++# CONFIG_USB_GSPCA_JEILINJ is not set
++# CONFIG_USB_GSPCA_MARS is not set
++# CONFIG_USB_GSPCA_MR97310A is not set
++# CONFIG_USB_GSPCA_OV519 is not set
++# CONFIG_USB_GSPCA_OV534 is not set
++# CONFIG_USB_GSPCA_PAC207 is not set
++# CONFIG_USB_GSPCA_PAC7311 is not set
++# CONFIG_USB_GSPCA_SN9C20X is not set
++# CONFIG_USB_GSPCA_SONIXB is not set
++# CONFIG_USB_GSPCA_SONIXJ is not set
++# CONFIG_USB_GSPCA_SPCA500 is not set
++# CONFIG_USB_GSPCA_SPCA501 is not set
++# CONFIG_USB_GSPCA_SPCA505 is not set
++# CONFIG_USB_GSPCA_SPCA506 is not set
++# CONFIG_USB_GSPCA_SPCA508 is not set
++# CONFIG_USB_GSPCA_SPCA561 is not set
++# CONFIG_USB_GSPCA_SQ905 is not set
++# CONFIG_USB_GSPCA_SQ905C is not set
++# CONFIG_USB_GSPCA_STK014 is not set
++# CONFIG_USB_GSPCA_SUNPLUS is not set
++# CONFIG_USB_GSPCA_T613 is not set
++# CONFIG_USB_GSPCA_TV8532 is not set
++# CONFIG_USB_GSPCA_VC032X is not set
++# CONFIG_USB_GSPCA_ZC3XX is not set
++CONFIG_VIDEO_PVRUSB2=m
++CONFIG_VIDEO_PVRUSB2_SYSFS=y
++# CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
++CONFIG_VIDEO_HDPVR=m
++CONFIG_VIDEO_EM28XX=m
++CONFIG_VIDEO_EM28XX_ALSA=m
++CONFIG_VIDEO_CX231XX=m
++CONFIG_VIDEO_CX231XX_ALSA=m
++CONFIG_VIDEO_USBVISION=m
++CONFIG_VIDEO_USBVIDEO=m
++CONFIG_USB_VICAM=m
++CONFIG_USB_IBMCAM=m
++CONFIG_USB_KONICAWC=m
++CONFIG_USB_QUICKCAM_MESSENGER=m
++CONFIG_USB_ET61X251=m
++CONFIG_VIDEO_OVCAMCHIP=m
++CONFIG_USB_W9968CF=m
++CONFIG_USB_OV511=m
++CONFIG_USB_SE401=m
++CONFIG_USB_SN9C102=m
++CONFIG_USB_STV680=m
++CONFIG_USB_ZC0301=m
++CONFIG_USB_PWC=m
++# CONFIG_USB_PWC_DEBUG is not set
++CONFIG_USB_PWC_INPUT_EVDEV=y
++CONFIG_USB_ZR364XX=m
++CONFIG_USB_STKWEBCAM=m
++CONFIG_USB_S2255=m
++CONFIG_RADIO_ADAPTERS=y
++# CONFIG_RADIO_GEMTEK_PCI is not set
++# CONFIG_RADIO_MAXIRADIO is not set
++# CONFIG_RADIO_MAESTRO is not set
++# CONFIG_I2C_SI4713 is not set
++# CONFIG_RADIO_SI4713 is not set
++# CONFIG_USB_DSBR is not set
++# CONFIG_RADIO_SI470X is not set
++# CONFIG_USB_MR800 is not set
++# CONFIG_RADIO_TEA5764 is not set
++# CONFIG_DAB is not set
++
++#
++# Graphics support
++#
++CONFIG_VGA_ARB=y
++# CONFIG_DRM is not set
++# CONFIG_VGASTATE is not set
++# CONFIG_VIDEO_OUTPUT_CONTROL is not set
++CONFIG_FB=y
++# CONFIG_FIRMWARE_EDID is not set
++# CONFIG_FB_DDC is not set
++# CONFIG_FB_BOOT_VESA_SUPPORT is not set
++# CONFIG_FB_CFB_FILLRECT is not set
++# CONFIG_FB_CFB_COPYAREA is not set
++# CONFIG_FB_CFB_IMAGEBLIT is not set
++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
++# CONFIG_FB_SYS_FILLRECT is not set
++# CONFIG_FB_SYS_COPYAREA is not set
++# CONFIG_FB_SYS_IMAGEBLIT is not set
++# CONFIG_FB_FOREIGN_ENDIAN is not set
++# CONFIG_FB_SYS_FOPS is not set
++# CONFIG_FB_SVGALIB is not set
++# CONFIG_FB_MACMODES is not set
++# CONFIG_FB_BACKLIGHT is not set
++# CONFIG_FB_MODE_HELPERS is not set
++# CONFIG_FB_TILEBLITTING is not set
++
++#
++# Frame buffer hardware drivers
++#
++# CONFIG_FB_CIRRUS is not set
++# CONFIG_FB_PM2 is not set
++# CONFIG_FB_CYBER2000 is not set
++# CONFIG_FB_ASILIANT is not set
++# CONFIG_FB_IMSTT is not set
++# CONFIG_FB_S1D13XXX is not set
++# CONFIG_FB_NVIDIA is not set
++# CONFIG_FB_RIVA is not set
++# CONFIG_FB_MATROX is not set
++# CONFIG_FB_RADEON is not set
++# CONFIG_FB_ATY128 is not set
++# CONFIG_FB_ATY is not set
++# CONFIG_FB_S3 is not set
++# CONFIG_FB_SAVAGE is not set
++# CONFIG_FB_SIS is not set
++# CONFIG_FB_VIA is not set
++# CONFIG_FB_NEOMAGIC is not set
++# CONFIG_FB_KYRO is not set
++# CONFIG_FB_3DFX is not set
++# CONFIG_FB_VOODOO1 is not set
++# CONFIG_FB_VT8623 is not set
++# CONFIG_FB_TRIDENT is not set
++# CONFIG_FB_ARK is not set
++# CONFIG_FB_PM3 is not set
++# CONFIG_FB_CARMINE is not set
++# CONFIG_FB_VIRTUAL is not set
++# CONFIG_FB_METRONOME is not set
++# CONFIG_FB_MB862XX is not set
++# CONFIG_FB_BROADSHEET is not set
++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
++
++#
++# Display device support
++#
++# CONFIG_DISPLAY_SUPPORT is not set
++
++#
++# Console display driver support
++#
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_DUMMY_CONSOLE=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
++# CONFIG_FONTS is not set
++CONFIG_FONT_8x8=y
++CONFIG_FONT_8x16=y
++# CONFIG_LOGO is not set
++CONFIG_SOUND=y
++CONFIG_SOUND_OSS_CORE=y
++CONFIG_SOUND_OSS_CORE_PRECLAIM=y
++CONFIG_SND=y
++CONFIG_SND_TIMER=y
++CONFIG_SND_PCM=y
++CONFIG_SND_HWDEP=m
++CONFIG_SND_RAWMIDI=m
++# CONFIG_SND_SEQUENCER is not set
++CONFIG_SND_OSSEMUL=y
++# CONFIG_SND_MIXER_OSS is not set
++CONFIG_SND_PCM_OSS=y
++CONFIG_SND_PCM_OSS_PLUGINS=y
++# CONFIG_SND_HRTIMER is not set
++# CONFIG_SND_DYNAMIC_MINORS is not set
++CONFIG_SND_SUPPORT_OLD_API=y
++CONFIG_SND_VERBOSE_PROCFS=y
++CONFIG_SND_VERBOSE_PRINTK=y
++CONFIG_SND_DEBUG=y
++# CONFIG_SND_DEBUG_VERBOSE is not set
++CONFIG_SND_PCM_XRUN_DEBUG=y
++# CONFIG_SND_RAWMIDI_SEQ is not set
++# CONFIG_SND_OPL3_LIB_SEQ is not set
++# CONFIG_SND_OPL4_LIB_SEQ is not set
++# CONFIG_SND_SBAWE_SEQ is not set
++# CONFIG_SND_EMU10K1_SEQ is not set
++CONFIG_SND_DRIVERS=y
++# CONFIG_SND_DUMMY is not set
++# CONFIG_SND_MTPAV is not set
++# CONFIG_SND_SERIAL_U16550 is not set
++# CONFIG_SND_MPU401 is not set
++CONFIG_SND_PCI=y
++# CONFIG_SND_AD1889 is not set
++# CONFIG_SND_ALS300 is not set
++# CONFIG_SND_ALI5451 is not set
++# CONFIG_SND_ATIIXP is not set
++# CONFIG_SND_ATIIXP_MODEM is not set
++# CONFIG_SND_AU8810 is not set
++# CONFIG_SND_AU8820 is not set
++# CONFIG_SND_AU8830 is not set
++# CONFIG_SND_AW2 is not set
++# CONFIG_SND_AZT3328 is not set
++# CONFIG_SND_BT87X is not set
++# CONFIG_SND_CA0106 is not set
++# CONFIG_SND_CMIPCI is not set
++# CONFIG_SND_OXYGEN is not set
++# CONFIG_SND_CS4281 is not set
++# CONFIG_SND_CS46XX is not set
++# CONFIG_SND_CTXFI is not set
++# CONFIG_SND_DARLA20 is not set
++# CONFIG_SND_GINA20 is not set
++# CONFIG_SND_LAYLA20 is not set
++# CONFIG_SND_DARLA24 is not set
++# CONFIG_SND_GINA24 is not set
++# CONFIG_SND_LAYLA24 is not set
++# CONFIG_SND_MONA is not set
++# CONFIG_SND_MIA is not set
++# CONFIG_SND_ECHO3G is not set
++# CONFIG_SND_INDIGO is not set
++# CONFIG_SND_INDIGOIO is not set
++# CONFIG_SND_INDIGODJ is not set
++# CONFIG_SND_INDIGOIOX is not set
++# CONFIG_SND_INDIGODJX is not set
++# CONFIG_SND_EMU10K1 is not set
++# CONFIG_SND_EMU10K1X is not set
++# CONFIG_SND_ENS1370 is not set
++# CONFIG_SND_ENS1371 is not set
++# CONFIG_SND_ES1938 is not set
++# CONFIG_SND_ES1968 is not set
++# CONFIG_SND_FM801 is not set
++# CONFIG_SND_HDA_INTEL is not set
++# CONFIG_SND_HDSP is not set
++# CONFIG_SND_HDSPM is not set
++# CONFIG_SND_HIFIER is not set
++# CONFIG_SND_ICE1712 is not set
++# CONFIG_SND_ICE1724 is not set
++# CONFIG_SND_INTEL8X0 is not set
++# CONFIG_SND_INTEL8X0M is not set
++# CONFIG_SND_KORG1212 is not set
++# CONFIG_SND_LX6464ES is not set
++# CONFIG_SND_MAESTRO3 is not set
++# CONFIG_SND_MIXART is not set
++# CONFIG_SND_NM256 is not set
++# CONFIG_SND_PCXHR is not set
++# CONFIG_SND_RIPTIDE is not set
++# CONFIG_SND_RME32 is not set
++# CONFIG_SND_RME96 is not set
++# CONFIG_SND_RME9652 is not set
++# CONFIG_SND_SONICVIBES is not set
++# CONFIG_SND_TRIDENT is not set
++# CONFIG_SND_VIA82XX is not set
++# CONFIG_SND_VIA82XX_MODEM is not set
++# CONFIG_SND_VIRTUOSO is not set
++# CONFIG_SND_VX222 is not set
++# CONFIG_SND_YMFPCI is not set
++CONFIG_SND_ARM=y
++CONFIG_SND_SPI=y
++CONFIG_SND_USB=y
++CONFIG_SND_USB_AUDIO=m
++# CONFIG_SND_USB_CAIAQ is not set
++# CONFIG_SND_SOC is not set
++# CONFIG_SOUND_PRIME is not set
++CONFIG_HID_SUPPORT=y
++CONFIG_HID=y
++# CONFIG_HIDRAW is not set
++
++#
++# USB Input Devices
++#
++CONFIG_USB_HID=y
++# CONFIG_HID_PID is not set
++# CONFIG_USB_HIDDEV is not set
++
++#
++# Special HID drivers
++#
++# CONFIG_HID_A4TECH is not set
++# CONFIG_HID_APPLE is not set
++# CONFIG_HID_BELKIN is not set
++# CONFIG_HID_CHERRY is not set
++# CONFIG_HID_CHICONY is not set
++# CONFIG_HID_CYPRESS is not set
++# CONFIG_HID_DRAGONRISE is not set
++# CONFIG_HID_EZKEY is not set
++# CONFIG_HID_KYE is not set
++# CONFIG_HID_GYRATION is not set
++# CONFIG_HID_TWINHAN is not set
++# CONFIG_HID_KENSINGTON is not set
++# CONFIG_HID_LOGITECH is not set
++# CONFIG_HID_MICROSOFT is not set
++# CONFIG_HID_MONTEREY is not set
++# CONFIG_HID_NTRIG is not set
++# CONFIG_HID_PANTHERLORD is not set
++# CONFIG_HID_PETALYNX is not set
++# CONFIG_HID_SAMSUNG is not set
++# CONFIG_HID_SONY is not set
++# CONFIG_HID_SUNPLUS is not set
++# CONFIG_HID_GREENASIA is not set
++# CONFIG_HID_SMARTJOYPLUS is not set
++# CONFIG_HID_TOPSEED is not set
++# CONFIG_HID_THRUSTMASTER is not set
++# CONFIG_HID_WACOM is not set
++# CONFIG_HID_ZEROPLUS is not set
++CONFIG_USB_SUPPORT=y
++CONFIG_USB_ARCH_HAS_HCD=y
++CONFIG_USB_ARCH_HAS_OHCI=y
++CONFIG_USB_ARCH_HAS_EHCI=y
++CONFIG_USB=y
++# CONFIG_USB_DEBUG is not set
++# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
++
++#
++# Miscellaneous USB options
++#
++CONFIG_USB_DEVICEFS=y
++CONFIG_USB_DEVICE_CLASS=y
++# CONFIG_USB_DYNAMIC_MINORS is not set
++# CONFIG_USB_OTG is not set
++# CONFIG_USB_OTG_WHITELIST is not set
++# CONFIG_USB_OTG_BLACKLIST_HUB is not set
++# CONFIG_USB_MON is not set
++# CONFIG_USB_WUSB is not set
++# CONFIG_USB_WUSB_CBAF is not set
++
++#
++# USB Host Controller Drivers
++#
++# CONFIG_USB_C67X00_HCD is not set
++# CONFIG_USB_XHCI_HCD is not set
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_ROOT_HUB_TT=y
++CONFIG_USB_EHCI_TT_NEWSCHED=y
++# CONFIG_USB_OXU210HP_HCD is not set
++# CONFIG_USB_ISP116X_HCD is not set
++# CONFIG_USB_ISP1760_HCD is not set
++# CONFIG_USB_ISP1362_HCD is not set
++CONFIG_USB_OHCI_HCD=y
++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
++CONFIG_USB_OHCI_LITTLE_ENDIAN=y
++CONFIG_USB_UHCI_HCD=y
++# CONFIG_USB_SL811_HCD is not set
++# CONFIG_USB_R8A66597_HCD is not set
++# CONFIG_USB_WHCI_HCD is not set
++# CONFIG_USB_HWA_HCD is not set
++# CONFIG_USB_MUSB_HDRC is not set
++# CONFIG_USB_GADGET_MUSB_HDRC is not set
++
++#
++# USB Device Class drivers
++#
++# CONFIG_USB_ACM is not set
++CONFIG_USB_PRINTER=m
++# CONFIG_USB_WDM is not set
++# CONFIG_USB_TMC is not set
++
++#
++# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
++#
++
++#
++# also be needed; see USB_STORAGE Help for more info
++#
++CONFIG_USB_STORAGE=y
++# CONFIG_USB_STORAGE_DEBUG is not set
++CONFIG_USB_STORAGE_DATAFAB=y
++CONFIG_USB_STORAGE_FREECOM=y
++# CONFIG_USB_STORAGE_ISD200 is not set
++CONFIG_USB_STORAGE_USBAT=y
++CONFIG_USB_STORAGE_SDDR09=y
++CONFIG_USB_STORAGE_SDDR55=y
++CONFIG_USB_STORAGE_JUMPSHOT=y
++# CONFIG_USB_STORAGE_ALAUDA is not set
++# CONFIG_USB_STORAGE_ONETOUCH is not set
++# CONFIG_USB_STORAGE_KARMA is not set
++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
++# CONFIG_USB_LIBUSUAL is not set
++
++#
++# USB Imaging devices
++#
++# CONFIG_USB_MDC800 is not set
++# CONFIG_USB_MICROTEK is not set
++
++#
++# USB port drivers
++#
++CONFIG_USB_SERIAL=m
++# CONFIG_USB_EZUSB is not set
++# CONFIG_USB_SERIAL_GENERIC is not set
++# CONFIG_USB_SERIAL_AIRCABLE is not set
++# CONFIG_USB_SERIAL_ARK3116 is not set
++# CONFIG_USB_SERIAL_BELKIN is not set
++# CONFIG_USB_SERIAL_CH341 is not set
++# CONFIG_USB_SERIAL_WHITEHEAT is not set
++# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
++# CONFIG_USB_SERIAL_CP210X is not set
++# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
++# CONFIG_USB_SERIAL_EMPEG is not set
++CONFIG_USB_SERIAL_FTDI_SIO=m
++# CONFIG_USB_SERIAL_FUNSOFT is not set
++# CONFIG_USB_SERIAL_VISOR is not set
++# CONFIG_USB_SERIAL_IPAQ is not set
++# CONFIG_USB_SERIAL_IR is not set
++# CONFIG_USB_SERIAL_EDGEPORT is not set
++# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
++# CONFIG_USB_SERIAL_GARMIN is not set
++# CONFIG_USB_SERIAL_IPW is not set
++# CONFIG_USB_SERIAL_IUU is not set
++# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
++# CONFIG_USB_SERIAL_KEYSPAN is not set
++# CONFIG_USB_SERIAL_KLSI is not set
++# CONFIG_USB_SERIAL_KOBIL_SCT is not set
++# CONFIG_USB_SERIAL_MCT_U232 is not set
++# CONFIG_USB_SERIAL_MOS7720 is not set
++# CONFIG_USB_SERIAL_MOS7840 is not set
++# CONFIG_USB_SERIAL_MOTOROLA is not set
++# CONFIG_USB_SERIAL_NAVMAN is not set
++# CONFIG_USB_SERIAL_PL2303 is not set
++# CONFIG_USB_SERIAL_OTI6858 is not set
++# CONFIG_USB_SERIAL_QUALCOMM is not set
++# CONFIG_USB_SERIAL_SPCP8X5 is not set
++# CONFIG_USB_SERIAL_HP4X is not set
++# CONFIG_USB_SERIAL_SAFE is not set
++# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
++# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
++# CONFIG_USB_SERIAL_SYMBOL is not set
++# CONFIG_USB_SERIAL_TI is not set
++# CONFIG_USB_SERIAL_CYBERJACK is not set
++# CONFIG_USB_SERIAL_XIRCOM is not set
++# CONFIG_USB_SERIAL_OPTION is not set
++# CONFIG_USB_SERIAL_OMNINET is not set
++# CONFIG_USB_SERIAL_OPTICON is not set
++# CONFIG_USB_SERIAL_DEBUG is not set
++
++#
++# USB Miscellaneous drivers
++#
++# CONFIG_USB_EMI62 is not set
++# CONFIG_USB_EMI26 is not set
++# CONFIG_USB_ADUTUX is not set
++# CONFIG_USB_SEVSEG is not set
++# CONFIG_USB_RIO500 is not set
++# CONFIG_USB_LEGOTOWER is not set
++# CONFIG_USB_LCD is not set
++# CONFIG_USB_BERRY_CHARGE is not set
++# CONFIG_USB_LED is not set
++# CONFIG_USB_CYPRESS_CY7C63 is not set
++# CONFIG_USB_CYTHERM is not set
++# CONFIG_USB_IDMOUSE is not set
++# CONFIG_USB_FTDI_ELAN is not set
++# CONFIG_USB_APPLEDISPLAY is not set
++# CONFIG_USB_SISUSBVGA is not set
++# CONFIG_USB_LD is not set
++# CONFIG_USB_TRANCEVIBRATOR is not set
++# CONFIG_USB_IOWARRIOR is not set
++CONFIG_USB_TEST=m
++# CONFIG_USB_ISIGHTFW is not set
++# CONFIG_USB_VST is not set
++CONFIG_USB_GADGET=m
++# CONFIG_USB_GADGET_DEBUG_FILES is not set
++CONFIG_USB_GADGET_VBUS_DRAW=2
++CONFIG_USB_GADGET_SELECTED=y
++# CONFIG_USB_GADGET_AT91 is not set
++# CONFIG_USB_GADGET_ATMEL_USBA is not set
++# CONFIG_USB_GADGET_FSL_USB2 is not set
++# CONFIG_USB_GADGET_LH7A40X is not set
++# CONFIG_USB_GADGET_OMAP is not set
++# CONFIG_USB_GADGET_PXA25X is not set
++CONFIG_USB_GADGET_R8A66597=y
++CONFIG_USB_R8A66597=m
++# CONFIG_USB_GADGET_PXA27X is not set
++# CONFIG_USB_GADGET_S3C_HSOTG is not set
++# CONFIG_USB_GADGET_IMX is not set
++# CONFIG_USB_GADGET_S3C2410 is not set
++# CONFIG_USB_GADGET_M66592 is not set
++# CONFIG_USB_GADGET_AMD5536UDC is not set
++# CONFIG_USB_GADGET_FSL_QE is not set
++# CONFIG_USB_GADGET_CI13XXX is not set
++# CONFIG_USB_GADGET_NET2280 is not set
++# CONFIG_USB_GADGET_GOKU is not set
++# CONFIG_USB_GADGET_LANGWELL is not set
++# CONFIG_USB_GADGET_DUMMY_HCD is not set
++CONFIG_USB_GADGET_DUALSPEED=y
++CONFIG_USB_ZERO=m
++# CONFIG_USB_AUDIO is not set
++CONFIG_USB_ETH=m
++CONFIG_USB_ETH_RNDIS=y
++# CONFIG_USB_ETH_EEM is not set
++# CONFIG_USB_GADGETFS is not set
++CONFIG_USB_FILE_STORAGE=m
++CONFIG_USB_FILE_STORAGE_TEST=y
++# CONFIG_USB_G_SERIAL is not set
++# CONFIG_USB_MIDI_GADGET is not set
++# CONFIG_USB_G_PRINTER is not set
++# CONFIG_USB_CDC_COMPOSITE is not set
++
++#
++# OTG and related infrastructure
++#
++# CONFIG_USB_GPIO_VBUS is not set
++# CONFIG_NOP_USB_XCEIV is not set
++# CONFIG_UWB is not set
++CONFIG_MMC=y
++# CONFIG_MMC_DEBUG is not set
++# CONFIG_MMC_UNSAFE_RESUME is not set
++
++#
++# MMC/SD/SDIO Card Drivers
++#
++CONFIG_MMC_BLOCK=y
++CONFIG_MMC_BLOCK_BOUNCE=y
++CONFIG_SDIO_UART=y
++# CONFIG_MMC_TEST is not set
++
++#
++# MMC/SD/SDIO Host Controller Drivers
++#
++CONFIG_MMC_SDHCI=y
++# CONFIG_MMC_SDHCI_PCI is not set
++# CONFIG_MMC_SDHCI_PLTFM is not set
++# CONFIG_MMC_AT91 is not set
++# CONFIG_MMC_ATMELMCI is not set
++CONFIG_MMC_TIFM_SD=y
++CONFIG_MMC_MVSDIO=y
++# CONFIG_MMC_SPI is not set
++# CONFIG_MMC_CB710 is not set
++# CONFIG_MMC_VIA_SDMMC is not set
++# CONFIG_MEMSTICK is not set
++CONFIG_NEW_LEDS=y
++CONFIG_LEDS_CLASS=y
++
++#
++# LED drivers
++#
++# CONFIG_LEDS_PCA9532 is not set
++CONFIG_LEDS_GPIO=y
++CONFIG_LEDS_GPIO_PLATFORM=y
++# CONFIG_LEDS_LP3944 is not set
++# CONFIG_LEDS_PCA955X is not set
++# CONFIG_LEDS_DAC124S085 is not set
++# CONFIG_LEDS_BD2802 is not set
++
++#
++# LED Triggers
++#
++CONFIG_LEDS_TRIGGERS=y
++CONFIG_LEDS_TRIGGER_TIMER=y
++CONFIG_LEDS_TRIGGER_HEARTBEAT=y
++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
++# CONFIG_LEDS_TRIGGER_GPIO is not set
++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
++
++#
++# iptables trigger is under Netfilter config (LED target)
++#
++# CONFIG_ACCESSIBILITY is not set
++# CONFIG_INFINIBAND is not set
++CONFIG_RTC_LIB=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_HCTOSYS=y
++CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
++# CONFIG_RTC_DEBUG is not set
++
++#
++# RTC interfaces
++#
++CONFIG_RTC_INTF_SYSFS=y
++CONFIG_RTC_INTF_PROC=y
++CONFIG_RTC_INTF_DEV=y
++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
++# CONFIG_RTC_DRV_TEST is not set
++
++#
++# I2C RTC drivers
++#
++# CONFIG_RTC_DRV_DS1307 is not set
++# CONFIG_RTC_DRV_DS1374 is not set
++# CONFIG_RTC_DRV_DS1672 is not set
++# CONFIG_RTC_DRV_MAX6900 is not set
++# CONFIG_RTC_DRV_RS5C372 is not set
++# CONFIG_RTC_DRV_ISL1208 is not set
++# CONFIG_RTC_DRV_X1205 is not set
++# CONFIG_RTC_DRV_PCF8563 is not set
++# CONFIG_RTC_DRV_PCF8583 is not set
++# CONFIG_RTC_DRV_M41T80 is not set
++CONFIG_RTC_DRV_S35390A=y
++# CONFIG_RTC_DRV_FM3130 is not set
++# CONFIG_RTC_DRV_RX8581 is not set
++# CONFIG_RTC_DRV_RX8025 is not set
++
++#
++# SPI RTC drivers
++#
++# CONFIG_RTC_DRV_M41T94 is not set
++# CONFIG_RTC_DRV_DS1305 is not set
++# CONFIG_RTC_DRV_DS1390 is not set
++# CONFIG_RTC_DRV_MAX6902 is not set
++# CONFIG_RTC_DRV_R9701 is not set
++# CONFIG_RTC_DRV_RS5C348 is not set
++# CONFIG_RTC_DRV_DS3234 is not set
++# CONFIG_RTC_DRV_PCF2123 is not set
++
++#
++# Platform RTC drivers
++#
++# CONFIG_RTC_DRV_CMOS is not set
++# CONFIG_RTC_DRV_DS1286 is not set
++# CONFIG_RTC_DRV_DS1511 is not set
++# CONFIG_RTC_DRV_DS1553 is not set
++# CONFIG_RTC_DRV_DS1742 is not set
++# CONFIG_RTC_DRV_STK17TA8 is not set
++# CONFIG_RTC_DRV_M48T86 is not set
++# CONFIG_RTC_DRV_M48T35 is not set
++# CONFIG_RTC_DRV_M48T59 is not set
++# CONFIG_RTC_DRV_BQ4802 is not set
++# CONFIG_RTC_DRV_V3020 is not set
++
++#
++# on-CPU RTC drivers
++#
++CONFIG_RTC_DRV_MV=y
++CONFIG_DMADEVICES=y
++
++#
++# DMA Devices
++#
++CONFIG_MV_XOR=y
++CONFIG_DMA_ENGINE=y
++
++#
++# DMA Clients
++#
++# CONFIG_NET_DMA is not set
++# CONFIG_ASYNC_TX_DMA is not set
++# CONFIG_DMATEST is not set
++# CONFIG_AUXDISPLAY is not set
++# CONFIG_UIO is not set
++
++#
++# TI VLYNQ
++#
++# CONFIG_STAGING is not set
++
++#
++# File systems
++#
++CONFIG_EXT2_FS=y
++# CONFIG_EXT2_FS_XATTR is not set
++# CONFIG_EXT2_FS_XIP is not set
++CONFIG_EXT3_FS=y
++# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
++# CONFIG_EXT3_FS_XATTR is not set
++CONFIG_EXT4_FS=y
++CONFIG_EXT4_FS_XATTR=y
++# CONFIG_EXT4_FS_POSIX_ACL is not set
++# CONFIG_EXT4_FS_SECURITY is not set
++# CONFIG_EXT4_DEBUG is not set
++CONFIG_JBD=y
++CONFIG_JBD2=y
++CONFIG_FS_MBCACHE=y
++# CONFIG_REISERFS_FS is not set
++CONFIG_JFS_FS=y
++CONFIG_JFS_POSIX_ACL=y
++CONFIG_JFS_SECURITY=y
++# CONFIG_JFS_DEBUG is not set
++# CONFIG_JFS_STATISTICS is not set
++CONFIG_FS_POSIX_ACL=y
++CONFIG_XFS_FS=m
++CONFIG_XFS_QUOTA=y
++CONFIG_XFS_POSIX_ACL=y
++CONFIG_XFS_RT=y
++# CONFIG_XFS_DEBUG is not set
++# CONFIG_GFS2_FS is not set
++# CONFIG_OCFS2_FS is not set
++# CONFIG_BTRFS_FS is not set
++# CONFIG_NILFS2_FS is not set
++CONFIG_FILE_LOCKING=y
++CONFIG_FSNOTIFY=y
++CONFIG_DNOTIFY=y
++CONFIG_INOTIFY=y
++CONFIG_INOTIFY_USER=y
++# CONFIG_QUOTA is not set
++CONFIG_QUOTACTL=y
++# CONFIG_AUTOFS_FS is not set
++# CONFIG_AUTOFS4_FS is not set
++CONFIG_FUSE_FS=m
++CONFIG_CUSE=m
++
++#
++# Caches
++#
++# CONFIG_FSCACHE is not set
++
++#
++# CD-ROM/DVD Filesystems
++#
++CONFIG_ISO9660_FS=m
++CONFIG_JOLIET=y
++# CONFIG_ZISOFS is not set
++CONFIG_UDF_FS=m
++CONFIG_UDF_NLS=y
++
++#
++# DOS/FAT/NT Filesystems
++#
++CONFIG_FAT_FS=y
++CONFIG_MSDOS_FS=y
++CONFIG_VFAT_FS=y
++CONFIG_FAT_DEFAULT_CODEPAGE=437
++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
++CONFIG_NTFS_FS=y
++# CONFIG_NTFS_DEBUG is not set
++CONFIG_NTFS_RW=y
++
++#
++# Pseudo filesystems
++#
++CONFIG_PROC_FS=y
++CONFIG_PROC_SYSCTL=y
++CONFIG_PROC_PAGE_MONITOR=y
++CONFIG_SYSFS=y
++CONFIG_TMPFS=y
++# CONFIG_TMPFS_POSIX_ACL is not set
++# CONFIG_HUGETLB_PAGE is not set
++CONFIG_CONFIGFS_FS=m
++CONFIG_MISC_FILESYSTEMS=y
++# CONFIG_ADFS_FS is not set
++# CONFIG_AFFS_FS is not set
++# CONFIG_HFS_FS is not set
++# CONFIG_HFSPLUS_FS is not set
++# CONFIG_BEFS_FS is not set
++# CONFIG_BFS_FS is not set
++# CONFIG_EFS_FS is not set
++CONFIG_JFFS2_FS=y
++CONFIG_JFFS2_FS_DEBUG=0
++CONFIG_JFFS2_FS_WRITEBUFFER=y
++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
++CONFIG_JFFS2_SUMMARY=y
++CONFIG_JFFS2_FS_XATTR=y
++CONFIG_JFFS2_FS_POSIX_ACL=y
++CONFIG_JFFS2_FS_SECURITY=y
++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
++CONFIG_JFFS2_ZLIB=y
++# CONFIG_JFFS2_LZO is not set
++CONFIG_JFFS2_RTIME=y
++# CONFIG_JFFS2_RUBIN is not set
++CONFIG_UBIFS_FS=y
++CONFIG_UBIFS_FS_XATTR=y
++CONFIG_UBIFS_FS_ADVANCED_COMPR=y
++CONFIG_UBIFS_FS_LZO=y
++CONFIG_UBIFS_FS_ZLIB=y
++# CONFIG_UBIFS_FS_DEBUG is not set
++CONFIG_CRAMFS=y
++CONFIG_SQUASHFS=y
++# CONFIG_SQUASHFS_EMBEDDED is not set
++CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
++# CONFIG_VXFS_FS is not set
++# CONFIG_MINIX_FS is not set
++# CONFIG_OMFS_FS is not set
++# CONFIG_HPFS_FS is not set
++# CONFIG_QNX4FS_FS is not set
++# CONFIG_ROMFS_FS is not set
++# CONFIG_SYSV_FS is not set
++# CONFIG_UFS_FS is not set
++CONFIG_NETWORK_FILESYSTEMS=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++# CONFIG_NFS_V3_ACL is not set
++# CONFIG_NFS_V4 is not set
++CONFIG_ROOT_NFS=y
++CONFIG_NFSD=m
++CONFIG_NFSD_V2_ACL=y
++CONFIG_NFSD_V3=y
++CONFIG_NFSD_V3_ACL=y
++CONFIG_NFSD_V4=y
++CONFIG_LOCKD=y
++CONFIG_LOCKD_V4=y
++CONFIG_EXPORTFS=m
++CONFIG_NFS_ACL_SUPPORT=m
++CONFIG_NFS_COMMON=y
++CONFIG_SUNRPC=y
++CONFIG_SUNRPC_GSS=m
++CONFIG_RPCSEC_GSS_KRB5=m
++# CONFIG_RPCSEC_GSS_SPKM3 is not set
++# CONFIG_SMB_FS is not set
++CONFIG_CIFS=m
++# CONFIG_CIFS_STATS is not set
++# CONFIG_CIFS_WEAK_PW_HASH is not set
++CONFIG_CIFS_XATTR=y
++CONFIG_CIFS_POSIX=y
++# CONFIG_CIFS_DEBUG2 is not set
++# CONFIG_CIFS_EXPERIMENTAL is not set
++# CONFIG_NCP_FS is not set
++# CONFIG_CODA_FS is not set
++# CONFIG_AFS_FS is not set
++
++#
++# Partition Types
++#
++CONFIG_PARTITION_ADVANCED=y
++# CONFIG_ACORN_PARTITION is not set
++# CONFIG_OSF_PARTITION is not set
++# CONFIG_AMIGA_PARTITION is not set
++# CONFIG_ATARI_PARTITION is not set
++# CONFIG_MAC_PARTITION is not set
++CONFIG_MSDOS_PARTITION=y
++# CONFIG_BSD_DISKLABEL is not set
++# CONFIG_MINIX_SUBPARTITION is not set
++# CONFIG_SOLARIS_X86_PARTITION is not set
++# CONFIG_UNIXWARE_DISKLABEL is not set
++# CONFIG_LDM_PARTITION is not set
++# CONFIG_SGI_PARTITION is not set
++# CONFIG_ULTRIX_PARTITION is not set
++# CONFIG_SUN_PARTITION is not set
++# CONFIG_KARMA_PARTITION is not set
++CONFIG_EFI_PARTITION=y
++# CONFIG_SYSV68_PARTITION is not set
++CONFIG_NLS=y
++CONFIG_NLS_DEFAULT="utf8"
++CONFIG_NLS_CODEPAGE_437=y
++# CONFIG_NLS_CODEPAGE_737 is not set
++# CONFIG_NLS_CODEPAGE_775 is not set
++CONFIG_NLS_CODEPAGE_850=y
++# CONFIG_NLS_CODEPAGE_852 is not set
++# CONFIG_NLS_CODEPAGE_855 is not set
++# CONFIG_NLS_CODEPAGE_857 is not set
++# CONFIG_NLS_CODEPAGE_860 is not set
++# CONFIG_NLS_CODEPAGE_861 is not set
++# CONFIG_NLS_CODEPAGE_862 is not set
++# CONFIG_NLS_CODEPAGE_863 is not set
++# CONFIG_NLS_CODEPAGE_864 is not set
++# CONFIG_NLS_CODEPAGE_865 is not set
++# CONFIG_NLS_CODEPAGE_866 is not set
++# CONFIG_NLS_CODEPAGE_869 is not set
++# CONFIG_NLS_CODEPAGE_936 is not set
++# CONFIG_NLS_CODEPAGE_950 is not set
++# CONFIG_NLS_CODEPAGE_932 is not set
++# CONFIG_NLS_CODEPAGE_949 is not set
++# CONFIG_NLS_CODEPAGE_874 is not set
++# CONFIG_NLS_ISO8859_8 is not set
++# CONFIG_NLS_CODEPAGE_1250 is not set
++# CONFIG_NLS_CODEPAGE_1251 is not set
++# CONFIG_NLS_ASCII is not set
++CONFIG_NLS_ISO8859_1=y
++CONFIG_NLS_ISO8859_2=y
++# CONFIG_NLS_ISO8859_3 is not set
++# CONFIG_NLS_ISO8859_4 is not set
++# CONFIG_NLS_ISO8859_5 is not set
++# CONFIG_NLS_ISO8859_6 is not set
++# CONFIG_NLS_ISO8859_7 is not set
++# CONFIG_NLS_ISO8859_9 is not set
++# CONFIG_NLS_ISO8859_13 is not set
++# CONFIG_NLS_ISO8859_14 is not set
++# CONFIG_NLS_ISO8859_15 is not set
++# CONFIG_NLS_KOI8_R is not set
++# CONFIG_NLS_KOI8_U is not set
++CONFIG_NLS_UTF8=y
++# CONFIG_DLM is not set
++
++#
++# Kernel hacking
++#
++CONFIG_PRINTK_TIME=y
++CONFIG_ENABLE_WARN_DEPRECATED=y
++CONFIG_ENABLE_MUST_CHECK=y
++CONFIG_FRAME_WARN=1024
++CONFIG_MAGIC_SYSRQ=y
++# CONFIG_STRIP_ASM_SYMS is not set
++# CONFIG_UNUSED_SYMBOLS is not set
++# CONFIG_DEBUG_FS is not set
++# CONFIG_HEADERS_CHECK is not set
++CONFIG_DEBUG_KERNEL=y
++# CONFIG_DEBUG_SHIRQ is not set
++CONFIG_DETECT_SOFTLOCKUP=y
++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
++CONFIG_DETECT_HUNG_TASK=y
++# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
++CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
++# CONFIG_SCHED_DEBUG is not set
++# CONFIG_SCHEDSTATS is not set
++# CONFIG_TIMER_STATS is not set
++# CONFIG_DEBUG_OBJECTS is not set
++# CONFIG_SLUB_DEBUG_ON is not set
++# CONFIG_SLUB_STATS is not set
++# CONFIG_DEBUG_KMEMLEAK is not set
++CONFIG_DEBUG_PREEMPT=y
++# CONFIG_DEBUG_RT_MUTEXES is not set
++# CONFIG_RT_MUTEX_TESTER is not set
++# CONFIG_DEBUG_SPINLOCK is not set
++# CONFIG_DEBUG_MUTEXES is not set
++# CONFIG_DEBUG_LOCK_ALLOC is not set
++# CONFIG_PROVE_LOCKING is not set
++# CONFIG_LOCK_STAT is not set
++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
++CONFIG_STACKTRACE=y
++# CONFIG_DEBUG_KOBJECT is not set
++CONFIG_DEBUG_BUGVERBOSE=y
++CONFIG_DEBUG_INFO=y
++# CONFIG_DEBUG_VM is not set
++# CONFIG_DEBUG_WRITECOUNT is not set
++CONFIG_DEBUG_MEMORY_INIT=y
++# CONFIG_DEBUG_LIST is not set
++# CONFIG_DEBUG_SG is not set
++# CONFIG_DEBUG_NOTIFIERS is not set
++# CONFIG_BOOT_PRINTK_DELAY is not set
++# CONFIG_RCU_TORTURE_TEST is not set
++# CONFIG_RCU_CPU_STALL_DETECTOR is not set
++# CONFIG_LATENCYTOP is not set
++CONFIG_SYSCTL_SYSCALL_CHECK=y
++CONFIG_HAVE_FUNCTION_TRACER=y
++CONFIG_TRACING_SUPPORT=y
++# CONFIG_FTRACE is not set
++# CONFIG_SAMPLES is not set
++CONFIG_HAVE_ARCH_KGDB=y
++CONFIG_ARM_UNWIND=y
++CONFIG_DEBUG_USER=y
++
++#
++# Security options
++#
++# CONFIG_KEYS is not set
++# CONFIG_SECURITY is not set
++# CONFIG_SECURITYFS is not set
++# CONFIG_SECURITY_FILE_CAPABILITIES is not set
++CONFIG_XOR_BLOCKS=y
++CONFIG_ASYNC_CORE=y
++CONFIG_ASYNC_MEMCPY=y
++CONFIG_ASYNC_XOR=y
++CONFIG_ASYNC_PQ=y
++CONFIG_ASYNC_RAID6_RECOV=y
++CONFIG_CRYPTO=y
++
++#
++# Crypto core or helper
++#
++CONFIG_CRYPTO_ALGAPI=y
++CONFIG_CRYPTO_ALGAPI2=y
++CONFIG_CRYPTO_AEAD2=y
++CONFIG_CRYPTO_BLKCIPHER=y
++CONFIG_CRYPTO_BLKCIPHER2=y
++CONFIG_CRYPTO_HASH=y
++CONFIG_CRYPTO_HASH2=y
++CONFIG_CRYPTO_RNG2=y
++CONFIG_CRYPTO_PCOMP=y
++CONFIG_CRYPTO_MANAGER=y
++CONFIG_CRYPTO_MANAGER2=y
++# CONFIG_CRYPTO_GF128MUL is not set
++CONFIG_CRYPTO_NULL=y
++CONFIG_CRYPTO_WORKQUEUE=y
++# CONFIG_CRYPTO_CRYPTD is not set
++# CONFIG_CRYPTO_AUTHENC is not set
++# CONFIG_CRYPTO_TEST is not set
++
++#
++# Authenticated Encryption with Associated Data
++#
++# CONFIG_CRYPTO_CCM is not set
++# CONFIG_CRYPTO_GCM is not set
++# CONFIG_CRYPTO_SEQIV is not set
++
++#
++# Block modes
++#
++CONFIG_CRYPTO_CBC=y
++# CONFIG_CRYPTO_CTR is not set
++# CONFIG_CRYPTO_CTS is not set
++CONFIG_CRYPTO_ECB=y
++# CONFIG_CRYPTO_LRW is not set
++CONFIG_CRYPTO_PCBC=m
++# CONFIG_CRYPTO_XTS is not set
++
++#
++# Hash modes
++#
++CONFIG_CRYPTO_HMAC=y
++# CONFIG_CRYPTO_XCBC is not set
++# CONFIG_CRYPTO_VMAC is not set
++
++#
++# Digest
++#
++CONFIG_CRYPTO_CRC32C=y
++# CONFIG_CRYPTO_GHASH is not set
++CONFIG_CRYPTO_MD4=y
++CONFIG_CRYPTO_MD5=y
++CONFIG_CRYPTO_MICHAEL_MIC=m
++# CONFIG_CRYPTO_RMD128 is not set
++# CONFIG_CRYPTO_RMD160 is not set
++# CONFIG_CRYPTO_RMD256 is not set
++# CONFIG_CRYPTO_RMD320 is not set
++CONFIG_CRYPTO_SHA1=y
++CONFIG_CRYPTO_SHA256=y
++CONFIG_CRYPTO_SHA512=y
++# CONFIG_CRYPTO_TGR192 is not set
++# CONFIG_CRYPTO_WP512 is not set
++
++#
++# Ciphers
++#
++CONFIG_CRYPTO_AES=y
++# CONFIG_CRYPTO_ANUBIS is not set
++CONFIG_CRYPTO_ARC4=y
++CONFIG_CRYPTO_BLOWFISH=y
++# CONFIG_CRYPTO_CAMELLIA is not set
++CONFIG_CRYPTO_CAST5=y
++CONFIG_CRYPTO_CAST6=y
++CONFIG_CRYPTO_DES=y
++# CONFIG_CRYPTO_FCRYPT is not set
++# CONFIG_CRYPTO_KHAZAD is not set
++# CONFIG_CRYPTO_SALSA20 is not set
++# CONFIG_CRYPTO_SEED is not set
++# CONFIG_CRYPTO_SERPENT is not set
++CONFIG_CRYPTO_TEA=y
++CONFIG_CRYPTO_TWOFISH=y
++CONFIG_CRYPTO_TWOFISH_COMMON=y
++
++#
++# Compression
++#
++CONFIG_CRYPTO_DEFLATE=y
++# CONFIG_CRYPTO_ZLIB is not set
++CONFIG_CRYPTO_LZO=y
++
++#
++# Random Number Generation
++#
++# CONFIG_CRYPTO_ANSI_CPRNG is not set
++CONFIG_CRYPTO_HW=y
++# CONFIG_CRYPTO_DEV_MV_CESA is not set
++# CONFIG_CRYPTO_DEV_HIFN_795X is not set
++# CONFIG_BINARY_PRINTF is not set
++
++#
++# Library routines
++#
++CONFIG_BITREVERSE=y
++CONFIG_GENERIC_FIND_LAST_BIT=y
++CONFIG_CRC_CCITT=y
++CONFIG_CRC16=y
++# CONFIG_CRC_T10DIF is not set
++CONFIG_CRC_ITU_T=m
++CONFIG_CRC32=y
++# CONFIG_CRC7 is not set
++CONFIG_LIBCRC32C=y
++CONFIG_ZLIB_INFLATE=y
++CONFIG_ZLIB_DEFLATE=y
++CONFIG_LZO_COMPRESS=y
++CONFIG_LZO_DECOMPRESS=y
++CONFIG_DECOMPRESS_GZIP=y
++CONFIG_TEXTSEARCH=y
++CONFIG_TEXTSEARCH_KMP=m
++CONFIG_TEXTSEARCH_BM=m
++CONFIG_TEXTSEARCH_FSM=m
++CONFIG_HAS_IOMEM=y
++CONFIG_HAS_IOPORT=y
++CONFIG_HAS_DMA=y
++CONFIG_NLATTR=y
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/openrd-base-enable-pcie.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/openrd-base-enable-pcie.patch
+new file mode 100644
+index 0000000..165334b
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-base/openrd-base-enable-pcie.patch
+@@ -0,0 +1,22 @@
++Index: git/arch/arm/mach-kirkwood/openrd_base-setup.c
++===================================================================
++--- git.orig/arch/arm/mach-kirkwood/openrd_base-setup.c 2009-09-19 19:31:45.000000000 +0200
+++++ git/arch/arm/mach-kirkwood/openrd_base-setup.c 2009-09-19 19:31:54.000000000 +0200
++@@ -70,8 +70,17 @@
++ kirkwood_ge00_init(&openrd_base_ge00_data);
++ kirkwood_sata_init(&openrd_base_sata_data);
++ kirkwood_sdio_init(&openrd_base_mvsdio_data);
+++ kirkwood_i2c_init();
++ }
++
+++static int __init openrd_base_pci_init(void)
+++{
+++ if (machine_is_openrd_base())
+++ kirkwood_pcie_init();
+++ return 0;
+++}
+++subsys_initcall(openrd_base_pci_init);
+++
++ MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board")
++ /* Maintainer: Dhaval Vasa <dhaval.vasa@...> */
++ .phys_io = KIRKWOOD_REGS_PHYS_BASE,
+diff --git a/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/0002-OpenRD-Client-Volari-Z11-driver-added.patch b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/0002-OpenRD-Client-Volari-Z11-driver-added.patch
+new file mode 100644
+index 0000000..45fdd1d
+--- /dev/null
++++ b/meta-bsp-kirkwood/recipes/linux/linux-kirkwood/openrd-client/0002-OpenRD-Client-Volari-Z11-driver-added.patch
+@@ -0,0 +1,29769 @@
++From 6b2cdbe52ff2e459d0469f30f9e2f4a15f95bd3b Mon Sep 17 00:00:00 2001
++From: Tanmay Upadhyay <tanmay.upadhyay@...>
++Date: Wed, 2 Dec 2009 10:54:13 +0530
++Subject: [PATCH] OpenRD-Client: Volari Z11 driver added
++
++The code is the same as the one present in 2.6.22.18 kernel. Compilation is a
++bit noisy. But this is a temporary stuff to get going till XGI provides the
++mail line driver.
++
++Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@...>
++---
++ drivers/video/Kconfig | 12 +
++ drivers/video/Makefile | 1 +
++ drivers/video/xgi/Makefile | 4 +
++ drivers/video/xgi/XGI.h | 10 +
++ drivers/video/xgi/XGI_accel.c | 596 +++
++ drivers/video/xgi/XGI_accel.h | 511 ++
++ drivers/video/xgi/XGI_main.h | 1042 ++++
++ drivers/video/xgi/XGI_main_26.c | 3790 +++++++++++++
++ drivers/video/xgi/XGIfb.h | 215 +
++ drivers/video/xgi/floatlib.c | 946 ++++
++ drivers/video/xgi/osdef.h | 153 +
++ drivers/video/xgi/vb_def.h | 1017 ++++
++ drivers/video/xgi/vb_ext.c | 1375 +++++
++ drivers/video/xgi/vb_ext.h | 32 +
++ drivers/video/xgi/vb_init.c | 3376 ++++++++++++
++ drivers/video/xgi/vb_init.h | 7 +
++ drivers/video/xgi/vb_release.txt | 44 +
++ drivers/video/xgi/vb_setmode.c |10829 ++++++++++++++++++++++++++++++++++++++
++ drivers/video/xgi/vb_setmode.h | 40 +
++ drivers/video/xgi/vb_struct.h | 518 ++
++ drivers/video/xgi/vb_table.h | 4406 ++++++++++++++++
++ drivers/video/xgi/vb_util.c | 287 +
++ drivers/video/xgi/vb_util.h | 16 +
++ drivers/video/xgi/vgatypes.h | 325 ++
++ 24 files changed, 29552 insertions(+), 0 deletions(-)
++ create mode 100644 drivers/video/xgi/Makefile
++ create mode 100644 drivers/video/xgi/XGI.h
++ create mode 100644 drivers/video/xgi/XGI_accel.c
++ create mode 100644 drivers/video/xgi/XGI_accel.h
++ create mode 100644 drivers/video/xgi/XGI_main.h
++ create mode 100644 drivers/video/xgi/XGI_main_26.c
++ create mode 100644 drivers/video/xgi/XGIfb.h
++ create mode 100644 drivers/video/xgi/floatlib.c
++ create mode 100644 drivers/video/xgi/osdef.h
++ create mode 100644 drivers/video/xgi/vb_def.h
++ create mode 100644 drivers/video/xgi/vb_ext.c
++ create mode 100644 drivers/video/xgi/vb_ext.h
++ create mode 100644 drivers/video/xgi/vb_init.c
++ create mode 100644 drivers/video/xgi/vb_init.h
++ create mode 100644 drivers/video/xgi/vb_release.txt
++ create mode 100644 drivers/video/xgi/vb_setmode.c
++ create mode 100644 drivers/video/xgi/vb_setmode.h
++ create mode 100644 drivers/video/xgi/vb_struct.h
++ create mode 100644 drivers/video/xgi/vb_table.h
++ create mode 100644 drivers/video/xgi/vb_util.c
++ create mode 100644 drivers/video/xgi/vb_util.h
++ create mode 100644 drivers/video/xgi/vgatypes.h
++
++diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
++index 5a5c303..f47305c 100644
++--- a/drivers/video/Kconfig
+++++ b/drivers/video/Kconfig
++@@ -1488,6 +1488,18 @@ config FB_SIS_315
++ (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
++ as XGI V3XT, V5, V8 and Z7.
++
+++config FB_XGI
+++ tristate "XGI display support"
+++ depends on FB && PCI
+++ select FB_CFB_FILLRECT
+++ select FB_CFB_COPYAREA
+++ select FB_CFB_IMAGEBLIT
+++ help
+++ This driver supports notebooks with XGI PCI chips.
+++ Say Y if you have such a graphics card.
+++ To compile this driver as a module, choose M here: the
+++ module will be called XGIfb.
+++
++ config FB_VIA
++ tristate "VIA UniChrome (Pro) and Chrome9 display support"
++ depends on FB && PCI
++diff --git a/drivers/video/Makefile b/drivers/video/Makefile
++index 4ecb30c..36efbdd 100644
++--- a/drivers/video/Makefile
+++++ b/drivers/video/Makefile
++@@ -42,6 +42,7 @@ obj-$(CONFIG_FB_ATY) += aty/ macmodes.o
++ obj-$(CONFIG_FB_ATY128) += aty/ macmodes.o
++ obj-$(CONFIG_FB_RADEON) += aty/
++ obj-$(CONFIG_FB_SIS) += sis/
+++obj-$(CONFIG_FB_XGI) += xgi/
++ obj-$(CONFIG_FB_VIA) += via/
++ obj-$(CONFIG_FB_KYRO) += kyro/
++ obj-$(CONFIG_FB_SAVAGE) += savage/
++diff --git a/drivers/video/xgi/Makefile b/drivers/video/xgi/Makefile
++new file mode 100644
++index 0000000..b5375fc
++--- /dev/null
+++++ b/drivers/video/xgi/Makefile
++@@ -0,0 +1,4 @@
+++obj-$(CONFIG_FB_XGI) += XGIfb.o
+++
+++XGIfb-objs := XGI_main_26.o XGI_accel.o vb_init.o vb_setmode.o vb_util.o vb_ext.o floatlib.o
+++
++diff --git a/drivers/video/xgi/XGI.h b/drivers/video/xgi/XGI.h
++new file mode 100644
++index 0000000..87803dd
++--- /dev/null
+++++ b/drivers/video/xgi/XGI.h
++@@ -0,0 +1,10 @@
+++#ifndef _XGI_H
+++#define _XGI_H
+++
+++#if 1
+++#define TWDEBUG(x)
+++#else
+++#define TWDEBUG(x) printk(KERN_INFO x "\n");
+++#endif
+++
+++#endif
++diff --git a/drivers/video/xgi/XGI_accel.c b/drivers/video/xgi/XGI_accel.c
++new file mode 100644
++index 0000000..6bbb3bf
++--- /dev/null
+++++ b/drivers/video/xgi/XGI_accel.c
++@@ -0,0 +1,596 @@
+++/*
+++ * XGI 300/630/730/540/315/550/650/740 frame buffer driver
+++ * for Linux kernels 2.4.x and 2.5.x
+++ *
+++ * 2D acceleration part
+++ *
+++ * Based on the X driver's XGI300_accel.c which is
+++ * Copyright Xavier Ducoin <x.ducoin@...>
+++ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+++ * and XGI310_accel.c which is
+++ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+++ *
+++ * Author: Thomas Winischhofer <thomas@...>
+++ * (see http://www.winischhofer.net/
+++ * for more information and updates)
+++ */
+++
+++//#include <linux/config.h>
+++#include <linux/version.h>
+++#include <linux/module.h>
+++#include <linux/kernel.h>
+++#include <linux/errno.h>
+++#include <linux/string.h>
+++#include <linux/mm.h>
+++#include <linux/tty.h>
+++#include <linux/slab.h>
+++#include <linux/delay.h>
+++#include <linux/fb.h>
+++#include <linux/console.h>
+++#include <linux/selection.h>
+++#include <linux/ioport.h>
+++#include <linux/init.h>
+++#include <linux/pci.h>
+++#include <linux/vt_kern.h>
+++#include <linux/capability.h>
+++#include <linux/fs.h>
+++#include <linux/agp_backend.h>
+++
+++#include <linux/types.h>
+++/*
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++#include <linux/XGIfb.h>
+++#else
+++#include <video/XGIfb.h>
+++#endif
+++*/
+++#include <asm/io.h>
+++
+++#ifdef CONFIG_MTRR
+++#include <asm/mtrr.h>
+++#endif
+++
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++#include <video/fbcon.h>
+++#include <video/fbcon-cfb8.h>
+++#include <video/fbcon-cfb16.h>
+++#include <video/fbcon-cfb24.h>
+++#include <video/fbcon-cfb32.h>
+++#endif
+++
+++#include "osdef.h"
+++#include "vgatypes.h"
+++#include "vb_struct.h"
+++#include "XGIfb.h"
+++#include "XGI_accel.h"
+++
+++
+++extern struct video_info xgi_video_info;
+++extern int XGIfb_accel;
+++
+++static const int XGIALUConv[] =
+++{
+++ 0x00, /* dest = 0; 0, GXclear, 0 */
+++ 0x88, /* dest &= src; DSa, GXand, 0x1 */
+++ 0x44, /* dest = src & ~dest; SDna, GXandReverse, 0x2 */
+++ 0xCC, /* dest = src; S, GXcopy, 0x3 */
+++ 0x22, /* dest &= ~src; DSna, GXandInverted, 0x4 */
+++ 0xAA, /* dest = dest; D, GXnoop, 0x5 */
+++ 0x66, /* dest = ^src; DSx, GXxor, 0x6 */
+++ 0xEE, /* dest |= src; DSo, GXor, 0x7 */
+++ 0x11, /* dest = ~src & ~dest; DSon, GXnor, 0x8 */
+++ 0x99, /* dest ^= ~src ; DSxn, GXequiv, 0x9 */
+++ 0x55, /* dest = ~dest; Dn, GXInvert, 0xA */
+++ 0xDD, /* dest = src|~dest ; SDno, GXorReverse, 0xB */
+++ 0x33, /* dest = ~src; Sn, GXcopyInverted, 0xC */
+++ 0xBB, /* dest |= ~src; DSno, GXorInverted, 0xD */
+++ 0x77, /* dest = ~src|~dest; DSan, GXnand, 0xE */
+++ 0xFF, /* dest = 0xFF; 1, GXset, 0xF */
+++};
+++/* same ROP but with Pattern as Source */
+++static const int XGIPatALUConv[] =
+++{
+++ 0x00, /* dest = 0; 0, GXclear, 0 */
+++ 0xA0, /* dest &= src; DPa, GXand, 0x1 */
+++ 0x50, /* dest = src & ~dest; PDna, GXandReverse, 0x2 */
+++ 0xF0, /* dest = src; P, GXcopy, 0x3 */
+++ 0x0A, /* dest &= ~src; DPna, GXandInverted, 0x4 */
+++ 0xAA, /* dest = dest; D, GXnoop, 0x5 */
+++ 0x5A, /* dest = ^src; DPx, GXxor, 0x6 */
+++ 0xFA, /* dest |= src; DPo, GXor, 0x7 */
+++ 0x05, /* dest = ~src & ~dest; DPon, GXnor, 0x8 */
+++ 0xA5, /* dest ^= ~src ; DPxn, GXequiv, 0x9 */
+++ 0x55, /* dest = ~dest; Dn, GXInvert, 0xA */
+++ 0xF5, /* dest = src|~dest ; PDno, GXorReverse, 0xB */
+++ 0x0F, /* dest = ~src; Pn, GXcopyInverted, 0xC */
+++ 0xAF, /* dest |= ~src; DPno, GXorInverted, 0xD */
+++ 0x5F, /* dest = ~src|~dest; DPan, GXnand, 0xE */
+++ 0xFF, /* dest = 0xFF; 1, GXset, 0xF */
+++};
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+++static const unsigned char myrops[] = {
+++ 3, 10, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
+++ };
+++#endif
+++
+++/* 300 series */
+++
+++static void
+++XGI300Sync(void)
+++{
+++ XGI300Idle
+++}
+++
+++static void
+++XGI310Sync(void)
+++{
+++ XGI310Idle
+++}
+++
+++static void
+++XGI300SetupForScreenToScreenCopy(int xdir, int ydir, int rop,
+++ unsigned int planemask, int trans_color)
+++{
+++ XGI300SetupDSTColorDepth(xgi_video_info.DstColor);
+++ XGI300SetupSRCPitch(xgi_video_info.video_linelength)
+++ XGI300SetupDSTRect(xgi_video_info.video_linelength, 0xFFF)
+++
+++ if(trans_color != -1) {
+++ XGI300SetupROP(0x0A)
+++ XGI300SetupSRCTrans(trans_color)
+++ XGI300SetupCMDFlag(TRANSPARENT_BITBLT)
+++ } else {
+++ XGI300SetupROP(XGIALUConv[rop])
+++ }
+++ if(xdir > 0) {
+++ XGI300SetupCMDFlag(X_INC)
+++ }
+++ if(ydir > 0) {
+++ XGI300SetupCMDFlag(Y_INC)
+++ }
+++}
+++
+++static void
+++XGI300SubsequentScreenToScreenCopy(int src_x, int src_y, int dst_x, int dst_y,
+++ int width, int height)
+++{
+++ long srcbase, dstbase;
+++
+++ srcbase = dstbase = 0;
+++ if (src_y >= 2048) {
+++ srcbase = xgi_video_info.video_linelength * src_y;
+++ src_y = 0;
+++ }
+++ if (dst_y >= 2048) {
+++ dstbase = xgi_video_info.video_linelength * dst_y;
+++ dst_y = 0;
+++ }
+++
+++ XGI300SetupSRCBase(srcbase);
+++ XGI300SetupDSTBase(dstbase);
+++
+++ if(!(xgi_video_info.CommandReg & X_INC)) {
+++ src_x += width-1;
+++ dst_x += width-1;
+++ }
+++ if(!(xgi_video_info.CommandReg & Y_INC)) {
+++ src_y += height-1;
+++ dst_y += height-1;
+++ }
+++ XGI300SetupRect(width, height)
+++ XGI300SetupSRCXY(src_x, src_y)
+++ XGI300SetupDSTXY(dst_x, dst_y)
+++ XGI300DoCMD
+++}
+++
+++static void
+++XGI300SetupForSolidFill(int color, int rop, unsigned int planemask)
+++{
+++ XGI300SetupPATFG(color)
+++ XGI300SetupDSTRect(xgi_video_info.video_linelength, 0xFFF)
+++ XGI300SetupDSTColorDepth(xgi_video_info.DstColor);
+++ XGI300SetupROP(XGIPatALUConv[rop])
+++ XGI300SetupCMDFlag(PATFG)
+++}
+++
+++static void
+++XGI300SubsequentSolidFillRect(int x, int y, int w, int h)
+++{
+++ long dstbase;
+++
+++ dstbase = 0;
+++ if(y >= 2048) {
+++ dstbase = xgi_video_info.video_linelength * y;
+++ y = 0;
+++ }
+++ XGI300SetupDSTBase(dstbase)
+++ XGI300SetupDSTXY(x,y)
+++ XGI300SetupRect(w,h)
+++ XGI300SetupCMDFlag(X_INC | Y_INC | BITBLT)
+++ XGI300DoCMD
+++}
+++
+++/* 310/325 series ------------------------------------------------ */
+++
+++static void
+++XGI310SetupForScreenToScreenCopy(int xdir, int ydir, int rop,
+++ unsigned int planemask, int trans_color)
+++{
+++ XGI310SetupDSTColorDepth(xgi_video_info.DstColor);
+++ XGI310SetupSRCPitch(xgi_video_info.video_linelength)
+++ XGI310SetupDSTRect(xgi_video_info.video_linelength, 0xFFF)
+++ if (trans_color != -1) {
+++ XGI310SetupROP(0x0A)
+++ XGI310SetupSRCTrans(trans_color)
+++ XGI310SetupCMDFlag(TRANSPARENT_BITBLT)
+++ } else {
+++ XGI310SetupROP(XGIALUConv[rop])
+++ /* Set command - not needed, both 0 */
+++ /* XGISetupCMDFlag(BITBLT | SRCVIDEO) */
+++ }
+++ XGI310SetupCMDFlag(xgi_video_info.XGI310_AccelDepth)
+++ /* TW: The 310/325 series is smart enough to know the direction */
+++}
+++
+++static void
+++XGI310SubsequentScreenToScreenCopy(int src_x, int src_y, int dst_x, int dst_y,
+++ int width, int height)
+++{
+++ long srcbase, dstbase;
+++ int mymin, mymax;
+++
+++ srcbase = dstbase = 0;
+++ mymin = min(src_y, dst_y);
+++ mymax = max(src_y, dst_y);
+++
+++ /* Although the chip knows the direction to use
+++ * if the source and destination areas overlap,
+++ * that logic fails if we fiddle with the bitmap
+++ * addresses. Therefore, we check if the source
+++ * and destination blitting areas overlap and
+++ * adapt the bitmap addresses synchronously
+++ * if the coordinates exceed the valid range.
+++ * The the areas do not overlap, we do our
+++ * normal check.
+++ */
+++ if((mymax - mymin) < height) {
+++ if((src_y >= 2048) || (dst_y >= 2048)) {
+++ srcbase = xgi_video_info.video_linelength * mymin;
+++ dstbase = xgi_video_info.video_linelength * mymin;
+++ src_y -= mymin;
+++ dst_y -= mymin;
+++ }
+++ } else {
+++ if(src_y >= 2048) {
+++ srcbase = xgi_video_info.video_linelength * src_y;
+++ src_y = 0;
+++ }
+++ if(dst_y >= 2048) {
+++ dstbase = xgi_video_info.video_linelength * dst_y;
+++ dst_y = 0;
+++ }
+++ }
+++
+++ XGI310SetupSRCBase(srcbase);
+++ XGI310SetupDSTBase(dstbase);
+++ XGI310SetupRect(width, height)
+++ XGI310SetupSRCXY(src_x, src_y)
+++ XGI310SetupDSTXY(dst_x, dst_y)
+++ XGI310DoCMD
+++}
+++
+++static void
+++XGI310SetupForSolidFill(int color, int rop, unsigned int planemask)
+++{
+++ XGI310SetupPATFG(color)
+++ XGI310SetupDSTRect(xgi_video_info.video_linelength, 0xFFF)
+++ XGI310SetupDSTColorDepth(xgi_video_info.DstColor);
+++ XGI310SetupROP(XGIPatALUConv[rop])
+++ XGI310SetupCMDFlag(PATFG | xgi_video_info.XGI310_AccelDepth)
+++}
+++
+++static void
+++XGI310SubsequentSolidFillRect(int x, int y, int w, int h)
+++{
+++ long dstbase;
+++
+++ dstbase = 0;
+++ if(y >= 2048) {
+++ dstbase = xgi_video_info.video_linelength * y;
+++ y = 0;
+++ }
+++ XGI310SetupDSTBase(dstbase)
+++ XGI310SetupDSTXY(x,y)
+++ XGI310SetupRect(w,h)
+++ XGI310SetupCMDFlag(BITBLT)
+++ XGI310DoCMD
+++}
+++
+++/* --------------------------------------------------------------------- */
+++
+++/* The exported routines */
+++
+++int XGIfb_initaccel(void)
+++{
+++#ifdef XGIFB_USE_SPINLOCKS
+++ spin_lock_init(&xgi_video_info.lockaccel);
+++#endif
+++ return(0);
+++}
+++
+++void XGIfb_syncaccel(void)
+++{
+++
+++ XGI310Sync();
+++
+++}
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34) /* --- KERNEL 2.5.34 and later --- */
+++
+++int fbcon_XGI_sync(struct fb_info *info)
+++{
+++ if(!XGIfb_accel) return 0;
+++ CRITFLAGS
+++
+++ XGI310Sync();
+++
+++ CRITEND
+++ return 0;
+++}
+++
+++void fbcon_XGI_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
+++{
+++ int col=0;
+++ CRITFLAGS
+++
+++
+++ if(!rect->width || !rect->height)
+++ return;
+++
+++ if(!XGIfb_accel) {
+++ cfb_fillrect(info, rect);
+++ return;
+++ }
+++
+++ switch(info->var.bits_per_pixel) {
+++ case 8: col = rect->color;
+++ break;
+++ case 16: col = ((u32 *)(info->pseudo_palette))[rect->color];
+++ break;
+++ case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
+++ break;
+++ }
+++
+++
+++ CRITBEGIN
+++ XGI310SetupForSolidFill(col, myrops[rect->rop], 0);
+++ XGI310SubsequentSolidFillRect(rect->dx, rect->dy, rect->width, rect->height);
+++ CRITEND
+++ XGI310Sync();
+++
+++
+++}
+++
+++void fbcon_XGI_copyarea(struct fb_info *info, const struct fb_copyarea *area)
+++{
+++ int xdir, ydir;
+++ CRITFLAGS
+++
+++
+++ if(!XGIfb_accel) {
+++ cfb_copyarea(info, area);
+++ return;
+++ }
+++
+++ if(!area->width || !area->height)
+++ return;
+++
+++ if(area->sx < area->dx) xdir = 0;
+++ else xdir = 1;
+++ if(area->sy < area->dy) ydir = 0;
+++ else ydir = 1;
+++
+++ CRITBEGIN
+++ XGI310SetupForScreenToScreenCopy(xdir, ydir, 3, 0, -1);
+++ XGI310SubsequentScreenToScreenCopy(area->sx, area->sy, area->dx, area->dy, area->width, area->height);
+++ CRITEND
+++ XGI310Sync();
+++
+++}
+++
+++#endif
+++
+++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33) /* ------ KERNEL <2.5.34 ------ */
+++
+++void fbcon_XGI_bmove(struct display *p, int srcy, int srcx,
+++ int dsty, int dstx, int height, int width)
+++{
+++ int xdir, ydir;
+++ CRITFLAGS
+++
+++ if(!xgi_video_info.accel) {
+++ switch(xgi_video_info.video_bpp) {
+++ case 8:
+++#ifdef FBCON_HAS_CFB8
+++ fbcon_cfb8_bmove(p, srcy, srcx, dsty, dstx, height, width);
+++#endif
+++ break;
+++ case 16:
+++#ifdef FBCON_HAS_CFB16
+++ fbcon_cfb16_bmove(p, srcy, srcx, dsty, dstx, height, width);
+++#endif
+++ break;
+++ case 32:
+++#ifdef FBCON_HAS_CFB32
+++ fbcon_cfb32_bmove(p, srcy, srcx, dsty, dstx, height, width);
+++#endif
+++ break;
+++ }
+++ return;
+++ }
+++
+++ srcx *= fontwidth(p);
+++ srcy *= fontheight(p);
+++ dstx *= fontwidth(p);
+++ dsty *= fontheight(p);
+++ width *= fontwidth(p);
+++ height *= fontheight(p);
+++
+++ if(srcx < dstx) xdir = 0;
+++ else xdir = 1;
+++ if(srcy < dsty) ydir = 0;
+++ else ydir = 1;
+++
+++
+++ CRITBEGIN
+++ XGI310SetupForScreenToScreenCopy(xdir, ydir, 3, 0, -1);
+++ XGI310SubsequentScreenToScreenCopy(srcx, srcy, dstx, dsty, width, height);
+++ CRITEND
+++ XGI310Sync();
+++#if 0
+++ printk(KERN_INFO "XGI_bmove sx %d sy %d dx %d dy %d w %d h %d\n",
+++ srcx, srcy, dstx, dsty, width, height);
+++#endif
+++
+++}
+++
+++
+++static void fbcon_XGI_clear(struct vc_data *conp, struct display *p,
+++ int srcy, int srcx, int height, int width, int color)
+++{
+++ CRITFLAGS
+++
+++ srcx *= fontwidth(p);
+++ srcy *= fontheight(p);
+++ width *= fontwidth(p);
+++ height *= fontheight(p);
+++
+++
+++ CRITBEGIN
+++ XGI310SetupForSolidFill(color, 3, 0);
+++ XGI310SubsequentSolidFillRect(srcx, srcy, width, height);
+++ CRITEND
+++ XGI310Sync();
+++
+++}
+++
+++void fbcon_XGI_clear8(struct vc_data *conp, struct display *p,
+++ int srcy, int srcx, int height, int width)
+++{
+++ u32 bgx;
+++
+++ if(!xgi_video_info.accel) {
+++#ifdef FBCON_HAS_CFB8
+++ fbcon_cfb8_clear(conp, p, srcy, srcx, height, width);
+++#endif
+++ return;
+++ }
+++
+++ bgx = attr_bgcol_ec(p, conp);
+++ fbcon_XGI_clear(conp, p, srcy, srcx, height, width, bgx);
+++}
+++
+++void fbcon_XGI_clear16(struct vc_data *conp, struct display *p,
+++ int srcy, int srcx, int height, int width)
+++{
+++ u32 bgx;
+++ if(!xgi_video_info.accel) {
+++#ifdef FBCON_HAS_CFB16
+++ fbcon_cfb16_clear(conp, p, srcy, srcx, height, width);
+++#endif
+++ return;
+++ }
+++
+++ bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
+++ fbcon_XGI_clear(conp, p, srcy, srcx, height, width, bgx);
+++}
+++
+++void fbcon_XGI_clear32(struct vc_data *conp, struct display *p,
+++ int srcy, int srcx, int height, int width)
+++{
+++ u32 bgx;
+++
+++ if(!xgi_video_info.accel) {
+++#ifdef FBCON_HAS_CFB32
+++ fbcon_cfb32_clear(conp, p, srcy, srcx, height, width);
+++#endif
+++ return;
+++ }
+++
+++ bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
+++ fbcon_XGI_clear(conp, p, srcy, srcx, height, width, bgx);
+++}
+++
+++void fbcon_XGI_revc(struct display *p, int srcx, int srcy)
+++{
+++ CRITFLAGS
+++
+++ if(!xgi_video_info.accel) {
+++ switch(xgi_video_info.video_bpp) {
+++ case 16:
+++#ifdef FBCON_HAS_CFB16
+++ fbcon_cfb16_revc(p, srcx, srcy);
+++#endif
+++ break;
+++ case 32:
+++#ifdef FBCON_HAS_CFB32
+++ fbcon_cfb32_revc(p, srcx, srcy);
+++#endif
+++ break;
+++ }
+++ return;
+++ }
+++
+++ srcx *= fontwidth(p);
+++ srcy *= fontheight(p);
+++
+++
+++ CRITBEGIN
+++ XGI310SetupForSolidFill(0, 0x0a, 0);
+++ XGI310SubsequentSolidFillRect(srcx, srcy, fontwidth(p), fontheight(p));
+++ CRITEND
+++ XGI310Sync();
+++
+++}
+++
+++#ifdef FBCON_HAS_CFB8
+++struct display_switch fbcon_XGI8 = {
+++ setup: fbcon_cfb8_setup,
+++ bmove: fbcon_XGI_bmove,
+++ clear: fbcon_XGI_clear8,
+++ putc: fbcon_cfb8_putc,
+++ putcs: fbcon_cfb8_putcs,
+++ revc: fbcon_cfb8_revc,
+++ clear_margins: fbcon_cfb8_clear_margins,
+++ fontwidthmask: FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
+++};
+++#endif
+++#ifdef FBCON_HAS_CFB16
+++struct display_switch fbcon_XGI16 = {
+++ setup: fbcon_cfb16_setup,
+++ bmove: fbcon_XGI_bmove,
+++ clear: fbcon_XGI_clear16,
+++ putc: fbcon_cfb16_putc,
+++ putcs: fbcon_cfb16_putcs,
+++ revc: fbcon_XGI_revc,
+++ clear_margins: fbcon_cfb16_clear_margins,
+++ fontwidthmask: FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
+++};
+++#endif
+++#ifdef FBCON_HAS_CFB32
+++struct display_switch fbcon_XGI32 = {
+++ setup: fbcon_cfb32_setup,
+++ bmove: fbcon_XGI_bmove,
+++ clear: fbcon_XGI_clear32,
+++ putc: fbcon_cfb32_putc,
+++ putcs: fbcon_cfb32_putcs,
+++ revc: fbcon_XGI_revc,
+++ clear_margins: fbcon_cfb32_clear_margins,
+++ fontwidthmask: FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
+++};
+++#endif
+++
+++#endif /* KERNEL VERSION */
+++
+++
++diff --git a/drivers/video/xgi/XGI_accel.h b/drivers/video/xgi/XGI_accel.h
++new file mode 100644
++index 0000000..04e1267
++--- /dev/null
+++++ b/drivers/video/xgi/XGI_accel.h
++@@ -0,0 +1,511 @@
+++/*
+++ * XGI 300/630/730/540/315/550/650/740 frame buffer driver
+++ * for Linux kernels 2.4.x and 2.5.x
+++ *
+++ * 2D acceleration part
+++ *
+++ * Based on the X driver's XGI300_accel.h which is
+++ * Copyright Xavier Ducoin <x.ducoin@...>
+++ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+++ * and XGI310_accel.h which is
+++ * Copyright 2002 by Thomas Winischhofer, Vienna, Austria
+++ *
+++ * Author: Thomas Winischhofer <thomas@...>:
+++ * (see http://www.winischhofer.net/
+++ * for more information and updates)
+++ */
+++
+++#ifndef _XGIFB_ACCEL_H
+++#define _XGIFB_ACCEL_H
+++
+++/* Guard accelerator accesses with spin_lock_irqsave? Works well without. */
+++#undef XGIFB_USE_SPINLOCKS
+++
+++#ifdef XGIFB_USE_SPINLOCKS
+++#include <linux/spinlock.h>
+++#define CRITBEGIN spin_lock_irqsave(&xgi_video_info.lockaccel), critflags);
+++#define CRITEND spin_unlock_irqrestore(&xgi_video_info.lockaccel), critflags);
+++#define CRITFLAGS unsigned long critflags;
+++#else
+++#define CRITBEGIN
+++#define CRITEND
+++#define CRITFLAGS
+++#endif
+++
+++/* Definitions for the XGI engine communication. */
+++
+++#define PATREGSIZE 384 /* Pattern register size. 384 bytes @ 0x8300 */
+++#define BR(x) (0x8200 | (x) << 2)
+++#define PBR(x) (0x8300 | (x) << 2)
+++
+++/* XGI300 engine commands */
+++#define BITBLT 0x00000000 /* Blit */
+++#define COLOREXP 0x00000001 /* Color expand */
+++#define ENCOLOREXP 0x00000002 /* Enhanced color expand */
+++#define MULTIPLE_SCANLINE 0x00000003 /* ? */
+++#define LINE 0x00000004 /* Draw line */
+++#define TRAPAZOID_FILL 0x00000005 /* Fill trapezoid */
+++#define TRANSPARENT_BITBLT 0x00000006 /* Transparent Blit */
+++
+++/* Additional engine commands for 310/325 */
+++#define ALPHA_BLEND 0x00000007 /* Alpha blend ? */
+++#define A3D_FUNCTION 0x00000008 /* 3D command ? */
+++#define CLEAR_Z_BUFFER 0x00000009 /* ? */
+++#define GRADIENT_FILL 0x0000000A /* Gradient fill */
+++#define STRETCH_BITBLT 0x0000000B /* Stretched Blit */
+++
+++/* source select */
+++#define SRCVIDEO 0x00000000 /* source is video RAM */
+++#define SRCSYSTEM 0x00000010 /* source is system memory */
+++#define SRCCPUBLITBUF SRCSYSTEM /* source is CPU-driven BitBuffer (for color expand) */
+++#define SRCAGP 0x00000020 /* source is AGP memory (?) */
+++
+++/* Pattern flags */
+++#define PATFG 0x00000000 /* foreground color */
+++#define PATPATREG 0x00000040 /* pattern in pattern buffer (0x8300) */
+++#define PATMONO 0x00000080 /* mono pattern */
+++
+++/* blitting direction (300 series only) */
+++#define X_INC 0x00010000
+++#define X_DEC 0x00000000
+++#define Y_INC 0x00020000
+++#define Y_DEC 0x00000000
+++
+++/* Clipping flags */
+++#define NOCLIP 0x00000000
+++#define NOMERGECLIP 0x04000000
+++#define CLIPENABLE 0x00040000
+++#define CLIPWITHOUTMERGE 0x04040000
+++
+++/* Transparency */
+++#define OPAQUE 0x00000000
+++#define TRANSPARENT 0x00100000
+++
+++/* ? */
+++#define DSTAGP 0x02000000
+++#define DSTVIDEO 0x02000000
+++
+++/* Line */
+++#define LINE_STYLE 0x00800000
+++#define NO_RESET_COUNTER 0x00400000
+++#define NO_LAST_PIXEL 0x00200000
+++
+++/* Subfunctions for Color/Enhanced Color Expansion (310/325 only) */
+++#define COLOR_TO_MONO 0x00100000
+++#define AA_TEXT 0x00200000
+++
+++/* Some general registers for 310/325 series */
+++#define SRC_ADDR 0x8200
+++#define SRC_PITCH 0x8204
+++#define AGP_BASE 0x8206 /* color-depth dependent value */
+++#define SRC_Y 0x8208
+++#define SRC_X 0x820A
+++#define DST_Y 0x820C
+++#define DST_X 0x820E
+++#define DST_ADDR 0x8210
+++#define DST_PITCH 0x8214
+++#define DST_HEIGHT 0x8216
+++#define RECT_WIDTH 0x8218
+++#define RECT_HEIGHT 0x821A
+++#define PAT_FGCOLOR 0x821C
+++#define PAT_BGCOLOR 0x8220
+++#define SRC_FGCOLOR 0x8224
+++#define SRC_BGCOLOR 0x8228
+++#define MONO_MASK 0x822C
+++#define LEFT_CLIP 0x8234
+++#define TOP_CLIP 0x8236
+++#define RIGHT_CLIP 0x8238
+++#define BOTTOM_CLIP 0x823A
+++#define COMMAND_READY 0x823C
+++#define FIRE_TRIGGER 0x8240
+++
+++#define PATTERN_REG 0x8300 /* 384 bytes pattern buffer */
+++
+++/* Line registers */
+++#define LINE_X0 SRC_Y
+++#define LINE_X1 DST_Y
+++#define LINE_Y0 SRC_X
+++#define LINE_Y1 DST_X
+++#define LINE_COUNT RECT_WIDTH
+++#define LINE_STYLE_PERIOD RECT_HEIGHT
+++#define LINE_STYLE_0 MONO_MASK
+++#define LINE_STYLE_1 0x8230
+++#define LINE_XN PATTERN_REG
+++#define LINE_YN PATTERN_REG+2
+++
+++/* Transparent bitblit registers */
+++#define TRANS_DST_KEY_HIGH PAT_FGCOLOR
+++#define TRANS_DST_KEY_LOW PAT_BGCOLOR
+++#define TRANS_SRC_KEY_HIGH SRC_FGCOLOR
+++#define TRANS_SRC_KEY_LOW SRC_BGCOLOR
+++
+++/* Queue */
+++#define Q_BASE_ADDR 0x85C0 /* Base address of software queue (?) */
+++#define Q_WRITE_PTR 0x85C4 /* Current write pointer (?) */
+++#define Q_READ_PTR 0x85C8 /* Current read pointer (?) */
+++#define Q_STATUS 0x85CC /* queue status */
+++
+++
+++#define MMIO_IN8(base, offset) \
+++ *(volatile u8 *)(((u8*)(base)) + (offset))
+++#define MMIO_IN16(base, offset) \
+++ *(volatile u16 *)(void *)(((u8*)(base)) + (offset))
+++#define MMIO_IN32(base, offset) \
+++ *(volatile u32 *)(void *)(((u8*)(base)) + (offset))
+++#define MMIO_OUT8(base, offset, val) \
+++ *(volatile u8 *)(((u8*)(base)) + (offset)) = (val)
+++#define MMIO_OUT16(base, offset, val) \
+++ *(volatile u16 *)(void *)(((u8*)(base)) + (offset)) = (val)
+++#define MMIO_OUT32(base, offset, val) \
+++ *(volatile u32 *)(void *)(((u8*)(base)) + (offset)) = (val)
+++
+++
+++
+++/* ------------- XGI 300 series -------------- */
+++
+++/* Macros to do useful things with the XGI BitBLT engine */
+++
+++/* BR(16) (0x8420):
+++
+++ bit 31 2D engine: 1 is idle,
+++ bit 30 3D engine: 1 is idle,
+++ bit 29 Command queue: 1 is empty
+++
+++ bits 28:24: Current CPU driven BitBlt buffer stage bit[4:0]
+++
+++ bits 15:0: Current command queue length
+++
+++*/
+++
+++/* TW: BR(16)+2 = 0x8242 */
+++
+++int xgiCmdQueLen;
+++
+++#define XGI300Idle \
+++ { \
+++ while( (MMIO_IN16(xgi_video_info.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+++ while( (MMIO_IN16(xgi_video_info.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+++ while( (MMIO_IN16(xgi_video_info.mmio_vbase, BR(16)+2) & 0xE000) != 0xE000){}; \
+++ xgiCmdQueLen=MMIO_IN16(xgi_video_info.mmio_vbase, 0x8240); \
+++ }
+++/* TW: (do three times, because 2D engine seems quite unsure about whether or not it's idle) */
+++
+++#define XGI300SetupSRCBase(base) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(0), base);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupSRCPitch(pitch) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, BR(1), pitch);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupSRCXY(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(2), (x)<<16 | (y) );\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupDSTBase(base) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(4), base);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupDSTXY(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(3), (x)<<16 | (y) );\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupDSTRect(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(5), (y)<<16 | (x) );\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupDSTColorDepth(bpp) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, BR(1)+2, bpp);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupRect(w,h) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(6), (h)<<16 | (w) );\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupPATFG(color) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(7), color);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupPATBG(color) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(8), color);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupSRCFG(color) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(9), color);\
+++ xgiCmdQueLen --;
+++
+++#define XGI300SetupSRCBG(color) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(10), color);\
+++ xgiCmdQueLen --;
+++
+++/* 0x8224 src colorkey high */
+++/* 0x8228 src colorkey low */
+++/* 0x821c dest colorkey high */
+++/* 0x8220 dest colorkey low */
+++#define XGI300SetupSRCTrans(color) \
+++ if (xgiCmdQueLen <= 1) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, 0x8224, color);\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, 0x8228, color);\
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI300SetupDSTTrans(color) \
+++ if (xgiCmdQueLen <= 1) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, 0x821C, color); \
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, 0x8220, color); \
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI300SetupMONOPAT(p0,p1) \
+++ if (xgiCmdQueLen <= 1) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(11), p0);\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(12), p1);\
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI300SetupClipLT(left,top) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(13), ((left) & 0xFFFF) | (top)<<16 );\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupClipRB(right,bottom) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\
+++ xgiCmdQueLen--;
+++
+++/* General */
+++#define XGI300SetupROP(rop) \
+++ xgi_video_info.CommandReg = (rop) << 8;
+++
+++#define XGI300SetupCMDFlag(flags) \
+++ xgi_video_info.CommandReg |= (flags);
+++
+++#define XGI300DoCMD \
+++ if (xgiCmdQueLen <= 1) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(15), xgi_video_info.CommandReg); \
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(16), 0);\
+++ xgiCmdQueLen -= 2;
+++
+++/* Line */
+++#define XGI300SetupX0Y0(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(2), (y)<<16 | (x) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupX1Y1(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(3), (y)<<16 | (x) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupLineCount(c) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, BR(6), c);\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupStylePeriod(p) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, BR(6)+2, p);\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupStyleLow(ls) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(11), ls);\
+++ xgiCmdQueLen--;
+++
+++#define XGI300SetupStyleHigh(ls) \
+++ if (xgiCmdQueLen <= 0) XGI300Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, BR(12), ls);\
+++ xgiCmdQueLen--;
+++
+++
+++
+++/* ----------- XGI 310/325 series --------------- */
+++
+++/* Q_STATUS:
+++ bit 31 = 1: All engines idle and all queues empty
+++ bit 30 = 1: Hardware Queue (=HW CQ, 2D queue, 3D queue) empty
+++ bit 29 = 1: 2D engine is idle
+++ bit 28 = 1: 3D engine is idle
+++ bit 27 = 1: HW command queue empty
+++ bit 26 = 1: 2D queue empty
+++ bit 25 = 1: 3D queue empty
+++ bit 24 = 1: SW command queue empty
+++ bits 23:16: 2D counter 3
+++ bits 15:8: 2D counter 2
+++ bits 7:0: 2D counter 1
+++
+++ Where is the command queue length (current amount of commands the queue
+++ can accept) on the 310/325 series? (The current implementation is taken
+++ from 300 series and certainly wrong...)
+++*/
+++
+++/* TW: FIXME: xgiCmdQueLen is... where....? */
+++#define XGI310Idle \
+++ { \
+++ while( (MMIO_IN16(xgi_video_info.mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+++ while( (MMIO_IN16(xgi_video_info.mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
+++ xgiCmdQueLen=MMIO_IN16(xgi_video_info.mmio_vbase, Q_STATUS); \
+++ }
+++
+++#define XGI310SetupSRCBase(base) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, SRC_ADDR, base);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupSRCPitch(pitch) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, SRC_PITCH, pitch);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupSRCXY(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, SRC_Y, (x)<<16 | (y) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupDSTBase(base) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, DST_ADDR, base);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupDSTXY(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, DST_Y, (x)<<16 | (y) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupDSTRect(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, DST_PITCH, (y)<<16 | (x) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupDSTColorDepth(bpp) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, AGP_BASE, bpp);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupRect(w,h) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, RECT_WIDTH, (h)<<16 | (w) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupPATFG(color) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, PAT_FGCOLOR, color);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupPATBG(color) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, PAT_BGCOLOR, color);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupSRCFG(color) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, SRC_FGCOLOR, color);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupSRCBG(color) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, SRC_BGCOLOR, color);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupSRCTrans(color) \
+++ if (xgiCmdQueLen <= 1) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, TRANS_SRC_KEY_HIGH, color);\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, TRANS_SRC_KEY_LOW, color);\
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI310SetupDSTTrans(color) \
+++ if (xgiCmdQueLen <= 1) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, TRANS_DST_KEY_HIGH, color); \
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, TRANS_DST_KEY_LOW, color); \
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI310SetupMONOPAT(p0,p1) \
+++ if (xgiCmdQueLen <= 1) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, MONO_MASK, p0);\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, MONO_MASK+4, p1);\
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI310SetupClipLT(left,top) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, LEFT_CLIP, ((left) & 0xFFFF) | (top)<<16 );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupClipRB(right,bottom) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, RIGHT_CLIP, ((right) & 0xFFFF) | (bottom)<<16 );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupROP(rop) \
+++ xgi_video_info.CommandReg = (rop) << 8;
+++
+++#define XGI310SetupCMDFlag(flags) \
+++ xgi_video_info.CommandReg |= (flags);
+++
+++#define XGI310DoCMD \
+++ if (xgiCmdQueLen <= 1) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, COMMAND_READY, xgi_video_info.CommandReg); \
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, FIRE_TRIGGER, 0); \
+++ xgiCmdQueLen -= 2;
+++
+++#define XGI310SetupX0Y0(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, LINE_X0, (y)<<16 | (x) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupX1Y1(x,y) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, LINE_X1, (y)<<16 | (x) );\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupLineCount(c) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, LINE_COUNT, c);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupStylePeriod(p) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT16(xgi_video_info.mmio_vbase, LINE_STYLE_PERIOD, p);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupStyleLow(ls) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, LINE_STYLE_0, ls);\
+++ xgiCmdQueLen--;
+++
+++#define XGI310SetupStyleHigh(ls) \
+++ if (xgiCmdQueLen <= 0) XGI310Idle;\
+++ MMIO_OUT32(xgi_video_info.mmio_vbase, LINE_STYLE_1, ls);\
+++ xgiCmdQueLen--;
+++
+++int XGIfb_initaccel(void);
+++void XGIfb_syncaccel(void);
+++
+++extern struct video_info xgi_video_info;
+++
+++#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,33)
+++void fbcon_XGI_bmove(struct display *p, int srcy, int srcx, int dsty,
+++ int dstx, int height, int width);
+++void fbcon_XGI_revc(struct display *p, int srcy, int srcx);
+++void fbcon_XGI_clear8(struct vc_data *conp, struct display *p, int srcy,
+++ int srcx, int height, int width);
+++void fbcon_XGI_clear16(struct vc_data *conp, struct display *p, int srcy,
+++ int srcx, int height, int width);
+++void fbcon_XGI_clear32(struct vc_data *conp, struct display *p, int srcy,
+++ int srcx, int height, int width);
+++#endif
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
+++extern int XGIfb_accel;
+++void fbcon_XGI_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
+++void fbcon_XGI_copyarea(struct fb_info *info, const struct fb_copyarea *area);
+++#endif
+++
+++#endif
++diff --git a/drivers/video/xgi/XGI_main.h b/drivers/video/xgi/XGI_main.h
++new file mode 100644
++index 0000000..1d73cd5
++--- /dev/null
+++++ b/drivers/video/xgi/XGI_main.h
++@@ -0,0 +1,1042 @@
+++#ifndef _XGIFB_MAIN
+++#define _XGIFB_MAIN
+++
+++
+++/* ------------------- Constant Definitions ------------------------- */
+++
+++
+++#include "XGIfb.h"
+++#include "vb_struct.h"
+++#include "vb_def.h"
+++
+++//#define LINUXBIOS /* turn this on when compiling for LINUXBIOS */
+++#define AGPOFF /* default is turn off AGP */
+++
+++#define XGIFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
+++
+++#define VER_MAJOR 0
+++#define VER_MINOR 8
+++#define VER_LEVEL 1
+++
+++#define DRIVER_DESC "XGI Volari Frame Buffer Module Version 0.8.1"
+++
+++#ifndef PCI_VENDOR_ID_XG
+++#define PCI_VENDOR_ID_XG 0x18CA
+++#endif
+++
+++#ifndef PCI_DEVICE_ID_XG_40
+++#define PCI_DEVICE_ID_XG_40 0x040
+++#endif
+++#ifndef PCI_DEVICE_ID_XG_41
+++#define PCI_DEVICE_ID_XG_41 0x041
+++#endif
+++#ifndef PCI_DEVICE_ID_XG_42
+++#define PCI_DEVICE_ID_XG_42 0x042
+++#endif
+++#ifndef PCI_DEVICE_ID_XG_20
+++#define PCI_DEVICE_ID_XG_20 0x020
+++#endif
+++#ifndef PCI_DEVICE_ID_XG_27
+++#define PCI_DEVICE_ID_XG_27 0x027
+++#endif
+++
+++
+++
+++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
+++#define XGI_IOTYPE1 void __iomem
+++#define XGI_IOTYPE2 __iomem
+++#define XGIINITSTATIC static
+++#else
+++#define XGI_IOTYPE1 unsigned char
+++#define XGI_IOTYPE2
+++#define XGIINITSTATIC
+++#endif
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++static struct pci_device_id __devinitdata xgifb_pci_table[] = {
+++
+++ { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
+++ { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
+++ { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
+++ { PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
+++ { 0 }
+++};
+++
+++MODULE_DEVICE_TABLE(pci, xgifb_pci_table);
+++#endif
+++/* To be included in fb.h */
+++#ifndef FB_ACCEL_XGI_GLAMOUR_2
+++#define FB_ACCEL_XGI_GLAMOUR_2 40 /* XGI 315, 650, 740 */
+++#endif
+++#ifndef FB_ACCEL_XGI_XABRE
+++#define FB_ACCEL_XGI_XABRE 41 /* XGI 330 ("Xabre") */
+++#endif
+++
+++#define MAX_ROM_SCAN 0x10000
+++
+++#define HW_CURSOR_CAP 0x80
+++#define TURBO_QUEUE_CAP 0x40
+++#define AGP_CMD_QUEUE_CAP 0x20
+++#define VM_CMD_QUEUE_CAP 0x10
+++#define MMIO_CMD_QUEUE_CAP 0x08
+++
+++
+++
+++/* For 315 series */
+++
+++#define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */
+++#define COMMAND_QUEUE_THRESHOLD 0x1F
+++
+++
+++/* TW */
+++#define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */
+++#define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */
+++
+++#define OH_ALLOC_SIZE 4000
+++#define SENTINEL 0x7fffffff
+++
+++#define SEQ_ADR 0x14
+++#define SEQ_DATA 0x15
+++#define DAC_ADR 0x18
+++#define DAC_DATA 0x19
+++#define CRTC_ADR 0x24
+++#define CRTC_DATA 0x25
+++#define DAC2_ADR (0x16-0x30)
+++#define DAC2_DATA (0x17-0x30)
+++#define VB_PART1_ADR (0x04-0x30)
+++#define VB_PART1_DATA (0x05-0x30)
+++#define VB_PART2_ADR (0x10-0x30)
+++#define VB_PART2_DATA (0x11-0x30)
+++#define VB_PART3_ADR (0x12-0x30)
+++#define VB_PART3_DATA (0x13-0x30)
+++#define VB_PART4_ADR (0x14-0x30)
+++#define VB_PART4_DATA (0x15-0x30)
+++
+++#define XGISR XGI_Pr.P3c4
+++#define XGICR XGI_Pr.P3d4
+++#define XGIDACA XGI_Pr.P3c8
+++#define XGIDACD XGI_Pr.P3c9
+++#define XGIPART1 XGI_Pr.Part1Port
+++#define XGIPART2 XGI_Pr.Part2Port
+++#define XGIPART3 XGI_Pr.Part3Port
+++#define XGIPART4 XGI_Pr.Part4Port
+++#define XGIPART5 XGI_Pr.Part5Port
+++#define XGIDAC2A XGIPART5
+++#define XGIDAC2D (XGIPART5 + 1)
+++#define XGIMISCR (XGI_Pr.RelIO + 0x1c)
+++#define XGIINPSTAT (XGI_Pr.RelIO + 0x2a)
+++
+++#define IND_XGI_PASSWORD 0x05 /* SRs */
+++#define IND_XGI_COLOR_MODE 0x06
+++#define IND_XGI_RAMDAC_CONTROL 0x07
+++#define IND_XGI_DRAM_SIZE 0x14
+++#define IND_XGI_SCRATCH_REG_16 0x16
+++#define IND_XGI_SCRATCH_REG_17 0x17
+++#define IND_XGI_SCRATCH_REG_1A 0x1A
+++#define IND_XGI_MODULE_ENABLE 0x1E
+++#define IND_XGI_PCI_ADDRESS_SET 0x20
+++#define IND_XGI_TURBOQUEUE_ADR 0x26
+++#define IND_XGI_TURBOQUEUE_SET 0x27
+++#define IND_XGI_POWER_ON_TRAP 0x38
+++#define IND_XGI_POWER_ON_TRAP2 0x39
+++#define IND_XGI_CMDQUEUE_SET 0x26
+++#define IND_XGI_CMDQUEUE_THRESHOLD 0x27
+++
+++#define IND_XGI_SCRATCH_REG_CR30 0x30 /* CRs */
+++#define IND_XGI_SCRATCH_REG_CR31 0x31
+++#define IND_XGI_SCRATCH_REG_CR32 0x32
+++#define IND_XGI_SCRATCH_REG_CR33 0x33
+++#define IND_XGI_LCD_PANEL 0x36
+++#define IND_XGI_SCRATCH_REG_CR37 0x37
+++#define IND_XGI_AGP_IO_PAD 0x48
+++
+++#define IND_BRI_DRAM_STATUS 0x63 /* PCI config memory size offset */
+++
+++#define MMIO_QUEUE_PHYBASE 0x85C0
+++#define MMIO_QUEUE_WRITEPORT 0x85C4
+++#define MMIO_QUEUE_READPORT 0x85C8
+++
+++#define IND_XGI_CRT2_WRITE_ENABLE_300 0x24
+++#define IND_XGI_CRT2_WRITE_ENABLE_315 0x2F
+++
+++#define XGI_PASSWORD 0x86 /* SR05 */
+++#define XGI_INTERLACED_MODE 0x20 /* SR06 */
+++#define XGI_8BPP_COLOR_MODE 0x0
+++#define XGI_15BPP_COLOR_MODE 0x1
+++#define XGI_16BPP_COLOR_MODE 0x2
+++#define XGI_32BPP_COLOR_MODE 0x4
+++
+++#define XGI_DRAM_SIZE_MASK 0xF0 /*SR14 */
+++#define XGI_DRAM_SIZE_1MB 0x00
+++#define XGI_DRAM_SIZE_2MB 0x01
+++#define XGI_DRAM_SIZE_4MB 0x02
+++#define XGI_DRAM_SIZE_8MB 0x03
+++#define XGI_DRAM_SIZE_16MB 0x04
+++#define XGI_DRAM_SIZE_32MB 0x05
+++#define XGI_DRAM_SIZE_64MB 0x06
+++#define XGI_DRAM_SIZE_128MB 0x07
+++#define XGI_DRAM_SIZE_256MB 0x08
+++#define XGI_DATA_BUS_MASK 0x02
+++#define XGI_DATA_BUS_64 0x00
+++#define XGI_DATA_BUS_128 0x01
+++#define XGI_DUAL_CHANNEL_MASK 0x0C
+++#define XGI_SINGLE_CHANNEL_1_RANK 0x0
+++#define XGI_SINGLE_CHANNEL_2_RANK 0x1
+++#define XGI_ASYM_DDR 0x02
+++#define XGI_DUAL_CHANNEL_1_RANK 0x3
+++
+++#define XGI550_DRAM_SIZE_MASK 0x3F /* 550/650/740 SR14 */
+++#define XGI550_DRAM_SIZE_4MB 0x00
+++#define XGI550_DRAM_SIZE_8MB 0x01
+++#define XGI550_DRAM_SIZE_16MB 0x03
+++#define XGI550_DRAM_SIZE_24MB 0x05
+++#define XGI550_DRAM_SIZE_32MB 0x07
+++#define XGI550_DRAM_SIZE_64MB 0x0F
+++#define XGI550_DRAM_SIZE_96MB 0x17
+++#define XGI550_DRAM_SIZE_128MB 0x1F
+++#define XGI550_DRAM_SIZE_256MB 0x3F
+++
+++#define XGI_SCRATCH_REG_1A_MASK 0x10
+++
+++#define XGI_ENABLE_2D 0x40 /* SR1E */
+++
+++#define XGI_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
+++#define XGI_PCI_ADDR_ENABLE 0x80
+++
+++#define XGI_AGP_CMDQUEUE_ENABLE 0x80 /* 315/650/740 SR26 */
+++#define XGI_VRAM_CMDQUEUE_ENABLE 0x40
+++#define XGI_MMIO_CMD_ENABLE 0x20
+++#define XGI_CMD_QUEUE_SIZE_512k 0x00
+++#define XGI_CMD_QUEUE_SIZE_1M 0x04
+++#define XGI_CMD_QUEUE_SIZE_2M 0x08
+++#define XGI_CMD_QUEUE_SIZE_4M 0x0C
+++#define XGI_CMD_QUEUE_RESET 0x01
+++#define XGI_CMD_AUTO_CORR 0x02
+++
+++#define XGI_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
+++#define XGI_MODE_SELECT_CRT2 0x02
+++#define XGI_VB_OUTPUT_COMPOSITE 0x04
+++#define XGI_VB_OUTPUT_SVIDEO 0x08
+++#define XGI_VB_OUTPUT_SCART 0x10
+++#define XGI_VB_OUTPUT_LCD 0x20
+++#define XGI_VB_OUTPUT_CRT2 0x40
+++#define XGI_VB_OUTPUT_HIVISION 0x80
+++
+++#define XGI_VB_OUTPUT_DISABLE 0x20 /* CR31 */
+++#define XGI_DRIVER_MODE 0x40
+++
+++#define XGI_VB_COMPOSITE 0x01 /* CR32 */
+++#define XGI_VB_SVIDEO 0x02
+++#define XGI_VB_SCART 0x04
+++#define XGI_VB_LCD 0x08
+++#define XGI_VB_CRT2 0x10
+++#define XGI_CRT1 0x20
+++#define XGI_VB_HIVISION 0x40
+++#define XGI_VB_YPBPR 0x80
+++#define XGI_VB_TV (XGI_VB_COMPOSITE | XGI_VB_SVIDEO | \
+++ XGI_VB_SCART | XGI_VB_HIVISION|XGI_VB_YPBPR)
+++
+++#define XGI_EXTERNAL_CHIP_MASK 0x0E /* CR37 */
+++#define XGI_EXTERNAL_CHIP_XGI301 0x01 /* in CR37 << 1 ! */
+++#define XGI_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
+++#define XGI_EXTERNAL_CHIP_TRUMPION 0x03 /* in CR37 << 1 ! */
+++#define XGI_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 /* in CR37 << 1 ! */
+++#define XGI_EXTERNAL_CHIP_CHRONTEL 0x05 /* in CR37 << 1 ! */
+++#define XGI310_EXTERNAL_CHIP_LVDS 0x02 /* in CR37 << 1 ! */
+++#define XGI310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 /* in CR37 << 1 ! */
+++
+++#define XGI_AGP_2X 0x20 /* CR48 */
+++
+++#define BRI_DRAM_SIZE_MASK 0x70 /* PCI bridge config data */
+++#define BRI_DRAM_SIZE_2MB 0x00
+++#define BRI_DRAM_SIZE_4MB 0x01
+++#define BRI_DRAM_SIZE_8MB 0x02
+++#define BRI_DRAM_SIZE_16MB 0x03
+++#define BRI_DRAM_SIZE_32MB 0x04
+++#define BRI_DRAM_SIZE_64MB 0x05
+++
+++#define HW_DEVICE_EXTENSION XGI_HW_DEVICE_INFO
+++#define PHW_DEVICE_EXTENSION PXGI_HW_DEVICE_INFO
+++
+++#define SR_BUFFER_SIZE 5
+++#define CR_BUFFER_SIZE 5
+++
+++/* Useful macros */
+++#define inXGIREG(base) inb(base)
+++#define outXGIREG(base,val) outb(val,base)
+++#define orXGIREG(base,val) do { \
+++ unsigned char __Temp = inb(base); \
+++ outXGIREG(base, __Temp | (val)); \
+++ } while (0)
+++#define andXGIREG(base,val) do { \
+++ unsigned char __Temp = inb(base); \
+++ outXGIREG(base, __Temp & (val)); \
+++ } while (0)
+++#define inXGIIDXREG(base,idx,var) do { \
+++ outb(idx,base); var=inb((base)+1); \
+++ } while (0)
+++#define outXGIIDXREG(base,idx,val) do { \
+++ outb(idx,base); outb((val),(base)+1); \
+++ } while (0)
+++#define orXGIIDXREG(base,idx,val) do { \
+++ unsigned char __Temp; \
+++ outb(idx,base); \
+++ __Temp = inb((base)+1)|(val); \
+++ outXGIIDXREG(base,idx,__Temp); \
+++ } while (0)
+++#define andXGIIDXREG(base,idx,and) do { \
+++ unsigned char __Temp; \
+++ outb(idx,base); \
+++ __Temp = inb((base)+1)&(and); \
+++ outXGIIDXREG(base,idx,__Temp); \
+++ } while (0)
+++#define setXGIIDXREG(base,idx,and,or) do { \
+++ unsigned char __Temp; \
+++ outb(idx,base); \
+++ __Temp = (inb((base)+1)&(and))|(or); \
+++ outXGIIDXREG(base,idx,__Temp); \
+++ } while (0)
+++
+++/* ------------------- Global Variables ----------------------------- */
+++
+++/* Fbcon variables */
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++static struct fb_info* fb_info;
+++#else
+++static struct fb_info XGI_fb_info;
+++#endif
+++
+++
+++static int video_type = FB_TYPE_PACKED_PIXELS;
+++
+++static struct fb_var_screeninfo default_var = {
+++ .xres = 0,
+++ .yres = 0,
+++ .xres_virtual = 0,
+++ .yres_virtual = 0,
+++ .xoffset = 0,
+++ .yoffset = 0,
+++ .bits_per_pixel = 0,
+++ .grayscale = 0,
+++ .red = {0, 8, 0},
+++ .green = {0, 8, 0},
+++ .blue = {0, 8, 0},
+++ .transp = {0, 0, 0},
+++ .nonstd = 0,
+++ .activate = FB_ACTIVATE_NOW,
+++ .height = -1,
+++ .width = -1,
+++ .accel_flags = 0,
+++ .pixclock = 0,
+++ .left_margin = 0,
+++ .right_margin = 0,
+++ .upper_margin = 0,
+++ .lower_margin = 0,
+++ .hsync_len = 0,
+++ .vsync_len = 0,
+++ .sync = 0,
+++ .vmode = FB_VMODE_NONINTERLACED,
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++ .reserved = {0, 0, 0, 0, 0, 0}
+++#endif
+++};
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++static struct fb_fix_screeninfo XGIfb_fix = {
+++ .id = "XGI",
+++ .type = FB_TYPE_PACKED_PIXELS,
+++ .xpanstep = 1,
+++ .ypanstep = 1,
+++};
+++static char myid[20];
+++static u32 pseudo_palette[17];
+++#endif
+++
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++static struct display XGI_disp;
+++
+++static struct display_switch XGIfb_sw;
+++
+++static struct {
+++ u16 blue, green, red, pad;
+++} XGI_palette[256];
+++
+++static union {
+++#ifdef FBCON_HAS_CFB16
+++ u16 cfb16[16];
+++#endif
+++#ifdef FBCON_HAS_CFB32
+++ u32 cfb32[16];
+++#endif
+++} XGI_fbcon_cmap;
+++
+++static int XGIfb_inverse = 0;
+++#endif
+++
+++/* display status */
+++static int XGIfb_off = 0;
+++static int XGIfb_crt1off = 0;
+++static int XGIfb_forcecrt1 = -1;
+++static int XGIvga_enabled = 0;
+++static int XGIfb_userom = 0;
+++//static int XGIfb_useoem = -1;
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++static int currcon = 0;
+++#endif
+++
+++/* global flags */
+++static int XGIfb_registered;
+++static int XGIfb_tvmode = 0;
+++static int XGIfb_mem = 0;
+++static int XGIfb_pdc = 0;
+++static int enable_dstn = 0;
+++static int XGIfb_ypan = -1;
+++
+++
+++int XGIfb_accel = 0;
+++
+++
+++static int XGIfb_hwcursor_size = 0;
+++static int XGIfb_CRT2_write_enable = 0;
+++
+++int XGIfb_crt2type = -1; /* TW: CRT2 type (for overriding autodetection) */
+++int XGIfb_tvplug = -1; /* PR: Tv plug type (for overriding autodetection) */
+++
+++int XGIfb_queuemode = -1; /* TW: Use MMIO queue mode by default (310/325 series only) */
+++
+++unsigned char XGIfb_detectedpdc = 0;
+++
+++unsigned char XGIfb_detectedlcda = 0xff;
+++
+++
+++
+++
+++/* TW: For ioctl XGIFB_GET_INFO */
+++/* XGIfb_info XGIfbinfo; */
+++
+++/* TW: Hardware extension; contains data on hardware */
+++HW_DEVICE_EXTENSION XGIhw_ext = {
+++ NULL, NULL, FALSE, NULL, NULL,
+++ 0, 0, 0, 0, 0, 0, 0, 0, 0,
+++ NULL, NULL, NULL, NULL,
+++ {0, 0, 0, 0},
+++ 0
+++};
+++
+++/* TW: XGI private structure */
+++VB_DEVICE_INFO XGI_Pr;
+++
+++/* card parameters */
+++static unsigned long XGIfb_mmio_size = 0;
+++static u8 XGIfb_caps = 0;
+++
+++typedef enum _XGI_CMDTYPE {
+++ MMIO_CMD = 0,
+++ AGP_CMD_QUEUE,
+++ VM_CMD_QUEUE,
+++} XGI_CMDTYPE;
+++
+++/* Supported XGI Chips list */
+++static struct board {
+++ u16 vendor, device;
+++ const char *name;
+++} XGIdev_list[] = {
+++ {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_20, "XG20"},
+++ {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_27, "XG27"},
+++ {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_40, "XGI 340"},
+++ {PCI_VENDOR_ID_XG, PCI_DEVICE_ID_XG_42, "XGI 342"},
+++ {0, 0, NULL}
+++};
+++
+++#define MD_XGI300 1
+++#define MD_XGI315 2
+++
+++/* mode table */
+++/* NOT const - will be patched for 1280x960 mode number chaos reasons */
+++struct _XGIbios_mode {
+++ char name[15];
+++ u8 mode_no;
+++ u16 vesa_mode_no_1; /* "XGI defined" VESA mode number */
+++ u16 vesa_mode_no_2; /* Real VESA mode numbers */
+++ u16 xres;
+++ u16 yres;
+++ u16 bpp;
+++ u16 rate_idx;
+++ u16 cols;
+++ u16 rows;
+++ u8 chipset;
+++} XGIbios_mode[] = {
+++#define MODE_INDEX_NONE 0 /* TW: index for mode=none */
+++ {"none", 0xFF, 0x0000, 0x0000, 0, 0, 0, 0, 0, 0, MD_XGI300|MD_XGI315}, /* TW: for mode "none" */
+++ {"320x240x16", 0x56, 0x0000, 0x0000, 320, 240, 16, 1, 40, 15, MD_XGI315},
+++ {"320x480x8", 0x5A, 0x0000, 0x0000, 320, 480, 8, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
+++ {"320x480x16", 0x5B, 0x0000, 0x0000, 320, 480, 16, 1, 40, 30, MD_XGI315}, /* TW: FSTN */
+++ {"640x480x8", 0x2E, 0x0101, 0x0101, 640, 480, 8, 1, 80, 30, MD_XGI300|MD_XGI315},
+++ {"640x480x16", 0x44, 0x0111, 0x0111, 640, 480, 16, 1, 80, 30, MD_XGI300|MD_XGI315},
+++ {"640x480x24", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315}, /* TW: That's for people who mix up color- and fb depth */
+++ {"640x480x32", 0x62, 0x013a, 0x0112, 640, 480, 32, 1, 80, 30, MD_XGI300|MD_XGI315},
+++ {"720x480x8", 0x31, 0x0000, 0x0000, 720, 480, 8, 1, 90, 30, MD_XGI300|MD_XGI315},
+++ {"720x480x16", 0x33, 0x0000, 0x0000, 720, 480, 16, 1, 90, 30, MD_XGI300|MD_XGI315},
+++ {"720x480x24", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
+++ {"720x480x32", 0x35, 0x0000, 0x0000, 720, 480, 32, 1, 90, 30, MD_XGI300|MD_XGI315},
+++ {"720x576x8", 0x32, 0x0000, 0x0000, 720, 576, 8, 1, 90, 36, MD_XGI300|MD_XGI315},
+++ {"720x576x16", 0x34, 0x0000, 0x0000, 720, 576, 16, 1, 90, 36, MD_XGI300|MD_XGI315},
+++ {"720x576x24", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
+++ {"720x576x32", 0x36, 0x0000, 0x0000, 720, 576, 32, 1, 90, 36, MD_XGI300|MD_XGI315},
+++ {"800x480x8", 0x70, 0x0000, 0x0000, 800, 480, 8, 1, 100, 30, MD_XGI300|MD_XGI315},
+++ {"800x480x16", 0x7a, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_XGI300|MD_XGI315},
+++ {"800x480x24", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
+++ {"800x480x32", 0x76, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_XGI300|MD_XGI315},
+++#define DEFAULT_MODE 33 /* TW: index for 800x600x8 */
+++#define DEFAULT_LCDMODE 33 /* TW: index for 800x600x8 */
+++#define DEFAULT_TVMODE 33 /* TW: index for 800x600x8 */
+++ {"800x600x8", 0x30, 0x0103, 0x0103, 800, 600, 8, 1, 100, 37, MD_XGI300|MD_XGI315},
+++ {"800x600x16", 0x47, 0x0114, 0x0114, 800, 600, 16, 1, 100, 37, MD_XGI300|MD_XGI315},
+++ {"800x600x24", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
+++ {"800x600x32", 0x63, 0x013b, 0x0115, 800, 600, 32, 1, 100, 37, MD_XGI300|MD_XGI315},
+++ {"1024x576x8", 0x71, 0x0000, 0x0000, 1024, 576, 8, 1, 128, 36, MD_XGI300|MD_XGI315},
+++ {"1024x576x16", 0x74, 0x0000, 0x0000, 1024, 576, 16, 1, 128, 36, MD_XGI300|MD_XGI315},
+++ {"1024x576x24", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
+++ {"1024x576x32", 0x77, 0x0000, 0x0000, 1024, 576, 32, 1, 128, 36, MD_XGI300|MD_XGI315},
+++ {"1024x600x8", 0x20, 0x0000, 0x0000, 1024, 600, 8, 1, 128, 37, MD_XGI300 }, /* TW: 300 series only */
+++ {"1024x600x16", 0x21, 0x0000, 0x0000, 1024, 600, 16, 1, 128, 37, MD_XGI300 },
+++ {"1024x600x24", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
+++ {"1024x600x32", 0x22, 0x0000, 0x0000, 1024, 600, 32, 1, 128, 37, MD_XGI300 },
+++ {"1024x768x8", 0x38, 0x0105, 0x0105, 1024, 768, 8, 1, 128, 48, MD_XGI300|MD_XGI315},
+++ {"1024x768x16", 0x4A, 0x0117, 0x0117, 1024, 768, 16, 1, 128, 48, MD_XGI300|MD_XGI315},
+++ {"1024x768x24", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
+++ {"1024x768x32", 0x64, 0x013c, 0x0118, 1024, 768, 32, 1, 128, 48, MD_XGI300|MD_XGI315},
+++ {"1152x768x8", 0x23, 0x0000, 0x0000, 1152, 768, 8, 1, 144, 48, MD_XGI300 }, /* TW: 300 series only */
+++ {"1152x768x16", 0x24, 0x0000, 0x0000, 1152, 768, 16, 1, 144, 48, MD_XGI300 },
+++ {"1152x768x24", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
+++ {"1152x768x32", 0x25, 0x0000, 0x0000, 1152, 768, 32, 1, 144, 48, MD_XGI300 },
+++ {"1280x720x8", 0x79, 0x0000, 0x0000, 1280, 720, 8, 1, 160, 45, MD_XGI300|MD_XGI315},
+++ {"1280x720x16", 0x75, 0x0000, 0x0000, 1280, 720, 16, 1, 160, 45, MD_XGI300|MD_XGI315},
+++ {"1280x720x24", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
+++ {"1280x720x32", 0x78, 0x0000, 0x0000, 1280, 720, 32, 1, 160, 45, MD_XGI300|MD_XGI315},
+++ {"1280x768x8", 0x23, 0x0000, 0x0000, 1280, 768, 8, 1, 160, 48, MD_XGI315}, /* TW: 310/325 series only */
+++ {"1280x768x16", 0x24, 0x0000, 0x0000, 1280, 768, 16, 1, 160, 48, MD_XGI315},
+++ {"1280x768x24", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
+++ {"1280x768x32", 0x25, 0x0000, 0x0000, 1280, 768, 32, 1, 160, 48, MD_XGI315},
+++#define MODEINDEX_1280x960 48
+++ {"1280x960x8", 0x7C, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_XGI300|MD_XGI315}, /* TW: Modenumbers being patched */
+++ {"1280x960x16", 0x7D, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_XGI300|MD_XGI315},
+++ {"1280x960x24", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
+++ {"1280x960x32", 0x7E, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_XGI300|MD_XGI315},
+++ {"1280x1024x8", 0x3A, 0x0107, 0x0107, 1280, 1024, 8, 1, 160, 64, MD_XGI300|MD_XGI315},
+++ {"1280x1024x16", 0x4D, 0x011a, 0x011a, 1280, 1024, 16, 1, 160, 64, MD_XGI300|MD_XGI315},
+++ {"1280x1024x24", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
+++ {"1280x1024x32", 0x65, 0x013d, 0x011b, 1280, 1024, 32, 1, 160, 64, MD_XGI300|MD_XGI315},
+++ {"1400x1050x8", 0x26, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_XGI315}, /* TW: 310/325 series only */
+++ {"1400x1050x16", 0x27, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_XGI315},
+++ {"1400x1050x24", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
+++ {"1400x1050x32", 0x28, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_XGI315},
+++ {"1600x1200x8", 0x3C, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_XGI300|MD_XGI315},
+++ {"1600x1200x16", 0x3D, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_XGI300|MD_XGI315},
+++ {"1600x1200x24", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
+++ {"1600x1200x32", 0x66, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_XGI300|MD_XGI315},
+++ {"1920x1440x8", 0x68, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_XGI300|MD_XGI315},
+++ {"1920x1440x16", 0x69, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_XGI300|MD_XGI315},
+++ {"1920x1440x24", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
+++ {"1920x1440x32", 0x6B, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_XGI300|MD_XGI315},
+++ {"2048x1536x8", 0x6c, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_XGI315}, /* TW: 310/325 series only */
+++ {"2048x1536x16", 0x6d, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_XGI315},
+++ {"2048x1536x24", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
+++ {"2048x1536x32", 0x6e, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_XGI315},
+++ {"\0", 0x00, 0, 0, 0, 0, 0, 0, 0}
+++};
+++
+++/* mode-related variables */
+++#ifdef MODULE
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++static int xgifb_mode_idx = 1;
+++#else
+++static int XGIfb_mode_idx = MODE_INDEX_NONE; /* Don't use a mode by default if we are a module */
+++#endif
+++#else
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++static int xgifb_mode_idx = -1; /* Use a default mode if we are inside the kernel */
+++#else
+++static int XGIfb_mode_idx = -1;
+++#endif
+++#endif
+++u8 XGIfb_mode_no = 0;
+++u8 XGIfb_rate_idx = 0;
+++
+++/* TW: CR36 evaluation */
+++const USHORT XGI300paneltype[] =
+++ { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
+++ LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
+++ LCD_1024x768, LCD_1024x768, LCD_1024x768,
+++ LCD_1024x768, LCD_1024x768, LCD_1024x768, LCD_1024x768 };
+++
+++const USHORT XGI310paneltype[] =
+++ { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
+++ LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
+++ LCD_1152x768, LCD_1400x1050,LCD_1280x768, LCD_1600x1200,
+++ LCD_1024x768, LCD_1024x768, LCD_1024x768 };
+++
+++static const struct _XGI_crt2type {
+++ char name[10];
+++ int type_no;
+++ int tvplug_no;
+++} XGI_crt2type[] = {
+++ {"NONE", 0, -1},
+++ {"LCD", DISPTYPE_LCD, -1},
+++ {"TV", DISPTYPE_TV, -1},
+++ {"VGA", DISPTYPE_CRT2, -1},
+++ {"SVIDEO", DISPTYPE_TV, TVPLUG_SVIDEO},
+++ {"COMPOSITE", DISPTYPE_TV, TVPLUG_COMPOSITE},
+++ {"SCART", DISPTYPE_TV, TVPLUG_SCART},
+++ {"none", 0, -1},
+++ {"lcd", DISPTYPE_LCD, -1},
+++ {"tv", DISPTYPE_TV, -1},
+++ {"vga", DISPTYPE_CRT2, -1},
+++ {"svideo", DISPTYPE_TV, TVPLUG_SVIDEO},
+++ {"composite", DISPTYPE_TV, TVPLUG_COMPOSITE},
+++ {"scart", DISPTYPE_TV, TVPLUG_SCART},
+++ {"\0", -1, -1}
+++};
+++
+++/* Queue mode selection for 310 series */
+++static const struct _XGI_queuemode {
+++ char name[6];
+++ int type_no;
+++} XGI_queuemode[] = {
+++ {"AGP", AGP_CMD_QUEUE},
+++ {"VRAM", VM_CMD_QUEUE},
+++ {"MMIO", MMIO_CMD},
+++ {"agp", AGP_CMD_QUEUE},
+++ {"vram", VM_CMD_QUEUE},
+++ {"mmio", MMIO_CMD},
+++ {"\0", -1}
+++};
+++
+++/* TV standard */
+++static const struct _XGI_tvtype {
+++ char name[6];
+++ int type_no;
+++} XGI_tvtype[] = {
+++ {"PAL", 1},
+++ {"NTSC", 2},
+++ {"pal", 1},
+++ {"ntsc", 2},
+++ {"\0", -1}
+++};
+++
+++static const struct _XGI_vrate {
+++ u16 idx;
+++ u16 xres;
+++ u16 yres;
+++ u16 refresh;
+++} XGIfb_vrate[] = {
+++ {1, 640, 480, 60}, {2, 640, 480, 72}, {3, 640, 480, 75}, {4, 640, 480, 85},
+++ {5, 640, 480,100}, {6, 640, 480, 120}, {7, 640, 480, 160}, {8, 640, 480, 200},
+++ {1, 720, 480, 60},
+++ {1, 720, 576, 58},
+++ {1, 800, 480, 60}, {2, 800, 480, 75}, {3, 800, 480, 85},
+++ {1, 800, 600, 60}, {2, 800, 600, 72}, {3, 800, 600, 75},
+++ {4, 800, 600, 85}, {5, 800, 600, 100}, {6, 800, 600, 120}, {7, 800, 600, 160},
+++ {1, 1024, 768, 60}, {2, 1024, 768, 70}, {3, 1024, 768, 75},
+++ {4, 1024, 768, 85}, {5, 1024, 768, 100}, {6, 1024, 768, 120},
+++ {1, 1024, 576, 60}, {2, 1024, 576, 75}, {3, 1024, 576, 85},
+++ {1, 1024, 600, 60},
+++ {1, 1152, 768, 60},
+++ {1, 1280, 720, 60}, {2, 1280, 720, 75}, {3, 1280, 720, 85},
+++ {1, 1280, 768, 60},
+++ {1, 1280, 1024, 60}, {2, 1280, 1024, 75}, {3, 1280, 1024, 85},
+++ {1, 1280, 960, 70},
+++ {1, 1400, 1050, 60},
+++ {1, 1600, 1200, 60}, {2, 1600, 1200, 65}, {3, 1600, 1200, 70}, {4, 1600, 1200, 75},
+++ {5, 1600, 1200, 85}, {6, 1600, 1200, 100}, {7, 1600, 1200, 120},
+++ {1, 1920, 1440, 60}, {2, 1920, 1440, 65}, {3, 1920, 1440, 70}, {4, 1920, 1440, 75},
+++ {5, 1920, 1440, 85}, {6, 1920, 1440, 100},
+++ {1, 2048, 1536, 60}, {2, 2048, 1536, 65}, {3, 2048, 1536, 70}, {4, 2048, 1536, 75},
+++ {5, 2048, 1536, 85},
+++ {0, 0, 0, 0}
+++};
+++
+++static const struct _chswtable {
+++ int subsysVendor;
+++ int subsysCard;
+++ char *vendorName;
+++ char *cardName;
+++} mychswtable[] = {
+++ { 0x1631, 0x1002, "Mitachi", "0x1002" },
+++ { 0, 0, "" , "" }
+++};
+++
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++/* Offscreen layout */
+++typedef struct _XGI_GLYINFO {
+++ unsigned char ch;
+++ int fontwidth;
+++ int fontheight;
+++ u8 gmask[72];
+++ int ngmask;
+++} XGI_GLYINFO;
+++#endif
+++
+++typedef struct _XGI_OH {
+++ struct _XGI_OH *poh_next;
+++ struct _XGI_OH *poh_prev;
+++ unsigned long offset;
+++ unsigned long size;
+++} XGI_OH;
+++
+++typedef struct _XGI_OHALLOC {
+++ struct _XGI_OHALLOC *poha_next;
+++ XGI_OH aoh[1];
+++} XGI_OHALLOC;
+++
+++typedef struct _XGI_HEAP {
+++ XGI_OH oh_free;
+++ XGI_OH oh_used;
+++ XGI_OH *poh_freelist;
+++ XGI_OHALLOC *poha_chain;
+++ unsigned long max_freesize;
+++} XGI_HEAP;
+++
+++static unsigned long XGIfb_hwcursor_vbase;
+++
+++static unsigned long XGIfb_heap_start;
+++static unsigned long XGIfb_heap_end;
+++static unsigned long XGIfb_heap_size;
+++static XGI_HEAP XGIfb_heap;
+++
+++// Eden Chen
+++static const struct _XGI_TV_filter {
+++ u8 filter[9][4];
+++} XGI_TV_filter[] = {
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_1 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_2 */
+++ {0xF5,0xEE,0x1B,0x44},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xEB,0x04,0x25,0x18},
+++ {0xF1,0x05,0x1F,0x16},
+++ {0xF6,0x06,0x1A,0x14},
+++ {0xFA,0x06,0x16,0x14},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_3 */
+++ {0xF1,0x04,0x1F,0x18},
+++ {0xEE,0x0D,0x22,0x06},
+++ {0xF7,0x06,0x19,0x14},
+++ {0xF4,0x0B,0x1C,0x0A},
+++ {0xFA,0x07,0x16,0x12},
+++ {0xF9,0x0A,0x17,0x0C},
+++ {0x00,0x07,0x10,0x12},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_4 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_5 */
+++ {0xF5,0xEE,0x1B,0x44},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xEB,0x04,0x25,0x18},
+++ {0xF1,0x05,0x1F,0x16},
+++ {0xF6,0x06,0x1A,0x14},
+++ {0xFA,0x06,0x16,0x14},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_6 */
+++ {0xEB,0x04,0x25,0x18},
+++ {0xE7,0x0E,0x29,0x04},
+++ {0xEE,0x0C,0x22,0x08},
+++ {0xF6,0x0B,0x1A,0x0A},
+++ {0xF9,0x0A,0x17,0x0C},
+++ {0xFC,0x0A,0x14,0x0C},
+++ {0x00,0x08,0x10,0x10},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_7 */
+++ {0xEC,0x02,0x24,0x1C},
+++ {0xF2,0x04,0x1E,0x18},
+++ {0xEB,0x15,0x25,0xF6},
+++ {0xF4,0x10,0x1C,0x00},
+++ {0xF8,0x0F,0x18,0x02},
+++ {0x00,0x04,0x10,0x18},
+++ {0x01,0x06,0x0F,0x14},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_0 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_1 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_2 */
+++ {0xF5,0xEE,0x1B,0x44},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xF1,0xF7,0x01,0x32},
+++ {0xF5,0xFB,0x1B,0x2A},
+++ {0xF9,0xFF,0x17,0x22},
+++ {0xFB,0x01,0x15,0x1E},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_3 */
+++ {0xF5,0xFB,0x1B,0x2A},
+++ {0xEE,0xFE,0x22,0x24},
+++ {0xF3,0x00,0x1D,0x20},
+++ {0xF9,0x03,0x17,0x1A},
+++ {0xFB,0x02,0x14,0x1E},
+++ {0xFB,0x04,0x15,0x18},
+++ {0x00,0x06,0x10,0x14},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_4 */
+++ {0x00,0xE0,0x10,0x60},
+++ {0x00,0xEE,0x10,0x44},
+++ {0x00,0xF4,0x10,0x38},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0x00,0x00,0x10,0x20},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_5 */
+++ {0xF5,0xEE,0x1B,0x44},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xF1,0xF7,0x1F,0x32},
+++ {0xF5,0xFB,0x1B,0x2A},
+++ {0xF9,0xFF,0x17,0x22},
+++ {0xFB,0x01,0x15,0x1E},
+++ {0x00,0x04,0x10,0x18},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_6 */
+++ {0xF5,0xEE,0x1B,0x2A},
+++ {0xEE,0xFE,0x22,0x24},
+++ {0xF3,0x00,0x1D,0x20},
+++ {0xF9,0x03,0x17,0x1A},
+++ {0xFB,0x02,0x14,0x1E},
+++ {0xFB,0x04,0x15,0x18},
+++ {0x00,0x06,0x10,0x14},
+++ {0xFF,0xFF,0xFF,0xFF} }},
+++ { {{0x00,0x00,0x00,0x40}, /* PALFilter_7 */
+++ {0xF5,0xEE,0x1B,0x44},
+++ {0xF8,0xF4,0x18,0x38},
+++ {0xFC,0xFB,0x14,0x2A},
+++ {0xEB,0x05,0x25,0x16},
+++ {0xF1,0x05,0x1F,0x16},
+++ {0xFA,0x07,0x16,0x12},
+++ {0x00,0x07,0x10,0x12},
+++ {0xFF,0xFF,0xFF,0xFF} }}
+++};
+++
+++static int filter = -1;
+++static unsigned char filter_tb;
+++
+++
+++/* ---------------------- Routine prototypes ------------------------- */
+++
+++/* Interface used by the world */
+++#ifndef MODULE
+++XGIINITSTATIC XGIfb_setup(char *options);
+++#endif
+++
+++/* Interface to the low level console driver */
+++
+++
+++
+++/* fbdev routines */
+++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
+++ int XGIfb_init(void);
+++static int XGIfb_get_fix(struct fb_fix_screeninfo *fix,
+++ int con,
+++ struct fb_info *info);
+++static int XGIfb_get_var(struct fb_var_screeninfo *var,
+++ int con,
+++ struct fb_info *info);
+++static int XGIfb_set_var(struct fb_var_screeninfo *var,
+++ int con,
+++ struct fb_info *info);
+++static void XGIfb_crtc_to_var(struct fb_var_screeninfo *var);
+++static int XGIfb_get_cmap(struct fb_cmap *cmap,
+++ int kspc,
+++ int con,
+++ struct fb_info *info);
+++static int XGIfb_set_cmap(struct fb_cmap *cmap,
+++ int kspc,
+++ int con,
+++ struct fb_info *info);
+++static int XGIfb_update_var(int con,
+++ struct fb_info *info);
+++static int XGIfb_switch(int con,
+++ struct fb_info *info);
+++static void XGIfb_blank(int blank,
+++ struct fb_info *info);
+++static void XGIfb_set_disp(int con,
+++ struct fb_var_screeninfo *var,
+++ struct fb_info *info);
+++static int XGI_getcolreg(unsigned regno, unsigned *red, unsigned *green,
+++ unsigned *blue, unsigned *transp,
+++ struct fb_info *fb_info);
+++static void XGIfb_do_install_cmap(int con,
+++ struct fb_info *info);
+++static void XGI_get_glyph(struct fb_info *info,
+++ XGI_GLYINFO *gly);
+++static int XGIfb_mmap(struct fb_info *info, struct file *file,
+++ struct vm_area_struct *vma);
+++static int XGIfb_ioctl(struct inode *inode, struct file *file,
+++ unsigned int cmd, unsigned long arg, int con,
+++ struct fb_info *info);
+++#endif
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
+++XGIINITSTATIC xgifb_init(void);
+++static int XGIfb_set_par(struct fb_info *info);
+++static int XGIfb_blank(int blank,
+++ struct fb_info *info);
+++/*static int XGIfb_mmap(struct fb_info *info, struct file *file,
+++ struct vm_area_struct *vma);
+++*/
+++extern void fbcon_XGI_fillrect(struct fb_info *info,
+++ const struct fb_fillrect *rect);
+++extern void fbcon_XGI_copyarea(struct fb_info *info,
+++ const struct fb_copyarea *area);
+++#if 0
+++extern void cfb_imageblit(struct fb_info *info,
+++ const struct fb_image *image);
+++#endif
+++extern int fbcon_XGI_sync(struct fb_info *info);
+++
+++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)
+++static int XGIfb_ioctl(struct fb_info *info, unsigned int cmd,
+++ unsigned long arg);
+++#else
+++static int XGIfb_ioctl(struct inode *inode,
+++ struct file *file,
+++ unsigned int cmd,
+++ unsigned long arg,
+++ struct fb_info *info);
+++#endif
+++
+++/*
+++extern int XGIfb_mode_rate_to_dclock(VB_DEVICE_INFO *XGI_Pr,
+++ PXGI_HW_DEVICE_INFO HwDeviceExtension,
+++ unsigned char modeno, unsigned char rateindex);
+++extern int XGIfb_mode_rate_to_ddata(VB_DEVICE_INFO *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension,
+++ unsigned char modeno, unsigned char rateindex,
+++ unsigned int *left_margin, unsigned int *right_margin,
+++ unsigned int *upper_margin, unsigned int *lower_margin,
+++ unsigned int *hsync_len, unsigned int *vsync_len,
+++ unsigned int *sync, unsigned int *vmode);
+++*/
+++#endif
+++ extern BOOLEAN XGI_SearchModeID( USHORT ModeNo,USHORT *ModeIdIndex, PVB_DEVICE_INFO );
+++static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
+++ struct fb_info *info);
+++
+++/* Internal 2D accelerator functions */
+++extern int XGIfb_initaccel(void);
+++extern void XGIfb_syncaccel(void);
+++
+++/* Internal general routines */
+++static void XGIfb_search_mode(const char *name);
+++static int XGIfb_validate_mode(int modeindex);
+++static u8 XGIfb_search_refresh_rate(unsigned int rate);
+++static int XGIfb_setcolreg(unsigned regno, unsigned red, unsigned green,
+++ unsigned blue, unsigned transp,
+++ struct fb_info *fb_info);
+++static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
+++ struct fb_