On Nov 10, 2010, at 8:23 AM, Bruce Ashfield wrote:
On 10-11-10 09:11 AM, Kumar Gala wrote:
Indeed. I fell back to a safe multilib. I'm willing
On Nov 10, 2010, at 7:58 AM, Bruce Ashfield wrote:
On 10-11-10 08:38 AM, Bruce Ashfield wrote:We should NOT be using soft-float for mpc8315e (it has HW floating point on this chip).
On 10-11-10 01:46 AM, Kumar Gala wrote:To clarify on this point, the kernel configuration
Why does the meta/conf/machine/mpc8315e-rdb.conf list TARGET_FPU asIt isn't used at the moment, so we can safely
SPE. This isn't correct for an MPC8313 SoC.
It was a hold over from when I initially created
the BSP, and I've since changed it locally, but
haven't sent the updated BSP yet.
is NOT using SPE for this, and I was attempting to
use the FPU setting to trigger some different gcc
flags during development the base of that test was
an e500 board, so the SPE setting leaked in, but is
At the moment, it is actually using soft-float, and
I had planned to submit a change to clarify that.
If there's another option, let me know and I'll
rebase my patches and change it again.
to try again and see if the gcc bootstrap phases will
The kernel was fine, and is fine, it was userspace
that caused problems for me .. and that's definitely not
an area where my expertise lies :)
I needed something that worked, and had to excplicitly
chose to ignore the FPU temporarily, but revisiting that
now seems like a good idea.
We've got tonnes of experience and BSPs to draw from
Any plans to get an e500 based system going before the rev1.0 release?
here. The selection of some of these BSPs was (largely)
based on cost and availability. If we can get our
hands on a suitable e500 replacement .. the switch is
If we can get a toolchain and basic build I'm happy to help on the HW side and getting kernel, etc worked out.
I'd like to get a semi-generic setup going for an e500v2 based system.