On 11/4/10 8:53 AM, Leon Woestenberg wrote:

Hello Bruce,

On Wed, Nov 3, 2010 at 4:49 PM, Bruce Ashfield
<bruce.ashfield@...> wrote:

On 10-11-03 11:34 AM, Frans Meulenbroeks wrote:

I'm trying to add my powerpc board to yocto (as a test). This board
mpc8536ds has an e500v2 core. It works under OE (MACHINE =

When doing the initial freescale board work, I ran into
similar (same) problems with userspace (and gcc), and
ended up backing off to a more generic optimization level
to get things working. So there are a definitely few things
to do. I was experimenting with FPU settings, but haven't
gone back to look again.

Was combo did you see problems with?

I added e500v2 support to OpenEmbedded more than one year ago and have
not seen issues yet in userspace GCC.
Recently been playing with SPE which also ran fine:
http://www.sidebranch.nl/spe-apu

Regards,

I'm not sure we have all of the pieces in place yet in the toolchain.

My quick looking of my own e500v1 & e500v2 support includes both libc patches and compiler patches.

Just an FYI.. the compiler flags for e500v1:

-mcpu=8540 -mfloat-gprs=single -mspe=yes -mabi=spe

and for e500v2:

-mcpu=8548 -mfloat-gprs=double -mspe=yes -mabi=spe

Neither of those would be compatible with the existing "ppc" packaging arch. We will need to generate at least one new packaging arch type, likely 2 (one for each). Maybe called ppc_spe or something similar?

The key thing is that each of these cpu's has not only additional SPE instructions, but also additional registers, specific to those instructions, to pass values from function to function. It's not just using the PPC soft-float ABI..

--Mark