<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; color: rgb(0, 0, 0); font-size: 14px; font-family: Calibri, sans-serif;"><div><div>Kumar,</div><div><br></div><div>On Intel there is an upcoming modification to the ACPI specification that will enable you to describe in ACPI via named method (_PRP) what you can do in Device Tree for the other architectures. In the meantime, board files are the most expedient option. For more detail on both the _PRP and board files, see my "How not to write an x86 platform driver" presentation at the 2013 Embedded Linux Europe Conference:</div><div><br></div><div><a href="http://events.linuxfoundation.org/sites/events/files/slides/x86-platform.pdf">http://events.linuxfoundation.org/sites/events/files/slides/x86-platform.pdf</a></div><div><br></div><div>And I think there is video..... but I can't seem to find it. Perhaps your google foo will prove superior ;-)</div><div><br></div><div><br></div><div><br></div><div><div>-- </div><div>Darren Hart</div><div>Yocto Project - Linux Kernel</div><div>Intel Open Source Technology Center</div></div></div><div><br></div><span id="OLK_SRC_BODY_SECTION"><div style="font-family:Calibri; font-size:11pt; text-align:left; color:black; BORDER-BOTTOM: medium none; BORDER-LEFT: medium none; PADDING-BOTTOM: 0in; PADDING-LEFT: 0in; PADDING-RIGHT: 0in; BORDER-TOP: #b5c4df 1pt solid; BORDER-RIGHT: medium none; PADDING-TOP: 3pt"><span style="font-weight:bold">From: </span> "chiau.ee.chew" <<a href="mailto:chiau.ee.chew@intel.com">chiau.ee.chew@intel.com</a>><br><span style="font-weight:bold">Date: </span> Monday, March 17, 2014 at 22:37<br><span style="font-weight:bold">To: </span> Darren Hart <<a href="mailto:dvhart@linux.intel.com">dvhart@linux.intel.com</a>>, Kumar Nagaraj <<a href="mailto:kumarn@hcl.com">kumarn@hcl.com</a>>, "<a href="mailto:meta-intel@yoctoproject.org">meta-intel@yoctoproject.org</a>" <<a href="mailto:meta-intel@yoctoproject.org">meta-intel@yoctoproject.org</a>><br><span style="font-weight:bold">Cc: </span> "<a href="mailto:nvijaykumar.engineer@gmail.com">nvijaykumar.engineer@gmail.com</a>" <<a href="mailto:nvijaykumar.engineer@gmail.com">nvijaykumar.engineer@gmail.com</a>><br><span style="font-weight:bold">Subject: </span> RE: [meta-intel] gpio sus configuration as interrupt<br></div><div><br></div><blockquote id="MAC_OUTLOOK_ATTRIBUTION_BLOCKQUOTE" style="BORDER-LEFT: #b5c4df 5 solid; PADDING:0 0 0 5; MARGIN:0 0 0 5;"><div xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:x="urn:schemas-microsoft-com:office:excel" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"><meta http-equiv="Content-Type" content="text/html; charset=us-ascii"><meta name="Generator" content="Microsoft Word 14 (filtered medium)"><style><!--
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</o:shapelayout></xml><![endif]--><div lang="EN-US" link="blue" vlink="purple"><div class="WordSection1"><p class="MsoNormal"><span style="color:#1F497D">The same GPIO IP is being used across different variants of BayTrail. The patch that you pointed out is the correct GPIO driver to be used for BYT-I .<o:p></o:p></span></p><p class="MsoNormal"><a name="_MailEndCompose"><span style="color:#1F497D"><o:p> </o:p></span></a></p><div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"><div><div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in"><p class="MsoNormal"><b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;"> Darren Hart [<a href="mailto:dvhart@linux.intel.com">mailto:dvhart@linux.intel.com</a>]
<br><b>Sent:</b> Tuesday, March 18, 2014 6:56 AM<br><b>To:</b> Kumar Nagaraj; <a href="mailto:meta-intel@yoctoproject.org">meta-intel@yoctoproject.org</a><br><b>Cc:</b> <a href="mailto:nvijaykumar.engineer@gmail.com">nvijaykumar.engineer@gmail.com</a>; Chew, Chiau Ee<br><b>Subject:</b> Re: [meta-intel] gpio sus configuration as interrupt<o:p></o:p></span></p></div></div><p class="MsoNormal"><o:p> </o:p></p><div><div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black">Adding Chiau Ee.<o:p></o:p></span></p></div><div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black">-- <o:p></o:p></span></p></div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black">Darren Hart<o:p></o:p></span></p></div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black">Yocto Project - Linux Kernel<o:p></o:p></span></p></div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black">Intel Open Source Technology Center<o:p></o:p></span></p></div></div></div></div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black"><o:p> </o:p></span></p></div><div style="border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in"><p class="MsoNormal"><b><span style="color:black">From: </span></b><span style="color:black">Kumar Nagaraj <<a href="mailto:kumarn@hcl.com">kumarn@hcl.com</a>><br><b>Date: </b>Wednesday, March 12, 2014 at 9:23<br><b>To: </b>"<a href="mailto:meta-intel@yoctoproject.org">meta-intel@yoctoproject.org</a>" <<a href="mailto:meta-intel@yoctoproject.org">meta-intel@yoctoproject.org</a>><br><b>Cc: </b>"<a href="mailto:nvijaykumar.engineer@gmail.com">nvijaykumar.engineer@gmail.com</a>" <<a href="mailto:nvijaykumar.engineer@gmail.com">nvijaykumar.engineer@gmail.com</a>><br><b>Subject: </b>[meta-intel] gpio sus configuration as interrupt<o:p></o:p></span></p></div><div><p class="MsoNormal"><span style="font-size:10.5pt;color:black"><o:p> </o:p></span></p></div><blockquote style="border:none;border-left:solid #B5C4DF 4.5pt;padding:0in 0in 0in 4.0pt;margin-left:3.75pt;margin-right:0in" id="MAC_OUTLOOK_ATTRIBUTION_BLOCKQUOTE"><div><div><p class="MsoNormal"><span style="color:black">Hai,<o:p></o:p></span></p><p class="MsoNormal"><span style="color:black"> Can some please clarify my queries below?<o:p></o:p></span></p><p class="MsoNormal"><span style="color:black"> <o:p></o:p></span></p><p class="Default" style="margin-left:.5in;text-indent:-.25in;mso-list:l0 level1 lfo2"><!--[if !supportLists]--><span style="mso-list:Ignore">1.<span style="font-style: normal; font-variant: normal; font-weight: normal; font-size: 7pt; line-height: normal; font-family: 'Times New Roman';">
</span></span><!--[endif]-->In <b>E3845 </b>Bay Trail-I SOC data sheet I see only 2 register banks South Core & SUS.However in the patch
<b>0002-gpio-add-support-for-Intel-Baytrail-GPIO-controller</b> an additional register bank North Core is also listed. I am thinking that this patch refers to some other version of Bay Trail SOC.<span style="background:yellow;mso-highlight:yellow">Can someone
confirm?</span><o:p></o:p></p><p class="Default" style="margin-left:.5in;text-indent:-.25in;mso-list:l0 level1 lfo2"><!--[if !supportLists]--><span style="mso-list:Ignore">2.<span style="font-style: normal; font-variant: normal; font-weight: normal; font-size: 7pt; line-height: normal; font-family: 'Times New Roman';">
</span></span><!--[endif]-->This query is regarding configuring the gpios as interrupts .I have a use case in which
<b>EVQ-Q1E06K</b> provides the steering wheel switches ( HOME,PREV,NEXT,VOL+,VOL-) are connected to gpios GPIO_S5[00], GPIO_S5[01]… GPIO_S5[04] as inputs for a Bay Trail-I SOC.It is expected to trigger interrupt on these gpios when any switch is pressed.<o:p></o:p></p><p class="Default" style="margin-left:.5in">Iam thinking that I will have to configure the SUS pins 0 to 4 as gpios to irqs.Can someone provide inputs on how I achieve this?I referred existing gpio_keys.c sample code & found that it can be achieved by configuring
device tree. Am not sure how I can do this.Please correct me & also provide your ideas.
<o:p></o:p></p><p class="Default"> <o:p></o:p></p><p class="Default">Thanks & Regards,<o:p></o:p></p><p class="Default">Kumar<o:p></o:p></p><p class="MsoNormal"><span style="color:gray"><br><br></span><span style="font-size: 7pt; font-family: Arial, sans-serif; color: gray;">::DISCLAIMER::<br>
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